提交 d3131ee5 编写于 作者: W Wayne Lin

Nuvoton release/update.

(1) Support NK-N9H30 board.
(2) Change Mutex's flag to RT_IPC_FLAG_PRIO from RT_IPC_FLAG_FIFO.
上级 f0689087
? Nuvoton BSP descriptions Nuvoton BSP descriptions
Current supported BSP shown in below table: Current supported BSP shown in below table:
| **BSP folder** | **Board name** | | **BSP Folder** | **Board Name** |
|:------------------------- |:-------------------------- | |:------------------------- |:-------------------------- |
| [numaker-iot-m487](numaker-iot-m487) | Nuvoton NuMaker-IoT-M487 | | [numaker-iot-m487](numaker-iot-m487) | Nuvoton NuMaker-IoT-M487 |
| [numaker-pfm-m487](numaker-pfm-m487) | Nuvoton NuMaker-PFM-M487 | | [numaker-pfm-m487](numaker-pfm-m487) | Nuvoton NuMaker-PFM-M487 |
| [nk-980iot](nk-980iot) | Nuvoton NK-980IOT | | [nk-980iot](nk-980iot) | Nuvoton NK-980IOT |
| [numaker-m2354](numaker-m2354) | Nuvoton NuMaker-M2354 | | [numaker-m2354](numaker-m2354) | Nuvoton NuMaker-M2354 |
| [nk-rtu980](nk-rtu980) | Nuvoton NK-RTU980 | | [nk-rtu980](nk-rtu980) | Nuvoton NK-RTU980 |
\ No newline at end of file | [nk-n9h30](nk-n9h30) | Nuvoton NK-N9H30 |
\ No newline at end of file
...@@ -94,7 +94,7 @@ rt_err_t nu_crc_init(void) ...@@ -94,7 +94,7 @@ rt_err_t nu_crc_init(void)
{ {
SYS_ResetModule(CRC_RST); SYS_ResetModule(CRC_RST);
rt_mutex_init(&s_CRC_mutex, NU_CRYPTO_CRC_NAME, RT_IPC_FLAG_FIFO); rt_mutex_init(&s_CRC_mutex, NU_CRYPTO_CRC_NAME, RT_IPC_FLAG_PRIO);
return RT_EOK; return RT_EOK;
} }
......
...@@ -82,11 +82,11 @@ static rt_err_t nu_crypto_init(void) ...@@ -82,11 +82,11 @@ static rt_err_t nu_crypto_init(void)
SHA_ENABLE_INT(CRPT); SHA_ENABLE_INT(CRPT);
//init cipher mutex //init cipher mutex
rt_mutex_init(&s_AES_mutex, NU_HWCRYPTO_AES_NAME, RT_IPC_FLAG_FIFO); rt_mutex_init(&s_AES_mutex, NU_HWCRYPTO_AES_NAME, RT_IPC_FLAG_PRIO);
rt_mutex_init(&s_SHA_mutex, NU_HWCRYPTO_SHA_NAME, RT_IPC_FLAG_FIFO); rt_mutex_init(&s_SHA_mutex, NU_HWCRYPTO_SHA_NAME, RT_IPC_FLAG_PRIO);
#if !defined(BSP_USING_TRNG) #if !defined(BSP_USING_TRNG)
PRNG_ENABLE_INT(CRPT); PRNG_ENABLE_INT(CRPT);
rt_mutex_init(&s_PRNG_mutex, NU_HWCRYPTO_PRNG_NAME, RT_IPC_FLAG_FIFO); rt_mutex_init(&s_PRNG_mutex, NU_HWCRYPTO_PRNG_NAME, RT_IPC_FLAG_PRIO);
#endif #endif
return RT_EOK; return RT_EOK;
......
...@@ -314,7 +314,7 @@ static int nu_fmc_init(void) ...@@ -314,7 +314,7 @@ static int nu_fmc_init(void)
FMC_ENABLE_ISP(); FMC_ENABLE_ISP();
SYS_LockReg(); SYS_LockReg();
g_mutex_fmc = rt_mutex_create("nu_fmc_lock", RT_IPC_FLAG_FIFO); g_mutex_fmc = rt_mutex_create("nu_fmc_lock", RT_IPC_FLAG_PRIO);
/* PKG_USING_FAL */ /* PKG_USING_FAL */
#if defined(PKG_USING_FAL) #if defined(PKG_USING_FAL)
......
...@@ -210,7 +210,7 @@ static void nu_pdma_init(void) ...@@ -210,7 +210,7 @@ static void nu_pdma_init(void)
if (nu_pdma_inited) if (nu_pdma_inited)
return; return;
g_mutex_sg = rt_mutex_create("sgtbles", RT_IPC_FLAG_FIFO); g_mutex_sg = rt_mutex_create("sgtbles", RT_IPC_FLAG_PRIO);
RT_ASSERT(g_mutex_sg != RT_NULL); RT_ASSERT(g_mutex_sg != RT_NULL);
nu_pdma_chn_mask = ~(NU_PDMA_CH_Msk); nu_pdma_chn_mask = ~(NU_PDMA_CH_Msk);
...@@ -534,7 +534,7 @@ rt_err_t nu_pdma_desc_setup(int i32ChannID, nu_pdma_desc_t dma_desc, uint32_t u3 ...@@ -534,7 +534,7 @@ rt_err_t nu_pdma_desc_setup(int i32ChannID, nu_pdma_desc_t dma_desc, uint32_t u3
goto exit_nu_pdma_desc_setup; goto exit_nu_pdma_desc_setup;
else if ((u32AddrSrc % (u32DataWidth / 8)) || (u32AddrDst % (u32DataWidth / 8))) else if ((u32AddrSrc % (u32DataWidth / 8)) || (u32AddrDst % (u32DataWidth / 8)))
goto exit_nu_pdma_desc_setup; goto exit_nu_pdma_desc_setup;
else if ( i32TransferCnt > NU_PDMA_MAX_TXCNT ) else if (i32TransferCnt > NU_PDMA_MAX_TXCNT)
goto exit_nu_pdma_desc_setup; goto exit_nu_pdma_desc_setup;
PDMA = NU_PDMA_GET_BASE(i32ChannID); PDMA = NU_PDMA_GET_BASE(i32ChannID);
...@@ -890,7 +890,7 @@ static void nu_pdma_memfun_actor_init(void) ...@@ -890,7 +890,7 @@ static void nu_pdma_memfun_actor_init(void)
nu_pdma_memfun_actor_maxnum = i; nu_pdma_memfun_actor_maxnum = i;
nu_pdma_memfun_actor_mask = ~(((1 << i) - 1)); nu_pdma_memfun_actor_mask = ~(((1 << i) - 1));
nu_pdma_memfun_actor_pool_sem = rt_sem_create("mempool_sem", nu_pdma_memfun_actor_maxnum, RT_IPC_FLAG_FIFO); nu_pdma_memfun_actor_pool_sem = rt_sem_create("mempool_sem", nu_pdma_memfun_actor_maxnum, RT_IPC_FLAG_FIFO);
nu_pdma_memfun_actor_pool_lock = rt_mutex_create("mempool_lock", RT_IPC_FLAG_FIFO); nu_pdma_memfun_actor_pool_lock = rt_mutex_create("mempool_lock", RT_IPC_FLAG_PRIO);
} }
} }
......
...@@ -161,10 +161,10 @@ exit_nu_qspi_bus_configure: ...@@ -161,10 +161,10 @@ exit_nu_qspi_bus_configure:
return -(ret); return -(ret);
} }
#if defined(RT_SFUD_USING_QSPI)
static int nu_qspi_mode_config(struct nu_spi *qspi_bus, rt_uint8_t *tx, rt_uint8_t *rx, int qspi_lines) static int nu_qspi_mode_config(struct nu_spi *qspi_bus, rt_uint8_t *tx, rt_uint8_t *rx, int qspi_lines)
{ {
QSPI_T *qspi_base = (QSPI_T *)qspi_bus->spi_base; QSPI_T *qspi_base = (QSPI_T *)qspi_bus->spi_base;
#if defined(RT_SFUD_USING_QSPI)
if (qspi_lines > 1) if (qspi_lines > 1)
{ {
if (tx) if (tx)
...@@ -199,13 +199,13 @@ static int nu_qspi_mode_config(struct nu_spi *qspi_bus, rt_uint8_t *tx, rt_uint8 ...@@ -199,13 +199,13 @@ static int nu_qspi_mode_config(struct nu_spi *qspi_bus, rt_uint8_t *tx, rt_uint8
} }
} }
else else
#endif
{ {
QSPI_DISABLE_DUAL_MODE(qspi_base); QSPI_DISABLE_DUAL_MODE(qspi_base);
QSPI_DISABLE_QUAD_MODE(qspi_base); QSPI_DISABLE_QUAD_MODE(qspi_base);
} }
return qspi_lines; return qspi_lines;
} }
#endif
static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_message *message) static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
{ {
...@@ -298,9 +298,11 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_ ...@@ -298,9 +298,11 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
qspi_message->dummy_cycles / (8 / u8last), qspi_message->dummy_cycles / (8 / u8last),
1); 1);
} }
/* Data stage */ /* Data stage */
nu_qspi_mode_config(qspi_bus, (rt_uint8_t *) message->send_buf, (rt_uint8_t *) message->recv_buf, qspi_message->qspi_data_lines); nu_qspi_mode_config(qspi_bus, (rt_uint8_t *) message->send_buf, (rt_uint8_t *) message->recv_buf, qspi_message->qspi_data_lines);
#else
/* Data stage */
nu_qspi_mode_config(qspi_bus, RT_NULL, RT_NULL, 1);
#endif //#if defined(RT_SFUD_USING_QSPI) #endif //#if defined(RT_SFUD_USING_QSPI)
if (message->length != 0) if (message->length != 0)
...@@ -350,8 +352,7 @@ static int rt_hw_qspi_init(void) ...@@ -350,8 +352,7 @@ static int rt_hw_qspi_init(void)
#if defined(BSP_USING_SPI_PDMA) #if defined(BSP_USING_SPI_PDMA)
nu_qspi_arr[i].pdma_chanid_tx = -1; nu_qspi_arr[i].pdma_chanid_tx = -1;
nu_qspi_arr[i].pdma_chanid_rx = -1; nu_qspi_arr[i].pdma_chanid_rx = -1;
#endif
#if defined(BSP_USING_QSPI_PDMA)
if ((nu_qspi_arr[i].pdma_perp_tx != NU_PDMA_UNUSED) && (nu_qspi_arr[i].pdma_perp_rx != NU_PDMA_UNUSED)) if ((nu_qspi_arr[i].pdma_perp_tx != NU_PDMA_UNUSED) && (nu_qspi_arr[i].pdma_perp_rx != NU_PDMA_UNUSED))
{ {
if (nu_hw_spi_pdma_allocate(&nu_qspi_arr[i]) != RT_EOK) if (nu_hw_spi_pdma_allocate(&nu_qspi_arr[i]) != RT_EOK)
......
...@@ -222,7 +222,7 @@ static int rt_hw_slcd_init(void) ...@@ -222,7 +222,7 @@ static int rt_hw_slcd_init(void)
{ {
ret = rt_hw_slcd_register(&nu_slcd_arr[i].dev, nu_slcd_arr[i].name, RT_DEVICE_FLAG_RDWR, NULL); ret = rt_hw_slcd_register(&nu_slcd_arr[i].dev, nu_slcd_arr[i].name, RT_DEVICE_FLAG_RDWR, NULL);
RT_ASSERT(ret == RT_EOK); RT_ASSERT(ret == RT_EOK);
nu_slcd_arr[i].lock = rt_mutex_create(nu_slcd_arr[i].name, RT_IPC_FLAG_FIFO); nu_slcd_arr[i].lock = rt_mutex_create(nu_slcd_arr[i].name, RT_IPC_FLAG_PRIO);
RT_ASSERT(nu_slcd_arr[i].lock != RT_NULL); RT_ASSERT(nu_slcd_arr[i].lock != RT_NULL);
} }
......
...@@ -50,7 +50,7 @@ rt_err_t nu_trng_init(void) ...@@ -50,7 +50,7 @@ rt_err_t nu_trng_init(void)
{ {
rt_err_t result; rt_err_t result;
result = rt_mutex_init(&s_TRNG_mutex, NU_CRYPTO_TRNG_NAME, RT_IPC_FLAG_FIFO); result = rt_mutex_init(&s_TRNG_mutex, NU_CRYPTO_TRNG_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK); RT_ASSERT(result == RT_EOK);
s_i32TRNGEnable = 1; s_i32TRNGEnable = 1;
......
...@@ -209,7 +209,7 @@ void EMAC_PhyInit(void) ...@@ -209,7 +209,7 @@ void EMAC_PhyInit(void)
while (!(EMAC_MdioRead(PHY_STATUS_REG, EMAC_PHY_ADDR) & PHY_STATUS_LINK_VALID)) while (!(EMAC_MdioRead(PHY_STATUS_REG, EMAC_PHY_ADDR) & PHY_STATUS_LINK_VALID))
{ {
if (i++ > 80000UL) /* Cable not connected */ if (i++ > 10000UL) /* Cable not connected */
{ {
EMAC->CTL &= ~EMAC_CTL_OPMODE_Msk; EMAC->CTL &= ~EMAC_CTL_OPMODE_Msk;
EMAC->CTL &= ~EMAC_CTL_FUDUP_Msk; EMAC->CTL &= ~EMAC_CTL_FUDUP_Msk;
...@@ -217,7 +217,7 @@ void EMAC_PhyInit(void) ...@@ -217,7 +217,7 @@ void EMAC_PhyInit(void)
} }
} }
if (i <= 80000UL) if (i <= 10000UL)
{ {
/* Configure auto negotiation capability */ /* Configure auto negotiation capability */
EMAC_MdioWrite(PHY_ANA_REG, EMAC_PHY_ADDR, PHY_ANA_DR100_TX_FULL | EMAC_MdioWrite(PHY_ANA_REG, EMAC_PHY_ADDR, PHY_ANA_DR100_TX_FULL |
...@@ -747,7 +747,8 @@ uint32_t EMAC_SendPktDone(void) ...@@ -747,7 +747,8 @@ uint32_t EMAC_SendPktDone(void)
desc->u32Next = desc->u32Backup2; desc->u32Next = desc->u32Backup2;
/* go to next descriptor in link */ /* go to next descriptor in link */
desc = (EMAC_DESCRIPTOR_T *)desc->u32Next; desc = (EMAC_DESCRIPTOR_T *)desc->u32Next;
} while (last_tx_desc != (uint32_t)desc); /* If we reach last sent Tx descriptor, leave the loop */ }
while (last_tx_desc != (uint32_t)desc); /* If we reach last sent Tx descriptor, leave the loop */
/* Save last processed Tx descriptor */ /* Save last processed Tx descriptor */
u32CurrentTxDesc = (uint32_t)desc; u32CurrentTxDesc = (uint32_t)desc;
...@@ -1115,7 +1116,7 @@ uint8_t *EMAC_ClaimFreeTXBuf(void) ...@@ -1115,7 +1116,7 @@ uint8_t *EMAC_ClaimFreeTXBuf(void)
* @return An data length of avaiable RX buffer. * @return An data length of avaiable RX buffer.
* @note This API should be called before EMAC_RecvPktDone_WoTrigger calling. Caller will do data-copy. * @note This API should be called before EMAC_RecvPktDone_WoTrigger calling. Caller will do data-copy.
*/ */
uint32_t EMAC_GetAvailRXBufSize(uint8_t** ppuDataBuf) uint32_t EMAC_GetAvailRXBufSize(uint8_t **ppuDataBuf)
{ {
EMAC_DESCRIPTOR_T *desc = (EMAC_DESCRIPTOR_T *)u32CurrentRxDesc; EMAC_DESCRIPTOR_T *desc = (EMAC_DESCRIPTOR_T *)u32CurrentRxDesc;
...@@ -1126,7 +1127,7 @@ uint32_t EMAC_GetAvailRXBufSize(uint8_t** ppuDataBuf) ...@@ -1126,7 +1127,7 @@ uint32_t EMAC_GetAvailRXBufSize(uint8_t** ppuDataBuf)
/* It is good and no CRC error. */ /* It is good and no CRC error. */
if ((status & EMAC_RXFD_RXGD) && !(status & EMAC_RXFD_CRCE)) if ((status & EMAC_RXFD_RXGD) && !(status & EMAC_RXFD_CRCE))
{ {
*ppuDataBuf = (uint8_t*)desc->u32Backup1; *ppuDataBuf = (uint8_t *)desc->u32Backup1;
return desc->u32Status1 & 0xFFFFUL; return desc->u32Status1 & 0xFFFFUL;
} }
else else
......
...@@ -100,7 +100,7 @@ rt_err_t nu_crc_init(void) ...@@ -100,7 +100,7 @@ rt_err_t nu_crc_init(void)
SYS_ResetModule(CRC_RST); SYS_ResetModule(CRC_RST);
result = rt_mutex_init(&s_CRC_mutex, NU_CRYPTO_CRC_NAME, RT_IPC_FLAG_FIFO); result = rt_mutex_init(&s_CRC_mutex, NU_CRYPTO_CRC_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK); RT_ASSERT(result == RT_EOK);
return RT_EOK; return RT_EOK;
......
...@@ -91,18 +91,18 @@ static rt_err_t nu_crypto_init(void) ...@@ -91,18 +91,18 @@ static rt_err_t nu_crypto_init(void)
SHA_ENABLE_INT(CRPT); SHA_ENABLE_INT(CRPT);
//init cipher mutex //init cipher mutex
result = rt_mutex_init(&s_AES_mutex, NU_HWCRYPTO_AES_NAME, RT_IPC_FLAG_FIFO); result = rt_mutex_init(&s_AES_mutex, NU_HWCRYPTO_AES_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK); RT_ASSERT(result == RT_EOK);
result = rt_mutex_init(&s_TDES_mutex, NU_HWCRYPTO_TDES_NAME, RT_IPC_FLAG_FIFO); result = rt_mutex_init(&s_TDES_mutex, NU_HWCRYPTO_TDES_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK); RT_ASSERT(result == RT_EOK);
result = rt_mutex_init(&s_SHA_mutex, NU_HWCRYPTO_SHA_NAME, RT_IPC_FLAG_FIFO); result = rt_mutex_init(&s_SHA_mutex, NU_HWCRYPTO_SHA_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK); RT_ASSERT(result == RT_EOK);
#if !defined(BSP_USING_TRNG) #if !defined(BSP_USING_TRNG)
PRNG_ENABLE_INT(CRPT); PRNG_ENABLE_INT(CRPT);
result = rt_mutex_init(&s_PRNG_mutex, NU_HWCRYPTO_PRNG_NAME, RT_IPC_FLAG_FIFO); result = rt_mutex_init(&s_PRNG_mutex, NU_HWCRYPTO_PRNG_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK); RT_ASSERT(result == RT_EOK);
#endif #endif
......
...@@ -331,7 +331,7 @@ static int nu_fmc_init(void) ...@@ -331,7 +331,7 @@ static int nu_fmc_init(void)
FMC_ENABLE_ISP(); FMC_ENABLE_ISP();
SYS_LockReg(); SYS_LockReg();
g_mutex_fmc = rt_mutex_create("nu_fmc_lock", RT_IPC_FLAG_FIFO); g_mutex_fmc = rt_mutex_create("nu_fmc_lock", RT_IPC_FLAG_PRIO);
RT_ASSERT(g_mutex_fmc != RT_NULL); RT_ASSERT(g_mutex_fmc != RT_NULL);
/* PKG_USING_FAL */ /* PKG_USING_FAL */
......
...@@ -208,10 +208,10 @@ static void nu_pdma_init(void) ...@@ -208,10 +208,10 @@ static void nu_pdma_init(void)
if (nu_pdma_inited) if (nu_pdma_inited)
return; return;
g_mutex_res = rt_mutex_create("pdmalock", RT_IPC_FLAG_FIFO); g_mutex_res = rt_mutex_create("pdmalock", RT_IPC_FLAG_PRIO);
RT_ASSERT(g_mutex_res != RT_NULL); RT_ASSERT(g_mutex_res != RT_NULL);
g_mutex_sg = rt_mutex_create("sgtbles", RT_IPC_FLAG_FIFO); g_mutex_sg = rt_mutex_create("sgtbles", RT_IPC_FLAG_PRIO);
RT_ASSERT(g_mutex_sg != RT_NULL); RT_ASSERT(g_mutex_sg != RT_NULL);
nu_pdma_chn_mask = ~NU_PDMA_CH_Msk; nu_pdma_chn_mask = ~NU_PDMA_CH_Msk;
...@@ -894,7 +894,7 @@ static void nu_pdma_memfun_actor_init(void) ...@@ -894,7 +894,7 @@ static void nu_pdma_memfun_actor_init(void)
nu_pdma_memfun_actor_pool_sem = rt_sem_create("mempool_sem", nu_pdma_memfun_actor_maxnum, RT_IPC_FLAG_FIFO); nu_pdma_memfun_actor_pool_sem = rt_sem_create("mempool_sem", nu_pdma_memfun_actor_maxnum, RT_IPC_FLAG_FIFO);
RT_ASSERT(nu_pdma_memfun_actor_pool_sem != RT_NULL); RT_ASSERT(nu_pdma_memfun_actor_pool_sem != RT_NULL);
nu_pdma_memfun_actor_pool_lock = rt_mutex_create("mempool_lock", RT_IPC_FLAG_FIFO); nu_pdma_memfun_actor_pool_lock = rt_mutex_create("mempool_lock", RT_IPC_FLAG_PRIO);
RT_ASSERT(nu_pdma_memfun_actor_pool_lock != RT_NULL); RT_ASSERT(nu_pdma_memfun_actor_pool_lock != RT_NULL);
} }
} }
......
...@@ -180,10 +180,10 @@ exit_nu_qspi_bus_configure: ...@@ -180,10 +180,10 @@ exit_nu_qspi_bus_configure:
return -(ret); return -(ret);
} }
#if defined(RT_SFUD_USING_QSPI)
static int nu_qspi_mode_config(struct nu_spi *qspi_bus, rt_uint8_t *tx, rt_uint8_t *rx, int qspi_lines) static int nu_qspi_mode_config(struct nu_spi *qspi_bus, rt_uint8_t *tx, rt_uint8_t *rx, int qspi_lines)
{ {
QSPI_T *qspi_base = (QSPI_T *)qspi_bus->spi_base; QSPI_T *qspi_base = (QSPI_T *)qspi_bus->spi_base;
#if defined(RT_SFUD_USING_QSPI)
if (qspi_lines > 1) if (qspi_lines > 1)
{ {
if (tx) if (tx)
...@@ -218,13 +218,13 @@ static int nu_qspi_mode_config(struct nu_spi *qspi_bus, rt_uint8_t *tx, rt_uint8 ...@@ -218,13 +218,13 @@ static int nu_qspi_mode_config(struct nu_spi *qspi_bus, rt_uint8_t *tx, rt_uint8
} }
} }
else else
#endif
{ {
QSPI_DISABLE_DUAL_MODE(qspi_base); QSPI_DISABLE_DUAL_MODE(qspi_base);
QSPI_DISABLE_QUAD_MODE(qspi_base); QSPI_DISABLE_QUAD_MODE(qspi_base);
} }
return qspi_lines; return qspi_lines;
} }
#endif
static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_message *message) static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
{ {
...@@ -317,9 +317,11 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_ ...@@ -317,9 +317,11 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
qspi_message->dummy_cycles / (8 / u8last), qspi_message->dummy_cycles / (8 / u8last),
1); 1);
} }
/* Data stage */ /* Data stage */
nu_qspi_mode_config(qspi_bus, (rt_uint8_t *) message->send_buf, (rt_uint8_t *) message->recv_buf, qspi_message->qspi_data_lines); nu_qspi_mode_config(qspi_bus, (rt_uint8_t *) message->send_buf, (rt_uint8_t *) message->recv_buf, qspi_message->qspi_data_lines);
#else
/* Data stage */
nu_qspi_mode_config(qspi_bus, RT_NULL, RT_NULL, 1);
#endif //#if defined(RT_SFUD_USING_QSPI) #endif //#if defined(RT_SFUD_USING_QSPI)
if (message->length != 0) if (message->length != 0)
...@@ -369,8 +371,7 @@ static int rt_hw_qspi_init(void) ...@@ -369,8 +371,7 @@ static int rt_hw_qspi_init(void)
#if defined(BSP_USING_SPI_PDMA) #if defined(BSP_USING_SPI_PDMA)
nu_qspi_arr[i].pdma_chanid_tx = -1; nu_qspi_arr[i].pdma_chanid_tx = -1;
nu_qspi_arr[i].pdma_chanid_rx = -1; nu_qspi_arr[i].pdma_chanid_rx = -1;
#endif
#if defined(BSP_USING_QSPI_PDMA)
if ((nu_qspi_arr[i].pdma_perp_tx != NU_PDMA_UNUSED) && (nu_qspi_arr[i].pdma_perp_rx != NU_PDMA_UNUSED)) if ((nu_qspi_arr[i].pdma_perp_tx != NU_PDMA_UNUSED) && (nu_qspi_arr[i].pdma_perp_rx != NU_PDMA_UNUSED))
{ {
if (nu_hw_spi_pdma_allocate(&nu_qspi_arr[i]) != RT_EOK) if (nu_hw_spi_pdma_allocate(&nu_qspi_arr[i]) != RT_EOK)
......
...@@ -50,7 +50,7 @@ rt_err_t nu_trng_init(void) ...@@ -50,7 +50,7 @@ rt_err_t nu_trng_init(void)
{ {
rt_err_t result; rt_err_t result;
result = rt_mutex_init(&s_TRNG_mutex, NU_CRYPTO_TRNG_NAME, RT_IPC_FLAG_FIFO); result = rt_mutex_init(&s_TRNG_mutex, NU_CRYPTO_TRNG_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK); RT_ASSERT(result == RT_EOK);
if ((SYS->CSERVER & SYS_CSERVER_VERSION_Msk) == 0x0) if ((SYS->CSERVER & SYS_CSERVER_VERSION_Msk) == 0x0)
......
...@@ -83,4 +83,46 @@ static int audio_test(int argc, char **argv) ...@@ -83,4 +83,46 @@ static int audio_test(int argc, char **argv)
#ifdef FINSH_USING_MSH #ifdef FINSH_USING_MSH
MSH_CMD_EXPORT(audio_test, Audio record / replay); MSH_CMD_EXPORT(audio_test, Audio record / replay);
#endif #endif
static int audio_overnight(int argc, char **argv)
{
#define DEF_MAX_TEST_SECOND 5
struct wavrecord_info info;
char strbuf[128];
struct stat stat_buf;
snprintf(strbuf, sizeof(strbuf), "/test.wav");
while (1)
{
rt_kprintf("Recording file at %s\n", strbuf);
info.uri = strbuf;
info.samplerate = 16000;
info.samplebits = 16;
info.channels = 2;
wavrecorder_start(&info);
rt_thread_mdelay(DEF_MAX_TEST_SECOND * 1000);
wavrecorder_stop();
rt_thread_mdelay(1000);
if (stat((const char *)strbuf, &stat_buf) < 0)
{
rt_kprintf("%s non-exist.\n", strbuf);
break;
}
rt_kprintf("Replay file at %s\n", strbuf);
wavplayer_play(strbuf);
rt_thread_mdelay(DEF_MAX_TEST_SECOND * 1000);
wavplayer_stop();
rt_thread_mdelay(1000);
}
return 0;
}
#ifdef FINSH_USING_MSH
MSH_CMD_EXPORT(audio_overnight, auto test record / replay);
#endif
#endif /* PKG_USING_WAVPLAYER */ #endif /* PKG_USING_WAVPLAYER */
...@@ -494,7 +494,7 @@ rt_err_t rt_hw_mtd_spinand_init(void) ...@@ -494,7 +494,7 @@ rt_err_t rt_hw_mtd_spinand_init(void)
if (u32IsInited) if (u32IsInited)
return RT_EOK; return RT_EOK;
result = rt_mutex_init(SPINAND_FLASH_LOCK, "spinand", RT_IPC_FLAG_FIFO); result = rt_mutex_init(SPINAND_FLASH_LOCK, "spinand", RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK); RT_ASSERT(result == RT_EOK);
result = spinand_flash_init(SPINAND_FLASH_QSPI); result = spinand_flash_init(SPINAND_FLASH_QSPI);
......
...@@ -2170,6 +2170,8 @@ static uint32_t mpShortDiv(uint32_t q[], const uint32_t u[], uint32_t v, ...@@ -2170,6 +2170,8 @@ static uint32_t mpShortDiv(uint32_t q[], const uint32_t u[], uint32_t v,
bitmask >>= 1; bitmask >>= 1;
} }
if (shift == BITS_PER_DIGIT) return 0; /* Avoid cppcheck false-alarm. */
v <<= shift; v <<= shift;
overflow = mpShiftLeft(q, u, shift, ndigits); overflow = mpShiftLeft(q, u, shift, ndigits);
uu = q; uu = q;
......
...@@ -191,7 +191,7 @@ void EMAC_PhyInit(EMAC_T *EMAC) ...@@ -191,7 +191,7 @@ void EMAC_PhyInit(EMAC_T *EMAC)
while (!(EMAC_MdioRead(EMAC, PHY_STATUS_REG, EMAC_PHY_ADDR) & PHY_STATUS_LINK_VALID)) while (!(EMAC_MdioRead(EMAC, PHY_STATUS_REG, EMAC_PHY_ADDR) & PHY_STATUS_LINK_VALID))
{ {
if (i++ > 2000000UL) /* Cable not connected */ if (i++ > 10000UL) /* Cable not connected */
{ {
EMAC->CTL &= ~EMAC_CTL_OPMODE_Msk; EMAC->CTL &= ~EMAC_CTL_OPMODE_Msk;
EMAC->CTL &= ~EMAC_CTL_FUDUP_Msk; EMAC->CTL &= ~EMAC_CTL_FUDUP_Msk;
...@@ -199,7 +199,7 @@ void EMAC_PhyInit(EMAC_T *EMAC) ...@@ -199,7 +199,7 @@ void EMAC_PhyInit(EMAC_T *EMAC)
} }
} }
if (i <= 2000000UL) if (i <= 10000UL)
{ {
/* Configure auto negotiation capability */ /* Configure auto negotiation capability */
EMAC_MdioWrite(EMAC, PHY_ANA_REG, EMAC_PHY_ADDR, PHY_ANA_DR100_TX_FULL | EMAC_MdioWrite(EMAC, PHY_ANA_REG, EMAC_PHY_ADDR, PHY_ANA_DR100_TX_FULL |
......
...@@ -750,19 +750,19 @@ int nu_hwcrypto_device_init(void) ...@@ -750,19 +750,19 @@ int nu_hwcrypto_device_init(void)
/* init cipher mutex */ /* init cipher mutex */
#if defined(RT_HWCRYPTO_USING_AES) #if defined(RT_HWCRYPTO_USING_AES)
result = rt_mutex_init(&s_AES_mutex, NU_HWCRYPTO_AES_NAME, RT_IPC_FLAG_FIFO); result = rt_mutex_init(&s_AES_mutex, NU_HWCRYPTO_AES_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK); RT_ASSERT(result == RT_EOK);
AES_ENABLE_INT(CRPT); AES_ENABLE_INT(CRPT);
#endif #endif
#if defined(RT_HWCRYPTO_USING_SHA1) || defined(RT_HWCRYPTO_USING_SHA2) #if defined(RT_HWCRYPTO_USING_SHA1) || defined(RT_HWCRYPTO_USING_SHA2)
result = rt_mutex_init(&s_SHA_mutex, NU_HWCRYPTO_SHA_NAME, RT_IPC_FLAG_FIFO); result = rt_mutex_init(&s_SHA_mutex, NU_HWCRYPTO_SHA_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK); RT_ASSERT(result == RT_EOK);
SHA_ENABLE_INT(CRPT); SHA_ENABLE_INT(CRPT);
#endif #endif
#if defined(RT_HWCRYPTO_USING_RNG) #if defined(RT_HWCRYPTO_USING_RNG)
result = rt_mutex_init(&s_PRNG_mutex, NU_HWCRYPTO_PRNG_NAME, RT_IPC_FLAG_FIFO); result = rt_mutex_init(&s_PRNG_mutex, NU_HWCRYPTO_PRNG_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK); RT_ASSERT(result == RT_EOK);
#endif #endif
......
...@@ -972,7 +972,7 @@ static void nu_pdma_memfun_actor_init(void) ...@@ -972,7 +972,7 @@ static void nu_pdma_memfun_actor_init(void)
nu_pdma_memfun_actor_pool_sem = rt_sem_create("mempool_sem", nu_pdma_memfun_actor_maxnum, RT_IPC_FLAG_FIFO); nu_pdma_memfun_actor_pool_sem = rt_sem_create("mempool_sem", nu_pdma_memfun_actor_maxnum, RT_IPC_FLAG_FIFO);
RT_ASSERT(nu_pdma_memfun_actor_pool_sem != RT_NULL); RT_ASSERT(nu_pdma_memfun_actor_pool_sem != RT_NULL);
nu_pdma_memfun_actor_pool_lock = rt_mutex_create("mempool_lock", RT_IPC_FLAG_FIFO); nu_pdma_memfun_actor_pool_lock = rt_mutex_create("mempool_lock", RT_IPC_FLAG_PRIO);
RT_ASSERT(nu_pdma_memfun_actor_pool_lock != RT_NULL); RT_ASSERT(nu_pdma_memfun_actor_pool_lock != RT_NULL);
} }
} }
......
...@@ -263,6 +263,8 @@ static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args) ...@@ -263,6 +263,8 @@ static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
case RT_DEVICE_CTRL_RTC_SET_ALARM: case RT_DEVICE_CTRL_RTC_SET_ALARM:
RTC_GetDateAndTime(&hw_alarm);
wkalarm = (struct rt_rtc_wkalarm *) args; wkalarm = (struct rt_rtc_wkalarm *) args;
hw_alarm.u32Hour = wkalarm->tm_hour; hw_alarm.u32Hour = wkalarm->tm_hour;
hw_alarm.u32Minute = wkalarm->tm_min; hw_alarm.u32Minute = wkalarm->tm_min;
......
...@@ -138,13 +138,6 @@ CONFIG_RT_DFS_ELM_REENTRANT=y ...@@ -138,13 +138,6 @@ CONFIG_RT_DFS_ELM_REENTRANT=y
CONFIG_RT_USING_DFS_DEVFS=y CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_ROMFS is not set # CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set # CONFIG_RT_USING_DFS_RAMFS is not set
CONFIG_RT_USING_DFS_UFFS=y
# CONFIG_RT_UFFS_ECC_MODE_0 is not set
# CONFIG_RT_UFFS_ECC_MODE_1 is not set
# CONFIG_RT_UFFS_ECC_MODE_2 is not set
CONFIG_RT_UFFS_ECC_MODE_3=y
CONFIG_RT_UFFS_ECC_MODE=3
# CONFIG_RT_USING_DFS_JFFS2 is not set
# CONFIG_RT_USING_DFS_NFS is not set # CONFIG_RT_USING_DFS_NFS is not set
# #
...@@ -229,6 +222,7 @@ CONFIG_RT_HWCRYPTO_USING_RNG=y ...@@ -229,6 +222,7 @@ CONFIG_RT_HWCRYPTO_USING_RNG=y
CONFIG_RT_USING_USB_HOST=y CONFIG_RT_USING_USB_HOST=y
CONFIG_RT_USBH_MSTORAGE=y CONFIG_RT_USBH_MSTORAGE=y
CONFIG_UDISK_MOUNTPOINT="/mnt/udisk" CONFIG_UDISK_MOUNTPOINT="/mnt/udisk"
# CONFIG_RT_USBH_HID is not set
CONFIG_RT_USING_USB_DEVICE=y CONFIG_RT_USING_USB_DEVICE=y
CONFIG_RT_USBD_THREAD_STACK_SZ=4096 CONFIG_RT_USBD_THREAD_STACK_SZ=4096
CONFIG_USB_VENDOR_ID=0x0FFE CONFIG_USB_VENDOR_ID=0x0FFE
...@@ -453,8 +447,6 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0" ...@@ -453,8 +447,6 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0"
# CONFIG_PKG_USING_LIBRWS is not set # CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set # CONFIG_PKG_USING_TCPSERVER is not set
# CONFIG_PKG_USING_PROTOBUF_C is not set # CONFIG_PKG_USING_PROTOBUF_C is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_DLT645 is not set # CONFIG_PKG_USING_DLT645 is not set
# CONFIG_PKG_USING_QXWZ is not set # CONFIG_PKG_USING_QXWZ is not set
# CONFIG_PKG_USING_SMTP_CLIENT is not set # CONFIG_PKG_USING_SMTP_CLIENT is not set
...@@ -468,6 +460,13 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0" ...@@ -468,6 +460,13 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0"
# CONFIG_PKG_USING_PDULIB is not set # CONFIG_PKG_USING_PDULIB is not set
# CONFIG_PKG_USING_BTSTACK is not set # CONFIG_PKG_USING_BTSTACK is not set
# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set # CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
# CONFIG_PKG_USING_MAVLINK is not set
# CONFIG_PKG_USING_RAPIDJSON is not set
# CONFIG_PKG_USING_BSAL is not set
# CONFIG_PKG_USING_AGILE_MODBUS is not set
# CONFIG_PKG_USING_AGILE_FTP is not set
# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
# #
# security packages # security packages
...@@ -507,6 +506,8 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0" ...@@ -507,6 +506,8 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0"
# CONFIG_PKG_USING_RDB is not set # CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ULOG_FILE is not set
# CONFIG_PKG_USING_LOGMGR is not set
# CONFIG_PKG_USING_ADBD is not set # CONFIG_PKG_USING_ADBD is not set
# CONFIG_PKG_USING_COREMARK is not set # CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_DHRYSTONE is not set # CONFIG_PKG_USING_DHRYSTONE is not set
...@@ -520,6 +521,16 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0" ...@@ -520,6 +521,16 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0"
# CONFIG_PKG_USING_UMCN is not set # CONFIG_PKG_USING_UMCN is not set
# CONFIG_PKG_USING_LWRB2RTT is not set # CONFIG_PKG_USING_LWRB2RTT is not set
# CONFIG_PKG_USING_CPU_USAGE is not set # CONFIG_PKG_USING_CPU_USAGE is not set
# CONFIG_PKG_USING_GBK2UTF8 is not set
# CONFIG_PKG_USING_VCONSOLE is not set
# CONFIG_PKG_USING_KDB is not set
# CONFIG_PKG_USING_WAMR is not set
# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
# CONFIG_PKG_USING_LWLOG is not set
# CONFIG_PKG_USING_ANV_TRACE is not set
# CONFIG_PKG_USING_ANV_MEMLEAK is not set
# CONFIG_PKG_USING_ANV_TESTSUIT is not set
# CONFIG_PKG_USING_ANV_BENCH is not set
# #
# system packages # system packages
...@@ -528,7 +539,6 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0" ...@@ -528,7 +539,6 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0"
# CONFIG_PKG_USING_PERSIMMON is not set # CONFIG_PKG_USING_PERSIMMON is not set
# CONFIG_PKG_USING_CAIRO is not set # CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set # CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set # CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set # CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_FLASHDB is not set # CONFIG_PKG_USING_FLASHDB is not set
...@@ -538,6 +548,18 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0" ...@@ -538,6 +548,18 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0"
# CONFIG_PKG_USING_CMSIS is not set # CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set # CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set # CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_DFS_JFFS2 is not set
CONFIG_PKG_USING_DFS_UFFS=y
CONFIG_PKG_UFFS_PATH="/packages/system/uffs"
CONFIG_RT_USING_DFS_UFFS=y
# CONFIG_RT_UFFS_ECC_MODE_0 is not set
# CONFIG_RT_UFFS_ECC_MODE_1 is not set
# CONFIG_RT_UFFS_ECC_MODE_2 is not set
CONFIG_RT_UFFS_ECC_MODE_3=y
CONFIG_RT_UFFS_ECC_MODE=3
CONFIG_PKG_USING_DFS_UFFS_LATEST_VERSION=y
CONFIG_PKG_UFFS_VER="latest"
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_THREAD_POOL is not set # CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set # CONFIG_PKG_USING_ROBOTS is not set
# CONFIG_PKG_USING_EV is not set # CONFIG_PKG_USING_EV is not set
...@@ -562,6 +584,14 @@ CONFIG_PKG_RAMDISK_VER="latest" ...@@ -562,6 +584,14 @@ CONFIG_PKG_RAMDISK_VER="latest"
# CONFIG_PKG_USING_UC_COMMON is not set # CONFIG_PKG_USING_UC_COMMON is not set
# CONFIG_PKG_USING_UC_MODBUS is not set # CONFIG_PKG_USING_UC_MODBUS is not set
# CONFIG_PKG_USING_PPOOL is not set # CONFIG_PKG_USING_PPOOL is not set
# CONFIG_PKG_USING_OPENAMP is not set
# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
# CONFIG_PKG_USING_QFPLIB_M3 is not set
# CONFIG_PKG_USING_LPM is not set
# CONFIG_PKG_USING_TLSF is not set
# #
# peripheral libraries and drivers # peripheral libraries and drivers
...@@ -570,6 +600,7 @@ CONFIG_PKG_RAMDISK_VER="latest" ...@@ -570,6 +600,7 @@ CONFIG_PKG_RAMDISK_VER="latest"
# CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set # CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_SHT3X is not set # CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_AS7341 is not set
# CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set # CONFIG_PKG_USING_U8G2 is not set
...@@ -619,6 +650,28 @@ CONFIG_PKG_RAMDISK_VER="latest" ...@@ -619,6 +650,28 @@ CONFIG_PKG_RAMDISK_VER="latest"
# CONFIG_PKG_USING_SSD1306 is not set # CONFIG_PKG_USING_SSD1306 is not set
# CONFIG_PKG_USING_QKEY is not set # CONFIG_PKG_USING_QKEY is not set
# CONFIG_PKG_USING_RS485 is not set # CONFIG_PKG_USING_RS485 is not set
# CONFIG_PKG_USING_NES is not set
# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
# CONFIG_PKG_USING_VDEVICE is not set
# CONFIG_PKG_USING_SGM706 is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set
# CONFIG_PKG_USING_RDA58XX is not set
# CONFIG_PKG_USING_LIBNFC is not set
# CONFIG_PKG_USING_MFOC is not set
# CONFIG_PKG_USING_TMC51XX is not set
#
# AI packages
#
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_QUEST is not set
# CONFIG_PKG_USING_NAXOS is not set
# #
# miscellaneous packages # miscellaneous packages
...@@ -626,9 +679,8 @@ CONFIG_PKG_RAMDISK_VER="latest" ...@@ -626,9 +679,8 @@ CONFIG_PKG_RAMDISK_VER="latest"
# CONFIG_PKG_USING_LIBCSV is not set # CONFIG_PKG_USING_LIBCSV is not set
CONFIG_PKG_USING_OPTPARSE=y CONFIG_PKG_USING_OPTPARSE=y
CONFIG_PKG_OPTPARSE_PATH="/packages/misc/optparse" CONFIG_PKG_OPTPARSE_PATH="/packages/misc/optparse"
CONFIG_PKG_USING_OPTPARSE_V100=y CONFIG_PKG_USING_OPTPARSE_LATEST_VERSION=y
# CONFIG_PKG_USING_OPTPARSE_LATEST_VERSION is not set CONFIG_PKG_OPTPARSE_VER="latest"
CONFIG_PKG_OPTPARSE_VER="v1.0.0"
# CONFIG_OPTPARSE_USING_DEMO is not set # CONFIG_OPTPARSE_USING_DEMO is not set
# CONFIG_PKG_USING_FASTLZ is not set # CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set # CONFIG_PKG_USING_MINILZO is not set
...@@ -671,24 +723,24 @@ CONFIG_VI_UNDO_QUEUE_MAX=256 ...@@ -671,24 +723,24 @@ CONFIG_VI_UNDO_QUEUE_MAX=256
CONFIG_PKG_USING_VI_LATEST_VERSION=y CONFIG_PKG_USING_VI_LATEST_VERSION=y
CONFIG_PKG_VI_VER="latest" CONFIG_PKG_VI_VER="latest"
# CONFIG_PKG_USING_KI is not set # CONFIG_PKG_USING_KI is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set # CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_VT100 is not set # CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set # CONFIG_PKG_USING_CRCLIB is not set
# #
# games: games run on RT-Thread console # entertainment: terminal games and other interesting software packages
# #
# CONFIG_PKG_USING_THREES is not set # CONFIG_PKG_USING_THREES is not set
# CONFIG_PKG_USING_2048 is not set # CONFIG_PKG_USING_2048 is not set
# CONFIG_PKG_USING_SNAKE is not set # CONFIG_PKG_USING_SNAKE is not set
# CONFIG_PKG_USING_TETRIS is not set # CONFIG_PKG_USING_TETRIS is not set
# CONFIG_PKG_USING_DONUT is not set
# CONFIG_PKG_USING_ACLOCK is not set
# CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_LWGPS is not set
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set # CONFIG_PKG_USING_STATE_MACHINE is not set
# CONFIG_PKG_USING_MCURSES is not set
# CONFIG_PKG_USING_COWSAY is not set
# #
# Nuvoton Packages Config # Nuvoton Packages Config
...@@ -715,7 +767,6 @@ CONFIG_BSP_USING_MMU=y ...@@ -715,7 +767,6 @@ CONFIG_BSP_USING_MMU=y
CONFIG_BSP_USING_PDMA=y CONFIG_BSP_USING_PDMA=y
CONFIG_NU_PDMA_MEMFUN_ACTOR_MAX=2 CONFIG_NU_PDMA_MEMFUN_ACTOR_MAX=2
CONFIG_BSP_USING_GPIO=y CONFIG_BSP_USING_GPIO=y
# CONFIG_BSP_USING_CLK is not set
CONFIG_BSP_USING_EMAC=y CONFIG_BSP_USING_EMAC=y
CONFIG_BSP_USING_EMAC0=y CONFIG_BSP_USING_EMAC0=y
# CONFIG_BSP_USING_EMAC1 is not set # CONFIG_BSP_USING_EMAC1 is not set
...@@ -781,6 +832,7 @@ CONFIG_BSP_USING_SPI1_NONE=y ...@@ -781,6 +832,7 @@ CONFIG_BSP_USING_SPI1_NONE=y
CONFIG_BSP_USING_I2S=y CONFIG_BSP_USING_I2S=y
CONFIG_NU_I2S_DMA_FIFO_SIZE=4096 CONFIG_NU_I2S_DMA_FIFO_SIZE=4096
CONFIG_BSP_USING_QSPI=y CONFIG_BSP_USING_QSPI=y
CONFIG_BSP_USING_QSPI_PDMA=y
CONFIG_BSP_USING_QSPI0=y CONFIG_BSP_USING_QSPI0=y
CONFIG_BSP_USING_QSPI0_PDMA=y CONFIG_BSP_USING_QSPI0_PDMA=y
# CONFIG_BSP_USING_SCUART is not set # CONFIG_BSP_USING_SCUART is not set
......
...@@ -23,18 +23,14 @@ SECTIONS ...@@ -23,18 +23,14 @@ SECTIONS
__fsymtab_start = .; __fsymtab_start = .;
KEEP(*(FSymTab)) KEEP(*(FSymTab))
__fsymtab_end = .; __fsymtab_end = .;
. = ALIGN(4);
. = ALIGN(4); . = ALIGN(4);
__vsymtab_start = .; __vsymtab_start = .;
KEEP(*(VSymTab)) KEEP(*(VSymTab))
__vsymtab_end = .; __vsymtab_end = .;
. = ALIGN(4); . = ALIGN(4);
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
. = ALIGN(4);
/* section information for modules */ /* section information for modules */
. = ALIGN(4); . = ALIGN(4);
__rtmsymtab_start = .; __rtmsymtab_start = .;
...@@ -54,6 +50,7 @@ SECTIONS ...@@ -54,6 +50,7 @@ SECTIONS
__rt_utest_tc_tab_start = .; __rt_utest_tc_tab_start = .;
KEEP(*(UtestTcTab)) KEEP(*(UtestTcTab))
__rt_utest_tc_tab_end = .; __rt_utest_tc_tab_end = .;
. = ALIGN(4);
} }
. = ALIGN(4); . = ALIGN(4);
......
此差异已折叠。
mainmenu "RT-Thread Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../../.."
# you can change the RTT_ROOT default "../../.." to your rtthread_root,
# example : default "F:/git_repositories/rt-thread"
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
config NU_PKGS_DIR
string
option env="NU_PKGS_ROOT"
default "../libraries/nu_packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "$NU_PKGS_DIR/Kconfig"
source "$BSP_DIR/board/Kconfig"
# NK-N9H30
## 1. Introduction
Nuvoton offers the emWin platform which is embedded with Nuvoton N9H MPU, it provides complete HMI solutions which are further enhanced by the emWin software. The N9H series with ARM926EJ-S core can operate at up to 300 MHz and can drive up to 1024x768 pixels in parallel port. It integrated TFT LCD controller and 2D graphics accelerator, up to 16 million colors (24-bit) LCD screen output, and provides high resolution and high chroma to deliver gorgeous display effects. To play compressed video in HMI screens smoothly, the N9H series is equipped with H.264 video decompression engine. It also offers built-in voice decoder, which can streamline the peripheral circuits of HMI applications with sound playback. It embedded up to 64 MB DDR memory, along with ample hardware storage and computing space for excellent design flexibility.
[![NK-N9H30](https://i.imgur.com/B04MCCf.png "NK-N9H30")](https://i.imgur.com/B04MCCf.png "NK-N9H30")
### 1.1 MCU specification
| | Features |
| -- | -- |
| Part NO. | N9H30F61IEC (LQFP216 pin MCP package with DDR (64 MB) |
| CPU ARCH. | 32-bit ARM926EJ-S |
| Operation frequency | 300 MHz |
| Embedded SDRAM size | Built-in 64MB |
| Crypto engine | AES, DES,HMAC and SHA crypto accelerator |
| RMII interface | 10/100 Mbps x2 |
| USB 2.0 | High Speed Host/Device x1 |
| Audio | Mono microphone / Stereo headphone |
| Extern storage | 32MB SPI-NOR Flash |
| SD card slot | SD |
### 1.2 Interface
| Interface |
| -- |
| Two RJ45 Ethernet |
| An USB 2.0 HS Dual role(Host/Device) port |
| A microSD slot |
| A 3.5mm Audio connector |
| An ICE connector |
### 1.3 On-board devices
| Device | Description | Driver supporting status |
| -- | -- | -- |
|Ethernet PHY | IP101GR | Supported |
|Keypad | | Supported |
|LEDs | | Supported |
|Audio Codec | NAU8822, Supports MIC and earphone | Supported |
|USB Device | VCOM + MStorage | Supported |
|USB Host | MStorage | Supported |
|SPI NOR flash | W25Q256JVEQ (32 MB) | Supported |
## 2. Supported compiler
Support GCC, MDK4 and MDK5 IDE/compilers. More information of these compiler version as following:
| IDE/Compiler | Tested version |
| ---------- | ---------------------------- |
| MDK5 | 5.26.2 |
| GCC | GCC 5.4.1 20160919 (release) |
Notice: Please install ICE driver for development.
## 3. Program firmware
### 3.1 SDRAM Downloading using NuWriter
You can use NuWriter to download rtthread.bin into SDRAM, then run it.
[![SDRAM Downloading using NuWriter](https://i.imgur.com/UqFvQOb.gif "SDRAM Downloading using NuWriter")](https://i.imgur.com/UqFvQOb.gif "SDRAM Downloading using NuWriter")
<br>
Choose type: DDR/SRAM<br>
<< Press Re-Connect >><br>
Choose file: Specify your rtthread.bin file.<br>
Execute Address: 0x0<br>
Option: Download and run<br>
<< Press Download >><br>
Enjoy!! <br>
<br>
### 3.2 SPI NOR flash using NuWriter
You can use NuWriter to program rtthread.bin into SPI NOR flash.
[![SPI NOR flash](https://i.imgur.com/6Fw3tc7.gif "SPI NOR flash")](https://i.imgur.com/6Fw3tc7.gif "SPI NOR flash using NuWriter")
<br>
Choose type: SPI<br>
<< Press Re-Connect >><br>
Choose file: Specify your rtthread.bin file.<br>
Image Type: Loader<br>
Execute Address: 0x0<br>
<< Press Program >><br>
<< Press OK & Wait it down >><br>
<< Set Power-on setting to SPI NOR booting >><br>
<< Press Reset button on board >><br>
Enjoy!! <br>
<br>
## 4. Test
You can use Tera Term terminate emulator (or other software) to type commands of RTT. All parameters of serial communication are shown in below image. Here, you can find out the corresponding port number of Nuvoton Virtual Com Port in window device manager.
[![Serial settings](https://i.imgur.com/5NYuSNM.png "Serial settings")](https://i.imgur.com/5NYuSNM.png "Serial settings")
## 5. Demo
* Run NUemWin2RTT on NK-N9H30
```bash
\ | /
- RT - Thread Operating System
/ | \ 4.0.3 build May 12 2021
2006 - 2021 Copyright by rt-thread team
msh /> nu_touch_start
msh /> nuemwin_start
<Enjoy NuemWin with H/W 2D Graphics Accelerating>
msh /> nuemwin_stop
```
[![NUemWin2RTT on NK-N9H30](https://img.youtube.com/vi/TAfkOKpySQk/0.jpg)](https://www.youtube.com/watch?v=TAfkOKpySQk)
* Run LittlevGL2RTT on NK-N9H30
**Please check out modified version with GE2D accelerating from [HERE](https://github.com/wosayttn/LittlevGL2RTT).**
```bash
\ | /
- RT - Thread Operating System
/ | \ 4.0.3 build May 12 2021
2006 - 2021 Copyright by rt-thread team
msh /> nu_touch_start
msh /> lv_demo
<Enjoy LvGL with H/W 2D Graphics Accelerating>
```
[![LvGL2RTT on NK-N9H30](https://img.youtube.com/vi/djz0jAKrfjs/0.jpg)](https://www.youtube.com/watch?v=djz0jAKrfjs)
## 6. Purchase
* [Nuvoton Direct](https://direct.nuvoton.com/en/numaker-emwin-n9h30)
## 7. Resources
* [Board Schematic](https://www.nuvoton.com/resource-download.jsp?tp_GUID=HL1020201117191514)
* [Download NK-N9H30 Quick Start Guide](https://www.nuvoton.com/resource-download.jsp?tp_GUID=UG1320210329155300)
* [Download NuWriter](https://github.com/OpenNuvoton/NUC970_NuWriter)
# for module compiling
import os
Import('RTT_ROOT')
cwd = str(Dir('#'))
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try:
from building import *
except:
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
print(RTT_ROOT)
exit(-1)
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
Export('RTT_ROOT')
Export('rtconfig')
SDK_ROOT = os.path.abspath('./')
if os.path.exists(SDK_ROOT + '/libraries'):
libraries_path_prefix = SDK_ROOT + '/libraries'
else:
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
SDK_LIB = libraries_path_prefix
Export('SDK_LIB')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
nuvoton_library = 'n9h30'
rtconfig.BSP_LIBRARY_TYPE = nuvoton_library
# include libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, nuvoton_library, 'SConscript')))
# include nu_pkgs
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'nu_packages', 'SConscript')))
# make a building
DoBuilding(TARGET, objs)
# RT-Thread building script for component
from building import *
cwd = GetCurrentDir()
src = Glob('*.c') + Glob('*.cpp')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
/**************************************************************************//**
*
* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-12-12 Wayne First version
*
******************************************************************************/
#include <rtconfig.h>
#include <rtdevice.h>
#if defined(RT_USING_PIN)
#include <drv_gpio.h>
/* defined the INDICATOR_LED pin: PH2 */
#define INDICATOR_LED NU_GET_PININDEX(NU_PH, 2)
#define MATRIX_COL_NUM 2
#define MATRIX_ROW_NUM 3
/* defined the KEY_COl_0 pin: PB4 */
#define KEY_COL_0 NU_GET_PININDEX(NU_PB, 4)
/* defined the KEY_COl_1 pin: PB5 */
#define KEY_COL_1 NU_GET_PININDEX(NU_PB, 5)
/* defined the KEY_ROW_0 pin: PF10 */
#define KEY_ROW_0 NU_GET_PININDEX(NU_PF, 10)
/* defined the KEY_ROW_1 pin: PE15 */
#define KEY_ROW_1 NU_GET_PININDEX(NU_PE, 15)
/* defined the KEY_ROW_2 pin: PE14 */
#define KEY_ROW_2 NU_GET_PININDEX(NU_PE, 14)
uint32_t au32KeyMatrix_Col[MATRIX_COL_NUM] = { KEY_COL_0, KEY_COL_1 };
uint32_t au32KeyMatrix_Row[MATRIX_ROW_NUM] = { KEY_ROW_0, KEY_ROW_1, KEY_ROW_2 };
const char *szKeyLabel[] =
{
"K1",
"K2",
"K3",
"K4",
"K5",
"K6"
};
static void nu_key_matrix_cb(void *args)
{
uint32_t ri = (uint32_t)args;
int ci;
for (ci = 0; ci < MATRIX_COL_NUM; ci++)
{
/* Find column bit is low. */
if (!rt_pin_read(au32KeyMatrix_Col[ci]))
{
break;
}
}
rt_kprintf("[%d %d] Pressed %s button.\n", ci, ri, szKeyLabel[(ci) + MATRIX_COL_NUM * ri]);
}
static void nu_key_matrix_switch(uint32_t counter)
{
int i;
for (i = 0; i < MATRIX_COL_NUM; i++)
{
/* set pin value to high */
rt_pin_write(au32KeyMatrix_Col[i], PIN_HIGH);
}
/* set pin value to low */
rt_pin_write(au32KeyMatrix_Col[counter % MATRIX_COL_NUM], PIN_LOW);
}
#endif
int main(int argc, char **argv)
{
#if defined(RT_USING_PIN)
uint32_t counter = 1;
int i = 0;
for (i = 0; i < MATRIX_ROW_NUM; i++)
{
/* set pin mode to input */
rt_pin_mode(au32KeyMatrix_Row[i], PIN_MODE_INPUT_PULLUP);
rt_pin_attach_irq(au32KeyMatrix_Row[i], PIN_IRQ_MODE_FALLING, nu_key_matrix_cb, (void *)i);
rt_pin_irq_enable(au32KeyMatrix_Row[i], PIN_IRQ_ENABLE);
}
for (i = 0; i < MATRIX_COL_NUM; i++)
{
/* set pin mode to output */
rt_pin_mode(au32KeyMatrix_Col[i], PIN_MODE_OUTPUT);
}
/* set INDICATOR_LED pin mode to output */
rt_pin_mode(INDICATOR_LED, PIN_MODE_OUTPUT);
/* Toggle column pins in key matrix. */
while (counter++ > 0)
{
rt_pin_write(INDICATOR_LED, PIN_HIGH);
rt_thread_mdelay(200);
rt_pin_write(INDICATOR_LED, PIN_LOW);
rt_thread_mdelay(200);
nu_key_matrix_switch(counter);
}
#endif
return 0;
}
/**************************************************************************//**
*
* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-12-12 Wayne First version
*
******************************************************************************/
#include "rtconfig.h"
#include <rtthread.h>
#define LOG_TAG "mnt"
#define DBG_ENABLE
#define DBG_SECTION_NAME "mnt"
#define DBG_LEVEL DBG_ERROR
#define DBG_COLOR
#include <rtdbg.h>
#if defined(RT_USING_DFS)
#include <dfs_fs.h>
#include <dfs_posix.h>
#endif
#if defined(PKG_USING_FAL)
#include <fal.h>
#endif
#if defined(PKG_USING_RAMDISK)
#define RAMDISK_NAME "ramdisk0"
#define RAMDISK_UDC "ramdisk1"
#define MOUNT_POINT_RAMDISK0 "/"
#endif
#if defined(BOARD_USING_STORAGE_SPIFLASH)
#define PARTITION_NAME_FILESYSTEM "filesystem"
#define MOUNT_POINT_SPIFLASH0 "/mnt/"PARTITION_NAME_FILESYSTEM
#endif
#ifdef RT_USING_DFS_MNTTABLE
/*
const char *device_name;
const char *path;
const char *filesystemtype;
unsigned long rwflag;
const void *data;
*/
const struct dfs_mount_tbl mount_table[] =
{
#if defined(PKG_USING_RAMDISK)
{ RAMDISK_UDC, "/mnt/ram_usbd", "elm", 0, RT_NULL },
#endif
{0},
};
#endif
#if defined(PKG_USING_RAMDISK)
extern rt_err_t ramdisk_init(const char *dev_name, rt_uint8_t *disk_addr, rt_size_t block_size, rt_size_t num_block);
int ramdisk_device_init(void)
{
rt_err_t result = RT_EOK;
/* Create a 8MB RAMDISK */
result = ramdisk_init(RAMDISK_NAME, NULL, 512, 2 * 4096);
RT_ASSERT(result == RT_EOK);
/* Create a 4MB RAMDISK */
result = ramdisk_init(RAMDISK_UDC, NULL, 512, 2 * 4096);
RT_ASSERT(result == RT_EOK);
return 0;
}
INIT_DEVICE_EXPORT(ramdisk_device_init);
/* Recursive mkdir */
static int mkdir_p(const char *dir, const mode_t mode)
{
int ret = -1;
char *tmp = NULL;
char *p = NULL;
struct stat sb;
rt_size_t len;
if (!dir)
goto exit_mkdir_p;
/* Copy path */
/* Get the string length */
len = strlen(dir);
tmp = rt_strdup(dir);
/* Remove trailing slash */
if (tmp[len - 1] == '/')
{
tmp[len - 1] = '\0';
len--;
}
/* check if path exists and is a directory */
if (stat(tmp, &sb) == 0)
{
if (S_ISDIR(sb.st_mode))
{
ret = 0;
goto exit_mkdir_p;
}
}
/* Recursive mkdir */
for (p = tmp + 1; p - tmp <= len; p++)
{
if ((*p == '/') || (p - tmp == len))
{
*p = 0;
/* Test path */
if (stat(tmp, &sb) != 0)
{
/* Path does not exist - create directory */
if (mkdir(tmp, mode) < 0)
{
goto exit_mkdir_p;
}
}
else if (!S_ISDIR(sb.st_mode))
{
/* Not a directory */
goto exit_mkdir_p;
}
if (p - tmp != len)
*p = '/';
}
}
ret = 0;
exit_mkdir_p:
if (tmp)
rt_free(tmp);
return ret;
}
/* Initialize the filesystem */
int filesystem_init(void)
{
rt_err_t result = RT_EOK;
// ramdisk as root
if (!rt_device_find(RAMDISK_NAME))
{
LOG_E("cannot find %s device", RAMDISK_NAME);
goto exit_filesystem_init;
}
else
{
/* Format these ramdisk */
result = (rt_err_t)dfs_mkfs("elm", RAMDISK_NAME);
RT_ASSERT(result == RT_EOK);
/* mount ramdisk0 as root directory */
if (dfs_mount(RAMDISK_NAME, "/", "elm", 0, RT_NULL) == 0)
{
LOG_I("ramdisk mounted on \"/\".");
/* now you can create dir dynamically. */
mkdir_p("/mnt", 0x777);
mkdir_p("/cache", 0x777);
mkdir_p("/download", 0x777);
mkdir_p("/mnt/ram_usbd", 0x777);
#if defined(RT_USBH_MSTORAGE) && defined(UDISK_MOUNTPOINT)
mkdir_p(UDISK_MOUNTPOINT, 0x777);
#endif
}
else
{
LOG_E("root folder creation failed!\n");
goto exit_filesystem_init;
}
}
if (!rt_device_find(RAMDISK_UDC))
{
LOG_E("cannot find %s device", RAMDISK_UDC);
goto exit_filesystem_init;
}
else
{
/* Format these ramdisk */
result = (rt_err_t)dfs_mkfs("elm", RAMDISK_UDC);
RT_ASSERT(result == RT_EOK);
}
exit_filesystem_init:
return -result;
}
INIT_ENV_EXPORT(filesystem_init);
#endif
#if defined(BOARD_USING_STORAGE_SPIFLASH)
int mnt_init_spiflash0(void)
{
#if defined(PKG_USING_FAL)
extern int fal_init_check(void);
if (!fal_init_check())
fal_init();
#endif
struct rt_device *psNorFlash = fal_blk_device_create(PARTITION_NAME_FILESYSTEM);
if (!psNorFlash)
{
rt_kprintf("Failed to create block device for %s.\n", PARTITION_NAME_FILESYSTEM);
goto exit_mnt_init_spiflash0;
}
else if (mkdir(MOUNT_POINT_SPIFLASH0, 0x777) < 0)
{
rt_kprintf("Failed to make folder for %s.\n", MOUNT_POINT_SPIFLASH0);
goto exit_mnt_init_spiflash0;
}
else if (dfs_mount(psNorFlash->parent.name, MOUNT_POINT_SPIFLASH0, "elm", 0, 0) != 0)
{
rt_kprintf("Failed to mount elm on %s.\n", MOUNT_POINT_SPIFLASH0);
rt_kprintf("Try to execute 'mkfs -t elm %s' first, then reboot.\n", PARTITION_NAME_FILESYSTEM);
goto exit_mnt_init_spiflash0;
}
rt_kprintf("mount %s with elmfat type: ok\n", PARTITION_NAME_FILESYSTEM);
exit_mnt_init_spiflash0:
return 0;
}
INIT_ENV_EXPORT(mnt_init_spiflash0);
#endif
menu "Hardware Drivers Config"
menu "On-chip Peripheral Drivers"
source "$BSP_DIR/../libraries/n9h30/rtt_port/Kconfig"
endmenu
menu "On-board Peripheral Drivers"
config BSP_USING_CONSOLE
bool "Enable UART0 for RTT Console(uart0)"
select BSP_USING_UART
select BSP_USING_UART0
default y
config BOARD_USING_IP101GR
bool "Enable ethernet phy supporting(over emac/mdio)"
select BSP_USING_EMAC
select BSP_USING_EMAC0
select BSP_USING_EMAC1
default n
config BOARD_USING_NAU8822
bool "NAU8822 Audio Codec supporting(over i2s, i2c0)"
select NU_PKG_USING_NAU8822
select BSP_USING_I2C0
select BSP_USING_I2S
select BSP_USING_I2S0
default n
config BOARD_USING_STORAGE_SDCARD
bool "SDCARD supporting(over sdh1)"
select BSP_USING_SDH
select BSP_USING_SDH1
default y
config BOARD_USING_STORAGE_SPIFLASH
bool "SPIFLASH supporting(over qspi0)"
select BSP_USING_QSPI
select BSP_USING_QSPI0
default y
config BOARD_USING_BUZZER
bool "BUZZER.(over pwm0_ch1)"
select BSP_USING_PWM
select BSP_USING_PWM0
default n
config BOARD_USING_LCM
bool "NuDesign TFT-LCD7(over vpost)"
select BSP_USING_VPOST
select LCM_USING_FW070TFT
default y
config BOARD_USING_USB0_DEVICE_HOST
select BSP_USING_USBH
select BSP_USING_USBD
bool "Enable USB0 Device/Host"
help
Choose this option if you need USB device or host function mode.
If you need USB host, please remember short to ground on JP1 jumper.
config BOARD_USING_USB1_HOST
select BSP_USING_USBH
bool "Enable USB1 Host"
help
Choose this option if you need USB1 HOST.
endmenu
menu "Board extended module drivers"
endmenu
endmenu
# RT-Thread building script for component
from building import *
Import('RTT_ROOT')
from building import *
cwd = GetCurrentDir()
src = Glob('*.c') + Glob('*.cpp')
CPPPATH = [ cwd ]
group = DefineGroup('board', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
/**************************************************************************//**
*
* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-1-16 Wayne First version
*
******************************************************************************/
#ifndef __BOARD_H__
#define __BOARD_H__
#include "NuMicro.h"
#include "drv_sys.h"
#if defined(__CC_ARM)
extern int Image$$RW_RAM1$$ZI$$Limit;
#define BOARD_HEAP_START (void*)&Image$$RW_RAM1$$ZI$$Limit
#else
extern int __bss_end;
#define BOARD_HEAP_START ((void *)&__bss_end)
#endif
#define BOARD_SDRAM_START 0x0
#define BOARD_SDRAM_SIZE 0x04000000
#define BOARD_HEAP_END ((void*)BOARD_SDRAM_SIZE)
extern void rt_hw_board_init(void);
extern void nu_clock_init(void);
extern void nu_clock_deinit(void);
extern void nu_pin_init(void);
extern void nu_pin_deinit(void);
#endif /* BOARD_H_ */
/**************************************************************************//**
*
* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-12-12 Wayne First version
*
******************************************************************************/
#include <rtconfig.h>
#include <rtdevice.h>
#if defined(BOARD_USING_STORAGE_SPIFLASH)
#include <drv_qspi.h>
#if defined(RT_USING_SFUD)
#include "spi_flash.h"
#include "spi_flash_sfud.h"
#endif
#define W25X_REG_READSTATUS (0x05)
#define W25X_REG_READSTATUS2 (0x35)
#define W25X_REG_WRITEENABLE (0x06)
#define W25X_REG_WRITESTATUS (0x01)
#define W25X_REG_QUADENABLE (0x02)
static rt_uint8_t SpiFlash_ReadStatusReg(struct rt_qspi_device *qspi_device)
{
rt_uint8_t u8Val;
rt_err_t result = RT_EOK;
rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS;
result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
RT_ASSERT(result > 0);
return u8Val;
}
static rt_uint8_t SpiFlash_ReadStatusReg2(struct rt_qspi_device *qspi_device)
{
rt_uint8_t u8Val;
rt_err_t result = RT_EOK;
rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS2;
result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
RT_ASSERT(result > 0);
return u8Val;
}
static rt_err_t SpiFlash_WriteStatusReg(struct rt_qspi_device *qspi_device, uint8_t u8Value1, uint8_t u8Value2)
{
rt_uint8_t w25x_txCMD1;
rt_uint8_t au8Val[2];
rt_err_t result;
struct rt_qspi_message qspi_message = {0};
/* Enable WE */
w25x_txCMD1 = W25X_REG_WRITEENABLE;
result = rt_qspi_send(qspi_device, &w25x_txCMD1, sizeof(w25x_txCMD1));
if (result != sizeof(w25x_txCMD1))
goto exit_SpiFlash_WriteStatusReg;
/* Prepare status-1, 2 data */
au8Val[0] = u8Value1;
au8Val[1] = u8Value2;
/* 1-bit mode: Instruction+payload */
qspi_message.instruction.content = W25X_REG_WRITESTATUS;
qspi_message.instruction.qspi_lines = 1;
qspi_message.qspi_data_lines = 1;
qspi_message.parent.cs_take = 1;
qspi_message.parent.cs_release = 1;
qspi_message.parent.send_buf = &au8Val[0];
qspi_message.parent.length = sizeof(au8Val);
qspi_message.parent.next = RT_NULL;
if (rt_qspi_transfer_message(qspi_device, &qspi_message) != sizeof(au8Val))
{
result = -RT_ERROR;
}
result = RT_EOK;
exit_SpiFlash_WriteStatusReg:
return result;
}
static void SpiFlash_WaitReady(struct rt_qspi_device *qspi_device)
{
volatile uint8_t u8ReturnValue;
do
{
u8ReturnValue = SpiFlash_ReadStatusReg(qspi_device);
u8ReturnValue = u8ReturnValue & 1;
}
while (u8ReturnValue != 0); // check the BUSY bit
}
static void SpiFlash_EnterQspiMode(struct rt_qspi_device *qspi_device)
{
rt_err_t result = RT_EOK;
uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
u8Status2 |= W25X_REG_QUADENABLE;
result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
RT_ASSERT(result == RT_EOK);
SpiFlash_WaitReady(qspi_device);
}
static void SpiFlash_ExitQspiMode(struct rt_qspi_device *qspi_device)
{
rt_err_t result = RT_EOK;
uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
u8Status2 &= ~W25X_REG_QUADENABLE;
result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
RT_ASSERT(result == RT_EOK);
SpiFlash_WaitReady(qspi_device);
}
static int rt_hw_spiflash_init(void)
{
if (nu_qspi_bus_attach_device("qspi0", "qspi01", 4, SpiFlash_EnterQspiMode, SpiFlash_ExitQspiMode) != RT_EOK)
return -1;
#if defined(RT_USING_SFUD)
if (rt_sfud_flash_probe(FAL_USING_NOR_FLASH_DEV_NAME, "qspi01") == RT_NULL)
{
return -(RT_ERROR);
}
#endif
return 0;
}
INIT_COMPONENT_EXPORT(rt_hw_spiflash_init);
#endif /* BOARD_USING_STORAGE_SPIFLASH */
#if defined(BOARD_USING_NAU8822) && defined(NU_PKG_USING_NAU8822)
#include <acodec_nau8822.h>
S_NU_NAU8822_CONFIG sCodecConfig =
{
.i2c_bus_name = "i2c0",
.i2s_bus_name = "sound0",
.pin_phonejack_en = 0,
.pin_phonejack_det = 0,
};
int rt_hw_nau8822_port(void)
{
if (nu_hw_nau8822_init(&sCodecConfig) != RT_EOK)
return -1;
return 0;
}
INIT_COMPONENT_EXPORT(rt_hw_nau8822_port);
#endif /* BOARD_USING_NAU8822 */
#if defined(BOARD_USING_BUZZER)
#define PWM_DEV_NAME "pwm0"
#define PWM_DEV_CHANNEL (1)
static void PlayRingTone(void)
{
struct rt_device_pwm *pwm_dev;
rt_uint32_t period;
int i, j;
period = 1000;
if ((pwm_dev = (struct rt_device_pwm *)rt_device_find(PWM_DEV_NAME)) != RT_NULL)
{
rt_pwm_set(pwm_dev, PWM_DEV_CHANNEL, period, period);
rt_pwm_enable(pwm_dev, PWM_DEV_CHANNEL);
for (j = 0; j < 3; j++)
{
for (i = 0; i < 10; i++)
{
rt_pwm_set(pwm_dev, PWM_DEV_CHANNEL, period, period);
rt_thread_mdelay(50);
rt_pwm_set(pwm_dev, PWM_DEV_CHANNEL, period, period / 2);
rt_thread_mdelay(50);
}
/* Mute 2 seconds */
rt_pwm_set(pwm_dev, PWM_DEV_CHANNEL, period, period);
rt_thread_mdelay(2000);
}
rt_pwm_disable(pwm_dev, PWM_DEV_CHANNEL);
}
else
{
rt_kprintf("Can't find %s\n", PWM_DEV_NAME);
}
}
#if defined(BOARD_USING_LCM)
#if defined(PKG_USING_GUIENGINE)
#include <rtgui/driver.h>
#endif
#if defined(RT_USING_PIN)
#include <drv_gpio.h>
/* defined the LCM_BLEN pin: PH3 */
#define LCM_BLEN NU_GET_PININDEX(NU_PH, 3)
#endif
#define PWM_DEV_NAME "pwm0"
#define LCM_PWM_CHANNEL (0)
static void LCMLightOn(void)
{
struct rt_device_pwm *pwm_dev;
if ((pwm_dev = (struct rt_device_pwm *)rt_device_find(PWM_DEV_NAME)) != RT_NULL)
{
rt_pwm_enable(pwm_dev, LCM_PWM_CHANNEL);
rt_pwm_set(pwm_dev, LCM_PWM_CHANNEL, 100000, 100);
}
else
{
rt_kprintf("Can't find %s\n", PWM_DEV_NAME);
}
}
#ifdef FINSH_USING_MSH
MSH_CMD_EXPORT(LCMLightOn, LCM - light on panel);
#endif
int rt_hw_lcm_port(void)
{
#if defined(PKG_USING_GUIENGINE)
rt_device_t lcm_vpost;
lcm_vpost = rt_device_find("lcd");
if (lcm_vpost)
{
rtgui_graphic_set_device(lcm_vpost);
}
#endif
#if defined(RT_USING_PIN)
/* set LCM_BLEN pin mode to output */
rt_pin_mode(LCM_BLEN, PIN_MODE_OUTPUT);
rt_pin_write(LCM_BLEN, PIN_HIGH);
#endif
LCMLightOn();
return 0;
}
INIT_COMPONENT_EXPORT(rt_hw_lcm_port);
#endif /* BOARD_USING_LCM */
int buzzer_test(void)
{
PlayRingTone();
return 0;
}
#ifdef FINSH_USING_MSH
MSH_CMD_EXPORT(buzzer_test, Buzzer - Play ring tone);
#endif
#endif /* BOARD_USING_BUZZER */
#if defined(BOARD_USING_RS485)
#include <drv_uart.h>
int test_rs485(int argc, char **argv)
{
rt_device_t serial;
char txbuf[16];
rt_err_t ret;
int str_len;
if (argc < 2)
goto exit_test_rs485;
serial = rt_device_find(argv[1]);
if (!serial)
{
rt_kprintf("Can't find %s. EXIT.\n", argv[1]);
goto exit_test_rs485;
}
/* Interrupt RX */
ret = rt_device_open(serial, RT_DEVICE_FLAG_INT_RX);
RT_ASSERT(ret == RT_EOK);
/* Nuvoton private command */
nu_uart_set_rs485aud((struct rt_serial_device *)serial, RT_FALSE);
rt_snprintf(&txbuf[0], sizeof(txbuf), "Hello World!\r\n");
str_len = rt_strlen(txbuf);
/* Say Hello */
ret = rt_device_write(serial, 0, &txbuf[0], str_len);
RT_ASSERT(ret == str_len);
ret = rt_device_close(serial);
RT_ASSERT(ret == RT_EOK);
return 0;
exit_test_rs485:
return -1;
}
MSH_CMD_EXPORT(test_rs485, test rs485 communication);
#endif //defined(BOARD_USING_RS485)
/**************************************************************************//**
*
* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-3-03 FYChou First version
*
******************************************************************************/
#ifndef _FAL_CFG_H_
#define _FAL_CFG_H_
#include <rtconfig.h>
#include <board.h>
/* ===================== Flash device Configuration ========================= */
#if defined(RT_USING_SFUD)
extern struct fal_flash_dev nor_flash0;
/* -flash device table------------------------------------------------------- */
#define FAL_FLASH_DEV_TABLE \
{ \
&nor_flash0, \
}
#else
#define FAL_FLASH_DEV_TABLE \
{ \
0 \
}
#endif
/* ====================== Partition Configuration ============================ */
#ifdef FAL_PART_HAS_TABLE_CFG
/* partition table------------------------------------------------------------ */
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WORD, "rtthread", FAL_USING_NOR_FLASH_DEV_NAME, 0, 4*1024*1024, 0}, \
{FAL_PART_MAGIC_WORD, "filesystem", FAL_USING_NOR_FLASH_DEV_NAME, 4*1024*1024, 12*1024*1024, 0}, \
}
#endif /* FAL_PART_HAS_TABLE_CFG */
#endif /* _FAL_CFG_H_ */
/**************************************************************************//**
*
* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-12-12 Wayne First version
*
******************************************************************************/
#include "board.h"
static void nu_pin_uart_init(void)
{
/* UART0: PE[0, 1] */
outpw(REG_SYS_GPE_MFPL, (inpw(REG_SYS_GPE_MFPL) & 0xffffff00) | 0x00000099);
/* UART1: PH[4, 7] */
outpw(REG_SYS_GPH_MFPL, (inpw(REG_SYS_GPH_MFPL) & 0x0000ffff) | 0x99990000);
/* UART2: PF[11, 14] */
outpw(REG_SYS_GPF_MFPH, (inpw(REG_SYS_GPF_MFPH) & 0xf0000fff) | 0x09999000);
/* UART3: PE[12, 13] */
outpw(REG_SYS_GPE_MFPH, (inpw(REG_SYS_GPE_MFPH) & 0xff00ffff) | 0x00990000);
/* UART4: PH[8, 11] */
outpw(REG_SYS_GPH_MFPH, (inpw(REG_SYS_GPH_MFPH) & 0xffff0000) | 0x00009999);
/* UART5: PB[0, 1] */
outpw(REG_SYS_GPB_MFPL, (inpw(REG_SYS_GPB_MFPL) & 0xffffff00) | 0x00000099);
/* UART7: PI[1, 2] */
outpw(REG_SYS_GPI_MFPL, (inpw(REG_SYS_GPI_MFPL) & 0xfffff00f) | 0x00000990);
/* UART8: PH[12, 15] */
outpw(REG_SYS_GPH_MFPH, (inpw(REG_SYS_GPH_MFPH) & 0x0000ffff) | 0x99990000);
/* UART10: PB[12, 15] */
outpw(REG_SYS_GPB_MFPH, (inpw(REG_SYS_GPB_MFPH) & 0x0000ffff) | 0x99990000);
}
static void nu_pin_emac_init(void)
{
/* EMAC0: PF[0, 9] */
outpw(REG_SYS_GPF_MFPL, 0x11111111);
outpw(REG_SYS_GPF_MFPH, (inpw(REG_SYS_GPF_MFPH) & 0xffffff00) | 0x00000011);
/* EMAC1: PE[2, 11] */
outpw(REG_SYS_GPE_MFPL, (inpw(REG_SYS_GPE_MFPL) & 0x000000ff) | 0x11111100);
outpw(REG_SYS_GPE_MFPH, (inpw(REG_SYS_GPE_MFPH) & 0xffff0000) | 0x00001111);
}
static void nu_pin_sdh_init(void)
{
/* SDH0: PD[0, 6] */
outpw(REG_SYS_GPD_MFPL, (inpw(REG_SYS_GPD_MFPL) & 0xf0000000) | 0x06666666);
}
static void nu_pin_spi_init(void)
{
/* QSPI0: PB[6, 11] */
outpw(REG_SYS_GPB_MFPL, (inpw(REG_SYS_GPB_MFPL) & 0x00ffffff) | 0xbb000000);
outpw(REG_SYS_GPB_MFPH, (inpw(REG_SYS_GPB_MFPH) & 0xffff0000) | 0x0000bbbb);
}
static void nu_pin_i2c_init(void)
{
/* I2C0: PG[0, 1] */
outpw(REG_SYS_GPG_MFPL, (inpw(REG_SYS_GPG_MFPL) & 0xffffff00) | 0x00000088);
/* I2C1: PG[2, 3] */
outpw(REG_SYS_GPG_MFPL, (inpw(REG_SYS_GPG_MFPL) & 0xffff00ff) | 0x00008800);
}
static void nu_pin_pwm_init(void)
{
/* PWM0: PB2, LCD_PWM */
outpw(REG_SYS_GPB_MFPL, (inpw(REG_SYS_GPB_MFPL) & 0xfffff0ff) | 0x00000d00);
/* PWM1: PB3, Buzzer */
outpw(REG_SYS_GPB_MFPL, (inpw(REG_SYS_GPB_MFPL) & 0xffff0fff) | 0x0000d000);
}
static void nu_pin_i2s_init(void)
{
/* I2S: PG[10, 14] */
outpw(REG_SYS_GPG_MFPH, (inpw(REG_SYS_GPG_MFPH) & 0xf00000ff) | 0x08888800);
}
static void nu_pin_can_init(void)
{
/* CAN0: PI[3, 4] */
outpw(REG_SYS_GPI_MFPL, (inpw(REG_SYS_GPI_MFPL) & 0xfff00fff) | 0x000cc000);
}
static void nu_pin_usbd_init(void)
{
/* USB0_VBUSVLD, PH0 */
outpw(REG_SYS_GPH_MFPL, (inpw(REG_SYS_GPH_MFPL) & 0xfffffff0) | 0x00000007);
}
static void nu_pin_vpost_init(void)
{
/* CLK: PG6, HSYNC: PG7 */
outpw(REG_SYS_GPG_MFPL, (inpw(REG_SYS_GPG_MFPL) & 0x00ffffff) | 0x22000000);
/* VSYNC: PG8, DEN: PG9 */
outpw(REG_SYS_GPG_MFPH, (inpw(REG_SYS_GPG_MFPH) & 0xffffff00) | 0x00000022);
/* DATA pin: 24bit RGB */
/* PA[0, 7] */
outpw(REG_SYS_GPA_MFPL, 0x22222222);
/* PA[8, 15] */
outpw(REG_SYS_GPA_MFPH, 0x22222222);
#if (LCM_USING_BPP==4)
/* PD[8, 15 ] */
outpw(REG_SYS_GPD_MFPH, 0x22222222);
#endif
}
static void nu_pin_fmi_init(void)
{
/* NAND: PC[0, 14] */
outpw(REG_SYS_GPC_MFPL, 0x55555555);
outpw(REG_SYS_GPC_MFPH, 0x05555555);
}
static void nu_pin_usbh_init(void)
{
}
void nu_pin_init(void)
{
nu_pin_uart_init();
nu_pin_emac_init();
nu_pin_sdh_init();
nu_pin_spi_init();
nu_pin_i2c_init();
nu_pin_pwm_init();
nu_pin_i2s_init();
nu_pin_can_init();
nu_pin_vpost_init();
nu_pin_fmi_init();
nu_pin_usbd_init();
nu_pin_usbh_init();
}
void nu_pin_deinit(void)
{
}
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(system_vectors)
MEMORY
{
RAM (rwx) : ORIGIN = 0x000000, LENGTH = 0x04000000
}
SECTIONS
{
. = 0x0;
. = ALIGN(4);
.text :
{
*(.vectors)
*(.text)
*(.gnu.linkonce.t*)
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
/* section information for modules */
. = ALIGN(4);
__rtmsymtab_start = .;
KEEP(*(RTMSymTab))
__rtmsymtab_end = .;
. = ALIGN(4);
/* section information for initial. */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
. = ALIGN(4);
/* section information for utest */
. = ALIGN(4);
__rt_utest_tc_tab_start = .;
KEEP(*(UtestTcTab))
__rt_utest_tc_tab_end = .;
. = ALIGN(4);
}
. = ALIGN(4);
.rodata : { *(.rodata) *(.rodata.*) *(.gnu.linkonce.r*) *(.eh_frame) }
. = ALIGN(4);
.ctors :
{
PROVIDE(__ctors_start__ = .);
KEEP(*(SORT(.ctors.*)))
KEEP(*(.ctors))
PROVIDE(__ctors_end__ = .);
}
.dtors :
{
PROVIDE(__dtors_start__ = .);
KEEP(*(SORT(.dtors.*)))
KEEP(*(.dtors))
PROVIDE(__dtors_end__ = .);
}
. = ALIGN(4);
.data :
{
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
}
. = ALIGN(4);
.nobss : { *(.nobss) }
. = ALIGN(4);
__bss_start__ = .;
__bss_start = .;
.bss : { *(.bss)}
. = ALIGN(4);
__bss_end = .;
__bss_end__ = .;
. = ALIGN(4);
/* stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
_end = .;
}
LR_IROM1 0x00000000 0x800000 { ; load region size_region
ER_IROM1 0x00000000 0x800000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_RAM1 +0 { ; RW_RAM1 start address is after ER_ROM1
.ANY (+RW +ZI)
}
}
import os
# toolchains options
ARCH = 'arm'
CPU = 'arm926'
# toolchains options
CROSS_TOOL = 'gcc'
#------- toolchains path -------------------------------------------------------
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = r'C:\Program Files (x86)\GNU Tools ARM Embedded\6 2017-q1-update\bin'
elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = r'C:\Keil_v5'
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'debug'
#BUILD = 'release'
CORE = 'arm926ej-s'
MAP_FILE = 'rtthread_n9h30.map'
LINK_FILE = 'linking_scripts/n9h30'
TARGET_NAME = 'rtthread.bin'
#------- GCC settings ----------------------------------------------------------
if PLATFORM == 'gcc':
# toolchains
PREFIX = 'arm-none-eabi-'
CC = PREFIX + 'gcc'
CXX = PREFIX + 'g++'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcpu=arm926ej-s'
CFLAGS = DEVICE
AFLAGS = '-c'+ DEVICE + ' -x assembler-with-cpp'
AFLAGS += ' -Iplatform'
LFLAGS = DEVICE
LFLAGS += ' -Wl,--gc-sections,-cref,-Map=' + MAP_FILE
LFLAGS += ' -T ' + LINK_FILE + '.ld'
CPATH = ''
LPATH = ''
if BUILD == 'debug':
CFLAGS += ' -O0 -gdwarf-2'
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -O0'
POST_ACTION = OBJCPY + ' -O binary $TARGET ' + TARGET_NAME + '\n'
POST_ACTION += SIZE + ' $TARGET\n'
#------- Keil settings ---------------------------------------------------------
elif PLATFORM == 'armcc':
# toolchains
CC = 'armcc'
AS = 'armasm'
AR = 'armar'
LINK = 'armlink'
TARGET_EXT = 'axf'
EXEC_PATH += '/arm/armcc/bin/'
DEVICE = ' --cpu=' + CORE
CFLAGS = DEVICE + ' --apcs=interwork --diag_suppress=870'
AFLAGS = DEVICE + ' -Iplatform'
LFLAGS = DEVICE + ' --strict'
LFLAGS += ' --info sizes --info totals --info unused --info veneers'
LFLAGS += ' --list ' + MAP_FILE
LFLAGS += ' --scatter ' + LINK_FILE + '.sct'
if BUILD == 'debug':
CFLAGS += ' -g -O0'
AFLAGS += ' -g'
else:
CFLAGS += ' -O2'
POST_ACTION = 'fromelf --bin $TARGET --output ' + TARGET_NAME + ' \n'
POST_ACTION += 'fromelf -z $TARGET\n'
\ No newline at end of file
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
<SchemaVersion>1.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>rtthread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<TargetCommonOption>
<Device>Nuvoton_ARM9_Series</Device>
<Vendor>Nuvoton</Vendor>
<Cpu></Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile></SFDFile>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath>Atmel\SAM9260\</RegisterFilePath>
<DBRegisterFilePath>Atmel\SAM9260\</DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\Objects\</OutputDirectory>
<OutputName>rtthread</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\Listings\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
</CommonProperty>
<DllOption>
<SimDllName>SARM.DLL</SimDllName>
<SimDllArguments>-cAT91SAM9</SimDllArguments>
<SimDlgDll>DARMATS9.DLL</SimDlgDll>
<SimDlgDllArguments>-p91SAM9260</SimDlgDllArguments>
<TargetDllName>SARM.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TARMATS9.DLL</TargetDlgDll>
<TargetDlgDllArguments>-p91SAM9260</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
<Simulator>
<UseSimulator>0</UseSimulator>
<LoadApplicationAtStartup>0</LoadApplicationAtStartup>
<RunToMain>1</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>1</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
</Simulator>
<Target>
<UseTarget>1</UseTarget>
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
<RunToMain>0</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
<RestoreTracepoints>1</RestoreTracepoints>
</Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>6</TargetSelection>
<SimDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
</SimDlls>
<TargetDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile>..\libraries\nuc980\Script\NUC980xx61.ini</InitializationFile>
<Driver>Segger\JLTAgdi.dll</Driver>
</TargetDlls>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4098</DriverSelection>
</Flash1>
<bUseTDR>0</bUseTDR>
<Flash2>Segger\JLTAgdi.dll</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType></AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>0</hadIROM>
<hadIRAM>0</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>0</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>0</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>0</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x200000</StartAddress>
<Size>0x1000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x100000</StartAddress>
<Size>0x8000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>3</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>0</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<VariousControls>
<MiscControls>--c99</MiscControls>
<Define>RT_USING_INTERRUPT_INFO</Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>0</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x20000000</TextAddressRange>
<DataAddressRange>0x20800000</DataAddressRange>
<ScatterFile>.\linking_scripts\n9h30.sct</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
</Target>
</Targets>
</Project>
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>rtthread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>Nuvoton_ARM9_Series</Device>
<Vendor>Nuvoton</Vendor>
<Cpu></Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile></SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath>Atmel\SAM9260\</RegisterFilePath>
<DBRegisterFilePath>Atmel\SAM9260\</DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\build\keil5\</OutputDirectory>
<OutputName>rtthread</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>1</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\build\keil5\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf.exe --bin --output "$L@L.bin" "$L@L.axf"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARM.DLL</SimDllName>
<SimDllArguments>-cAT91SAM9260</SimDllArguments>
<SimDlgDll>DARMATS9.DLL</SimDlgDll>
<SimDlgDllArguments>-p91SAM9260</SimDlgDllArguments>
<TargetDllName>SARM.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TARMATS9.DLL</TargetDlgDll>
<TargetDlgDllArguments>-p91SAM9260</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4098</DriverSelection>
</Flash1>
<bUseTDR>0</bUseTDR>
<Flash2>Segger\JLTAgdi.dll</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>ARM926EJ-S</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<RvdsMve>0</RvdsMve>
<hadIRAM2>1</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>0</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>0</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x200000</StartAddress>
<Size>0x1000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x100000</StartAddress>
<Size>0x8000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x800000</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x100000</StartAddress>
<Size>0x8000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x20800000</StartAddress>
<Size>0x1800000</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x200000</StartAddress>
<Size>0x1000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x300000</StartAddress>
<Size>0x1000</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>0</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>0</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>--c99</MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>0</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x20000000</TextAddressRange>
<DataAddressRange>0x20800000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile>.\linking_scripts\n9h30.sct</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
</Target>
</Targets>
<RTE>
<apis/>
<components/>
<files/>
</RTE>
</Project>
...@@ -23,18 +23,14 @@ SECTIONS ...@@ -23,18 +23,14 @@ SECTIONS
__fsymtab_start = .; __fsymtab_start = .;
KEEP(*(FSymTab)) KEEP(*(FSymTab))
__fsymtab_end = .; __fsymtab_end = .;
. = ALIGN(4);
. = ALIGN(4); . = ALIGN(4);
__vsymtab_start = .; __vsymtab_start = .;
KEEP(*(VSymTab)) KEEP(*(VSymTab))
__vsymtab_end = .; __vsymtab_end = .;
. = ALIGN(4); . = ALIGN(4);
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
. = ALIGN(4);
/* section information for modules */ /* section information for modules */
. = ALIGN(4); . = ALIGN(4);
__rtmsymtab_start = .; __rtmsymtab_start = .;
...@@ -54,6 +50,7 @@ SECTIONS ...@@ -54,6 +50,7 @@ SECTIONS
__rt_utest_tc_tab_start = .; __rt_utest_tc_tab_start = .;
KEEP(*(UtestTcTab)) KEEP(*(UtestTcTab))
__rt_utest_tc_tab_end = .; __rt_utest_tc_tab_end = .;
. = ALIGN(4);
} }
. = ALIGN(4); . = ALIGN(4);
......
[Version] [Version]
Nu_LinkVersion=V5.14 Nu_LinkVersion=V5.14
[Process] [Process]
ProcessID=0x00003fc4 ProcessID=0x00009908
ProcessCreationTime_L=0xfa4b822c ProcessCreationTime_L=0xda6c5f90
ProcessCreationTime_H=0x01d6fb6d ProcessCreationTime_H=0x01d74571
NuLinkID=0x1800002d NuLinkID=0x1800003c
NuLinkIDs_Count=0x00000001 NuLinkIDs_Count=0x00000001
NuLinkID0=0x1800002d NuLinkID0=0x1800003c
[ChipSelect] [ChipSelect]
;ChipName=<NUC1xx|NUC2xx|M05x|N571|N572|Nano100|N512|Mini51|NUC505|General> ;ChipName=<NUC1xx|NUC2xx|M05x|N571|N572|Nano100|N512|Mini51|NUC505|General>
ChipName=M2354 ChipName=M2354
......
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