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体验新版 GitCode,发现更多精彩内容 >>
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b15e88ee
编写于
8月 25, 2021
作者:
L
linyuanbo_breo_server
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
feat : 删除多余代码与多余的文件,修正注释与函数命名
上级
776398d4
变更
12
隐藏空白更改
内联
并排
Showing
12 changed file
with
19 addition
and
596 deletion
+19
-596
bsp/n32g452xx/Libraries/rt_drivers/drv_adc.c
bsp/n32g452xx/Libraries/rt_drivers/drv_adc.c
+0
-6
bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.c
bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.c
+1
-1
bsp/n32g452xx/Libraries/rt_drivers/drv_pwm.c
bsp/n32g452xx/Libraries/rt_drivers/drv_pwm.c
+1
-37
bsp/n32g452xx/Libraries/rt_drivers/drv_soft_i2c.c
bsp/n32g452xx/Libraries/rt_drivers/drv_soft_i2c.c
+4
-4
bsp/n32g452xx/Libraries/rt_drivers/drv_soft_i2c.h
bsp/n32g452xx/Libraries/rt_drivers/drv_soft_i2c.h
+2
-2
bsp/n32g452xx/Libraries/rt_drivers/drv_spi.c
bsp/n32g452xx/Libraries/rt_drivers/drv_spi.c
+0
-350
bsp/n32g452xx/Libraries/rt_drivers/drv_spi.h
bsp/n32g452xx/Libraries/rt_drivers/drv_spi.h
+0
-41
bsp/n32g452xx/Libraries/rt_drivers/drv_usart.c
bsp/n32g452xx/Libraries/rt_drivers/drv_usart.c
+9
-26
bsp/n32g452xx/Libraries/rt_drivers/drv_wdt.c
bsp/n32g452xx/Libraries/rt_drivers/drv_wdt.c
+0
-124
bsp/n32g452xx/README.md
bsp/n32g452xx/README.md
+0
-3
bsp/n32g452xx/n32g452xx-mini-system/board/board.c
bsp/n32g452xx/n32g452xx-mini-system/board/board.c
+1
-1
bsp/n32g452xx/n32g452xx-mini-system/board/board.h
bsp/n32g452xx/n32g452xx-mini-system/board/board.h
+1
-1
未找到文件。
bsp/n32g452xx/Libraries/rt_drivers/drv_adc.c
浏览文件 @
b15e88ee
...
...
@@ -112,7 +112,6 @@ static rt_err_t n32_adc_enabled(struct rt_adc_device *device, rt_uint32_t channe
n32_msp_adc_init
(
n32_adc_handler
);
/* ADCx configuration ------------------------------------------------------*/
ADC_InitStruct
(
&
ADC_InitStructure
);
ADC_InitStructure
.
WorkMode
=
ADC_WORKMODE_INDEPENDENT
;
ADC_InitStructure
.
MultiChEn
=
DISABLE
;
...
...
@@ -128,11 +127,6 @@ static rt_err_t n32_adc_enabled(struct rt_adc_device *device, rt_uint32_t channe
/* Enable ADCx */
ADC_Enable
(
n32_adc_handler
,
ENABLE
);
// /* Enable ADCx reset calibration register */
// ADC_RstCalibration(n32_adc_handler);
// /* Check the end of ADCx reset calibration register */
// while(ADC_GetResetCalibrationStatus(n32_adc_handler));
/* Start ADCx calibration */
ADC_StartCalibration
(
n32_adc_handler
);
/* Check the end of ADCx calibration */
...
...
bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.c
浏览文件 @
b15e88ee
...
...
@@ -24,7 +24,7 @@
}
#define __N32_PIN_DEFAULT {-1, 0, 0, 0, 0, 0}
/*
STM
32 GPIO driver */
/*
N
32 GPIO driver */
struct
pin_index
{
int
index
;
...
...
bsp/n32g452xx/Libraries/rt_drivers/drv_pwm.c
浏览文件 @
b15e88ee
...
...
@@ -12,11 +12,7 @@
#include "drv_pwm.h"
#ifdef RT_USING_PWM
#if !defined(BSP_USING_TIM1_CH1) && !defined(BSP_USING_TIM1_CH2) && \
!defined(BSP_USING_TIM1_CH3) && !defined(BSP_USING_TIM1_CH4) && \
!defined(BSP_USING_TIM2_CH1) && !defined(BSP_USING_TIM2_CH2) && \
!defined(BSP_USING_TIM2_CH3) && !defined(BSP_USING_TIM2_CH4) && \
!defined(BSP_USING_TIM3_CH1) && !defined(BSP_USING_TIM3_CH2) && \
#if !defined(BSP_USING_TIM3_CH1) && !defined(BSP_USING_TIM3_CH2) && \
!defined(BSP_USING_TIM3_CH3) && !defined(BSP_USING_TIM3_CH4)
#error "Please define at least one BSP_USING_TIMx_CHx"
#endif
...
...
@@ -39,38 +35,6 @@ struct n32_pwm
static
struct
n32_pwm
n32_pwm_obj
[]
=
{
#ifdef BSP_USING_TIM1_CH1
PWM1_CONFIG
,
#endif
#ifdef BSP_USING_TIM1_CH2
PWM2_CONFIG
,
#endif
#ifdef BSP_USING_TIM1_CH3
PWM3_CONFIG
,
#endif
#ifdef BSP_USING_TIM1_CH4
PWM4_CONFIG
,
#endif
#ifdef BSP_USING_TIM2_CH1
PWM5_CONFIG
,
#endif
#ifdef BSP_USING_TIM2_CH2
PWM6_CONFIG
,
#endif
#ifdef BSP_USING_TIM2_CH3
PWM7_CONFIG
,
#endif
#ifdef BSP_USING_TIM2_CH4
PWM8_CONFIG
,
#endif
#ifdef BSP_USING_TIM3_CH1
PWM1_TIM3_CONFIG
,
#endif
...
...
bsp/n32g452xx/Libraries/rt_drivers/drv_soft_i2c.c
浏览文件 @
b15e88ee
...
...
@@ -42,7 +42,7 @@ static struct n32_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0
/**
* This function initializes the i2c pin.
*
* @param
Stm
32 i2c dirver class.
* @param
n
32 i2c dirver class.
*/
static
void
n32_i2c_gpio_init
(
struct
n32_i2c
*
i2c
)
{
...
...
@@ -58,7 +58,7 @@ static void n32_i2c_gpio_init(struct n32_i2c *i2c)
/**
* This function sets the sda pin.
*
* @param
Stm
32 config class.
* @param
n
32 config class.
* @param The sda pin state.
*/
static
void
n32_set_sda
(
void
*
data
,
rt_int32_t
state
)
...
...
@@ -77,7 +77,7 @@ static void n32_set_sda(void *data, rt_int32_t state)
/**
* This function sets the scl pin.
*
* @param
Stm
32 config class.
* @param
n
32 config class.
* @param The scl pin state.
*/
static
void
n32_set_scl
(
void
*
data
,
rt_int32_t
state
)
...
...
@@ -164,7 +164,7 @@ static const struct rt_i2c_bit_ops n32_bit_ops_default =
/**
* if i2c is locked, this function will unlock it
*
* @param
at
32 config class
* @param
n
32 config class
*
* @return RT_EOK indicates successful unlock.
*/
...
...
bsp/n32g452xx/Libraries/rt_drivers/drv_soft_i2c.h
浏览文件 @
b15e88ee
...
...
@@ -15,14 +15,14 @@
#include <rthw.h>
#include <rtdevice.h>
/*
at
32 config class */
/*
n
32 config class */
struct
n32_soft_i2c_config
{
rt_uint8_t
scl
;
rt_uint8_t
sda
;
const
char
*
bus_name
;
};
/*
at
32 i2c dirver class */
/*
n
32 i2c dirver class */
struct
n32_i2c
{
struct
rt_i2c_bit_ops
ops
;
...
...
bsp/n32g452xx/Libraries/rt_drivers/drv_spi.c
已删除
100644 → 0
浏览文件 @
776398d4
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-01-09 shelton first version
*/
#include <board.h>
#include "drv_spi.h"
#ifdef RT_USING_SPI
#if !defined(BSP_USING_SPI1) && !defined(BSP_USING_SPI2) && \
!defined(BSP_USING_SPI3) && !defined(BSP_USING_SPI4)
#error "Please define at least one SPIx"
#endif
//#define DEBUG
#define ARR_LEN(__N) (sizeof(__N) / sizeof(__N[0]))
#ifdef DEBUG
#define DEBUG_PRINTF(...) rt_kprintf(__VA_ARGS__)
#else
#define DEBUG_PRINTF(...)
#endif
/* private rt-thread spi ops function */
static
rt_err_t
configure
(
struct
rt_spi_device
*
device
,
struct
rt_spi_configuration
*
configuration
);
static
rt_uint32_t
xfer
(
struct
rt_spi_device
*
device
,
struct
rt_spi_message
*
message
);
static
struct
rt_spi_ops
n32_spi_ops
=
{
configure
,
xfer
};
/**
* Attach the spi device to SPI bus, this function must be used after initialization.
*/
rt_err_t
rt_hw_spi_device_attach
(
const
char
*
bus_name
,
const
char
*
device_name
,
GPIO_Module
*
cs_gpiox
,
uint16_t
cs_gpio_pin
)
{
RT_ASSERT
(
bus_name
!=
RT_NULL
);
RT_ASSERT
(
device_name
!=
RT_NULL
);
rt_err_t
result
;
struct
rt_spi_device
*
spi_device
;
struct
n32_spi_cs
*
cs_pin
;
/* initialize the cs pin && select the slave*/
GPIO_InitType
GPIO_InitStruct
;
GPIO_InitStruct
.
Pin
=
cs_gpio_pin
;
GPIO_InitStruct
.
GPIO_Mode
=
GPIO_Mode_Out_PP
;
GPIO_InitStruct
.
GPIO_Speed
=
GPIO_Speed_50MHz
;
GPIO_InitPeripheral
(
cs_gpiox
,
&
GPIO_InitStruct
);
GPIO_SetBits
(
cs_gpiox
,
cs_gpio_pin
);
/* attach the device to spi bus*/
spi_device
=
(
struct
rt_spi_device
*
)
rt_malloc
(
sizeof
(
struct
rt_spi_device
));
RT_ASSERT
(
spi_device
!=
RT_NULL
);
cs_pin
=
(
struct
n32_spi_cs
*
)
rt_malloc
(
sizeof
(
struct
n32_spi_cs
));
RT_ASSERT
(
cs_pin
!=
RT_NULL
);
cs_pin
->
GPIOx
=
cs_gpiox
;
cs_pin
->
GPIO_Pin
=
cs_gpio_pin
;
result
=
rt_spi_bus_attach_device
(
spi_device
,
device_name
,
bus_name
,
(
void
*
)
cs_pin
);
if
(
result
!=
RT_EOK
)
{
DEBUG_PRINTF
(
"%s attach to %s faild, %d
\n
"
,
device_name
,
bus_name
,
result
);
}
RT_ASSERT
(
result
==
RT_EOK
);
DEBUG_PRINTF
(
"%s attach to %s done"
,
device_name
,
bus_name
);
return
result
;
}
static
rt_err_t
configure
(
struct
rt_spi_device
*
device
,
struct
rt_spi_configuration
*
configuration
)
{
struct
rt_spi_bus
*
spi_bus
=
(
struct
rt_spi_bus
*
)
device
->
bus
;
struct
n32_spi
*
spi_instance
=
(
struct
n32_spi
*
)
spi_bus
->
parent
.
user_data
;
SPI_InitType
SPI_InitStruct
;
RT_ASSERT
(
device
!=
RT_NULL
);
RT_ASSERT
(
configuration
!=
RT_NULL
);
n32_msp_spi_init
(
spi_instance
->
config
->
spix
);
/* data_width */
if
(
configuration
->
data_width
<=
8
)
{
SPI_InitStruct
.
DataLen
=
SPI_DATA_SIZE_8BITS
;
}
else
if
(
configuration
->
data_width
<=
16
)
{
SPI_InitStruct
.
DataLen
=
SPI_DATA_SIZE_16BITS
;
}
else
{
return
RT_EIO
;
}
/* baudrate */
{
uint32_t
spi_apb_clock
;
uint32_t
max_hz
;
RCC_ClocksType
RCC_Clocks
;
max_hz
=
configuration
->
max_hz
;
RCC_GetClocksFreqValue
(
&
RCC_Clocks
);
DEBUG_PRINTF
(
"sys freq: %d
\n
"
,
RCC_Clocks
.
SysclkFreq
);
DEBUG_PRINTF
(
"max freq: %d
\n
"
,
max_hz
);
if
(
spi_instance
->
config
->
spix
==
SPI1
)
{
spi_apb_clock
=
RCC_Clocks
.
Pclk2Freq
;
DEBUG_PRINTF
(
"pclk2 freq: %d
\n
"
,
RCC_Clocks
.
Pclk2Freq
);
}
else
{
spi_apb_clock
=
RCC_Clocks
.
Pclk1Freq
;
DEBUG_PRINTF
(
"pclk1 freq: %d
\n
"
,
RCC_Clocks
.
Pclk1Freq
);
}
if
(
max_hz
>=
spi_apb_clock
/
2
)
{
SPI_InitStruct
.
BaudRatePres
=
SPI_BR_PRESCALER_2
;
}
else
if
(
max_hz
>=
spi_apb_clock
/
4
)
{
SPI_InitStruct
.
BaudRatePres
=
SPI_BR_PRESCALER_4
;
}
else
if
(
max_hz
>=
spi_apb_clock
/
8
)
{
SPI_InitStruct
.
BaudRatePres
=
SPI_BR_PRESCALER_8
;
}
else
if
(
max_hz
>=
spi_apb_clock
/
16
)
{
SPI_InitStruct
.
BaudRatePres
=
SPI_BR_PRESCALER_16
;
}
else
if
(
max_hz
>=
spi_apb_clock
/
32
)
{
SPI_InitStruct
.
BaudRatePres
=
SPI_BR_PRESCALER_32
;
}
else
if
(
max_hz
>=
spi_apb_clock
/
64
)
{
SPI_InitStruct
.
BaudRatePres
=
SPI_BR_PRESCALER_64
;
}
else
if
(
max_hz
>=
spi_apb_clock
/
128
)
{
SPI_InitStruct
.
BaudRatePres
=
SPI_BR_PRESCALER_128
;
}
else
{
/* min prescaler 256 */
SPI_InitStruct
.
BaudRatePres
=
SPI_BR_PRESCALER_256
;
}
}
/* baudrate */
switch
(
configuration
->
mode
&
RT_SPI_MODE_3
)
{
case
RT_SPI_MODE_0
:
SPI_InitStruct
.
CLKPHA
=
SPI_CLKPHA_FIRST_EDGE
;
SPI_InitStruct
.
CLKPOL
=
SPI_CLKPOL_LOW
;
break
;
case
RT_SPI_MODE_1
:
SPI_InitStruct
.
CLKPHA
=
SPI_CLKPHA_SECOND_EDGE
;
SPI_InitStruct
.
CLKPOL
=
SPI_CLKPOL_LOW
;
break
;
case
RT_SPI_MODE_2
:
SPI_InitStruct
.
CLKPHA
=
SPI_CLKPHA_FIRST_EDGE
;
SPI_InitStruct
.
CLKPOL
=
SPI_CLKPOL_HIGH
;
break
;
case
RT_SPI_MODE_3
:
SPI_InitStruct
.
CLKPHA
=
SPI_CLKPHA_SECOND_EDGE
;
SPI_InitStruct
.
CLKPOL
=
SPI_CLKPOL_HIGH
;
break
;
}
/* MSB or LSB */
if
(
configuration
->
mode
&
RT_SPI_MSB
)
{
SPI_InitStruct
.
FirstBit
=
SPI_FB_MSB
;
}
else
{
SPI_InitStruct
.
FirstBit
=
SPI_FB_LSB
;
}
SPI_InitStruct
.
DataDirection
=
SPI_DIR_DOUBLELINE_FULLDUPLEX
;
SPI_InitStruct
.
SpiMode
=
SPI_MODE_MASTER
;
SPI_InitStruct
.
NSS
=
SPI_NSS_SOFT
;
/* init SPI */
SPI_Init
(
spi_instance
->
config
->
spix
,
&
SPI_InitStruct
);
/* Enable SPI_MASTER */
SPI_Enable
(
spi_instance
->
config
->
spix
,
ENABLE
);
SPI_EnableCalculateCrc
(
spi_instance
->
config
->
spix
,
DISABLE
);
return
RT_EOK
;
};
static
rt_uint32_t
xfer
(
struct
rt_spi_device
*
device
,
struct
rt_spi_message
*
message
)
{
struct
rt_spi_bus
*
at32_spi_bus
=
(
struct
rt_spi_bus
*
)
device
->
bus
;
struct
n32_spi
*
spi_instance
=
(
struct
n32_spi
*
)
at32_spi_bus
->
parent
.
user_data
;
struct
rt_spi_configuration
*
config
=
&
device
->
config
;
struct
n32_spi_cs
*
at32_spi_cs
=
device
->
parent
.
user_data
;
RT_ASSERT
(
device
!=
NULL
);
RT_ASSERT
(
message
!=
NULL
);
/* take CS */
if
(
message
->
cs_take
)
{
GPIO_ResetBits
(
at32_spi_cs
->
GPIOx
,
at32_spi_cs
->
GPIO_Pin
);
DEBUG_PRINTF
(
"spi take cs
\n
"
);
}
{
if
(
config
->
data_width
<=
8
)
{
const
rt_uint8_t
*
send_ptr
=
message
->
send_buf
;
rt_uint8_t
*
recv_ptr
=
message
->
recv_buf
;
rt_uint32_t
size
=
message
->
length
;
DEBUG_PRINTF
(
"spi poll transfer start: %d
\n
"
,
size
);
while
(
size
--
)
{
rt_uint8_t
data
=
0xFF
;
if
(
send_ptr
!=
RT_NULL
)
{
data
=
*
send_ptr
++
;
}
// Todo: replace register read/write by at32 lib
//Wait until the transmit buffer is empty
while
(
RESET
==
SPI_I2S_GetStatus
(
spi_instance
->
config
->
spix
,
SPI_I2S_TE_FLAG
));
// Send the byte
SPI_I2S_TransmitData
(
spi_instance
->
config
->
spix
,
data
);
//Wait until a data is received
while
(
RESET
==
SPI_I2S_GetStatus
(
spi_instance
->
config
->
spix
,
SPI_I2S_RNE_FLAG
));
// Get the received data
data
=
SPI_I2S_ReceiveData
(
spi_instance
->
config
->
spix
);
if
(
recv_ptr
!=
RT_NULL
)
{
*
recv_ptr
++
=
data
;
}
}
DEBUG_PRINTF
(
"spi poll transfer finsh
\n
"
);
}
else
if
(
config
->
data_width
<=
16
)
{
const
rt_uint16_t
*
send_ptr
=
message
->
send_buf
;
rt_uint16_t
*
recv_ptr
=
message
->
recv_buf
;
rt_uint32_t
size
=
message
->
length
;
while
(
size
--
)
{
rt_uint16_t
data
=
0xFF
;
if
(
send_ptr
!=
RT_NULL
)
{
data
=
*
send_ptr
++
;
}
//Wait until the transmit buffer is empty
while
(
RESET
==
SPI_I2S_GetStatus
(
spi_instance
->
config
->
spix
,
SPI_I2S_TE_FLAG
));
// Send the byte
SPI_I2S_TransmitData
(
spi_instance
->
config
->
spix
,
data
);
//Wait until a data is received
while
(
RESET
==
SPI_I2S_GetStatus
(
spi_instance
->
config
->
spix
,
SPI_I2S_RNE_FLAG
));
// Get the received data
data
=
SPI_I2S_ReceiveData
(
spi_instance
->
config
->
spix
);
if
(
recv_ptr
!=
RT_NULL
)
{
*
recv_ptr
++
=
data
;
}
}
}
}
/* release CS */
if
(
message
->
cs_release
)
{
GPIO_SetBits
(
at32_spi_cs
->
GPIOx
,
at32_spi_cs
->
GPIO_Pin
);
DEBUG_PRINTF
(
"spi release cs
\n
"
);
}
return
message
->
length
;
};
static
struct
n32_spi_config
configs
[]
=
{
#ifdef BSP_USING_SPI1
{
SPI1
,
"spi1"
},
#endif
#ifdef BSP_USING_SPI2
{
SPI2
,
"spi2"
},
#endif
#ifdef BSP_USING_SPI3
{
SPI3
,
"spi3"
},
#endif
#ifdef BSP_USING_SPI4
{
SPI4
,
"spi4"
},
#endif
};
static
struct
n32_spi
spis
[
sizeof
(
configs
)
/
sizeof
(
configs
[
0
])]
=
{
0
};
/** \brief init and register at32 spi bus.
*
* \param SPI: at32 SPI, e.g: SPI1,SPI2,SPI3.
* \param spi_bus_name: spi bus name, e.g: "spi1"
* \return
*
*/
int
rt_hw_spi_init
(
void
)
{
int
i
;
rt_err_t
result
;
rt_size_t
obj_num
=
sizeof
(
spis
)
/
sizeof
(
struct
n32_spi
);
for
(
i
=
0
;
i
<
obj_num
;
i
++
)
{
spis
[
i
].
config
=
&
configs
[
i
];
spis
[
i
].
spi_bus
.
parent
.
user_data
=
(
void
*
)
&
spis
[
i
];
result
=
rt_spi_bus_register
(
&
(
spis
[
i
].
spi_bus
),
spis
[
i
].
config
->
spi_name
,
&
n32_spi_ops
);
}
return
result
;
}
INIT_BOARD_EXPORT
(
rt_hw_spi_init
);
#endif
bsp/n32g452xx/Libraries/rt_drivers/drv_spi.h
已删除
100644 → 0
浏览文件 @
776398d4
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-01-09 shelton first version
*/
#ifndef __DRV_SPI__
#define __DRV_SPI__
#include <rtthread.h>
#include <drivers/spi.h>
#include "n32g45x.h"
struct
n32_spi_config
{
SPI_Module
*
spix
;
const
char
*
spi_name
;
};
struct
n32_spi
{
struct
n32_spi_config
*
config
;
struct
rt_spi_bus
spi_bus
;
};
struct
n32_spi_cs
{
GPIO_Module
*
GPIOx
;
uint32_t
GPIO_Pin
;
};
/* public function */
int
rt_hw_spi_init
(
void
);
rt_err_t
rt_hw_spi_device_attach
(
const
char
*
bus_name
,
const
char
*
device_name
,
GPIO_Module
*
cs_gpiox
,
uint16_t
cs_gpio_pin
);
#endif // __DRV_SPI__
bsp/n32g452xx/Libraries/rt_drivers/drv_usart.c
浏览文件 @
b15e88ee
...
...
@@ -49,7 +49,7 @@ struct n32_uart
static
void
DMA_Configuration
(
struct
rt_serial_device
*
serial
);
static
rt_err_t
n32_configure
(
struct
rt_serial_device
*
serial
,
struct
serial_configure
*
cfg
)
static
rt_err_t
n32_
uart_
configure
(
struct
rt_serial_device
*
serial
,
struct
serial_configure
*
cfg
)
{
struct
n32_uart
*
uart
;
USART_InitType
USART_InitStructure
;
...
...
@@ -107,7 +107,7 @@ static rt_err_t n32_configure(struct rt_serial_device *serial, struct serial_con
return
RT_EOK
;
}
static
rt_err_t
n32_control
(
struct
rt_serial_device
*
serial
,
int
cmd
,
void
*
arg
)
static
rt_err_t
n32_
uart_
control
(
struct
rt_serial_device
*
serial
,
int
cmd
,
void
*
arg
)
{
struct
n32_uart
*
uart
;
rt_uint32_t
ctrl_arg
=
(
rt_uint32_t
)(
arg
);
...
...
@@ -142,7 +142,7 @@ static rt_err_t n32_control(struct rt_serial_device *serial, int cmd, void *arg)
return
RT_EOK
;
}
static
int
n32_putc
(
struct
rt_serial_device
*
serial
,
char
c
)
static
int
n32_
uart_
putc
(
struct
rt_serial_device
*
serial
,
char
c
)
{
struct
n32_uart
*
uart
;
...
...
@@ -168,7 +168,7 @@ static int n32_putc(struct rt_serial_device *serial, char c)
return
1
;
}
static
int
n32_getc
(
struct
rt_serial_device
*
serial
)
static
int
n32_
uart_
getc
(
struct
rt_serial_device
*
serial
)
{
int
ch
;
struct
n32_uart
*
uart
;
...
...
@@ -275,16 +275,16 @@ static void uart_isr(struct rt_serial_device *serial)
}
if
(
USART_GetFlagStatus
(
uart
->
uart_device
,
USART_FLAG_OREF
)
==
SET
)
{
n32_getc
(
serial
);
n32_
uart_
getc
(
serial
);
}
}
static
const
struct
rt_uart_ops
n32_uart_ops
=
{
n32_configure
,
n32_control
,
n32_putc
,
n32_getc
,
n32_
uart_
configure
,
n32_
uart_
control
,
n32_
uart_
putc
,
n32_
uart_
getc
,
};
#if defined(BSP_USING_UART1)
...
...
@@ -552,23 +552,6 @@ int rt_hw_usart_init(void)
uart
);
#endif
/* BSP_USING_UART3 */
#if defined(BSP_USING_UART4)
uart
=
&
uart4
;
config
.
baud_rate
=
BAUD_RATE_115200
;
serial4
.
ops
=
&
n32_uart_ops
;
serial4
.
config
=
config
;
NVIC_Configuration
(
uart
);
/* register UART4 device */
rt_hw_serial_register
(
&
serial4
,
"uart4"
,
RT_DEVICE_FLAG_RDWR
|
RT_DEVICE_FLAG_INT_RX
|
RT_DEVICE_FLAG_INT_TX
|
RT_DEVICE_FLAG_DMA_RX
,
uart
);
#endif
/* BSP_USING_UART4 */
return
RT_EOK
;
}
INIT_BOARD_EXPORT
(
rt_hw_usart_init
);
...
...
bsp/n32g452xx/Libraries/rt_drivers/drv_wdt.c
已删除
100644 → 0
浏览文件 @
776398d4
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-01-22 shelton first version
*/
#include <board.h>
#include <drivers/watchdog.h>
#ifdef RT_USING_WDT
#define LSI_VALUE 40000
//#define DRV_DEBUG
#define LOG_TAG "drv.wdt"
#include <drv_log.h>
struct
at32_wdt_obj
{
IWDG_Type
*
instance
;
rt_uint32_t
Prescaler
;
rt_uint32_t
Reload
;
rt_uint16_t
is_start
;
};
static
struct
at32_wdt_obj
at32_wdt
;
static
struct
rt_watchdog_ops
ops
;
static
rt_watchdog_t
watchdog
;
static
rt_err_t
wdt_init
(
rt_watchdog_t
*
wdt
)
{
return
RT_EOK
;
}
static
rt_err_t
wdt_control
(
rt_watchdog_t
*
wdt
,
int
cmd
,
void
*
arg
)
{
switch
(
cmd
)
{
/* feed the watchdog */
case
RT_DEVICE_CTRL_WDT_KEEPALIVE
:
IWDG_ReloadCounter
();
break
;
/* set watchdog timeout */
case
RT_DEVICE_CTRL_WDT_SET_TIMEOUT
:
#if defined(LSI_VALUE)
if
(
LSI_VALUE
)
{
at32_wdt
.
Reload
=
(
*
((
rt_uint32_t
*
)
arg
))
*
LSI_VALUE
/
256
;
}
else
{
LOG_E
(
"Please define the value of LSI_VALUE!"
);
}
if
(
at32_wdt
.
Reload
>
0xFFF
)
{
LOG_E
(
"wdg set timeout parameter too large, please less than %ds"
,
0xFFF
*
256
/
LSI_VALUE
);
return
-
RT_EINVAL
;
}
#else
#error "Please define the value of LSI_VALUE!"
#endif
if
(
at32_wdt
.
is_start
)
{
IWDG_KeyRegWrite
(
IWDG_KeyRegWrite_Enable
);
IWDG_SetPrescaler
(
at32_wdt
.
Prescaler
);
IWDG_SetReload
(
at32_wdt
.
Reload
);
IWDG_KeyRegWrite
(
IWDG_KeyRegWrite_Disable
);
IWDG_Enable
();
}
break
;
case
RT_DEVICE_CTRL_WDT_GET_TIMEOUT
:
#if defined(LSI_VALUE)
if
(
LSI_VALUE
)
{
(
*
((
rt_uint32_t
*
)
arg
))
=
at32_wdt
.
Reload
*
256
/
LSI_VALUE
;
}
else
{
LOG_E
(
"Please define the value of LSI_VALUE!"
);
}
#else
#error "Please define the value of LSI_VALUE!"
#endif
break
;
case
RT_DEVICE_CTRL_WDT_START
:
IWDG_KeyRegWrite
(
IWDG_KeyRegWrite_Enable
);
IWDG_SetPrescaler
(
at32_wdt
.
Prescaler
);
IWDG_SetReload
(
at32_wdt
.
Reload
);
IWDG_KeyRegWrite
(
IWDG_KeyRegWrite_Disable
);
IWDG_Enable
();
at32_wdt
.
is_start
=
1
;
break
;
default:
LOG_W
(
"This command is not supported."
);
return
-
RT_ERROR
;
}
return
RT_EOK
;
}
int
rt_hw_wdt_init
(
void
)
{
at32_wdt
.
instance
=
IWDG
;
at32_wdt
.
Prescaler
=
IWDG_Psc_256
;
at32_wdt
.
Reload
=
0x00000FFF
;
at32_wdt
.
is_start
=
0
;
ops
.
init
=
&
wdt_init
;
ops
.
control
=
&
wdt_control
;
watchdog
.
ops
=
&
ops
;
/* register watchdog device */
if
(
rt_hw_watchdog_register
(
&
watchdog
,
"wdt"
,
RT_DEVICE_FLAG_DEACTIVATE
,
RT_NULL
)
!=
RT_EOK
)
{
LOG_E
(
"wdt device register failed."
);
return
-
RT_ERROR
;
}
LOG_D
(
"wdt device register success."
);
return
RT_EOK
;
}
INIT_BOARD_EXPORT
(
rt_hw_wdt_init
);
#endif
/* RT_USING_WDT */
bsp/n32g452xx/README.md
已删除
100755 → 0
浏览文件 @
776398d4
# n32g452xx
:)
\ No newline at end of file
bsp/n32g452xx/n32g452xx-mini-system/board/board.c
浏览文件 @
b15e88ee
...
...
@@ -56,7 +56,7 @@ void SysTick_Handler(void)
}
/**
* This function will initial
AT
32 board.
* This function will initial
N
32 board.
*/
void
rt_hw_board_init
()
{
...
...
bsp/n32g452xx/n32g452xx-mini-system/board/board.h
浏览文件 @
b15e88ee
...
...
@@ -18,7 +18,7 @@
extern
"C"
{
#endif
/* Just only support for
AT32F40xxG
*/
/* Just only support for
N32G452XX
*/
#define N32_FLASH_START_ADRESS ((uint32_t)0x08000000)
#define FLASH_PAGE_SIZE (2 * 1024)
#define N32_FLASH_SIZE (256 * 1024)
...
...
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