未验证 提交 92cf02a3 编写于 作者: G guo 提交者: GitHub

Merge pull request #5262 from ShermanShao/master

[BSP/RA6M4-CPK] 添加 CAN、RW007 的支持
/RTE
/Listings
/Objects
ra_cfg.txt
......@@ -31,7 +31,7 @@
| **片上外设** | **支持情况** | **备注** |
| :----------------- | :----------------- | :------------- |
| UART | 支持 | UART7 |
| UART | 支持 | UART7 为默认日志输出端口 |
| GPIO | 支持 | |
| IIC | 支持 | 软件 |
| WDT | 支持 | |
......@@ -41,7 +41,12 @@
| SPI | 支持 | |
| FLASH | 支持 | |
| PWM | 支持 | |
| CAN | 支持 | |
| 持续更新中... | | |
| **外接外设** | **支持情况** | **备注** |
| WiFi | 支持 | [RW007 WiFi 网络模块](https://github.com/RT-Thread-packages/rw007) |
| 温湿度传感器 | 支持 | [HS300x 温湿度模块](https://github.com/Guozhanxin/hs300x) |
## 使用说明
......@@ -148,10 +153,10 @@ void hal_entry(void)
需要修改瑞萨的 BSP 外设配置或添加新的外设端口,需要用到瑞萨的 [FSP](https://www2.renesas.cn/jp/zh/software-tool/flexible-software-package-fsp#document) 配置工具。请务必按照如下步骤完成配置。配置中有任何问题可到[RT-Thread 社区论坛](https://club.rt-thread.org/)中提问。
1. [下载灵活配置软件包 (FSP) | Renesas](https://www.renesas.com/cn/zh/software-tool/flexible-software-package-fsp)
1. [下载灵活配置软件包 (FSP) | Renesas](https://www.renesas.com/cn/zh/software-tool/flexible-software-package-fsp),建议使用 FSP 3.1.0
2. 下载安装完成后,需要添加 CPK-RA6M4 开发板的[官方板级支持包](https://www2.renesas.cn/document/sws/1527176?language=zh&r=1527191)
3. 如何将 BSP 配置包添加到 FSP 中,请参考文档[如何导入板级支持包](https://www2.renesas.cn/document/ppt/1527171?language=zh&r=1527191)
4. 请查看文档:[使用瑞萨 FSP 配置工具](./docs/使用瑞萨FSP配置工具.md)。在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置
4. 请查看文档:[使用瑞萨 FSP 配置工具](./docs/使用瑞萨FSP配置工具.md)。在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置
**ENV 配置**
......@@ -165,10 +170,19 @@ void hal_entry(void)
3. 输入`pkgs --update`命令更新软件包。
4. 输入`scons --target=mdk5` 命令重新生成工程。
## FAQ
### 使用 MDK 的 DEBUG 时如果遇到提示 “Error: Flash Download failed Cortex-M33” 怎么办?
可按照下图操作,修改 Utilities 中的选项:
![image-20211214102231248](docs/picture/readme_faq1.png)
## 联系人信息
在使用过程中若您有任何的想法和建议,建议您通过以下方式来联系到我们 [RT-Thread 社区论坛](https://club.rt-thread.org/)
## 贡献代码
如果您对 CPK-RA6M4 感兴趣,并且有一些好玩的项目愿意与大家分享的话欢迎给我们贡献代码,您可以参考 [向 RT-Thread 代码贡献](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/development-guide/github/github)
如果您对 CPK-RA6M4 感兴趣,并且有一些好玩的项目愿意与大家分享的话欢迎给我们贡献代码,您可以参考 [如何向 RT-Thread 代码贡献](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/development-guide/github/github)
## 在 MDK 中使用 FSP
- 添加RA Smart Config
### 添加RA Smart Config
1. 打开 MDK,选择 “Tools -> Customize Tools Menu…”
2. 点击 “new” 图标,添加一条自定义命令: RA Smart Configurator
......@@ -15,12 +15,12 @@
![image.png](picture/openrasc.png)
- 添加 Device Partition Manager,添加步骤同上。
### 添加 Device Partition Manager,添加步骤同上。
1. 输入命令名称: `Device Partition Manager`
2. Command: 在安装路径选中 `rasc.exe`
3. Initial Folder : `$P`
4. Arguments: `-application com.renesas.cdt.ddsc.dpm.ui.dpmapplication configuration.xml "SL%L"`
1. 输入命令名称:`Device Partition Manager`
2. Command: 在安装路径选中`rasc.exe`
3. Initial Folder :`$P`
4. Arguments:`-application com.renesas.cdt.ddsc.dpm.ui.dpmapplication configuration.xml "SL%L"`
> PS:以上相关操作也可以在 FSP 的说明文档中找到。
>
......@@ -28,14 +28,25 @@
>
> 文档路径(官网):https://www2.renesas.cn/jp/zh/software-tool/flexible-software-package-fsp#document
### FSP 版本选择
此 BSP 使用 **FSP 3.1.0** 版本为基础制作,优先推荐使用 FSP 3.1.0 版本进行配置修改。
**使用 RASC 前请务必检查 FSP version 、Board、Device 配置项是否正确。**
![fsp_version](picture/fsp_version.png)
## 更新工程配置
使用 FSP 配置完成后如果有新的文件添加进工程中,不会马上添加进去。需要先编译一次,如果弹出如下提醒,选择 “是” 然后再次编译即可。
![img](picture/import_changes.png)
## 如何使用 RASC 添加外设
**注意:文档中的外设添加步骤均为单独配置的说明,排版顺序不代表外设添加顺序,如遇到引脚冲突请查阅开发板及芯片手册的相关章节。**
## UART
### UART
如何添加一个 UART 端口外设配置?
......@@ -45,7 +56,7 @@
2. 配置 UART 参数,因为需要适配 RT-Thread 驱动中使用的命名,所以需要修改命名,设置**name****channel****callback** 是一致的标号。![image.png](picture/rascuart1.png)
## GPIO 中断
### GPIO 中断
如何添加一个 IO 中断?
......@@ -91,7 +102,7 @@
MSH_CMD_EXPORT(icu_sample, icu sample);
```
## WDT
### WDT
1. 创建 WDT
......@@ -105,7 +116,7 @@
![image-20211027183406251](picture/wdt_env.png)
## RTC
### RTC
1. 添加 RTC 设备
......@@ -115,11 +126,11 @@
![image-20211019152627412](picture/rtc_config.png)
3. 如何在 ENV 中打开 RTC 以及[ RTC 接口使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/rtc/rtc)
3. 如何在 ENV 中打开 RTC 以及[ RTC 接口使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/rtc/rtc)
![image-20211027181550233](picture/rtc_env.png)
## Flash
### Flash
1. 创建 Flash
......@@ -133,7 +144,7 @@
![image-20211026123252310](picture/flash_menuconfig.png)
## SPI
### SPI
1. 添加一个 SPI 外设端口
......@@ -143,11 +154,16 @@
![img](picture/spi.png)
3. 如何在 ENV 中打开 SPI 以及 [SPI 接口使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/spi/spi)
3. 在 Pins 中打开 SPI0 ,配置端口引脚。**注意:请勿在此处配置 SSLx 片选引脚,片选引脚的控制在驱动程序中由软件控制。**
![image-20211209162334093](picture/spi_pin.png)
4. 如何在 ENV 中打开 SPI 以及 [SPI 接口使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/spi/spi)
![image-20211027181444023](picture/spi_env.png)
## ADC/DAC
### ADC/DAC
创建 ADC/DAC
......@@ -181,14 +197,13 @@
4. 在 menuconfig 中打开对应的通道
## 通用 PWM 定时器(GPT)
### 通用 PWM 定时器(GPT)
GPT 定时器在该芯片中可作为通用定时器,也可以用于产生 PWM 信号。在将其用于产生 PWM 信号时,GPT 定时器提供了 gpt0 - gpt9 总共 10 个通道,每个通道可以设定两个输出端口。当前版本的 PWM 驱动将每个通道都看做一个单独的 PWM 设备,每个设备都只有一个通道。用户可以选择开启一个通道的任意一个输出端口,或将两个端口均开启,但在同时开启两个端口的情况下,它们输出的波形将完全一致。
1. 添加 GPT 设备
![img](./picture/add_gpt1.png)
2. 配置通道
![img](./picture/add_gpt2.png)
......@@ -200,13 +215,83 @@ GPT 定时器在该芯片中可作为通用定时器,也可以用于产生 PWM
3. 设定 PWM 通道默认输出的占空比,这里为 50% 。
4. 设定 GPT 通道下两个输出端口的使能状态。
5. 此处设置 GPT 通道下两个输出端口各自对应的引脚。
3. 配置输出引脚
![img](./picture/add_gpt3.png)
在完成上一步对 GPT 定时器的设置后,根据图示找到对应 GPT 通道输出引脚设置的界面(这里是 GPT3),将图中标号 **1** 处设置为 ``GTIOCA or GTIOCB`` ,并根据需要在图中标号 **2** 处设置 GPT 通道下两个输出端口各自对应的输出引脚。
4. 在 menuconfig 中打开对应的通道,[RT-Thread 的 pwm 框架介绍](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/pwm/pwm)
4. 在 menuconfig 中打开对应的通道,[RT-Thread 的 pwm 框架介绍](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/pwm/pwm)
![image-20211103202216381](picture/pwm_env.png)
### CAN
1. 添加CAN
![image-20211102145023112](picture/can.png)
2. 配置Callback为 `can0_callback``can1_callback`
![image-20211102145227603](picture/can_callback.png)
3. 配置其他选项,并生成代码。
4. 使用ENV使能CAN。[CAN设备使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/can/can)
![image-20211102145613309](picture/can_menuconfig.png)
### 使用 WiFi 模块 [RW007 ](https://github.com/RT-Thread-packages/rw007)
1. 软件包配置中找到 RW007,并修改为下图配置
![image-20211108142805319](picture/rw007_pkg.png)
2. menuconfig 中打开驱动的 RW007 配置,默认使用了 SPI1 端口。所以需要打开 SPI1 总线。
![image-20211108142453678](picture/rw007_spi.png)
![image-20211213212034701](picture/drv_rw007.png)
3. 在设备驱动框架中打开 [WLAN 框架](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/wlan/wlan)
![image-20211108143027485](picture/rw007_wlan.png)
在网络配置中打开 NETDEV 组件:
![image-20211108143712513](picture/rw007_netdev.png)
在 kernel 中打开 mempool 配置:
![image-20211209161902884](picture/rw007_mempool.png)
4. FSP 中打开添加 SPI 外设端口,[如何添加SPI](#SPI)。下图以 SPI1 端口为例的配置如下:
![image-20211108183631379](picture/rw007_spicfg.png)
5. RW007 有一个从机控制的 INT 引脚,需要占用一个 IRQ 通道,下图以 P506 为例的配置如下:
![image-20211108183724282](picture/rw007_int.png)
6. RW007 的 RESET 控制引脚修改默认配置,这里在 RASC 中 mode 设为关闭,交由 RW007 中进行控制。
![image-20211213144108558](picture/rw007_reset.png)
7. 配置完成,检查 MDK 工程中是否加入了必要的文件
![image-20211109102232233](picture/rw007_mdk.png)
8. 编译下载,验证结果。
系统启动会自动获取 RW007 的信息,输入`wifi scan` 命令扫描环境中的 WiFi 信号。[更多 WiFi 命令](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/wlan/wlan?id=finsh-%e5%91%bd%e4%bb%a4)
![image-20211109103856130](picture/rw007_test.png)
使用 `WiFi join` 命令连接 WiFi 热点 :
![image-20211109104735733](picture/rw007_wifijoin.png)
使用 `ping rt-thread.com` 测试网络连接:
![image-20211109104700939](picture/rw007_ping.png)
\ No newline at end of file
......@@ -72,11 +72,11 @@ menu "Hardware Drivers Config"
default y
if BSP_USING_I2C1
config BSP_I2C1_SCL_PIN
int "i2c1 scl pin number"
hex "i2c1 scl pin number"
range 0x0000 0x0B0F
default 0x0512
config BSP_I2C1_SDA_PIN
int "I2C1 sda pin number"
hex "I2C1 sda pin number"
range 0x0000 0x0B0F
default 0x0511
endif
......@@ -181,9 +181,55 @@ menu "Hardware Drivers Config"
default n
endif
menuconfig BSP_USING_CAN
bool "Enable CAN"
default n
select RT_USING_CAN
if BSP_USING_CAN
config BSP_USING_CAN0
bool "Enable CAN0"
default n
config BSP_USING_CAN1
bool "Enable CAN1"
default n
endif
endmenu
menu "Board extended module Drivers"
menuconfig BSP_USING_RW007
bool "Enable RW007"
default n
select PKG_USING_RW007
select BSP_USING_SPI
if BSP_USING_RW007
config RA_RW007_SPI_BUS_NAME
string "RW007 BUS NAME"
default "spi1"
config RA_RW007_CS_PIN
hex "(HEX)CS pin index"
default 0x040D
config RA_RW007_BOOT0_PIN
hex "(HEX)BOOT0 pin index (same as spi clk pin)"
default 0x040C
config RA_RW007_BOOT1_PIN
hex "(HEX)BOOT1 pin index (same as spi cs pin)"
default 0x040D
config RA_RW007_INT_BUSY_PIN
hex "(HEX)INT/BUSY pin index"
default 0x0506
config RA_RW007_RST_PIN
hex "(HEX)RESET pin index"
default 0x040F
endif
endmenu
endmenu
......@@ -44,6 +44,9 @@ if GetDepend(['BSP_USING_ONCHIP_FLASH']):
if GetDepend(['BSP_USING_PWM']):
src += ['drv_pwm.c']
if GetDepend(['BSP_USING_CAN']):
src += ['drv_can.c']
path = [cwd]
path += [cwd + '/config']
......
......@@ -25,8 +25,8 @@ extern int Image$$RAM_END$$ZI$$Base;
#pragma section="CSTACK"
#define HEAP_BEGIN (__segment_end("CSTACK"))
#else
extern int __bss_end;
#define HEAP_BEGIN (&__bss_end)
extern int __RAM_segment_used_end__;
#define HEAP_BEGIN (&__RAM_segment_used_end__)
#endif
#define HEAP_END RA_SRAM_END
......
......@@ -33,6 +33,10 @@ extern "C" {
#include "ra6m4/pwm_config.h"
#endif
#ifdef BSP_USING_CAN
#include "ra6m4/can_config.h"
#endif
#endif/* SOC_SERIES_R7FA6M4AF */
#ifdef __cplusplus
......
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-29 mazhiyuan first version
*/
#ifndef __CAN_CONFIG_H__
#define __CAN_CONFIG_H__
#include <rtthread.h>
#include "hal_data.h"
#ifdef __cplusplus
extern "C" {
#endif
#if defined(BSP_USING_CAN0)
#ifndef CAN0_CONFIG
#define CAN0_CONFIG \
{ \
.name = "can0", \
.num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can0, \
.p_api_ctrl = &g_can0_ctrl, \
.p_cfg = &g_can0_cfg, \
}
#endif /* CAN0_CONFIG */
#endif /* BSP_USING_CAN0 */
#if defined(BSP_USING_CAN1)
#ifndef CAN1_CONFIG
#define CAN1_CONFIG \
{ \
.name = "can1", \
.num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can1, \
.p_api_ctrl = &g_can1_ctrl, \
.p_cfg = &g_can1_cfg, \
}
#endif /* CAN1_CONFIG */
#endif /* BSP_USING_CAN1 */
#ifdef __cplusplus
}
#endif
#endif
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-29 mazhiyuan first version
*/
#include "drv_can.h"
static struct ra_can_config can_config[] =
{
#ifdef BSP_USING_CAN0
CAN0_CONFIG,
#endif
#ifdef BSP_USING_CAN1
CAN1_CONFIG
#endif
};
enum
{
#ifdef BSP_USING_CAN0
CAN0_INDEX,
#endif
#ifdef BSP_USING_CAN1
CAN1_INDEX,
#endif
};
static struct ra_can can_obj[sizeof(can_config) / sizeof(can_config[0])] = {0};
static const struct ra_baud_rate_tab can_baud_rate_tab[] =
{
{CAN1MBaud, 3, 6, 3, 1 + 4},
{CAN800kBaud, 4, 15, 5, 1 + 2},
{CAN500kBaud, 4, 14, 5, 1 + 4},
{CAN250kBaud, 4, 14, 5, 1 + 9},
{CAN125kBaud, 4, 14, 5, 1 + 19},
{CAN100kBaud, 4, 14, 5, 1 + 24},
{CAN50kBaud, 4, 14, 5, 1 + 49},
{CAN20kBaud, 4, 14, 5, 1 + 124},
{CAN10kBaud, 4, 14, 5, 1 + 249}
};
static rt_uint32_t get_can_baud_index(rt_uint32_t baud)
{
rt_uint32_t len, index;
len = sizeof(can_baud_rate_tab) / sizeof(can_baud_rate_tab[0]);
for (index = 0; index < len; index++)
{
if (can_baud_rate_tab[index].baud_rate == baud)
return index;
}
return 0; /* default baud is CAN1MBaud */
}
static void ra_can_get_config(void)
{
struct can_configure config = CANDEFAULTCONFIG;
#ifdef BSP_USING_CAN0
can_obj[CAN0_INDEX].can_dev.config = config;
can_obj[CAN0_INDEX].can_dev.config.msgboxsz = CAN_NO_OF_MAILBOXES_g_can0;
can_obj[CAN0_INDEX].can_dev.config.sndboxnumber = 1;
can_obj[CAN0_INDEX].can_dev.config.ticks = 50;
#endif
#ifdef BSP_USING_CAN1
can_obj[CAN1_INDEX].can_dev.config = config;
can_obj[CAN1_INDEX].can_dev.config.msgboxsz = CAN_NO_OF_MAILBOXES_g_can1;
can_obj[CAN1_INDEX].can_dev.config.sndboxnumber = 1;
can_obj[CAN1_INDEX].can_dev.config.ticks = 50;
#endif
}
rt_err_t ra_can_configure(struct rt_can_device *can_dev, struct can_configure *cfg)
{
struct ra_can *can;
RT_ASSERT(can_dev != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
fsp_err_t err = FSP_SUCCESS;
can = rt_container_of(can_dev, struct ra_can, can_dev);
RT_ASSERT(can != RT_NULL);
err = R_CAN_Open(can->config->p_api_ctrl, can->config->p_cfg);
if (FSP_SUCCESS != err)
{
return RT_ERROR;
}
return RT_EOK;
}
rt_err_t ra_can_control(struct rt_can_device *can_dev, int cmd, void *arg)
{
struct ra_can *can;
can_info_t can_info;
rt_uint32_t argval;
RT_ASSERT(can_dev != RT_NULL);
can = rt_container_of(can_dev, struct ra_can, can_dev);
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
R_BSP_IrqStatusClear((IRQn_Type)arg);
break;
case RT_CAN_CMD_SET_BAUD:
argval = (rt_uint32_t) arg;
if (argval != CAN1MBaud &&
argval != CAN800kBaud &&
argval != CAN500kBaud &&
argval != CAN250kBaud &&
argval != CAN125kBaud &&
argval != CAN100kBaud &&
argval != CAN50kBaud &&
argval != CAN20kBaud &&
argval != CAN10kBaud)
{
return -RT_ERROR;
}
if (argval != can->can_dev.config.baud_rate)
{
can->can_dev.config.baud_rate = argval;
uint32_t index = get_can_baud_index(argval);
can->config->p_cfg->p_bit_timing->baud_rate_prescaler = can_baud_rate_tab[index].prescaler;
can->config->p_cfg->p_bit_timing->synchronization_jump_width = can_baud_rate_tab[index].sjw;
can->config->p_cfg->p_bit_timing->time_segment_1 = can_baud_rate_tab[index].ts1;
can->config->p_cfg->p_bit_timing->time_segment_2 = can_baud_rate_tab[index].ts2;
return ra_can_configure(&can->can_dev, &can->can_dev.config);
}
break;
case RT_CAN_CMD_SET_MODE:
argval = (rt_uint32_t) arg;
if (argval != RT_CAN_MODE_NORMAL &&
argval != RT_CAN_MODE_LISEN &&
argval != RT_CAN_MODE_LOOPBACK)
{
return -RT_ERROR;
}
if (argval != can->can_dev.config.mode)
{
can_test_mode_t mode_to_set;
can->can_dev.config.mode = argval;
switch (argval)
{
case RT_CAN_MODE_NORMAL:
mode_to_set = CAN_TEST_MODE_DISABLED;
case RT_CAN_MODE_LISEN:
mode_to_set = CAN_TEST_MODE_LISTEN;
case RT_CAN_MODE_LOOPBACK:
mode_to_set = CAN_TEST_MODE_LOOPBACK_INTERNAL;
}
R_CAN_ModeTransition(can->config->p_api_ctrl, ((can_instance_ctrl_t *)(can->config->p_api_ctrl))->operation_mode, mode_to_set);
}
break;
case RT_CAN_CMD_GET_STATUS:
R_CAN_InfoGet(can->config->p_api_ctrl, &can_info);
can->can_dev.status.rcverrcnt = can_info.error_count_receive;
can->can_dev.status.snderrcnt = can_info.error_count_transmit;
can->can_dev.status.errcode = can_info.error_code;
rt_memcpy(arg, &can->can_dev.status, sizeof(can->can_dev.status));
break;
default:
return -RT_ERROR;
}
return RT_EOK;
}
int ra_can_sendmsg(struct rt_can_device *can_dev, const void *buf, rt_uint32_t boxno)
{
struct ra_can *can;
can_frame_t g_can_tx_frame;
struct rt_can_msg *msg_rt = (struct rt_can_msg *)buf;
RT_ASSERT(can_dev != RT_NULL);
RT_ASSERT(buf != RT_NULL);
g_can_tx_frame.id = msg_rt->id;
g_can_tx_frame.id_mode = msg_rt->ide;
g_can_tx_frame.type = msg_rt->rtr;
g_can_tx_frame.data_length_code = msg_rt->len;
g_can_tx_frame.options = 0;
memcpy(g_can_tx_frame.data, msg_rt->data, 8);
can = rt_container_of(can_dev, struct ra_can, can_dev);
RT_ASSERT(boxno < can->config->num_of_mailboxs);
if (R_CAN_Write(can->config->p_api_ctrl, boxno, &g_can_tx_frame) != FSP_SUCCESS)
{
rt_exit_critical();
return RT_ERROR;
}
return RT_EOK;
}
int ra_can_recvmsg(struct rt_can_device *can_dev, void *buf, rt_uint32_t boxno)
{
struct rt_can_msg *msg_rt = (struct rt_can_msg *)buf;
can_frame_t *msg_ra;
struct ra_can *can;
RT_ASSERT(can_dev != RT_NULL);
RT_ASSERT(buf != RT_NULL);
can = rt_container_of(can_dev, struct ra_can, can_dev);
RT_ASSERT(boxno < can->config->num_of_mailboxs);
if (can->callback_args->mailbox != boxno)
return 0;
msg_ra = can->callback_args->p_frame;
msg_rt->id = msg_ra->id;
msg_rt->ide = msg_ra->id_mode;
msg_rt->rtr = msg_ra->type;
msg_rt->rsv = RT_NULL;
msg_rt->len = msg_ra->data_length_code;
msg_rt->priv = boxno;
msg_rt->hdr = RT_NULL;
memcpy(msg_rt->data, msg_ra->data, msg_ra->data_length_code);
return sizeof(struct rt_can_msg);
}
const struct rt_can_ops ra_can_ops =
{
.configure = ra_can_configure,
.control = ra_can_control,
.sendmsg = ra_can_sendmsg,
.recvmsg = ra_can_recvmsg
};
#ifdef BSP_USING_CAN0
void can0_callback(can_callback_args_t *p_args)
{
rt_interrupt_enter();
switch (p_args->event)
{
case CAN_EVENT_TX_COMPLETE:
rt_hw_can_isr(&can_obj[CAN0_INDEX].can_dev, RT_CAN_EVENT_TX_DONE | p_args->mailbox << 8);
break;
case CAN_EVENT_RX_COMPLETE:
can_obj[CAN0_INDEX].callback_args = p_args;
if (p_args->event == CAN_EVENT_RX_COMPLETE)
rt_hw_can_isr(&can_obj[CAN0_INDEX].can_dev, RT_CAN_EVENT_RX_IND | p_args->mailbox << 8);
break;
case CAN_EVENT_TX_ABORTED:
rt_hw_can_isr(&can_obj[CAN0_INDEX].can_dev, RT_CAN_EVENT_TX_FAIL | p_args->mailbox << 8);
break;
case CAN_EVENT_MAILBOX_MESSAGE_LOST: //overwrite/overrun error event
case CAN_EVENT_BUS_RECOVERY: //Bus recovery error event
case CAN_EVENT_ERR_BUS_OFF: //error Bus Off event
case CAN_EVENT_ERR_PASSIVE: //error passive event
case CAN_EVENT_ERR_WARNING: //error warning event
case CAN_EVENT_ERR_BUS_LOCK: //error bus lock
case CAN_EVENT_ERR_CHANNEL: //error channel
case CAN_EVENT_ERR_GLOBAL: //error global
{
break;
}
}
rt_interrupt_leave();
}
#endif
#ifdef BSP_USING_CAN1
void can1_callback(can_callback_args_t *p_args)
{
rt_interrupt_enter();
switch (p_args->event)
{
case CAN_EVENT_TX_COMPLETE:
rt_hw_can_isr(&can_obj[CAN1_INDEX].can_dev, RT_CAN_EVENT_TX_DONE | p_args->mailbox << 8);
break;
case CAN_EVENT_RX_COMPLETE:
can_obj[CAN1_INDEX].callback_args = p_args;
if (p_args->event == CAN_EVENT_RX_COMPLETE)
rt_hw_can_isr(&can_obj[CAN1_INDEX].can_dev, RT_CAN_EVENT_RX_IND | p_args->mailbox << 8);
break;
case CAN_EVENT_TX_ABORTED:
rt_hw_can_isr(&can_obj[CAN1_INDEX].can_dev, RT_CAN_EVENT_TX_FAIL | p_args->mailbox << 8);
break;
case CAN_EVENT_MAILBOX_MESSAGE_LOST: //overwrite/overrun error event
case CAN_EVENT_BUS_RECOVERY: //Bus recovery error event
case CAN_EVENT_ERR_BUS_OFF: //error Bus Off event
case CAN_EVENT_ERR_PASSIVE: //error passive event
case CAN_EVENT_ERR_WARNING: //error warning event
case CAN_EVENT_ERR_BUS_LOCK: //error bus lock
case CAN_EVENT_ERR_CHANNEL: //error channel
case CAN_EVENT_ERR_GLOBAL: //error global
{
break;
}
}
rt_interrupt_leave();
}
#endif
int rt_hw_can_init(void)
{
rt_err_t result = 0;
rt_size_t obj_num = sizeof(can_obj) / sizeof(struct ra_can);
ra_can_get_config();
for (int i = 0; i < obj_num; i++)
{
/* init CAN object */
can_obj[i].config = &can_config[i];
can_obj[i].can_dev.ops = &ra_can_ops;
/* register CAN device */
result = rt_hw_can_register(&can_obj[i].can_dev, can_obj[i].config->name, can_obj[i].can_dev.ops, RT_NULL);
RT_ASSERT(result == RT_EOK);
}
return result;
}
INIT_BOARD_EXPORT(rt_hw_can_init);
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-29 mazhiyuan first version
*/
#ifndef __DRV_CAN_H__
#define __DRV_CAN_H__
#include <rtthread.h>
#include <rtdevice.h>
#include <rthw.h>
#include <drv_common.h>
#include <drv_config.h>
#include <hal_data.h>
/* renesas config class */
struct ra_can_config
{
const char *name;
int num_of_mailboxs;
can_ctrl_t *const p_api_ctrl;
can_cfg_t const *const p_cfg;
};
struct ra_can
{
struct rt_can_device can_dev;
struct ra_can_config *config;
can_callback_args_t *callback_args;
};
struct ra_baud_rate_tab
{
rt_uint32_t baud_rate;
rt_uint32_t sjw;
rt_uint32_t ts1;
rt_uint32_t ts2;
rt_uint32_t prescaler;
};
int rt_hw_can_init(void);
#endif
......@@ -5,7 +5,7 @@
*
* Change Logs:
* Date Author Notes
* 2018-12-5 SummerGift first version
* 2021-11-30 flybreak first version
*/
#include <stdio.h>
......@@ -64,12 +64,6 @@ int _flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size)
{
size_t i;
if ((addr + size) > FLASH_HP_CF_BLCOK_10 + BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE)
{
LOG_E("read outrange flash size! addr is (0x%p)", (void *)(addr + size));
return -1;
}
for (i = 0; i < size; i++, buf++, addr++)
{
*buf = *(rt_uint8_t *) addr;
......@@ -96,12 +90,6 @@ int _flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
fsp_err_t err = FSP_SUCCESS;
size_t written_size = 0;
if ((addr + size) > FLASH_HP_CF_BLCOK_10 + BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE)
{
LOG_E("write outrange flash size! addr is (0x%p)", (void *)(addr + size));
return -RT_EINVAL;
}
if (size % BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE)
{
LOG_E("Flash Write size must be an integer multiple of %d", BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE);
......@@ -111,6 +99,7 @@ int _flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
while (written_size < size)
{
level = rt_hw_interrupt_disable();
R_FLASH_HP_Reset(&g_flash_ctrl);
/* Write code flash data*/
err = R_FLASH_HP_Write(&g_flash_ctrl, (uint32_t)(buf + written_size), addr + written_size, BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE);
rt_hw_interrupt_enable(level);
......@@ -160,6 +149,7 @@ int _flash_erase_8k(rt_uint32_t addr, size_t size)
}
level = rt_hw_interrupt_disable();
R_FLASH_HP_Reset(&g_flash_ctrl);
/* Erase Block */
err = R_FLASH_HP_Erase(&g_flash_ctrl, RT_ALIGN_DOWN(addr, FLASH_HP_CF_BLOCK_SIZE_8KB), (size - 1) / BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE + 1);
rt_hw_interrupt_enable(level);
......@@ -174,23 +164,18 @@ int _flash_erase_8k(rt_uint32_t addr, size_t size)
return size;
}
int _flash_erase_128k(rt_uint32_t addr, size_t size)
int _flash_erase_32k(rt_uint32_t addr, size_t size)
{
fsp_err_t err = FSP_SUCCESS;
rt_base_t level;
if ((addr + size) > FLASH_HP_CF_BLCOK_10 + BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE)
{
LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
return -RT_EINVAL;
}
if (size < 1)
{
return -RT_EINVAL;
}
level = rt_hw_interrupt_disable();
R_FLASH_HP_Reset(&g_flash_ctrl);
/* Erase Block */
err = R_FLASH_HP_Erase(&g_flash_ctrl, RT_ALIGN_DOWN(addr, FLASH_HP_CF_BLOCK_SIZE_32KB), (size - 1) / BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE + 1);
rt_hw_interrupt_enable(level);
......@@ -208,25 +193,25 @@ int _flash_erase_128k(rt_uint32_t addr, size_t size)
#if defined(PKG_USING_FAL)
static int fal_flash_read_8k(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_read_128k(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_read_32k(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_write_8k(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_write_128k(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_write_32k(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_erase_8k(long offset, size_t size);
static int fal_flash_erase_128k(long offset, size_t size);
static int fal_flash_erase_32k(long offset, size_t size);
const struct fal_flash_dev _onchip_flash_8k = { "onchip_flash_8k", FLASH_HP_CF_BLCOK_0, FLASH_HP_CF_BLOCK_8, (8 * 1024), {_flash_init, fal_flash_read_8k, fal_flash_write_8k, fal_flash_erase_8k} };
const struct fal_flash_dev _onchip_flash_128k = { "onchip_flash_128k", FLASH_HP_CF_BLOCK_8, 32 * 3 * 1024, (128 * 1024), {_flash_init, fal_flash_read_128k, fal_flash_write_128k, fal_flash_erase_128k} };
const struct fal_flash_dev _onchip_flash_32k = { "onchip_flash_32k", FLASH_HP_CF_BLOCK_8, 32 * 30 * 1024, (32 * 1024), {_flash_init, fal_flash_read_32k, fal_flash_write_32k, fal_flash_erase_32k} };
static int fal_flash_read_8k(long offset, rt_uint8_t *buf, size_t size)
{
return _flash_read(_onchip_flash_8k.addr + offset, buf, size);
}
static int fal_flash_read_128k(long offset, rt_uint8_t *buf, size_t size)
static int fal_flash_read_32k(long offset, rt_uint8_t *buf, size_t size)
{
return _flash_read(_onchip_flash_128k.addr + offset, buf, size);
return _flash_read(_onchip_flash_32k.addr + offset, buf, size);
}
static int fal_flash_write_8k(long offset, const rt_uint8_t *buf, size_t size)
......@@ -234,9 +219,9 @@ static int fal_flash_write_8k(long offset, const rt_uint8_t *buf, size_t size)
return _flash_write(_onchip_flash_8k.addr + offset, buf, size);
}
static int fal_flash_write_128k(long offset, const rt_uint8_t *buf, size_t size)
static int fal_flash_write_32k(long offset, const rt_uint8_t *buf, size_t size)
{
return _flash_write(_onchip_flash_128k.addr + offset, buf, size);
return _flash_write(_onchip_flash_32k.addr + offset, buf, size);
}
static int fal_flash_erase_8k(long offset, size_t size)
......@@ -244,14 +229,14 @@ static int fal_flash_erase_8k(long offset, size_t size)
return _flash_erase_8k(_onchip_flash_8k.addr + offset, size);
}
static int fal_flash_erase_128k(long offset, size_t size)
static int fal_flash_erase_32k(long offset, size_t size)
{
return _flash_erase_128k(_onchip_flash_128k.addr + offset, size);
return _flash_erase_32k(_onchip_flash_32k.addr + offset, size);
}
int flash_test(void)
{
#define TEST_OFF 0x10000
#define TEST_OFF (_onchip_flash_32k.len - BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE)
const struct fal_partition *param;
uint8_t write_buffer[BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE] = {0};
uint8_t read_buffer[BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE] = {0};
......
......@@ -5,7 +5,7 @@
*
* Change Logs:
* Date Author Notes
* 2018-12-5 SummerGift first version
* 2021-11-30 flybreak first version
*/
#ifndef __DRV_FLASH_H__
......
......@@ -6,6 +6,7 @@
* Change Logs:
* Date Author Notes
* 2021-08-23 Mr.Tiger first version
* 2021-11-04 Sherman ADD complete_event
*/
/**< Note : Turn on any DMA mode and all SPIs will turn on DMA */
......@@ -22,6 +23,10 @@
#endif /* DRV_DEBUG */
#include <rtdbg.h>
#define RA_SPI0_EVENT 0x00
#define RA_SPI1_EVENT 0x01
static struct rt_event complete_event = {0};
static struct ra_spi_handle spi_handle[] =
{
#ifdef BSP_USING_SPI0
......@@ -40,7 +45,7 @@ void g_spi0_callback(spi_callback_args_t *p_args)
rt_interrupt_enter();
if (SPI_EVENT_TRANSFER_COMPLETE == p_args->event)
{
LOG_D("SPI0 cb");
rt_event_send(&complete_event, RA_SPI0_EVENT);
}
rt_interrupt_leave();
}
......@@ -50,11 +55,34 @@ void g_spi1_callback(spi_callback_args_t *p_args)
rt_interrupt_enter();
if (SPI_EVENT_TRANSFER_COMPLETE == p_args->event)
{
LOG_D("SPI1 cb");
rt_event_send(&complete_event, RA_SPI1_EVENT);
}
rt_interrupt_leave();
}
static rt_err_t ra_wait_complete(rt_event_t event, const char bus_name[RT_NAME_MAX])
{
rt_uint32_t recved = 0x00;
if (bus_name[3] == '0')
{
return rt_event_recv(event,
RA_SPI0_EVENT,
RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
RT_WAITING_FOREVER,
&recved);
}
else if (bus_name[3] == '1')
{
return rt_event_recv(event,
RA_SPI1_EVENT,
RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
RT_WAITING_FOREVER,
&recved);
}
return -RT_EINVAL;
}
static rt_err_t ra_write_message(struct rt_spi_device *device, const void *send_buf, const rt_size_t len)
{
RT_ASSERT(device != NULL);
......@@ -63,13 +91,6 @@ static rt_err_t ra_write_message(struct rt_spi_device *device, const void *send_
RT_ASSERT(len > 0);
rt_err_t err = RT_EOK;
struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus);
spi_dev->cs_pin = *(rt_uint32_t *)device->parent.user_data;
/**< Configure Select Line */
R_BSP_PinWrite(spi_dev->cs_pin, BSP_IO_LEVEL_HIGH);
/* Start a write transfer */
R_BSP_PinWrite(spi_dev->cs_pin, BSP_IO_LEVEL_LOW);
/**< send msessage */
err = R_SPI_Write((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, send_buf, len, spi_dev->rt_spi_cfg_t->data_width);
......@@ -78,7 +99,8 @@ static rt_err_t ra_write_message(struct rt_spi_device *device, const void *send_
LOG_E("%s write failed.", spi_dev->ra_spi_handle_t->bus_name);
return -RT_ERROR;
}
/* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name);
return len;
}
......@@ -90,13 +112,6 @@ static rt_err_t ra_read_message(struct rt_spi_device *device, void *recv_buf, co
RT_ASSERT(len > 0);
rt_err_t err = RT_EOK;
struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus);
spi_dev->cs_pin = *(rt_uint32_t *)device->parent.user_data;
/**< Configure Select Line */
R_BSP_PinWrite(spi_dev->cs_pin, BSP_IO_LEVEL_HIGH);
/* Start read transfer */
R_BSP_PinWrite(spi_dev->cs_pin, BSP_IO_LEVEL_LOW);
/**< receive message */
err = R_SPI_Read((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, recv_buf, len, spi_dev->rt_spi_cfg_t->data_width);
......@@ -105,7 +120,8 @@ static rt_err_t ra_read_message(struct rt_spi_device *device, void *recv_buf, co
LOG_E("\n%s write failed.\n", spi_dev->ra_spi_handle_t->bus_name);
return -RT_ERROR;
}
/* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name);
return len;
}
......@@ -124,7 +140,8 @@ static rt_err_t ra_write_read_message(struct rt_spi_device *device, struct rt_sp
LOG_E("%s write and read failed.", spi_dev->ra_spi_handle_t->bus_name);
return -RT_ERROR;
}
/* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name);
return message->length;
}
......@@ -148,7 +165,7 @@ static rt_err_t ra_hw_spi_configure(struct rt_spi_device *device,
spi_extended_cfg_t *spi_cfg = (spi_extended_cfg_t *)spi_dev->ra_spi_handle_t->spi_cfg_t->p_extend;
/**< Configure Select Line */
R_BSP_PinWrite(spi_dev->cs_pin, BSP_IO_LEVEL_HIGH);
rt_pin_write(spi_dev->cs_pin, PIN_HIGH);
/**< config bitrate */
R_SPI_CalculateBitrate(spi_dev->rt_spi_cfg_t->max_hz, &spi_cfg->spck_div);
......@@ -166,15 +183,23 @@ static rt_err_t ra_hw_spi_configure(struct rt_spi_device *device,
static rt_uint32_t ra_spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
{
RT_ASSERT(device != NULL);
RT_ASSERT(message != NULL);
RT_ASSERT(device != RT_NULL);
RT_ASSERT(device->bus != RT_NULL);
RT_ASSERT(message != RT_NULL);
rt_err_t err = RT_EOK;
struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus);
spi_dev->cs_pin = (rt_uint32_t)device->parent.user_data;
if (message->length <= 0)
if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS))
{
LOG_E("buf length err.");
if (device->config.mode & RT_SPI_CS_HIGH)
rt_pin_write(spi_dev->cs_pin, PIN_HIGH);
else
rt_pin_write(spi_dev->cs_pin, PIN_LOW);
}
else
if (message->length > 0)
{
if (message->send_buf == RT_NULL && message->recv_buf != RT_NULL)
{
......@@ -192,6 +217,14 @@ static rt_uint32_t ra_spixfer(struct rt_spi_device *device, struct rt_spi_messag
err = ra_write_read_message(device, message);
}
}
if (message->cs_release && !(device->config.mode & RT_SPI_NO_CS))
{
if (device->config.mode & RT_SPI_CS_HIGH)
rt_pin_write(spi_dev->cs_pin, PIN_LOW);
else
rt_pin_write(spi_dev->cs_pin, PIN_HIGH);
}
return err;
}
......@@ -226,9 +259,15 @@ int ra_hw_spi_init(void)
if (RT_EOK != err)
{
LOG_E("%s bus register failed.", spi_config[spi_index].ra_spi_handle_t->bus_name);
return -RT_ERROR;
}
}
if (RT_EOK != rt_event_init(&complete_event, "ra_spi", RT_IPC_FLAG_PRIO))
{
LOG_E("SPI transfer event init fail!");
return -RT_ERROR;
}
return RT_EOK;
}
INIT_BOARD_EXPORT(ra_hw_spi_init);
......
......@@ -26,7 +26,7 @@ extern "C" {
#ifdef R_SPI_H
struct ra_spi_handle
{
const char *bus_name;
const char bus_name[RT_NAME_MAX];
const spi_cfg_t *spi_cfg_t;
const spi_instance_ctrl_t *spi_ctrl_t;
};
......
......@@ -10,10 +10,12 @@ src += Glob('*.c')
CPPPATH = [cwd]
LOCAL_CCFLAGS = ''
if rtconfig.CROSS_TOOL == 'gcc':
if rtconfig.PLATFORM == 'gcc':
LOCAL_CCFLAGS += ' -std=c99'
elif rtconfig.CROSS_TOOL == 'keil':
elif rtconfig.PLATFORM == 'armcc':
LOCAL_CCFLAGS += ' --c99'
elif rtconfig.PLATFORM == 'armclang':
LOCAL_CCFLAGS += ' -std=c99'
group = DefineGroup('FAL', src, depend = ['PKG_USING_FAL'], CPPPATH = CPPPATH, LOCAL_CCFLAGS = LOCAL_CCFLAGS)
......
......@@ -19,21 +19,23 @@
#define FAL_FLASH_PORT_DRIVER_SFUD
extern const struct fal_flash_dev _onchip_flash_8k;
extern const struct fal_flash_dev _onchip_flash_128k;
extern const struct fal_flash_dev _onchip_flash_32k;
/* flash device table */
#define FAL_FLASH_DEV_TABLE \
{ \
&_onchip_flash_8k, \
&_onchip_flash_128k, \
&_onchip_flash_32k, \
}
/* ====================== Partition Configuration ========================== */
#ifdef FAL_PART_HAS_TABLE_CFG
/* partition table */
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WROD, "app", "onchip_flash_8k", 0, 64 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "param", "onchip_flash_128k", 0, 3 * 128 * 1024, 0}, \
/** partition table, The chip flash partition is defined in "\ra\fsp\src\bsp\mcu\ra6m4\bsp_feature.h".
* More details can be found in the RA6M4 Group User Manual: Hardware section 47 Flash memory.*/
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WROD, "app", "onchip_flash_8k", 0, 64 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "param", "onchip_flash_32k", 0, 32 * 30 * 1024, 0}, \
}
#endif /* FAL_PART_HAS_TABLE_CFG */
#endif /* _FAL_CFG_H_ */
from building import *
import rtconfig
cwd = GetCurrentDir()
src = []
src += Glob('*.c')
CPPPATH = [cwd]
LOCAL_CCFLAGS = ''
if rtconfig.PLATFORM == 'gcc':
LOCAL_CCFLAGS += ' -std=c99'
elif rtconfig.PLATFORM == 'armcc':
LOCAL_CCFLAGS += ' --c99'
elif rtconfig.PLATFORM == 'armclang':
LOCAL_CCFLAGS += ' -std=c99'
group = DefineGroup('rw007', src, depend = ['BSP_USING_RW007'], CPPPATH = CPPPATH, LOCAL_CCFLAGS = LOCAL_CCFLAGS)
Return('group')
#include <rtthread.h>
#include <rtdbg.h>
#ifdef BSP_USING_RW007
#include <rtdevice.h>
#include <drv_spi.h>
#include <board.h>
#include <spi_wifi_rw007.h>
extern void spi_wifi_isr(int vector);
static void rw007_gpio_init(void)
{
/* Configure IO */
rt_pin_mode(RA_RW007_RST_PIN, PIN_MODE_OUTPUT);
rt_pin_mode(RA_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLDOWN);
/* Reset rw007 and config mode */
rt_pin_write(RA_RW007_RST_PIN, PIN_LOW);
rt_thread_delay(rt_tick_from_millisecond(100));
rt_pin_write(RA_RW007_RST_PIN, PIN_HIGH);
/* Wait rw007 ready(exit busy stat) */
while (!rt_pin_read(RA_RW007_INT_BUSY_PIN))
{
rt_thread_delay(5);
}
rt_thread_delay(rt_tick_from_millisecond(200));
rt_pin_mode(RA_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLUP);
}
static struct rt_spi_device rw007_dev;
int wifi_spi_device_init(void)
{
char sn_version[32];
uint32_t cs_pin = RA_RW007_CS_PIN;
rw007_gpio_init();
rt_hw_spi_device_attach(&rw007_dev, "wspi", RA_RW007_SPI_BUS_NAME, (void *)cs_pin);
rt_hw_wifi_init("wspi");
rt_wlan_set_mode(RT_WLAN_DEVICE_STA_NAME, RT_WLAN_STATION);
rt_wlan_set_mode(RT_WLAN_DEVICE_AP_NAME, RT_WLAN_AP);
rw007_sn_get(sn_version);
rt_kprintf("\nrw007 sn: [%s]\n", sn_version);
rw007_version_get(sn_version);
rt_kprintf("rw007 ver: [%s]\n\n", sn_version);
return 0;
}
INIT_APP_EXPORT(wifi_spi_device_init);
static void int_wifi_irq(void *p)
{
((void)p);
spi_wifi_isr(0);
}
void spi_wifi_hw_init(void)
{
rt_pin_attach_irq(RA_RW007_INT_BUSY_PIN, PIN_IRQ_MODE_FALLING, int_wifi_irq, 0);
rt_pin_irq_enable(RA_RW007_INT_BUSY_PIN, RT_TRUE);
}
#endif /* BSP_USING_RW007 */
......@@ -15,13 +15,7 @@ elif rtconfig.CROSS_TOOL == 'gcc':
src += Glob(cwd + '/fsp/src/bsp/mcu/all/*.c')
src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c']
src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c']
src += [cwd + '/fsp/src/r_ioport/r_ioport.c']
if GetDepend(['RT_USING_SERIAL']):
src += [cwd + '/fsp/src/r_sci_uart/r_sci_uart.c']
if GetDepend(['RT_USING_PIN']):
src += [cwd + '/fsp/src/r_icu/r_icu.c']
src += Glob(cwd + '/fsp/src/r_*/*.c')
CPPPATH = [ cwd + '/arm/CMSIS_5/CMSIS/Core/Include',
cwd + '/fsp/inc',
......@@ -29,4 +23,4 @@ elif rtconfig.CROSS_TOOL == 'gcc':
cwd + '/fsp/inc/instances',]
group = DefineGroup('ra', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES)
Return('group')
\ No newline at end of file
Return('group')
/***********************************************************************************************************************
* Copyright [2020-2021] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved.
*
* This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products
* of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are
* sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use
* of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property
* right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas
* reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION
* IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT
* PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR
* DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION
* (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING,
* WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS,
* OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY
* OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS.
**********************************************************************************************************************/
/*******************************************************************************************************************//**
* @addtogroup ICU
* @{
**********************************************************************************************************************/
#ifndef R_ICU_H
#define R_ICU_H
/***********************************************************************************************************************
* Includes
**********************************************************************************************************************/
#include "bsp_api.h"
#include "r_external_irq_api.h"
/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
FSP_HEADER
/***********************************************************************************************************************
* Macro definitions
**********************************************************************************************************************/
/*********************************************************************************************************************
* Typedef definitions
*********************************************************************************************************************/
/** ICU private control block. DO NOT MODIFY. Initialization occurs when R_ICU_ExternalIrqOpen is called. */
typedef struct st_icu_instance_ctrl
{
uint32_t open; ///< Used to determine if channel control block is in use
IRQn_Type irq; ///< NVIC interrupt number
uint8_t channel; ///< Channel
#if BSP_TZ_SECURE_BUILD
external_irq_callback_args_t * p_callback_memory; // Pointer to non-secure memory that can be used to pass arguments to a callback in non-secure memory.
#endif
void (* p_callback)(external_irq_callback_args_t * p_args); // Pointer to callback that is called when an edge is detected on the external irq pin.
/** Placeholder for user data. Passed to the user callback in ::external_irq_callback_args_t. */
void const * p_context;
} icu_instance_ctrl_t;
/**********************************************************************************************************************
* Exported global variables
**********************************************************************************************************************/
/** @cond INC_HEADER_DEFS_SEC */
/** Filled in Interface API structure for this Instance. */
extern const external_irq_api_t g_external_irq_on_icu;
/** @endcond */
/***********************************************************************************************************************
* Public APIs
**********************************************************************************************************************/
fsp_err_t R_ICU_ExternalIrqOpen(external_irq_ctrl_t * const p_api_ctrl, external_irq_cfg_t const * const p_cfg);
fsp_err_t R_ICU_ExternalIrqEnable(external_irq_ctrl_t * const p_api_ctrl);
fsp_err_t R_ICU_ExternalIrqDisable(external_irq_ctrl_t * const p_api_ctrl);
fsp_err_t R_ICU_ExternalIrqCallbackSet(external_irq_ctrl_t * const p_api_ctrl,
void ( * p_callback)(external_irq_callback_args_t *),
void const * const p_context,
external_irq_callback_args_t * const p_callback_memory);
fsp_err_t R_ICU_ExternalIrqClose(external_irq_ctrl_t * const p_api_ctrl);
/*******************************************************************************************************************//**
* @} (end defgroup ICU)
**********************************************************************************************************************/
/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
FSP_FOOTER
#endif // R_ICU_H
......@@ -63,8 +63,12 @@ void Reset_Handler (void)
/* Initialize system using BSP. */
SystemInit();
/* Call user application. */
#ifdef __ARMCC_VERSION
main();
#elif defined(__GNUC__)
extern int entry(void);
entry();
#endif
while (1)
{
......
/***********************************************************************************************************************
* Copyright [2020-2021] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved.
*
* This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products
* of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are
* sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use
* of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property
* right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas
* reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION
* IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT
* PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR
* DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION
* (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING,
* WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS,
* OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY
* OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS.
**********************************************************************************************************************/
/***********************************************************************************************************************
* Includes
**********************************************************************************************************************/
#include "r_icu.h"
#include "r_icu_cfg.h"
/***********************************************************************************************************************
* Macro definitions
**********************************************************************************************************************/
/** "ICU" in ASCII, used to determine if channel is open. */
#define ICU_OPEN (0x00494355U)
#define ICU_IRQMD_OFFSET (0)
#define ICU_FCLKSEL_OFFSET (4)
#define ICU_FLTEN_OFFSET (7)
/***********************************************************************************************************************
* Typedef definitions
**********************************************************************************************************************/
#if defined(__ARMCC_VERSION) || defined(__ICCARM__)
typedef void (BSP_CMSE_NONSECURE_CALL * icu_prv_ns_callback)(external_irq_callback_args_t * p_args);
#elif defined(__GNUC__)
typedef BSP_CMSE_NONSECURE_CALL void (*volatile icu_prv_ns_callback)(external_irq_callback_args_t * p_args);
#endif
/***********************************************************************************************************************
* Private function prototypes
**********************************************************************************************************************/
void r_icu_isr(void);
/***********************************************************************************************************************
* Private global variables
**********************************************************************************************************************/
/***********************************************************************************************************************
* Global Variables
**********************************************************************************************************************/
/* ICU implementation of External IRQ API. */
const external_irq_api_t g_external_irq_on_icu =
{
.open = R_ICU_ExternalIrqOpen,
.enable = R_ICU_ExternalIrqEnable,
.disable = R_ICU_ExternalIrqDisable,
.callbackSet = R_ICU_ExternalIrqCallbackSet,
.close = R_ICU_ExternalIrqClose,
};
/*******************************************************************************************************************//**
* @addtogroup ICU
* @{
**********************************************************************************************************************/
/***********************************************************************************************************************
* Functions
**********************************************************************************************************************/
/*******************************************************************************************************************//**
* Configure an IRQ input pin for use with the external interrupt interface. Implements @ref external_irq_api_t::open.
*
* The Open function is responsible for preparing an external IRQ pin for operation.
*
* @retval FSP_SUCCESS Open successful.
* @retval FSP_ERR_ASSERTION One of the following is invalid:
* - p_ctrl or p_cfg is NULL
* @retval FSP_ERR_ALREADY_OPEN The channel specified has already been opened. No configurations were changed.
* Call the associated Close function to reconfigure the channel.
* @retval FSP_ERR_IP_CHANNEL_NOT_PRESENT The channel requested in p_cfg is not available on the device selected in
* r_bsp_cfg.h.
* @retval FSP_ERR_INVALID_ARGUMENT p_cfg->p_callback is not NULL, but ISR is not enabled. ISR must be enabled to
* use callback function.
*
* @note This function is reentrant for different channels. It is not reentrant for the same channel.
**********************************************************************************************************************/
fsp_err_t R_ICU_ExternalIrqOpen (external_irq_ctrl_t * const p_api_ctrl, external_irq_cfg_t const * const p_cfg)
{
icu_instance_ctrl_t * p_ctrl = (icu_instance_ctrl_t *) p_api_ctrl;
#if ICU_CFG_PARAM_CHECKING_ENABLE
FSP_ASSERT(NULL != p_ctrl);
FSP_ERROR_RETURN(ICU_OPEN != p_ctrl->open, FSP_ERR_ALREADY_OPEN);
FSP_ASSERT(NULL != p_cfg);
FSP_ERROR_RETURN(0 != ((1U << p_cfg->channel) & BSP_FEATURE_ICU_IRQ_CHANNELS_MASK), FSP_ERR_IP_CHANNEL_NOT_PRESENT);
/* Callback must be used with a valid interrupt priority otherwise it will never be called. */
if (p_cfg->p_callback)
{
FSP_ERROR_RETURN(BSP_IRQ_DISABLED != p_cfg->ipl, FSP_ERR_INVALID_ARGUMENT);
}
#endif
p_ctrl->irq = p_cfg->irq;
/* IELSR Must be zero when modifying the IRQCR bits.
* (See ICU Section 14.2.1 of the RA6M3 manual R01UH0886EJ0100). */
uint32_t ielsr = R_ICU->IELSR[p_ctrl->irq];
R_ICU->IELSR[p_ctrl->irq] = 0;
#if BSP_TZ_SECURE_BUILD
/* If this is a secure build, the callback provided in p_cfg must be secure. */
p_ctrl->p_callback_memory = NULL;
#endif
/* Initialize control block. */
p_ctrl->p_callback = p_cfg->p_callback;
p_ctrl->p_context = p_cfg->p_context;
p_ctrl->channel = p_cfg->channel;
/* Disable digital filter */
R_ICU->IRQCR[p_ctrl->channel] = 0U;
/* Set the digital filter divider. */
uint8_t irqcr = (uint8_t) (p_cfg->pclk_div << ICU_FCLKSEL_OFFSET);
/* Enable/Disable digital filter. */
irqcr |= (uint8_t) (p_cfg->filter_enable << ICU_FLTEN_OFFSET);
/* Set the IRQ trigger. */
irqcr |= (uint8_t) (p_cfg->trigger << ICU_IRQMD_OFFSET);
/* Write IRQCR */
R_ICU->IRQCR[p_ctrl->channel] = irqcr;
/* Restore IELSR. */
R_ICU->IELSR[p_ctrl->irq] = ielsr;
/* NOTE: User can have the driver opened when the IRQ is not in the vector table. This is for use cases
* where the external IRQ driver is used to generate ELC events only (without CPU interrupts).
* In such cases we will not set the IRQ priority but will continue with the processing.
*/
if (p_ctrl->irq >= 0)
{
R_BSP_IrqCfg(p_ctrl->irq, p_cfg->ipl, p_ctrl);
}
/* Mark the control block as open */
p_ctrl->open = ICU_OPEN;
return FSP_SUCCESS;
}
/*******************************************************************************************************************//**
* Enable external interrupt for specified channel at NVIC. Implements @ref external_irq_api_t::enable.
*
* @retval FSP_SUCCESS Interrupt Enabled successfully.
* @retval FSP_ERR_ASSERTION The p_ctrl parameter was null.
* @retval FSP_ERR_NOT_OPEN The channel is not opened.
* @retval FSP_ERR_IRQ_BSP_DISABLED Requested IRQ is not defined in this system
**********************************************************************************************************************/
fsp_err_t R_ICU_ExternalIrqEnable (external_irq_ctrl_t * const p_api_ctrl)
{
icu_instance_ctrl_t * p_ctrl = (icu_instance_ctrl_t *) p_api_ctrl;
#if ICU_CFG_PARAM_CHECKING_ENABLE
FSP_ASSERT(NULL != p_ctrl);
FSP_ERROR_RETURN(ICU_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN);
FSP_ERROR_RETURN(p_ctrl->irq >= 0, FSP_ERR_IRQ_BSP_DISABLED);
#endif
/* Clear the interrupt status and Pending bits, before the interrupt is enabled. */
R_BSP_IrqEnable(p_ctrl->irq);
return FSP_SUCCESS;
}
/*******************************************************************************************************************//**
* Disable external interrupt for specified channel at NVIC. Implements @ref external_irq_api_t::disable.
*
* @retval FSP_SUCCESS Interrupt disabled successfully.
* @retval FSP_ERR_ASSERTION The p_ctrl parameter was null.
* @retval FSP_ERR_NOT_OPEN The channel is not opened.
* @retval FSP_ERR_IRQ_BSP_DISABLED Requested IRQ is not defined in this system
**********************************************************************************************************************/
fsp_err_t R_ICU_ExternalIrqDisable (external_irq_ctrl_t * const p_api_ctrl)
{
icu_instance_ctrl_t * p_ctrl = (icu_instance_ctrl_t *) p_api_ctrl;
#if ICU_CFG_PARAM_CHECKING_ENABLE
FSP_ASSERT(NULL != p_ctrl);
FSP_ERROR_RETURN(ICU_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN);
FSP_ERROR_RETURN(p_ctrl->irq >= 0, FSP_ERR_IRQ_BSP_DISABLED);
#endif
/* Disable the interrupt, and then clear the interrupt pending bits and interrupt status. */
R_BSP_IrqDisable(p_ctrl->irq);
return FSP_SUCCESS;
}
/*******************************************************************************************************************//**
* Updates the user callback and has option of providing memory for callback structure.
* Implements external_irq_api_t::callbackSet
*
* @retval FSP_SUCCESS Callback updated successfully.
* @retval FSP_ERR_ASSERTION A required pointer is NULL.
* @retval FSP_ERR_NOT_OPEN The control block has not been opened.
* @retval FSP_ERR_NO_CALLBACK_MEMORY p_callback is non-secure and p_callback_memory is either secure or NULL.
**********************************************************************************************************************/
fsp_err_t R_ICU_ExternalIrqCallbackSet (external_irq_ctrl_t * const p_api_ctrl,
void ( * p_callback)(
external_irq_callback_args_t *),
void const * const p_context,
external_irq_callback_args_t * const p_callback_memory)
{
icu_instance_ctrl_t * p_ctrl = p_api_ctrl;
#if BSP_TZ_SECURE_BUILD
/* cmse_check_address_range returns NULL if p_callback is located in secure memory */
bool callback_is_secure =
(NULL == cmse_check_address_range((void *) p_callback, sizeof(void *), CMSE_AU_NONSECURE));
#else
FSP_PARAMETER_NOT_USED(p_callback_memory);
#endif
#if ICU_CFG_PARAM_CHECKING_ENABLE
FSP_ASSERT(NULL != p_ctrl);
FSP_ERROR_RETURN(ICU_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN);
FSP_ASSERT(NULL != p_callback);
#if BSP_TZ_SECURE_BUILD
/* In secure projects, p_callback_memory must be provided in non-secure space if p_callback is non-secure */
external_irq_callback_args_t * const p_callback_memory_checked = cmse_check_pointed_object(p_callback_memory,
CMSE_AU_NONSECURE);
FSP_ERROR_RETURN(callback_is_secure || (NULL != p_callback_memory_checked), FSP_ERR_NO_CALLBACK_MEMORY);
#endif
#endif
#if BSP_TZ_SECURE_BUILD
p_ctrl->p_callback_memory = p_callback_memory;
p_ctrl->p_callback = callback_is_secure ? p_callback :
(void (*)(external_irq_callback_args_t *))cmse_nsfptr_create(p_callback);
#else
p_ctrl->p_callback = p_callback;
#endif
p_ctrl->p_context = p_context;
return FSP_SUCCESS;
}
/*******************************************************************************************************************//**
* Close the external interrupt channel. Implements @ref external_irq_api_t::close.
*
* @retval FSP_SUCCESS Successfully closed.
* @retval FSP_ERR_ASSERTION The parameter p_ctrl is NULL.
* @retval FSP_ERR_NOT_OPEN The channel is not opened.
**********************************************************************************************************************/
fsp_err_t R_ICU_ExternalIrqClose (external_irq_ctrl_t * const p_api_ctrl)
{
icu_instance_ctrl_t * p_ctrl = (icu_instance_ctrl_t *) p_api_ctrl;
#if ICU_CFG_PARAM_CHECKING_ENABLE
FSP_ASSERT(NULL != p_ctrl);
FSP_ERROR_RETURN(ICU_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN);
#endif
/* Cleanup. Disable interrupt */
if (p_ctrl->irq >= 0)
{
/* Disable the interrupt, and then clear the interrupt pending bits and interrupt status. */
R_BSP_IrqDisable(p_ctrl->irq);
R_FSP_IsrContextSet(p_ctrl->irq, NULL);
}
p_ctrl->open = 0U;
return FSP_SUCCESS;
}
/*******************************************************************************************************************//**
* @} (end addtogroup ICU)
**********************************************************************************************************************/
/*******************************************************************************************************************//**
* ICU External Interrupt ISR.
**********************************************************************************************************************/
void r_icu_isr (void)
{
/* Save context if RTOS is used */
FSP_CONTEXT_SAVE
IRQn_Type irq = R_FSP_CurrentIrqGet();
icu_instance_ctrl_t * p_ctrl = (icu_instance_ctrl_t *) R_FSP_IsrContextGet(irq);
bool level_irq = false;
if (EXTERNAL_IRQ_TRIG_LEVEL_LOW == R_ICU->IRQCR_b[p_ctrl->channel].IRQMD)
{
level_irq = true;
}
else
{
/* Clear the IR bit before calling the user callback so that if an edge is detected while the ISR is active
* it will not be missed. */
R_BSP_IrqStatusClear(irq);
}
if ((NULL != p_ctrl) && (NULL != p_ctrl->p_callback))
{
#if BSP_TZ_SECURE_BUILD
/* p_callback can point to a secure function or a non-secure function. */
external_irq_callback_args_t args;
if (!cmse_is_nsfptr(p_ctrl->p_callback))
{
/* If p_callback is secure, then the project does not need to change security state. */
args.channel = p_ctrl->channel;
args.p_context = p_ctrl->p_context;
p_ctrl->p_callback(&args);
}
else
{
/* Save current state of p_callback_args so that it can be shared between interrupts. */
args = *p_ctrl->p_callback_memory;
/* Set the callback args passed to the Non-secure calback. */
p_ctrl->p_callback_memory->channel = p_ctrl->channel;
p_ctrl->p_callback_memory->p_context = p_ctrl->p_context;
/* If p_callback is Non-secure, then the project must change to Non-secure state in order to call the callback. */
icu_prv_ns_callback p_callback = (icu_prv_ns_callback) (p_ctrl->p_callback);
p_callback(p_ctrl->p_callback_memory);
/* Restore the state of p_callback_args. */
*p_ctrl->p_callback_memory = args;
}
#else
/* Set data to identify callback to user, then call user callback. */
external_irq_callback_args_t args;
args.channel = p_ctrl->channel;
args.p_context = p_ctrl->p_context;
p_ctrl->p_callback(&args);
#endif
}
if (level_irq)
{
/* Clear the IR bit after calling the user callback so that if the condition is cleared the ISR will not
* be called again. */
R_BSP_IrqStatusClear(irq);
}
/* Restore context if RTOS is used */
FSP_CONTEXT_RESTORE
}
/* generated configuration header file - do not edit */
#ifndef R_ICU_CFG_H_
#define R_ICU_CFG_H_
#define ICU_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#endif /* R_ICU_CFG_H_ */
......@@ -17,7 +17,7 @@ if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = 'C:\Users\XXYYZZ'
elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
PLATFORM = 'armclang'
EXEC_PATH = 'C:/Keil_v5'
elif CROSS_TOOL == 'iar':
PLATFORM = 'iar'
......@@ -26,7 +26,8 @@ elif CROSS_TOOL == 'iar':
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'debug'
# BUILD = 'debug'
BUILD = 'release'
if PLATFORM == 'gcc':
# toolchains
......@@ -54,7 +55,7 @@ if PLATFORM == 'gcc':
CFLAGS += ' -O0 -gdwarf-2 -g -Wall'
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -O2'
CFLAGS += ' -Os'
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
POST_ACTION += OBJCPY + ' -O ihex $TARGET rtthread.hex\n' + SIZE + ' $TARGET \n'
......@@ -79,7 +80,7 @@ elif PLATFORM == 'armcc':
CFLAGS += ' -g -O0'
AFLAGS += ' -g'
else:
CFLAGS += ' -O2'
CFLAGS += ' -Os'
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET \n'
POST_ACTION += 'python ./makeimg.py'
......@@ -152,6 +152,26 @@ SECTIONS
KEEP(*(.init))
KEEP(*(.fini))
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
/* section information for initial. */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
. = ALIGN(4);
KEEP(*(FalPartTable))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
......
......@@ -179,7 +179,7 @@
<Group>
<GroupName>:Renesas RA Smart Configurator:Common Sources</GroupName>
<tvExp>1</tvExp>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
......@@ -207,6 +207,30 @@
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>3</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\src\mqtt_client.c</PathWithFileName>
<FilenameWithoutPath>mqtt_client.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>4</FileNumber>
<FileType>5</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\src\mqtt_client.h</PathWithFileName>
<FilenameWithoutPath>mqtt_client.h</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
......
......@@ -10,14 +10,15 @@
<TargetName>Target 1</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>6160000::V6.16::ARMCLANG</pCCUsed>
<uAC6>1</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>R7FA6M4AF</Device>
<Device>R7FA6M4AF3CFB</Device>
<Vendor>Renesas</Vendor>
<PackID>Renesas.RA_DFP.3.1.0</PackID>
<PackURL>https://www2.renesas.eu/Keil_MDK_Packs/</PackURL>
<Cpu>CPUTYPE("Cortex-M33") FPU2 CLOCK(12000000) ELITTLE</Cpu>
<Cpu>CPUTYPE("Cortex-M33") FPU3(SFPU) DSP TZ CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
......@@ -32,7 +33,7 @@
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:R7FA6M4AF$SVD\R7FA6M4AF.svd</SFDFile>
<SFDFile>$$Device:R7FA6M4AF3CFB$SVD\R7FA6M4AF.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
......@@ -108,10 +109,10 @@
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<SimDllName></SimDllName>
<SimDllArguments></SimDllArguments>
<SimDlgDll></SimDlgDll>
<SimDlgDllArguments></SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
......@@ -129,7 +130,7 @@
<Utilities>
<Flash1>
<UseTargetDll>0</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<UseExternalTool>1</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
......@@ -395,6 +396,16 @@
<FileType>5</FileType>
<FilePath>.\src\SConscript</FilePath>
</File>
<File>
<FileName>mqtt_client.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\mqtt_client.c</FilePath>
</File>
<File>
<FileName>mqtt_client.h</FileName>
<FileType>5</FileType>
<FilePath>.\src\mqtt_client.h</FilePath>
</File>
</Files>
</Group>
<Group>
......
......@@ -50,6 +50,8 @@ extern "C" {
#define RT_SENSOR_CLASS_GNSS (16) /* GPS/GNSS sensor */
#define RT_SENSOR_CLASS_TOF (17) /* TOF sensor */
#define RT_SENSOR_CLASS_SPO2 (18) /* SpO2 sensor */
#define RT_SENSOR_CLASS_IAQ (19) /* IAQ sensor. */
#define RT_SENSOR_CLASS_ETOH (20) /* EtOH sensor. */
/* Sensor vendor types */
......@@ -90,6 +92,7 @@ extern "C" {
#define RT_SENSOR_UNIT_PPB (15) /* Concentration unit: ppb */
#define RT_SENSOR_UNIT_DMS (16) /* Coordinates unit: DMS */
#define RT_SENSOR_UNIT_DD (17) /* Coordinates unit: DD */
#define RT_SENSOR_UNIT_MGM3 (18) /* Concentration unit: mg/m3 */
/* Sensor communication interface types */
#define RT_SENSOR_INTF_I2C (1 << 0)
......@@ -218,6 +221,8 @@ struct rt_sensor_data
rt_uint32_t dust; /* Dust sensor. unit: ug/m3 */
rt_uint32_t eco2; /* eCO2 sensor. unit: ppm */
rt_uint32_t spo2; /* SpO2 sensor. unit: permillage */
rt_uint32_t iaq; /* IAQ sensor. unit: 1 */
rt_uint32_t etoh; /* EtOH sensor. unit: ppm */
} data;
};
......
......@@ -37,7 +37,9 @@ static char *const sensor_name_str[] =
"eco2_", /* eCO2 sensor */
"gnss_", /* GPS/GNSS sensor */
"tof_", /* TOF sensor */
"spo2_" /* SpO2 sensor */
"spo2_", /* SpO2 sensor */
"iaq_", /* IAQ sensor */
"etoh_", /* EtOH sensor */
};
/* Sensor interrupt correlation function */
......@@ -134,7 +136,8 @@ static rt_err_t local_control(struct rt_sensor_device *sensor, int cmd, void *ar
LOG_D("Undefined control");
return RT_ERROR;
}
static struct rt_sensor_ops local_ops = {
static struct rt_sensor_ops local_ops =
{
.fetch_data = local_fetch_data,
.control = local_control
};
......@@ -145,7 +148,7 @@ static rt_err_t rt_sensor_open(rt_device_t dev, rt_uint16_t oflag)
rt_sensor_t sensor = (rt_sensor_t)dev;
RT_ASSERT(dev != RT_NULL);
rt_err_t res = RT_EOK;
rt_err_t (*local_ctrl)(struct rt_sensor_device *sensor, int cmd, void *arg) = local_control;
rt_err_t (*local_ctrl)(struct rt_sensor_device * sensor, int cmd, void *arg) = local_control;
if (sensor->module)
{
......@@ -311,7 +314,7 @@ static rt_size_t rt_sensor_read(rt_device_t dev, rt_off_t pos, void *buf, rt_siz
if (sensor->ops->fetch_data != RT_NULL)
{
result = sensor->ops->fetch_data(sensor, buf, len);
}
}
}
if (sensor->module)
......@@ -359,7 +362,7 @@ static rt_err_t rt_sensor_control(rt_device_t dev, int cmd, void *args)
{
sensor->config.range = (rt_int32_t)args;
LOG_D("set range %d", sensor->config.range);
}
}
break;
case RT_SENSOR_CTRL_SET_ODR:
/* Configuration data output rate */
......
......@@ -74,6 +74,12 @@ static void sensor_show_data(rt_size_t num, rt_sensor_t sensor, struct rt_sensor
case RT_SENSOR_CLASS_ECO2:
LOG_I("num:%3d, eco2:%5d ppm, timestamp:%5d", num, sensor_data->data.eco2, sensor_data->timestamp);
break;
case RT_SENSOR_CLASS_IAQ:
LOG_I("num:%3d, IAQ:%5d.%d , timestamp:%5d", num, sensor_data->data.iaq / 10, sensor_data->data.iaq % 10, sensor_data->timestamp);
break;
case RT_SENSOR_CLASS_ETOH:
LOG_I("num:%3d, EtOH:%5d.%03d ppm, timestamp:%5d", num, sensor_data->data.etoh / 1000, sensor_data->data.etoh % 1000, sensor_data->timestamp);
break;
default:
break;
}
......@@ -156,7 +162,7 @@ static void sensor_fifo(int argc, char **argv)
rt_device_control(dev, RT_SENSOR_CTRL_SET_ODR, (void *)20);
}
#ifdef RT_USING_FINSH
MSH_CMD_EXPORT(sensor_fifo, Sensor fifo mode test function);
MSH_CMD_EXPORT(sensor_fifo, Sensor fifo mode test function);
#endif
static void sensor_irq_rx_entry(void *parameter)
......@@ -220,7 +226,7 @@ static void sensor_int(int argc, char **argv)
rt_device_control(dev, RT_SENSOR_CTRL_SET_ODR, (void *)20);
}
#ifdef RT_USING_FINSH
MSH_CMD_EXPORT(sensor_int, Sensor interrupt mode test function);
MSH_CMD_EXPORT(sensor_int, Sensor interrupt mode test function);
#endif
static void sensor_polling(int argc, char **argv)
......@@ -269,7 +275,7 @@ static void sensor_polling(int argc, char **argv)
rt_device_close(dev);
}
#ifdef RT_USING_FINSH
MSH_CMD_EXPORT(sensor_polling, Sensor polling mode test function);
MSH_CMD_EXPORT(sensor_polling, Sensor polling mode test function);
#endif
static void sensor(int argc, char **argv)
......@@ -306,103 +312,103 @@ static void sensor(int argc, char **argv)
rt_device_control(dev, RT_SENSOR_CTRL_GET_INFO, &info);
switch (info.vendor)
{
case RT_SENSOR_VENDOR_UNKNOWN:
rt_kprintf("vendor :unknown vendor\n");
break;
case RT_SENSOR_VENDOR_STM:
rt_kprintf("vendor :STMicroelectronics\n");
break;
case RT_SENSOR_VENDOR_BOSCH:
rt_kprintf("vendor :Bosch\n");
break;
case RT_SENSOR_VENDOR_INVENSENSE:
rt_kprintf("vendor :Invensense\n");
break;
case RT_SENSOR_VENDOR_SEMTECH:
rt_kprintf("vendor :Semtech\n");
break;
case RT_SENSOR_VENDOR_GOERTEK:
rt_kprintf("vendor :Goertek\n");
break;
case RT_SENSOR_VENDOR_MIRAMEMS:
rt_kprintf("vendor :MiraMEMS\n");
break;
case RT_SENSOR_VENDOR_DALLAS:
rt_kprintf("vendor :Dallas\n");
break;
case RT_SENSOR_VENDOR_ASAIR:
rt_kprintf("vendor :Asair\n");
break;
case RT_SENSOR_VENDOR_SHARP:
rt_kprintf("vendor :Sharp\n");
break;
case RT_SENSOR_VENDOR_SENSIRION:
rt_kprintf("vendor :Sensirion\n");
break;
case RT_SENSOR_VENDOR_TI:
rt_kprintf("vendor :Texas Instruments\n");
break;
case RT_SENSOR_VENDOR_PLANTOWER:
rt_kprintf("vendor :Plantower\n");
break;
case RT_SENSOR_VENDOR_AMS:
rt_kprintf("vendor :AMS\n");
break;
case RT_SENSOR_VENDOR_MAXIM:
rt_kprintf("vendor :Maxim Integrated\n");
break;
case RT_SENSOR_VENDOR_UNKNOWN:
rt_kprintf("vendor :unknown vendor\n");
break;
case RT_SENSOR_VENDOR_STM:
rt_kprintf("vendor :STMicroelectronics\n");
break;
case RT_SENSOR_VENDOR_BOSCH:
rt_kprintf("vendor :Bosch\n");
break;
case RT_SENSOR_VENDOR_INVENSENSE:
rt_kprintf("vendor :Invensense\n");
break;
case RT_SENSOR_VENDOR_SEMTECH:
rt_kprintf("vendor :Semtech\n");
break;
case RT_SENSOR_VENDOR_GOERTEK:
rt_kprintf("vendor :Goertek\n");
break;
case RT_SENSOR_VENDOR_MIRAMEMS:
rt_kprintf("vendor :MiraMEMS\n");
break;
case RT_SENSOR_VENDOR_DALLAS:
rt_kprintf("vendor :Dallas\n");
break;
case RT_SENSOR_VENDOR_ASAIR:
rt_kprintf("vendor :Asair\n");
break;
case RT_SENSOR_VENDOR_SHARP:
rt_kprintf("vendor :Sharp\n");
break;
case RT_SENSOR_VENDOR_SENSIRION:
rt_kprintf("vendor :Sensirion\n");
break;
case RT_SENSOR_VENDOR_TI:
rt_kprintf("vendor :Texas Instruments\n");
break;
case RT_SENSOR_VENDOR_PLANTOWER:
rt_kprintf("vendor :Plantower\n");
break;
case RT_SENSOR_VENDOR_AMS:
rt_kprintf("vendor :AMS\n");
break;
case RT_SENSOR_VENDOR_MAXIM:
rt_kprintf("vendor :Maxim Integrated\n");
break;
}
rt_kprintf("model :%s\n", info.model);
switch (info.unit)
{
case RT_SENSOR_UNIT_NONE:
rt_kprintf("unit :none\n");
break;
case RT_SENSOR_UNIT_MG:
rt_kprintf("unit :mG\n");
break;
case RT_SENSOR_UNIT_MDPS:
rt_kprintf("unit :mdps\n");
break;
case RT_SENSOR_UNIT_MGAUSS:
rt_kprintf("unit :mGauss\n");
break;
case RT_SENSOR_UNIT_LUX:
rt_kprintf("unit :lux\n");
break;
case RT_SENSOR_UNIT_CM:
rt_kprintf("unit :cm\n");
break;
case RT_SENSOR_UNIT_PA:
rt_kprintf("unit :pa\n");
break;
case RT_SENSOR_UNIT_PERMILLAGE:
rt_kprintf("unit :permillage\n");
break;
case RT_SENSOR_UNIT_DCELSIUS:
rt_kprintf("unit :Celsius\n");
break;
case RT_SENSOR_UNIT_HZ:
rt_kprintf("unit :HZ\n");
break;
case RT_SENSOR_UNIT_ONE:
rt_kprintf("unit :1\n");
break;
case RT_SENSOR_UNIT_BPM:
rt_kprintf("unit :bpm\n");
break;
case RT_SENSOR_UNIT_MM:
rt_kprintf("unit :mm\n");
break;
case RT_SENSOR_UNIT_MN:
rt_kprintf("unit :mN\n");
break;
case RT_SENSOR_UNIT_PPM:
rt_kprintf("unit :ppm\n");
break;
case RT_SENSOR_UNIT_PPB:
rt_kprintf("unit :ppb\n");
break;
case RT_SENSOR_UNIT_NONE:
rt_kprintf("unit :none\n");
break;
case RT_SENSOR_UNIT_MG:
rt_kprintf("unit :mG\n");
break;
case RT_SENSOR_UNIT_MDPS:
rt_kprintf("unit :mdps\n");
break;
case RT_SENSOR_UNIT_MGAUSS:
rt_kprintf("unit :mGauss\n");
break;
case RT_SENSOR_UNIT_LUX:
rt_kprintf("unit :lux\n");
break;
case RT_SENSOR_UNIT_CM:
rt_kprintf("unit :cm\n");
break;
case RT_SENSOR_UNIT_PA:
rt_kprintf("unit :pa\n");
break;
case RT_SENSOR_UNIT_PERMILLAGE:
rt_kprintf("unit :permillage\n");
break;
case RT_SENSOR_UNIT_DCELSIUS:
rt_kprintf("unit :Celsius\n");
break;
case RT_SENSOR_UNIT_HZ:
rt_kprintf("unit :HZ\n");
break;
case RT_SENSOR_UNIT_ONE:
rt_kprintf("unit :1\n");
break;
case RT_SENSOR_UNIT_BPM:
rt_kprintf("unit :bpm\n");
break;
case RT_SENSOR_UNIT_MM:
rt_kprintf("unit :mm\n");
break;
case RT_SENSOR_UNIT_MN:
rt_kprintf("unit :mN\n");
break;
case RT_SENSOR_UNIT_PPM:
rt_kprintf("unit :ppm\n");
break;
case RT_SENSOR_UNIT_PPB:
rt_kprintf("unit :ppb\n");
break;
}
rt_kprintf("range_max :%d\n", info.range_max);
rt_kprintf("range_min :%d\n", info.range_min);
......@@ -497,5 +503,5 @@ static void sensor(int argc, char **argv)
}
}
#ifdef RT_USING_FINSH
MSH_CMD_EXPORT(sensor, sensor test function);
MSH_CMD_EXPORT(sensor, sensor test function);
#endif
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