提交 0a4abb8f 编写于 作者: S SummerGift

[bsp][STM32] update linker_scripts for stm32 bsp

上级 633876a6
......@@ -7,6 +7,7 @@
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
......@@ -15,6 +16,7 @@ CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=1024
# CONFIG_RT_USING_TIMER_SOFT is not set
......@@ -63,6 +65,7 @@ CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_ARCH_ARM=y
CONFIG_ARCH_ARM_CORTEX_M=y
CONFIG_ARCH_ARM_CORTEX_M4=y
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
......@@ -112,10 +115,12 @@ CONFIG_RT_USING_SERIAL=y
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_MTD is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
......@@ -173,6 +178,7 @@ CONFIG_RT_USING_PIN=y
#
# CONFIG_RT_USING_LOGTRACE is not set
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
#
# ARM CMSIS
......@@ -245,7 +251,6 @@ CONFIG_RT_USING_PIN=y
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_BEEPPLAYER is not set
#
# tools packages
......@@ -273,6 +278,7 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
#
# peripheral libraries and drivers
......@@ -329,22 +335,28 @@ CONFIG_SOC_STM32F407ZG=y
#
# Onboard Peripheral Drivers
#
CONFIG_BSP_USING_USB_TO_USART=y
# CONFIG_BSP_USING_SPI_FLASH is not set
# CONFIG_BSP_USING_COM3 is not set
# CONFIG_BSP_USING_EEPROM is not set
# CONFIG_BSP_USING_ETH is not set
# CONFIG_BSP_USING_MPU6050 is not set
#
# Offboard Peripheral Drivers
#
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART1=y
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_UART3 is not set
# CONFIG_BSP_USING_UART6 is not set
# CONFIG_BSP_UART_USING_DMA_RX is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_I2C is not set
# CONFIG_BSP_USING_SPI1 is not set
# CONFIG_BSP_USING_SPI2 is not set
# CONFIG_BSP_USING_SPI3 is not set
# CONFIG_BSP_SPI_USING_DMA is not set
# CONFIG_BSP_USING_I2C1 is not set
#
# Board extended module Drivers
#
......@@ -116,7 +116,7 @@ msh >
## 注意事项
- STM32F407 有两块 RAM:RAM1(0x20000000,128K) 、RAM2(0x10000000,64K) ,本 BSP 将 RT-Thread HEAP 放到了 RAM1,将 RW 段数据放到了 RAM2(此地址空间不能使用 DMA 传输)。因此,如需使用 DMA 功能需使用 `rt_malloc/rt_calloc` 函数为缓冲区分配 RAM1 的空间。
暂无
## 联系人信息
......
......@@ -22,12 +22,21 @@
#define LED1_PIN GET_PIN(F, 10)
#endif
#define STM32_SRAM1_SIZE (128)
#define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#define STM32_SRAM_SIZE (128)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#ifdef __CC_ARM
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="CSTACK"
#define HEAP_BEGIN (__segment_end("CSTACK"))
#else
extern int __bss_end;
#define HEAP_BEGIN ((void *)&__bss_end)
#endif
#define HEAP_BEGIN STM32_SRAM1_START
#define HEAP_END STM32_SRAM1_END
#define HEAP_END STM32_SRAM_END
void SystemClock_Config(void);
void MX_GPIO_Init(void);
......
......@@ -18,7 +18,6 @@ define symbol __ICFEDIT_size_heap__ = 0x0000;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
define region RAM2_region = mem:[from __ICFEDIT_region_RAM2_start__ to __ICFEDIT_region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
......@@ -28,5 +27,4 @@ do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM1_region { section .sram };
place in RAM2_region { readwrite, block CSTACK};
place in RAM1_region { readwrite, last block CSTACK };
......@@ -78,7 +78,7 @@ SECTIONS
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_edata = . ;
} >RAM2
} >RAM1
.stack :
{
......@@ -87,7 +87,7 @@ SECTIONS
. = . + _system_stack_size;
. = ALIGN(4);
_estack = .;
} >RAM2
} >RAM1
__bss_start = .;
.bss :
......@@ -105,7 +105,7 @@ SECTIONS
_ebss = . ;
*(.bss.init)
} > RAM2
} > RAM1
__bss_end = .;
_end = .;
......
......@@ -8,7 +8,7 @@ LR_IROM1 0x08000000 0x00100000 { ; load region size_region
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM2 0x10000000 0x00010000 { ; RW data
RW_IRAM1 0x20000000 0x00020000 { ; RW data
.ANY (+RW +ZI)
}
}
......
......@@ -2,7 +2,7 @@
<project>
<fileVersion>3</fileVersion>
<configuration>
<name>Debug</name>
<name>rt-thread</name>
<toolchain>
<name>ARM</name>
</toolchain>
......@@ -80,7 +80,7 @@
</option>
<option>
<name>OCProductVersion</name>
<state>8.11.3.13977</state>
<state>8.20.1.14181</state>
</option>
<option>
<name>OCDynDriverList</name>
......@@ -88,7 +88,7 @@
</option>
<option>
<name>OCLastSavedByProductVersion</name>
<state>8.11.3.13977</state>
<state>8.20.1.14181</state>
</option>
<option>
<name>UseFlashLoader</name>
......@@ -1403,11 +1403,11 @@
<loadFlag>1</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\IARProbe\IarProbePlugin.ENU.ewplugin</file>
<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
......@@ -2818,11 +2818,11 @@
<loadFlag>1</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\IARProbe\IarProbePlugin.ENU.ewplugin</file>
<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
<file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
......
......@@ -13,6 +13,7 @@
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_USING_IDLE_HOOK
#define RT_IDEL_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 1024
#define RT_DEBUG
......@@ -153,6 +154,9 @@
/* example package: hello */
/* rtpkgs online packages */
#define SOC_FAMILY_STM32
#define SOC_SERIES_STM32F4
......@@ -162,13 +166,14 @@
/* Onboard Peripheral Drivers */
/* Offboard Peripheral Drivers */
#define BSP_USING_USB_TO_USART
/* On-chip Peripheral Drivers */
#define BSP_USING_GPIO
#define BSP_USING_UART
#define BSP_USING_UART1
/* Board extended module Drivers */
#endif
......@@ -120,7 +120,7 @@ msh >
## 注意事项
STM32F429 有两块 RAM:RAM1(0x20000000,192K) 、RAM2(0x10000000,64K) ,本 BSP 将 RT-Thread HEAP 放到了 RAM1,将 RW 段数据放到了 RAM2(此地址空间不能使用 DMA 传输)。因此,如需使用 DMA 功能传输缓冲区内的数据,需要使用 `rt_malloc/rt_calloc` 函数为需要使用 DMA 传输的缓冲区分配内存,这样申请的内存地址将存在于 RAM1 空间内。
暂无
## 联系人信息
......
......@@ -19,12 +19,21 @@
#include "drv_gpio.h"
#endif
#define STM32_SRAM1_SIZE (192)
#define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#define STM32_SRAM_SIZE (192)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="CSTACK"
#define HEAP_BEGIN (__segment_end("CSTACK"))
#else
extern int __bss_end;
#define HEAP_BEGIN (&__bss_end)
#endif
#define HEAP_BEGIN STM32_SRAM1_START
#define HEAP_END STM32_SRAM1_END
#define HEAP_END STM32_SRAM_END
/* Board Pin definitions */
#define LED0_PIN GET_PIN(B, 1)
......
......@@ -18,7 +18,6 @@ define symbol __ICFEDIT_size_heap__ = 0x0000;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
define region RAM2_region = mem:[from __ICFEDIT_region_RAM2_start__ to __ICFEDIT_region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
......@@ -28,5 +27,4 @@ do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM1_region { section .sram };
place in RAM2_region { readwrite, block CSTACK};
place in RAM1_region { readwrite, last block CSTACK };
......@@ -78,7 +78,7 @@ SECTIONS
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_edata = . ;
} >RAM2
} >RAM1
.stack :
{
......@@ -87,7 +87,7 @@ SECTIONS
. = . + _system_stack_size;
. = ALIGN(4);
_estack = .;
} >RAM2
} >RAM1
__bss_start = .;
.bss :
......@@ -105,7 +105,7 @@ SECTIONS
_ebss = . ;
*(.bss.init)
} > RAM2
} > RAM1
__bss_end = .;
_end = .;
......
......@@ -8,7 +8,7 @@ LR_IROM1 0x08000000 0x00100000 { ; load region size_region
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM2 0x10000000 0x00010000 { ; RW data
RW_IRAM1 0x20000000 0x00030000 { ; RW data
.ANY (+RW +ZI)
}
}
......
......@@ -47,7 +47,6 @@
| SD卡 | 即将支持 | |
| CAN | 即将支持 | |
| SDRAM | 即将支持 | |
| ESP8266 模块 | 即将支持 | |
| EMW1062 | 暂不支持 | |
| **片上外设** | **支持情况** | **备注** |
| GPIO | 支持 | PA0, PA1... PK15 ---> PIN: 0, 1...176 |
......@@ -119,7 +118,7 @@ msh >
## 注意事项
STM32F429 有两块 RAM:RAM1(0x20000000,192K) 、RAM2(0x10000000,64K) ,本 BSP 将 RT-Thread HEAP 放到了 RAM1,将 RW 段数据放到了 RAM2(此地址空间不能使用 DMA 传输)。因此,如需使用 DMA 功能传输缓冲区内的数据,需要使用 `rt_malloc/rt_calloc` 函数为需要使用 DMA 传输的缓冲区分配内存,这样申请的内存地址将存在于 RAM1 空间内。
暂无
## 联系人信息
......
......@@ -19,12 +19,21 @@
#include "drv_gpio.h"
#endif
#define STM32_SRAM1_SIZE (192)
#define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#define STM32_SRAM_SIZE (192)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="CSTACK"
#define HEAP_BEGIN (__segment_end("CSTACK"))
#else
extern int __bss_end;
#define HEAP_BEGIN (&__bss_end)
#endif
#define HEAP_BEGIN STM32_SRAM1_START
#define HEAP_END STM32_SRAM1_END
#define HEAP_END STM32_SRAM_END
/* Board Pin definitions */
#define LED0_PIN GET_PIN(H, 10)
......
......@@ -18,7 +18,6 @@ define symbol __ICFEDIT_size_heap__ = 0x0000;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
define region RAM2_region = mem:[from __ICFEDIT_region_RAM2_start__ to __ICFEDIT_region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
......@@ -28,5 +27,4 @@ do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM1_region { section .sram };
place in RAM2_region { readwrite, block CSTACK};
place in RAM1_region { readwrite, last block CSTACK };
......@@ -78,7 +78,7 @@ SECTIONS
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_edata = . ;
} >RAM2
} >RAM1
.stack :
{
......@@ -87,7 +87,7 @@ SECTIONS
. = . + _system_stack_size;
. = ALIGN(4);
_estack = .;
} >RAM2
} >RAM1
__bss_start = .;
.bss :
......@@ -105,7 +105,7 @@ SECTIONS
_ebss = . ;
*(.bss.init)
} > RAM2
} > RAM1
__bss_end = .;
_end = .;
......
......@@ -8,7 +8,7 @@ LR_IROM1 0x08000000 0x00100000 { ; load region size_region
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM2 0x10000000 0x00010000 { ; RW data
RW_IRAM1 0x20000000 0x00030000 { ; RW data
.ANY (+RW +ZI)
}
}
......
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