- 14 11月, 2018 1 次提交
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由 Tao Luo 提交于
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- 21 8月, 2018 1 次提交
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由 Yan Chunwei 提交于
* link IR graph to analysis graph * add clean code and update * add infer_clean_pass * add ir_pass_manager * support fc fuse executation * fix ir circle
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- 16 8月, 2018 2 次提交
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由 tensor-tang 提交于
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由 tensor-tang 提交于
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- 14 8月, 2018 3 次提交
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由 tensor-tang 提交于
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由 tensor-tang 提交于
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由 tensor-tang 提交于
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- 13 8月, 2018 1 次提交
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由 tensor-tang 提交于
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- 07 6月, 2018 1 次提交
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由 mozga-intel 提交于
* Add MKLDNN layout support in Paddle Add MKLDNN layout in Paddle so that MKLDNN friendly memory layout can be used in MKLDNN enabled OP kernel. Before this commit, NCHW is hardcode to be used in all MKLDNN op kernels. As a result, non-optimized execution path is selected in MKLDNN primitive which bring worse performance. Besides framework change, three MKLDNN OP kernels were updated for using new MKLDNN layout. They are conv/pool2d/batch_norm. Other MKLDNN OP kernels need be also updated in similar way to achieve best performance. * Add MKLDNN layout support in activation OP * Don't populate layout from input to output when kMKLDNN in * Refine pool mkldnn op kernel * MKLDNN layout * Remove the inferitance from tensor file * MKLDNN layout: refactoring * Remove additional #define to register new operator * Prepare mkldnn tests to work with layout
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- 08 5月, 2018 1 次提交
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由 Yu Yang 提交于
Do not use ctor * Reduce line of codes. * We can use virtual function for Maker now. * The implementation does not care what maker holds, it is easier to refactor later.
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- 19 4月, 2018 1 次提交
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由 Yang Yang(Tony) 提交于
* script to add semicolon * fix typo
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- 17 4月, 2018 1 次提交
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由 Yang Yang 提交于
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- 03 4月, 2018 3 次提交
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由 mozga-intel 提交于
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由 mozga-intel 提交于
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由 mozga-intel 提交于
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