提交 12d72dd6 编写于 作者: D dzzxzz

update Fujitsu MB9BF506R project

add nandflash device driver
support RT-Thread DFS

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1515 bbd45198-f89e-11dd-88c7-29a3b14d5316
上级 1a734fe2
......@@ -9,7 +9,7 @@
*
* Change Logs:
* Date Author Notes
* 2011-02-24 Bernard the first version
* 2011-05-24 Bernard the first version
*/
/**
......@@ -21,18 +21,49 @@
#include "board.h"
#include "led.h"
#ifdef RT_USING_DFS
/* dfs init */
#include <dfs_init.h>
/* dfs filesystem:ELM filesystem init */
#include <dfs_elm.h>
/* dfs Filesystem APIs */
#include <dfs_fs.h>
#endif
void rt_init_thread_entry(void *parameter)
{
/* Filesystem Initialization */
#ifdef RT_USING_DFS
{
/* init the device filesystem */
dfs_init();
#ifdef RT_USING_DFS_ELMFAT
/* init the elm chan FatFs filesystam*/
elm_init();
/* mount ELM FatFs on NAND flash as root directory */
if (dfs_mount("nand", "/", "elm", 0, 0) == 0)
{
rt_kprintf("File System initialized!\n");
}
else
rt_kprintf("File System initialzation failed!\n");
#endif
}
#endif
/* LED Initialization */
rt_hw_led_init();
}
int rt_application_init()
{
rt_thread_t init_thread;
rt_thread_t tid;
init_thread = rt_thread_create("init", rt_init_thread_entry, RT_NULL, 1024, 21, 20);
if(init_thread != RT_NULL)
rt_thread_startup(init_thread);
tid = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
2048, 8, 20);
if (tid != RT_NULL) rt_thread_startup(tid);
return 0;
}
......
......@@ -17,29 +17,11 @@
#include "board.h"
#include "mb9bf506r.h"
#include "core_cm3.h"
extern const uint32_t SystemFrequency;
#define UART0 FM3_MFS0_UART
struct serial_int_rx uart0_int_rx;
struct serial_device uart0 =
{
UART0,
&uart0_int_rx,
RT_NULL
};
struct rt_device uart0_device;
#include "serial.h"
#include "nand.h"
#define UART2 FM3_MFS2_UART
struct serial_int_rx uart2_int_rx;
struct serial_device uart2 =
{
UART2,
&uart2_int_rx,
RT_NULL
};
struct rt_device uart2_device;
extern const uint32_t SystemFrequency;
/**
* @addtogroup FM3
......@@ -62,48 +44,21 @@ void rt_hw_timer_handler(void)
rt_interrupt_leave();
}
void rt_hw_uart2_rx_handler(void)
{
#ifdef RT_USING_UART2
extern struct rt_device uart2_device;
extern void rt_hw_serial_isr(struct rt_device *device);
/* enter interrupt */
rt_interrupt_enter();
rt_hw_serial_isr(&uart2_device);
/* leave interrupt */
rt_interrupt_leave();
#endif
}
/**
* This function will handle init uart
*/
static void rt_hw_uart_init(void)
{
/* Set Uart Ch2 Port, SIN2_1, SOT2_1 */
FM3_GPIO->PFR2 = FM3_GPIO->PFR2 | 0x0030;
FM3_GPIO->EPFR07 = FM3_GPIO->EPFR07 | 0x000a0000;
uart2.uart_device->SMR = SMR_MD_UART | SMR_SOE;;
uart2.uart_device->BGR = (40000000UL + (BPS/2))/BPS - 1;
uart2.uart_device->ESCR = ESCR_DATABITS_8;
uart2.uart_device->SCR = SCR_RXE | SCR_TXE | SCR_RIE;
UART_ENABLE_IRQ(MFS2RX_IRQn);
UART_ENABLE_IRQ(MFS2TX_IRQn);
}
/**
* This function will initial FM3 Easy Kit board.
*/
void rt_hw_board_init()
{
/* init systick */
SysTick_Config(SystemFrequency/RT_TICK_PER_SECOND - 1);
rt_hw_uart_init();
SysTick_Config(SystemFrequency/RT_TICK_PER_SECOND);
/* initialize UART device */
rt_hw_serial_init();
/* set console as UART device */
rt_console_set_device("uart2");
/* initialize nand flash device */
rt_hw_nand_init();
}
/*@}*/
此差异已折叠。
......@@ -289,6 +289,8 @@
<state>$PROJ_DIR$\..\CMSIS</state>
<state>$PROJ_DIR$\..\..\..\include</state>
<state>$PROJ_DIR$\..\..\..\components\finsh</state>
<state>$PROJ_DIR$\..\..\..\components\dfs\include</state>
<state>$PROJ_DIR$\..\..\..\components\dfs\filesystems\elmfat</state>
</option>
<option>
<name>CCStdIncCheck</name>
......@@ -1746,6 +1748,27 @@
<name>$PROJ_DIR$\..\CMSIS\system_mb9bf50x.c</name>
</file>
</group>
<group>
<name>Filesystem</name>
<file>
<name>$PROJ_DIR$\..\..\..\components\dfs\src\dfs.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\dfs\filesystems\elmfat\dfs_elm.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\dfs\src\dfs_file.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\dfs\src\dfs_fs.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\dfs\src\dfs_posix.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\dfs\filesystems\elmfat\ff.c</name>
</file>
</group>
<group>
<name>Finsh</name>
<file>
......@@ -1860,10 +1883,10 @@
<name>$PROJ_DIR$\board.c</name>
</file>
<file>
<name>$PROJ_DIR$\console.c</name>
<name>$PROJ_DIR$\led.c</name>
</file>
<file>
<name>$PROJ_DIR$\led.c</name>
<name>$PROJ_DIR$\nand.c</name>
</file>
<file>
<name>$PROJ_DIR$\serial.c</name>
......
/*
* File : nand.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2011-05-25 Bernard first version
*/
#include "nand.h"
#include "mb9bf506r.h"
/*
* NandFlash driver for SamSung K9F5608
* 32M x 8bit
*/
#define PAGE_SIZE 512
#define PAGE_PER_BLOCK 32
#define BLOCK_NUM 2048
/* device driver debug trace */
/* #define NAND_DEBUG */
#ifdef NAND_DEBUG
#define trace_log rt_kprintf
#else
#define trace_log(...)
#endif
/*
* OOB,
* when block has been erased, OOB is 0xff.
* when block has been written, OOB is 0x00.
*/
struct rt_device_nand
{
struct rt_device parent; /* which is inherited from rt_device */
rt_uint16_t block_num; /* total block number in device */
rt_uint16_t page_per_block; /* pages in one block */
rt_uint16_t page_size; /* page size */
/* this buffer which used as to save data before erase block */
rt_uint8_t block_buffer[PAGE_SIZE * PAGE_PER_BLOCK];
};
static struct rt_device_nand _nand;
/* Flash operation definition */
#define NF_CMD(cmd) {*(volatile unsigned char*)(NF_FLASH_BASE_ADDR+NF_CMD_OFFSET) = (unsigned char)(cmd);}
#define NF_ADDR(addr) {*(volatile unsigned char*)(NF_FLASH_BASE_ADDR+NF_ADDR_OFFSET)= (unsigned char)(addr);}
#define NF_RDDATA() (*(volatile unsigned char*)(NF_FLASH_BASE_ADDR+NF_DATA_OFFSET))
#define NF_WRDATA(data) {*(volatile unsigned char*)(NF_FLASH_BASE_ADDR+NF_DATA_OFFSET)= (unsigned char)(data);}
#define NF_CLR_ALE() {*(volatile unsigned char*)(NF_FLASH_BASE_ADDR+NF_ALE_OFFSET) = (unsigned char)0;}
/* Flash Control IO definition */
#define NF_OE_H() {IO_NF_PDOR |= NF_EN;}
#define NF_OE_L() {IO_NF_PDOR &= ~NF_EN;}
#define NF_DATA_OUT() {IO_NF_PDOR &= ~NF_DATA_DIR;}
#define NF_DATA_IN() {IO_NF_PDOR |= NF_DATA_DIR;}
static unsigned char NF_ReadStatus(void);
static void Wait(unsigned int cnt);
static void NF_Reset(void);
static void Wait(unsigned int cnt)
{
while(cnt--);
}
static void NF_Reset(void)
{
NF_OE_L();
NF_DATA_OUT();
NF_CMD(NAND_CMD_RESET);
NF_OE_H();
Wait(10000); /* wait for Trst */
}
static unsigned char NF_ReadStatus(void)
{
unsigned int timeout=0;
NF_DATA_OUT();
NF_CMD(NAND_CMD_STATUS);
NF_DATA_IN();
while(!(NF_RDDATA() & 0x40))
{
timeout++;
if(timeout == 0x00080000)
return FLASH_NG;
}
if(NF_RDDATA() & 0x01)return FLASH_NG;
return FLASH_OK;
}
/*
* @ Funciton: NF_Init
* Parameter: None
* Return: None
*/
static void NF_Init(void)
{
FM3_GPIO->PFR5 |= (0x7ff); /* D0-D5, CS7, ALE, CLE, WEX, REX */
FM3_GPIO->PFR3 |= (0x3); /* D6-D7 */
FM3_GPIO->EPFR10 |= (1<<13 /* CS enable */
|1<<6 /* ALE, CLE, WEX, REX enable */
|1<<0); /* D0-D7 enable */
FM3_EXBUS->AREA7 = 0x001f00e0; /* Select CS7 area, 32Mbyte size */
FM3_EXBUS->MODE7 |= (1<<4); /* Nand Flash mode turn on, set 8 bit width */
IO_NF_PFR = IO_NF_PFR & ~(NF_EN|NF_DATA_DIR);
IO_NF_DDR = IO_NF_DDR | (NF_EN|NF_DATA_DIR);
IO_NF_PDOR = IO_NF_PDOR | (NF_EN | NF_DATA_DIR); /* disable Flash operation */
/*Reset NAND*/
NF_Reset();
}
static void NF_UnInit(void)
{
FM3_GPIO->PFR5 &= ~(0x7ff); /* disable D0-D5, CS7, ALE, CLE, WEX, REX */
FM3_GPIO->PFR3 &= ~(0x3); /* disable D6-D7 */
FM3_GPIO->EPFR10 &= ~(1<<13 /* disable CS enable */
|1<<6 /* disable ALE, CLE, WEX, REX enable */
|1<<0); /* disable D0-D7 enable */
FM3_EXBUS->MODE7 &= ~(1<<4);
IO_NF_PFR = IO_NF_PFR & ~(NF_EN|NF_DATA_DIR);
IO_NF_DDR = IO_NF_DDR | (NF_EN|NF_DATA_DIR);
IO_NF_PDOR = IO_NF_PDOR | (NF_EN | NF_DATA_DIR); /* disable Flash operation */
}
/*
* @ Funciton: NF_ReadPage
* Parameter: block (max: 2048)
* page (max:32)
* buffer: pointer to data buffer
* Return: 0: Flash Operation OK
* 1: Flash Operation NG
*/
int NF_ReadPage(unsigned int block, unsigned int page, unsigned char *buffer,
unsigned char *oob)
{
unsigned int blockPage,i;
NF_Init();
blockPage=(block<<5)+page; /* 1 block=32 page */
NF_OE_L();
NF_DATA_OUT();
if (buffer != RT_NULL)
{
volatile unsigned char ch;
NF_CMD(NAND_CMD_READ0); /* send read data */
NF_ADDR(0);
NF_ADDR(blockPage & 0xff);
NF_ADDR((blockPage>>8) & 0xff); /* send 3 byte address */
NF_CLR_ALE();
NF_DATA_IN();
Wait(500);
for(i=0;i<512;i++) /* read 512 bytes data */
buffer[i] = NF_RDDATA();
for(i=0;i<16;i++) /* read 16 bytes oob */
if (oob != RT_NULL)
oob[i] = NF_RDDATA();
else
ch = NF_RDDATA();
}
else
{
NF_CMD(NAND_CMD_READOOB); /* send read data */
NF_ADDR(0);
NF_ADDR(blockPage & 0xff);
NF_ADDR((blockPage>>8) & 0xff); /* send 3 byte address */
NF_CLR_ALE();
NF_DATA_IN();
Wait(500);
for (i=0; i<16; i++) /* read 16 bytes oob */
oob[i] = NF_RDDATA();
}
NF_OE_H();
NF_UnInit();
return 0;
}
/*
* @ Funciton: NF_EraseBlock
* Parameter: block (max: 2048)
* Return: 0: Flash Operation OK
* 1: Flash Operation NG
*/
int NF_EraseBlock(unsigned int block)
{
rt_uint32_t blockPage;
trace_log("Erase block %d: ", block);
NF_Init();
blockPage = (block << 5);
NF_OE_L();
NF_DATA_OUT();
NF_CMD(NAND_CMD_ERASE1); /* send erase command */
NF_ADDR(blockPage & 0xff);
NF_ADDR((blockPage >> 8) & 0xff);
NF_CMD(NAND_CMD_ERASE2); /* start erase */
if(NF_ReadStatus())
{
NF_Reset();
NF_OE_H();
NF_UnInit();
trace_log("Failed\n");
rt_kprintf("erase block failed\n");
return FLASH_NG;
}
NF_OE_H();
NF_UnInit();
trace_log("OK\n");
return FLASH_OK;
}
/*
* @ Funciton: NF_WritePage
* Parameter: block (max: 2048)
* page (max:32)
* buffer: pointer to data buffer
* Return: 0: Flash Operation OK
* 1: Flash Operation NG
*/
int NF_WritePage(unsigned block, unsigned page, const rt_uint8_t *buffer)
{
unsigned int blockPage,i;
unsigned char se[16] = {0};
unsigned char data;
blockPage = (block<<5)+page;
NF_Init();
NF_OE_L();
NF_DATA_OUT();
NF_CMD(0x00); /* set programming area */
NF_CMD(NAND_CMD_SEQIN); /* send write command */
NF_ADDR(0);
NF_ADDR(blockPage & 0xff);
NF_ADDR((blockPage>>8) & 0xff);
NF_CLR_ALE();
for(i=0;i<512;i++) NF_WRDATA(buffer[i]); /* write data */
for(i=0;i<16;i++) NF_WRDATA(se[i]); /* dummy write */
NF_CMD(NAND_CMD_PAGEPROG); /* start programming */
if(NF_ReadStatus())
{
NF_Reset();
NF_OE_H();
NF_UnInit();
trace_log("write failed\n");
return FLASH_NG;
}
/* verify the write data */
NF_DATA_OUT();
NF_CMD(NAND_CMD_READ0); /* send read command */
NF_ADDR(0);
NF_ADDR(blockPage & 0xff);
NF_ADDR((blockPage>>8) & 0xff);
NF_CLR_ALE();
NF_DATA_IN();
Wait(500);
for(i=0; i<512; i++)
{
data=NF_RDDATA(); /* verify 1-512 byte */
if(data != buffer[i])
{
trace_log("block %d, page %d\n", block , page);
trace_log("write data failed[%d]: %02x %02x\n", i, data, buffer[i]);
NF_Reset();
NF_OE_H();
NF_UnInit();
return FLASH_NG;
}
}
for(i=0; i<16; i++)
{
data=NF_RDDATA(); /* verify 16 byte dummy data */
if(data != se[i])
{
trace_log("block %d, page %d\n", block , page);
trace_log("write oob failed[%d]: %02x %02x\n", i, data, se[i]);
NF_Reset();
NF_OE_H();
NF_UnInit();
return FLASH_NG;
}
}
NF_OE_H();
NF_UnInit();
return FLASH_OK;
}
/*
* @ Funciton: NF_ReadID
* Parameter: id: pointer to device ID
* Return: None
*/
void NF_ReadID(unsigned char *id)
{
unsigned char maker_code;
NF_Init();
NF_OE_L();
NF_DATA_OUT();
NF_CMD(NAND_CMD_READID);
NF_ADDR(0x00);
NF_CLR_ALE();
Wait(10);
NF_DATA_IN();
maker_code = NF_RDDATA();
maker_code = maker_code;
*id = NF_RDDATA();
NF_OE_H();
NF_UnInit();
}
static rt_err_t rt_nand_init (rt_device_t dev)
{
/* empty implementation */
return RT_EOK;
}
static rt_err_t rt_nand_open(rt_device_t dev, rt_uint16_t oflag)
{
/* empty implementation */
return RT_EOK;
}
static rt_err_t rt_nand_close(rt_device_t dev)
{
/* empty implementation */
return RT_EOK;
}
/* nand device read */
static rt_size_t rt_nand_read (rt_device_t dev, rt_off_t pos, void* buffer,
rt_size_t size)
{
rt_ubase_t block; /* block of position */
rt_ubase_t page, index; /* page in block of position */
rt_uint8_t *page_ptr, oob[16];
struct rt_device_nand *nand;
/* get nand device */
nand = (struct rt_device_nand*) dev;
RT_ASSERT(nand != RT_NULL);
/* get block and page */
block = pos / nand->page_per_block;
page = pos % nand->page_per_block;
trace_log("nand read: position %d, block %d, page %d, size %d\n",
pos, block, page, size);
/* set page buffer pointer */
page_ptr = (rt_uint8_t*) buffer;
for (index = 0; index < size; index ++)
{
NF_ReadPage(block, page + index, page_ptr, oob);
page_ptr += nand->page_size;
if (page + index > nand->page_per_block)
{
block += 1;
page = 0;
}
}
/* return read size (count of block) */
return size;
}
/*
* write pages by erase block first
* @param nand the nand device driver
* @param block the block of page
* @param page the page
* @param buffer the data buffer to be written
* @param pages the number of pages to be written
*/
static int rt_nand_eraseblock_writepage(struct rt_device_nand* nand,
rt_ubase_t block, rt_ubase_t page,
const rt_uint8_t *buffer, rt_ubase_t pages)
{
rt_ubase_t index;
rt_uint32_t page_status;
rt_uint8_t *page_ptr, oob[16];
/* set page status */
page_status = 0;
/* read each page in block */
page_ptr = nand->block_buffer;
for (index = 0; index < nand->page_per_block; index ++)
{
NF_ReadPage(block, index, page_ptr, oob);
if (!oob[0])
page_status |= (1 << index);
page_ptr += nand->page_size;
}
/* erase block */
NF_EraseBlock(block);
page_ptr = &(nand->block_buffer[page * nand->page_size]);
/* merge buffer to page buffer */
for (index = 0; index < pages; index ++)
{
rt_memcpy(page_ptr, buffer, nand->page_size);
/* set page status */
page_status |= (1 << (page + index));
/* move to next page */
page_ptr += nand->page_size;
buffer += nand->page_size;
}
/* write to flash */
page_ptr = nand->block_buffer;
for (index = 0; index < nand->page_per_block; index ++)
{
if (page_status & (1 << index))
NF_WritePage(block, index, page_ptr);
/* move to next page */
page_ptr += nand->page_size;
}
return 0;
}
/* nand device write */
static rt_size_t rt_nand_write (rt_device_t dev, rt_off_t pos,
const void* buffer, rt_size_t size)
{
rt_ubase_t block, page;
rt_uint8_t oob[16];
struct rt_device_nand *nand;
nand = (struct rt_device_nand*) dev;
RT_ASSERT(nand != RT_NULL);
/* get block and page */
block = pos / nand->page_per_block;
page = pos % nand->page_per_block;
trace_log("nand write: position %d, block %d, page %d, size %d\n",
pos, block, page, size);
if (size == 1)
{
/* write one page */
/* read oob to get page status */
NF_ReadPage(block, page, RT_NULL, oob);
if (oob[0])
NF_WritePage(block, page, buffer);
else
/* erase block and then write page */
rt_nand_eraseblock_writepage(nand, block, page, buffer, 1);
}
else if (size > 1)
{
rt_ubase_t index;
rt_ubase_t need_erase_block;
const rt_uint8_t *page_ptr;
rt_ubase_t chunk_pages, pages;
pages = size;
page_ptr = (const rt_uint8_t*) buffer;
do
{
need_erase_block = 0;
/* calculate pages in current chunk */
if (pages > nand->page_per_block - page)
chunk_pages = nand->page_per_block - page;
else
chunk_pages = pages;
/* get page status in current block */
for (index = page; index < page + chunk_pages; index ++)
{
NF_ReadPage(block, index, RT_NULL, oob);
if (!oob[0])
{
/* this page has data, need erase this block firstly */
need_erase_block = 1;
break;
}
}
if (need_erase_block)
{
/* erase block and then write it */
rt_nand_eraseblock_writepage(nand, block, page, page_ptr, chunk_pages);
page_ptr += chunk_pages * nand->page_size;
}
else
{
/* write pages directly */
for (index = page; index < page + chunk_pages; index ++)
{
NF_WritePage(block, index, page_ptr);
page_ptr += nand->page_size;
}
}
pages -= chunk_pages;
page = 0; block ++; /* move to next block */
}
while (pages);
}
return size;
}
static rt_err_t rt_nand_control (rt_device_t dev, rt_uint8_t cmd, void *args)
{
struct rt_device_nand *nand;
nand = (struct rt_device_nand*) dev;
RT_ASSERT(dev != RT_NULL);
switch (cmd)
{
case RT_DEVICE_CTRL_BLK_GETGEOME:
{
struct rt_device_blk_geometry *geometry;
geometry = (struct rt_device_blk_geometry *)args;
if (geometry == RT_NULL) return -RT_ERROR;
geometry->bytes_per_sector = nand->page_size;
geometry->block_size = nand->page_size * nand->page_per_block;
geometry->sector_count = nand->block_num * nand->page_per_block;
}
break;
}
return RT_EOK;
}
void rt_hw_nand_init(void)
{
/* initialize nand flash structure */
_nand.block_num = BLOCK_NUM;
_nand.page_per_block = PAGE_PER_BLOCK;
_nand.page_size = PAGE_SIZE;
rt_memset(_nand.block_buffer, 0, sizeof(_nand.block_buffer));
_nand.parent.type = RT_Device_Class_MTD;
_nand.parent.rx_indicate = RT_NULL;
_nand.parent.tx_complete = RT_NULL;
_nand.parent.init = rt_nand_init;
_nand.parent.open = rt_nand_open;
_nand.parent.close = rt_nand_close;
_nand.parent.read = rt_nand_read;
_nand.parent.write = rt_nand_write;
_nand.parent.control = rt_nand_control;
/* register a MTD device */
rt_device_register(&(_nand.parent), "nand", RT_DEVICE_FLAG_RDWR);
}
#ifdef NAND_DEBUG
#include <finsh.h>
unsigned char nand_buffer[512];
unsigned char nand_oob[16];
void dump_mem(unsigned char* buffer, int length)
{
int i;
if (length > 64) length = 64;
for (i = 0; i < length; i ++)
{
rt_kprintf("%02x ", *buffer++);
if (((i+1) % 16) == 0)
rt_kprintf("\n");
}
rt_kprintf("\n");
}
void nand_read(int block, int page)
{
rt_kprintf("read block %d, page %d\n", block, page);
NF_ReadPage(block, page, nand_buffer, nand_oob);
rt_kprintf("page data:\n");
dump_mem(nand_buffer, 512);
rt_kprintf("oob data:\n");
dump_mem(nand_oob, 16);
}
FINSH_FUNCTION_EXPORT_ALIAS(nand_read, read_page, read page[block/page]);
void nand_write(int block, int page)
{
int i;
for (i = 0; i < 512; i ++)
nand_buffer[i] = i;
NF_WritePage(block, page, nand_buffer);
}
FINSH_FUNCTION_EXPORT_ALIAS(nand_write, write_page, write page[block/page]);
void nand_erase(int block)
{
NF_EraseBlock(block);
}
FINSH_FUNCTION_EXPORT_ALIAS(nand_erase, erase_block, erase block[block]);
void nand_readoob(int block, int page)
{
rt_kprintf("read oob on block %d, page %d\n", block, page);
NF_ReadPage(block, page, RT_NULL, (unsigned char*)nand_oob);
rt_kprintf("oob data:\n");
dump_mem(nand_oob, 16);
}
FINSH_FUNCTION_EXPORT_ALIAS(nand_readoob, readoob, read oob[block/page]);
void nand_erase_chip()
{
int i;
unsigned char id;
NF_ReadID(&id);
rt_kprintf("id: %02x\n", id);
for (i = 0; i < 2048; i ++)
{
NF_EraseBlock(i);
}
}
FINSH_FUNCTION_EXPORT_ALIAS(nand_erase_chip, erase_chip, erase whole chip);
#endif
/*
* File : nand.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2011-05-25 Bernard first version
*/
#ifndef __NAND_H__
#define __NAND_H__
#include <rtthread.h>
#define IO_NF_PFR FM3_GPIO->PFR3
#define IO_NF_DDR FM3_GPIO->DDR3
#define IO_NF_PDOR FM3_GPIO->PDOR3
#define NF_EN 0x0008
#define NF_DATA_DIR 0x0004
#define EXT_BUS_BASE_ADDR 0x60000000
#define EXT_CS7_OFFSET 0x0E000000
#define EXT_CS7_SIZE 0x02000000
#define NF_FLASH_BASE_ADDR (EXT_BUS_BASE_ADDR+EXT_CS7_OFFSET)
#define NF_ALE_OFFSET 0x00003000
#define NF_ADDR_OFFSET 0x00002000
#define NF_CMD_OFFSET 0x00001000
#define NF_DATA_OFFSET 0x00000000
/* NAND command */
#define NAND_CMD_READ0 0x00
#define NAND_CMD_READ1 0x01
#define NAND_CMD_PAGEPROG 0x10
#define NAND_CMD_READOOB 0x50
#define NAND_CMD_ERASE1 0x60
#define NAND_CMD_STATUS 0x70
#define NAND_CMD_SEQIN 0x80
#define NAND_CMD_READID 0x90
#define NAND_CMD_READID1 0x91
#define NAND_CMD_ERASE2 0xd0
#define NAND_CMD_RESET 0xff
#define FLASH_OK 0
#define FLASH_NG 1
/* nand flash device initialization */
void rt_hw_nand_init(void);
#endif
......@@ -3,7 +3,7 @@
#define __RTTHREAD_CFG_H__
/* RT_NAME_MAX*/
#define RT_NAME_MAX 8
#define RT_NAME_MAX 4
/* RT_ALIGN_SIZE*/
#define RT_ALIGN_SIZE 4
......@@ -56,7 +56,7 @@
#define RT_UART_RX_BUFFER_SIZE 64
/* SECTION: Console options */
//#define RT_TINY_SIZE
/* #define RT_TINY_SIZE */
#define RT_USING_CONSOLE
/* the buffer size of console */
#define RT_CONSOLEBUF_SIZE 128
......@@ -67,54 +67,24 @@
/* Using symbol table */
#define FINSH_USING_SYMTAB
#define FINSH_USING_DESCRIPTION
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_THREAD_STACK_SIZE 1024
/* SECTION: Device filesystem support */
/* using DFS support */
/* #define RT_USING_DFS */
/* #define RT_USING_DFS_ELMFAT */
#define RT_USING_DFS
#define RT_USING_DFS_ELMFAT
/* use long file name feature */
#define RT_DFS_ELM_USE_LFN 1
/* #define RT_DFS_ELM_USE_LFN */
/* the max number of file length */
#define RT_DFS_ELM_MAX_LFN 32
/* #define RT_USING_DFS_YAFFS2 */
#define RT_DFS_ELM_MAX_LFN 32
/* #define RT_USING_DFS_UFFS */
/* #define RT_USING_DFS_DEVFS */
//#define RT_USING_DFS_NFS
//#define RT_NFS_HOST_EXPORT "192.168.1.5:/"
#define DFS_USING_WORKDIR
/* the max number of mounted filesystem */
#define DFS_FILESYSTEMS_MAX 4
#define DFS_FILESYSTEMS_MAX 2
/* the max number of opened files */
#define DFS_FD_MAX 16
/* the max number of cached sector */
#define DFS_CACHE_MAX_NUM 4
/* SECTION: RTGUI support */
/* using RTGUI support */
//#define RT_USING_RTGUI
/* name length of RTGUI object */
#define RTGUI_NAME_MAX 16
/* support 16 weight font */
//#define RTGUI_USING_FONT16
/* support 12 weight font */
#define RTGUI_USING_FONT12
/* support Chinese font */
//#define RTGUI_USING_FONTHZ
/* use DFS as file interface */
//#define RTGUI_USING_DFS_FILERW
/* use font file as Chinese font */
/* #define RTGUI_USING_HZ_FILE */
/* use Chinese bitmap font */
//#define RTGUI_USING_HZ_BMP
/* use small size in RTGUI */
//#define RTGUI_USING_SMALL_SIZE
/* use mouse cursor */
/* #define RTGUI_USING_MOUSE_CURSOR */
#define RTGUI_DEFAULT_FONT_SIZE 12
#define DFS_FD_MAX 8
/* using working directory */
#define DFS_USING_WORKDIR
#endif
......@@ -5,12 +5,12 @@
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-03-13 Bernard first version
* 2009-04-20 yi.qiu modified according bernard's stm32 version
* 2011-05-15 lgnq modified according bernard's implementaion.
*/
#include <rtthread.h>
......@@ -32,7 +32,6 @@ static rt_err_t rt_serial_init (rt_device_t dev)
if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
{
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{
rt_memset(uart->int_rx->rx_buffer, 0,
......@@ -79,20 +78,39 @@ static void rt_serial_savechar(struct serial_device* uart, char ch)
}
static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
{
RT_ASSERT(dev != RT_NULL);
{
struct serial_device* uart;
RT_ASSERT(dev != RT_NULL);
uart = (struct serial_device*) dev->user_data;
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{
/* enable interrupt */
UART_ENABLE_IRQ(uart->rx_irq);
}
return RT_EOK;
}
static rt_err_t rt_serial_close(rt_device_t dev)
{
struct serial_device* uart;
RT_ASSERT(dev != RT_NULL);
uart = (struct serial_device*) dev->user_data;
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{
/* disable interrupt */
UART_DISABLE_IRQ(uart->rx_irq);
}
return RT_EOK;
}
static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer,
rt_size_t size)
{
rt_uint8_t* ptr;
rt_err_t err_code;
......@@ -150,7 +168,8 @@ static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt
return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
}
static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos,
const void* buffer, rt_size_t size)
{
rt_uint8_t* ptr;
rt_err_t err_code;
......@@ -233,7 +252,8 @@ static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args)
/*
* serial register
*/
rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial)
rt_err_t rt_hw_serial_register(rt_device_t device, const char* name,
rt_uint32_t flag, struct serial_device *serial)
{
RT_ASSERT(device != RT_NULL);
......@@ -246,12 +266,12 @@ rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t
device->read = rt_serial_read;
device->write = rt_serial_write;
device->control = rt_serial_control;
device->user_data = serial;
device->user_data = serial;
/* register a character device */
return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
}
/* ISR for serial interrupt */
void rt_hw_serial_isr(rt_device_t device)
{
......@@ -280,4 +300,49 @@ void rt_hw_serial_isr(rt_device_t device)
}
}
#ifdef RT_USING_UART2
/* UART2 device driver structure */
#define UART2 FM3_MFS2_UART
struct serial_int_rx uart2_int_rx;
struct serial_device uart2 =
{
UART2,
MFS2RX_IRQn,
MFS2TX_IRQn,
&uart2_int_rx,
RT_NULL
};
struct rt_device uart2_device;
void MFS2RX_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
rt_hw_serial_isr(&uart2_device);
/* leave interrupt */
rt_interrupt_leave();
}
#endif
void rt_hw_serial_init(void)
{
#ifdef RT_USING_UART2
/* initialize UART2 */
/* Set Uart Ch2 Port, SIN2_1, SOT2_1 */
FM3_GPIO->PFR2 = FM3_GPIO->PFR2 | 0x0030;
FM3_GPIO->EPFR07 = FM3_GPIO->EPFR07 | 0x000a0000;
uart2.uart_device->SMR = SMR_MD_UART | SMR_SOE;;
uart2.uart_device->BGR = (40000000UL + (BPS/2))/BPS - 1;
uart2.uart_device->ESCR = ESCR_DATABITS_8;
uart2.uart_device->SCR = SCR_RXE | SCR_TXE | SCR_RIE;
/* register UART2 device */
rt_hw_serial_register(&uart2_device,
"uart2",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
&uart2);
#endif
}
/*@}*/
/*
* File : serial.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-03-13 Bernard first version
* 2011-05-15 lgnq modified according bernard's implementaion.
*/
#ifndef __RT_HW_SERIAL_H__
#define __RT_HW_SERIAL_H__
......@@ -69,16 +84,16 @@ struct serial_int_tx
struct serial_device
{
FM3_MFS03_UART_TypeDef* uart_device;
/* irq number */
IRQn_Type rx_irq, tx_irq;
/* rx structure */
struct serial_int_rx* int_rx;
/* tx structure */
struct serial_int_tx* int_tx;
};
rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial);
void rt_hw_serial_isr(rt_device_t device);
void rt_hw_serial_init(void);
#endif
......@@ -58,10 +58,6 @@ void rtthread_startup(void)
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();
......@@ -79,27 +75,12 @@ void rtthread_startup(void)
/* init scheduler system */
rt_system_scheduler_init();
#ifdef RT_USING_DEVICE
/* register uart0 */
rt_hw_serial_register(&uart0_device, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
&uart0);
/* register uart2, used for RTI debug */
rt_hw_serial_register(&uart2_device, "uart2",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
&uart2);
#ifdef RT_USING_DFS
#ifdef RT_USING_DFS_UFFS
rt_hw_nand_init();
#endif
#endif
/*init all registed devices */
rt_device_init_all();
#endif
/* init application */
rt_application_init();
......@@ -110,7 +91,7 @@ void rtthread_startup(void)
finsh_set_device("uart2");
#endif
#endif
/* init timer thread */
rt_system_timer_thread_init();
......@@ -126,10 +107,8 @@ void rtthread_startup(void)
int main(void)
{
rt_uint32_t UNUSED level;
/* disable interrupt first */
level = rt_hw_interrupt_disable();
rt_hw_interrupt_disable();
/* init system setting */
SystemInit();
......
......@@ -52,7 +52,7 @@
IMPORT rt_hw_pend_sv
IMPORT rt_hw_timer_handler
#ifdef RT_USING_UART2
IMPORT rt_hw_uart2_rx_handler
IMPORT MFS2RX_IRQHandler
#endif
PUBLIC __low_level_init
......@@ -113,7 +113,7 @@ __vector_table
DCD EXTI3_IRQHandler ; EXTI Line 3
DCD EXTI4_IRQHandler ; EXTI Line 4
#ifdef RT_USING_UART2
DCD rt_hw_uart2_rx_handler
DCD MFS2RX_IRQHandler
#else
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
#endif
......
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