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  1. 08 12月, 2007 35 次提交
  3. 07 12月, 2007 5 次提交
    • H
      [AVR32] Fix wrong pt_regs in critical exception handler · 5998a3cf
      由 Haavard Skinnemoen 提交于 
      It's not like it really matters at this point since the system is
dying anyway, but handle_critical pushes too few registers on the
stack so the register dump, which makes the register dump look a bit
strange. This patch fixes it.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      5998a3cf
    • H
      [AVR32] Fix copy_to_user_page() breakage · 68ca3e53
      由 Haavard Skinnemoen 提交于 
      The current implementation of copy_to_user_page() gives "vaddr" to the
cache instruction when trying to sync the icache with the dcache. If
vaddr does not exist in the TLB, the CPU will silently abort the
operation, which may result in the caches staying out of sync.

To fix this, pass the "dst" parameter to flush_icache_range() instead
-- we know this is valid because we just wrote to it.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      68ca3e53
    • H
      [AVR32] Follow the rules when dealing with the OCD system · 2507bc13
      由 Haavard Skinnemoen 提交于 
      The current debug trap handling code does a number of things that are
illegal according to the AVR32 Architecture manual. Most importantly,
it may try to schedule from Debug Mode, thus clearing the D bit, which
can lead to "undefined behaviour".

It seems like this works in most cases, but several people have
observed somewhat unstable behaviour when debugging programs,
including soft lockups. So there's definitely something which is not
right with the existing code.

The new code will never schedule from Debug mode, it will always exit
Debug mode with a "retd" instruction, and if something not running in
Debug mode needs to do something debug-related (like doing a single
step), it will enter debug mode through a "breakpoint" instruction.
The monitor code will then return directly to user space, bypassing
its own saved registers if necessary (since we don't actually care
about the trapped context, only the one that came before.)

This adds three instructions to the common exception handling code,
including one branch. It does not touch super-hot paths like the TLB
miss handler.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      2507bc13
    • H
      [AVR32] Clean up OCD register usage · 8dfe8f29
      由 Haavard Skinnemoen 提交于 
      Generate a new set of OCD register definitions in asm/ocd.h and rename
__mfdr() and __mtdr() to ocd_read() and ocd_write() respectively.

The bitfield definitions are a lot more complete now, and they are
entirely based on bit numbers, not masks. This is because OCD
registers are frequently accessed from assembly code, where bit
numbers are a lot more useful (can be fed directly to sbr, bfins,
etc.)

Bitfields that consist of more than one bit have two definitions:
_START, which indicates the number of the first bit, and _SIZE, which
indicates the number of bits. These directly correspond to the
parameters taken by the bfextu, bfexts and bfins instructions.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      8dfe8f29
    • H
      [AVR32] Implement irqflags trace and lockdep support · 320516b7
      由 Haavard Skinnemoen 提交于 
      Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      320516b7