apps: add basic hpmdriver

apps/hpmdriver/Makefile

+NAME = hpmdriver
+SRCS = hpmdriver.c
+include $(AM_HOME)/Makefile.app

apps/hpmdriver/events.h

+#ifndef __EVENTS_H__
+#define __EVENTS_H__
+
+#define Frontend_noEvent 0
+#define Frontend_frontendFlush 1
+#define Frontend_ifu_req 2
+#define Frontend_ifu_miss 3
+#define Frontend_ifu_req_cacheline_0 4
+#define Frontend_ifu_req_cacheline_1 5
+#define Frontend_ifu_req_cacheline_0_hit 6
+#define Frontend_ifu_req_cacheline_1_hit 7
+#define Frontend_only_0_hit 8
+#define Frontend_only_0_miss 9
+#define Frontend_hit_0_hit_1 10
+#define Frontend_hit_0_miss_1 11
+#define Frontend_miss_0_hit_1 12
+#define Frontend_miss_0_miss_1 13
+#define Frontend_IBuffer_Flushed 14
+#define Frontend_IBuffer_hungry 15
+#define Frontend_IBuffer_1_4_valid 16
+#define Frontend_IBuffer_2_4_valid 17
+#define Frontend_IBuffer_3_4_valid 18
+#define Frontend_IBuffer_4_4_valid 19
+#define Frontend_IBuffer_full 20
+#define Frontend_Front_Bubble 21
+#define Frontend_icache_miss_cnt 22
+#define Frontend_icache_miss_penalty 23
+#define Frontend_bpu_s2_redirect 24
+#define Frontend_bpu_s3_redirect 25
+#define Frontend_bpu_to_ftq_stall 26
+#define Frontend_mispredictRedirect 27
+#define Frontend_replayRedirect 28
+#define Frontend_predecodeRedirect 29
+#define Frontend_to_ifu_bubble 30
+#define Frontend_from_bpu_real_bubble 31
+#define Frontend_BpInstr 32
+#define Frontend_BpBInstr 33
+#define Frontend_BpRight 34
+#define Frontend_BpWrong 35
+#define Frontend_BpBRight 36
+#define Frontend_BpBWrong 37
+#define Frontend_BpJRight 38
+#define Frontend_BpJWrong 39
+#define Frontend_BpIRight 40
+#define Frontend_BpIWrong 41
+#define Frontend_BpCRight 42
+#define Frontend_BpCWrong 43
+#define Frontend_BpRRight 44
+#define Frontend_BpRWrong 45
+#define Frontend_ftb_false_hit 46
+#define Frontend_ftb_hit 47
+#define Frontend_tage_tht_hit 48
+#define Frontend_sc_update_on_mispred 49
+#define Frontend_sc_update_on_unconf 50
+#define Frontend_ftb_commit_hits 51
+#define Frontend_ftb_commit_misses 52
+#define CSR_Hc 0
+#define CSR_Hc_1 1
+#define CSR_Hc_2 2
+#define CSR_Hc_3 3
+#define CSR_Hc_4 4
+#define CSR_Hc_5 5
+#define CSR_Hc_6 6
+#define CSR_Hc_7 7
+#define CSR_Hc_8 8
+#define CSR_Hc_9 9
+#define CSR_Hc_10 10
+#define CSR_Hc_11 11
+#define CSR_Hc_12 12
+#define CSR_Hc_13 13
+#define CSR_Hc_14 14
+#define CSR_Hc_15 15
+#define CSR_Hc_16 16
+#define CSR_Hc_17 17
+#define CSR_Hc_18 18
+#define CSR_Hc_19 19
+#define CSR_Hc_20 20
+#define CSR_Hc_21 21
+#define CSR_Hc_22 22
+#define CSR_Hc_23 23
+#define CSR_Hc_24 24
+#define MemBlock_noEvent 0
+#define MemBlock_lu0_load_s0_in_fire 1
+#define MemBlock_lu0_load_to_load_forward 2
+#define MemBlock_lu0_stall_dcache 3
+#define MemBlock_lu0_addr_spec_success 4
+#define MemBlock_lu0_addr_spec_failed 5
+#define MemBlock_lu0_load_s1_in_fire 6
+#define MemBlock_lu0_load_s1_tlb_miss 7
+#define MemBlock_lu0_load_s2_in_fire 8
+#define MemBlock_lu0_load_s2_dcache_miss 9
+#define MemBlock_lu0_load_s2_replay 10
+#define MemBlock_lu0_load_s2_replay_tlb_miss 11
+#define MemBlock_lu0_load_s2_replay_cache 12
+#define MemBlock_lu1_load_s0_in_fire 13
+#define MemBlock_lu1_load_to_load_forward 14
+#define MemBlock_lu1_stall_dcache 15
+#define MemBlock_lu1_addr_spec_success 16
+#define MemBlock_lu1_addr_spec_failed 17
+#define MemBlock_lu1_load_s1_in_fire 18
+#define MemBlock_lu1_load_s1_tlb_miss 19
+#define MemBlock_lu1_load_s2_in_fire 20
+#define MemBlock_lu1_load_s2_dcache_miss 21
+#define MemBlock_lu1_load_s2_replay 22
+#define MemBlock_lu1_load_s2_replay_tlb_miss 23
+#define MemBlock_lu1_load_s2_replay_cache 24
+#define MemBlock_lu1_sbuffer_req_valid 25
+#define MemBlock_sbuffer_req_fire 26
+#define MemBlock_sbuffer_merge 27
+#define MemBlock_sbuffer_newline 28
+#define MemBlock_dcache_req_valid 29
+#define MemBlock_dcache_req_fire 30
+#define MemBlock_sbuffer_idle 31
+#define MemBlock_sbuffer_flush 32
+#define MemBlock_sbuffer_replace 33
+#define MemBlock_mpipe_resp_valid 34
+#define MemBlock_refill_resp_valid 35
+#define MemBlock_replay_resp_valid 36
+#define MemBlock_coh_timeout 37
+#define MemBlock_sbuffer_1_4_valid 38
+#define MemBlock_sbuffer_2_4_valid 39
+#define MemBlock_sbuffer_3_4_valid 40
+#define MemBlock_sbuffer_full_valid 41
+#define MemBlock_lq_rollback 42
+#define MemBlock_lq_mmioCycle 43
+#define MemBlock_lq_mmio_Cnt 44
+#define MemBlock_lq_refill 45
+#define MemBlock_lq_writeback_success 46
+#define MemBlock_lq_writeback_blocked 47
+#define MemBlock_ltq_1_4_valid 48
+#define MemBlock_ltq_2_4_valid 49
+#define MemBlock_ltq_3_4_valid 50
+#define MemBlock_ltq_4_4_valid 51
+#define MemBlock_sq_mmioCycle 52
+#define MemBlock_sq_mmioCnt 53
+#define MemBlock_sq_mmio_wb_success 54
+#define MemBlock_sq_mmio_wb_blocked 55
+#define MemBlock_stq_1_4_valid 56
+#define MemBlock_stq_2_4_valid 57
+#define MemBlock_stq_3_4_valid 58
+#define MemBlock_stq_4_4_valid 59
+#define MemBlock_dcache_wbq_req 60
+#define MemBlock_dcache_wbq_1_4_valid 61
+#define MemBlock_dcache_wbq_2_4_valid 62
+#define MemBlock_dcache_wbq_3_4_valid 63
+#define MemBlock_dcache_wbq_4_4_valid 64
+#define MemBlock_dcache_mp_req 65
+#define MemBlock_dcache_mp_total_penalty 66
+#define MemBlock_dcache_missq_req 67
+#define MemBlock_dcache_missq_1_4_valid 68
+#define MemBlock_dcache_missq_2_4_valid 69
+#define MemBlock_dcache_missq_3_4_valid 70
+#define MemBlock_dcache_missq_4_4_valid 71
+#define MemBlock_dcache_probq_req 72
+#define MemBlock_dcache_probq_1_4_valid 73
+#define MemBlock_dcache_probq_2_4_valid 74
+#define MemBlock_dcache_probq_3_4_valid 75
+#define MemBlock_dcache_probq_4_4_valid 76
+#define MemBlock_loadpipe0_load_req 77
+#define MemBlock_loadpipe0_load_replay 78
+#define MemBlock_loadpipe0_load_replay_for_data_nack 79
+#define MemBlock_loadpipe0_load_replay_for_no_mshr 80
+#define MemBlock_loadpipe0_load_replay_for_conflict 81
+#define MemBlock_loadpipe1_load_req 82
+#define MemBlock_loadpipe1_load_replay 83
+#define MemBlock_loadpipe1_load_replay_for_data_nack 84
+#define MemBlock_loadpipe1_load_replay_for_no_mshr 85
+#define MemBlock_loadpipe1_load_replay_for_conflict 86
+#define MemBlock_perfEventsPTW_0 87
+#define MemBlock_perfEventsPTW_1 88
+#define MemBlock_perfEventsPTW_2 89
+#define MemBlock_perfEventsPTW_3 90
+#define MemBlock_perfEventsPTW_4 91
+#define MemBlock_perfEventsPTW_5 92
+#define MemBlock_perfEventsPTW_6 93
+#define MemBlock_perfEventsPTW_7 94
+#define MemBlock_perfEventsPTW_8 95
+#define MemBlock_perfEventsPTW_9 96
+#define MemBlock_perfEventsPTW_10 97
+#define MemBlock_perfEventsPTW_11 98
+#define MemBlock_perfEventsPTW_12 99
+#define MemBlock_perfEventsPTW_13 100
+#define MemBlock_perfEventsPTW_14 101
+#define MemBlock_perfEventsPTW_15 102
+#define MemBlock_perfEventsPTW_16 103
+#define MemBlock_perfEventsPTW_17 104
+#define MemBlock_perfEventsPTW_18 105
+#define MemBlock_ldDeqCount 106
+#define MemBlock_stDeqCount 107
+#define CtrlBlock_noEvent 0
+#define CtrlBlock_decoder_fused_instr 1
+#define CtrlBlock_decoder_waitInstr 2
+#define CtrlBlock_decoder_stall_cycle 3
+#define CtrlBlock_decoder_utilization 4
+#define CtrlBlock_rename_in 5
+#define CtrlBlock_rename_waitinstr 6
+#define CtrlBlock_rename_stall_cycle_dispatch 7
+#define CtrlBlock_rename_stall_cycle_fp 8
+#define CtrlBlock_rename_stall_cycle_int 9
+#define CtrlBlock_rename_stall_cycle_walk 10
+#define CtrlBlock_me_freelist_1_4_valid 11
+#define CtrlBlock_me_freelist_2_4_valid 12
+#define CtrlBlock_me_freelist_3_4_valid 13
+#define CtrlBlock_me_freelist_4_4_valid 14
+#define CtrlBlock_std_freelist_1_4_valid 15
+#define CtrlBlock_std_freelist_2_4_valid 16
+#define CtrlBlock_std_freelist_3_4_valid 17
+#define CtrlBlock_std_freelist_4_4_valid 18
+#define CtrlBlock_dispatch_in 19
+#define CtrlBlock_dispatch_empty 20
+#define CtrlBlock_dispatch_utili 21
+#define CtrlBlock_dispatch_waitinstr 22
+#define CtrlBlock_dispatch_stall_cycle_lsq 23
+#define CtrlBlock_dispatch_stall_cycle_rob 24
+#define CtrlBlock_dispatch_stall_cycle_int_dq 25
+#define CtrlBlock_dispatch_stall_cycle_fp_dq 26
+#define CtrlBlock_dispatch_stall_cycle_ls_dq 27
+#define CtrlBlock_intdq_dispatchq_in 28
+#define CtrlBlock_intdq_dispatchq_out 29
+#define CtrlBlock_intdq_dispatchq_out_try 30
+#define CtrlBlock_intdq_dispatchq_fake_block 31
+#define CtrlBlock_intdq_dispatchq_1_4_valid 32
+#define CtrlBlock_intdq_dispatchq_2_4_valid 33
+#define CtrlBlock_intdq_dispatchq_3_4_valid 34
+#define CtrlBlock_intdq_dispatchq_4_4_valid 35
+#define CtrlBlock_fpdq_dispatchq_in 36
+#define CtrlBlock_fpdq_dispatchq_out 37
+#define CtrlBlock_fpdq_dispatchq_out_try 38
+#define CtrlBlock_fpdq_dispatchq_fake_block 39
+#define CtrlBlock_fpdq_dispatchq_1_4_valid 40
+#define CtrlBlock_fpdq_dispatchq_2_4_valid 41
+#define CtrlBlock_fpdq_dispatchq_3_4_valid 42
+#define CtrlBlock_fpdq_dispatchq_4_4_valid 43
+#define CtrlBlock_lsdq_dispatchq_in 44
+#define CtrlBlock_lsdq_dispatchq_out 45
+#define CtrlBlock_lsdq_dispatchq_out_try 46
+#define CtrlBlock_lsdq_dispatchq_fake_block 47
+#define CtrlBlock_lsdq_dispatchq_1_4_valid 48
+#define CtrlBlock_lsdq_dispatchq_2_4_valid 49
+#define CtrlBlock_lsdq_dispatchq_3_4_valid 50
+#define CtrlBlock_lsdq_dispatchq_4_4_valid 51
+#define CtrlBlock_rob_interrupt_num 52
+#define CtrlBlock_rob_exception_num 53
+#define CtrlBlock_rob_flush_pipe_num 54
+#define CtrlBlock_rob_replay_inst_num 55
+#define CtrlBlock_rob_commitUop 56
+#define CtrlBlock_rob_commitInstr 57
+#define CtrlBlock_rob_commitInstrMove 58
+#define CtrlBlock_rob_commitInstrFused 59
+#define CtrlBlock_rob_commitInstrLoad 60
+#define CtrlBlock_rob_commitInstrLoad_1 61
+#define CtrlBlock_rob_commitInstrLoadWait 62
+#define CtrlBlock_rob_commitInstrStore 63
+#define CtrlBlock_rob_walkInstr 64
+#define CtrlBlock_rob_walkCycle 65
+#define CtrlBlock_rob_1_4_valid 66
+#define CtrlBlock_rob_2_4_valid 67
+#define CtrlBlock_rob_3_4_valid 68
+#define CtrlBlock_rob_4_4_valid 69
+#define CtrlBlock_perfEventsEu0_0 70
+#define CtrlBlock_perfEventsEu0_1 71
+#define CtrlBlock_perfEventsEu0_2 72
+#define CtrlBlock_perfEventsEu0_3 73
+#define CtrlBlock_perfEventsEu0_4 74
+#define CtrlBlock_perfEventsEu0_5 75
+#define CtrlBlock_perfEventsEu1_0 76
+#define CtrlBlock_perfEventsEu1_1 77
+#define CtrlBlock_perfEventsEu1_2 78
+#define CtrlBlock_perfEventsEu1_3 79
+#define CtrlBlock_perfEventsEu1_4 80
+#define CtrlBlock_perfEventsEu1_5 81
+#define CtrlBlock_perfEventsRs_0 82
+#define CtrlBlock_perfEventsRs_1 83
+#define CtrlBlock_perfEventsRs_2 84
+#define CtrlBlock_perfEventsRs_3 85
+#define CtrlBlock_perfEventsRs_4 86
+#define CtrlBlock_perfEventsRs_5 87
+#define CtrlBlock_perfEventsRs_6 88
+#define CtrlBlock_perfEventsRs_7 89
+
+#endif // __EVENTS_H__

apps/hpmdriver/hpmdriver.c

+#include "hpmdriver.h"
+
+#define PRINT_SEP(...) printf("-------------------- %s --------------------\n", __VA_ARGS__);
+
+int main() {
+    printf("Hello, XiangShan!\n");
+    printf("marchid: %ld\n", csr_read(marchid));
+    printf("mcountinhibit: %ld\n", csr_read(mcountinhibit));
+    printf("mcounteren: %ld\n", csr_read(mcounteren));
+    printf("scounteren: %ld\n", csr_read(scounteren));
+    
+    printf("mcycle: %ld\n", csr_read(mcycle));
+    printf("minstret: %ld\n", csr_read(minstret));
+
+#if 1
+    uint64_t set_mode_M = (0x1UL << 63);
+    // ===== frontend ==================================================
+    csr_write(mhpmevent3, csr_read(mhpmevent3)|set_mode_M);
+    csr_write(mhpmevent4, csr_read(mhpmevent4)|set_mode_M|0x1UL);
+    csr_write(mhpmevent5, csr_read(mhpmevent5)|set_mode_M|0x2UL);
+    csr_write(mhpmevent6, csr_read(mhpmevent6)|set_mode_M|0x3UL);
+    csr_write(mhpmevent7, csr_read(mhpmevent7)|set_mode_M|0x10UL);
+    csr_write(mhpmevent8, csr_read(mhpmevent8)|set_mode_M|0xFFFFFFFFUL);
+    csr_write(mhpmevent9, csr_read(mhpmevent9)|set_mode_M|0x00000081UL);
+    csr_write(mhpmevent10, csr_read(mhpmevent10)|set_mode_M);
+    // ======= ctrl ==================================================
+    csr_write(mhpmevent11, csr_read(mhpmevent11)|set_mode_M|0x1UL);
+    csr_write(mhpmevent12, csr_read(mhpmevent12)|set_mode_M|0x2UL);
+    csr_write(mhpmevent13, csr_read(mhpmevent13)|set_mode_M|0x3UL);
+    csr_write(mhpmevent14, csr_read(mhpmevent14)|set_mode_M|0x10UL);
+    csr_write(mhpmevent15, csr_read(mhpmevent15)|set_mode_M|0xFFFFFFFFUL);
+    csr_write(mhpmevent16, csr_read(mhpmevent16)|set_mode_M);
+    csr_write(mhpmevent17, csr_read(mhpmevent17)|set_mode_M);
+    csr_write(mhpmevent18, csr_read(mhpmevent18)|set_mode_M);
+    // ======== memory ===================================================
+    csr_write(mhpmevent19, csr_read(mhpmevent19)|set_mode_M);
+    csr_write(mhpmevent20, csr_read(mhpmevent20)|set_mode_M|0x1UL);
+    csr_write(mhpmevent21, csr_read(mhpmevent21)|set_mode_M|0x2UL);
+    csr_write(mhpmevent22, csr_read(mhpmevent22)|set_mode_M|0x3UL);
+    csr_write(mhpmevent23, csr_read(mhpmevent23)|set_mode_M|43);
+    csr_write(mhpmevent24, csr_read(mhpmevent24)|set_mode_M|52);
+    csr_write(mhpmevent25, csr_read(mhpmevent25)|set_mode_M|52);
+    csr_write(mhpmevent26, csr_read(mhpmevent26)|set_mode_M|43);
+    // ======== hc ================================================
+    csr_write(mhpmevent27, csr_read(mhpmevent27)|set_mode_M);
+    csr_write(mhpmevent28, csr_read(mhpmevent28)|set_mode_M|0x1UL);
+    csr_write(mhpmevent29, csr_read(mhpmevent29)|set_mode_M|0x2UL);
+    csr_write(mhpmevent30, csr_read(mhpmevent30)|set_mode_M|0x3UL);
+    csr_write(mhpmevent31, csr_read(mhpmevent31)|set_mode_M|0xFFFFFFFFUL);
+
+    // csr write mhpmcounter 3 to 31 0x0
+    csr_write(mhpmcounter3, 0x0UL);
+    csr_write(mhpmcounter4, 0x0UL);
+    csr_write(mhpmcounter5, 0x0UL);
+    csr_write(mhpmcounter6, 0x0UL);
+    csr_write(mhpmcounter7, 0x0UL);
+    csr_write(mhpmcounter8, 0x0UL);
+    csr_write(mhpmcounter9, 0x0UL);
+    csr_write(mhpmcounter10, 0x0UL);
+    csr_write(mhpmcounter11, 0x0UL);
+    csr_write(mhpmcounter12, 0x0UL);
+    csr_write(mhpmcounter13, 0x0UL);
+    csr_write(mhpmcounter14, 0x0UL);
+    csr_write(mhpmcounter15, 0x0UL);
+    csr_write(mhpmcounter16, 0x0UL);
+    csr_write(mhpmcounter17, 0x0UL);
+    csr_write(mhpmcounter18, 0x0UL);
+    csr_write(mhpmcounter19, 0x0UL);
+    csr_write(mhpmcounter20, 0x0UL);
+    csr_write(mhpmcounter21, 0x0UL);
+    csr_write(mhpmcounter22, 0x0UL);
+    csr_write(mhpmcounter23, 0x0UL);
+    csr_write(mhpmcounter24, 0x0UL);
+    csr_write(mhpmcounter25, 0x0UL);
+    csr_write(mhpmcounter26, 0x0UL);
+    csr_write(mhpmcounter27, 0x0UL);
+    csr_write(mhpmcounter28, 0x0UL);
+    csr_write(mhpmcounter29, 0x0UL);
+    csr_write(mhpmcounter30, 0x0UL);
+    csr_write(mhpmcounter31, 0x0UL);
+    csr_write(mcycle, 0x0UL);
+    csr_write(minstret, 0x0UL);
+
+    // ================================================================
+    volatile uint64_t a = 0;
+    for(uint64_t i = 0; i < 100; i++) {
+        a += a + i;
+    }
+    printf("%lu\n",a);
+    // ================================================================
+    PRINT_SEP("frontend");
+    printf("mhpmevent3: %lx, mhpmcounter3: %ld\n", csr_read(mhpmevent3), csr_read(mhpmcounter3));
+    printf("mhpmevent4: %lx, mhpmcounter4: %ld\n", csr_read(mhpmevent4), csr_read(mhpmcounter4));
+    printf("mhpmevent5: %lx, mhpmcounter5: %ld\n", csr_read(mhpmevent5), csr_read(mhpmcounter5));
+    printf("mhpmevent6: %lx, mhpmcounter6: %ld\n", csr_read(mhpmevent6), csr_read(mhpmcounter6));
+    printf("mhpmevent7: %lx, mhpmcounter7: %ld\n", csr_read(mhpmevent7), csr_read(mhpmcounter7));
+    printf("mhpmevent8: %lx, mhpmcounter8: %ld\n", csr_read(mhpmevent8), csr_read(mhpmcounter8));
+    printf("mhpmevent9: %lx, mhpmcounter9: %ld\n", csr_read(mhpmevent9), csr_read(mhpmcounter9));
+    printf("mhpmevent10: %lx, mhpmcounter10: %ld\n", csr_read(mhpmevent10), csr_read(mhpmcounter10));
+    PRINT_SEP("ctrl");    
+    printf("mhpmevent11: %lx, mhpmcounter11: %ld\n", csr_read(mhpmevent11), csr_read(mhpmcounter11));
+    printf("mhpmevent12: %lx, mhpmcounter12: %ld\n", csr_read(mhpmevent12), csr_read(mhpmcounter12));
+    printf("mhpmevent13: %lx, mhpmcounter13: %ld\n", csr_read(mhpmevent13), csr_read(mhpmcounter13));
+    printf("mhpmevent14: %lx, mhpmcounter14: %ld\n", csr_read(mhpmevent14), csr_read(mhpmcounter14));
+    printf("mhpmevent15: %lx, mhpmcounter15: %ld\n", csr_read(mhpmevent15), csr_read(mhpmcounter15));
+    printf("mhpmevent16: %lx, mhpmcounter16: %ld\n", csr_read(mhpmevent16), csr_read(mhpmcounter16));
+    printf("mhpmevent17: %lx, mhpmcounter17: %ld\n", csr_read(mhpmevent17), csr_read(mhpmcounter17));
+    PRINT_SEP("memory");
+    printf("mhpmevent18: %lx, mhpmcounter18: %ld\n", csr_read(mhpmevent18), csr_read(mhpmcounter18));
+    printf("mhpmevent19: %lx, mhpmcounter19: %ld\n", csr_read(mhpmevent19), csr_read(mhpmcounter19));
+    printf("mhpmevent20: %lx, mhpmcounter20: %ld\n", csr_read(mhpmevent20), csr_read(mhpmcounter20));
+    printf("mhpmevent21: %lx, mhpmcounter21: %ld\n", csr_read(mhpmevent21), csr_read(mhpmcounter21));
+    printf("mhpmevent22: %lx, mhpmcounter22: %ld\n", csr_read(mhpmevent22), csr_read(mhpmcounter22));
+    printf("mhpmevent23: %lx, mhpmcounter23: %ld\n", csr_read(mhpmevent23), csr_read(mhpmcounter23));
+    printf("mhpmevent24: %lx, mhpmcounter24: %ld\n", csr_read(mhpmevent24), csr_read(mhpmcounter24));
+    printf("mhpmevent25: %lx, mhpmcounter25: %ld\n", csr_read(mhpmevent25), csr_read(mhpmcounter25));
+    printf("mhpmevent26: %lx, mhpmcounter26: %ld\n", csr_read(mhpmevent26), csr_read(mhpmcounter26));
+    PRINT_SEP("hc");
+    printf("mhpmevent27: %lx, mhpmcounter27: %ld\n", csr_read(mhpmevent27), csr_read(mhpmcounter27));
+    printf("mhpmevent28: %lx, mhpmcounter28: %ld\n", csr_read(mhpmevent28), csr_read(mhpmcounter28));
+    printf("mhpmevent29: %lx, mhpmcounter29: %ld\n", csr_read(mhpmevent29), csr_read(mhpmcounter29));
+    printf("mhpmevent30: %lx, mhpmcounter30: %ld\n", csr_read(mhpmevent30), csr_read(mhpmcounter30));
+    printf("mhpmevent31: %lx, mhpmcounter31: %ld\n", csr_read(mhpmevent31), csr_read(mhpmcounter31));
+
+    printf("mcycle: %ld\n", csr_read(mcycle));
+    printf("mhpmcounter8: %ld\n", csr_read(mhpmcounter8));
+    printf("mhpmcounter15: %ld\n", csr_read(mhpmcounter15));
+    printf("mhpmcounter24: %ld\n", csr_read(mhpmcounter24));
+
+// ================================================================
+    PRINT_SEP("end");
+#endif
+
+    return 0;
+}
\ No newline at end of file

apps/hpmdriver/hpmdriver.h

+#ifndef __HPMDRIVER_H_
+#define __HPMDRIVER_H_
+
+#include <klib.h>
+#include <csr.h>
+#include "events.h"
+
+#define MODE_OFFSET 59
+#define MODE_MASK 0x1FUL
+#define MODE_M 0x10UL
+#define MODE_H 0x08UL
+#define MODE_S 0x04UL
+#define MODE_U 0x02UL
+#define MODE_D 0x01UL
+
+#define OPTYPE2_OFFSET 50
+#define OPTYPE2_MASK 0x1FUL
+#define OPTYPE1_OFFSET 45
+#define OPTYPE1_MASK 0x1FUL
+#define OPTYPE0_OFFSET 40
+#define OPTYPE0_MASK 0x1FUL
+#define OPTYPE_OR 0x0UL
+#define OPTYPE_AND 0x1UL
+#define OPTYPE_XOR 0x2UL
+#define OPTYPE_ADD 0x4UL
+
+#define EVENT3_OFFSET 30
+#define EVENT3_MASK 0x3FFUL
+#define EVENT2_OFFSET 20
+#define EVENT2_MASK 0x3FFUL
+#define EVENT1_OFFSET 10
+#define EVENT1_MASK 0x3FFUL
+#define EVENT0_OFFSET 0
+#define EVENT0_MASK 0x3FFUL
+
+#define SET(reg, field, value) ((reg) = ((reg) & ~((field##_MASK) << (field##_OFFSET))) | ((value) << (field##_OFFSET)));
+
+
+
+#endif /* __HPMDRIVER_H_ */
\ No newline at end of file