- 24 7月, 2022 1 次提交
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由 Yinan Xu 提交于
This commit changes the allocation policy in Store Set memory dependence predictor. Previously we allocate an entry for the load and store instructions every time when a memory violation is triggered. However, it's not robust enough and causes many load instructions to be blocked for issuing. The current allocation policy only allocates the same entry for the load and store instructions after both of them have triggered memory violations before. That is to say, only when a load/store instruction pair triggers memory violation twice, we do allocate the same entry to them. This change may cause more memory violation redirections than before, but it also reduces the number of blocked load instructions.
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- 20 6月, 2022 1 次提交
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由 William Wang 提交于
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- 26 5月, 2022 1 次提交
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由 Jiuyang Liu 提交于
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- 06 12月, 2021 1 次提交
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由 William Wang 提交于
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- 03 12月, 2021 1 次提交
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由 William Wang 提交于
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- 23 11月, 2021 1 次提交
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由 William Wang 提交于
* mdp: implement SSIT with sram * mdp: use robIdx instead of sqIdx Dispatch refactor moves lsq enq to dispatch2, as a result, mdp can not get correct sqIdx in dispatch. Unlike robIdx, it is hard to maintain a "speculatively assigned" sqIdx, as it is hard to track store insts in dispatch queue. Yet we can still use "speculatively assigned" robIdx for memory dependency predictor. For now, memory dependency predictor uses "speculatively assigned" robIdx to track inflight store. However, sqIdx is still used to track those store which's addr is valid but data it not valid. When load insts try to get forward data from those store, load insts will get that store's sqIdx and wait in RS. They will not waken until store data with that sqIdx is issued. * mdp: add track robIdx recover logic
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