• Y
    freelist: optimize timing of read and writing (#1593) · 5ef86c38
    Yinan Xu 提交于
    This commit optimizes the timing of freelist by changing the updating
    function of headPtr and tailPtr.
    
    We maintains an one-hot representation of headPtr and further uses it to
    read the free registers from the list, which should be better than the
    previous implementation where headPtr is used to indexed into the queue.
    
    The update of tailPtr and the freelist is delayed by one cycle to
    optimize the timing. Because freelist allocates new registers in the
    next cycle iff there are more than RenameWidth free registers in this
    cycle. The freed registers in this cycle will never be used in the next
    cycle. Thus, we can delay the updating of queue data to the next cycle.
    We also move the update of tailPtr to the next cycle, since PopCount
    takes a long timing and we move the last adder to the next cycle. Now
    the adder works parallely with PopCount. That is, the updating of
    tailPtr is pipelined.
    5ef86c38
BitUtils.scala 10.3 KB