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    param: set EnableUncacheWriteOutstanding to false · 4c3daa52
    ZhangZifei 提交于
    Here is a bug cause by EnableUncacheWriteOutstanding:
    The case is extintr in Nexus-AM.
    Three steps of the test:
      clear intrGen's intr: Stop pass interrupt. A mmio write.
      clear plic claim: complete intr. A mmio write.
      read plic claim to check: claim should be 0. A mmio read.
    The corner case:
      intrGen's mmio write is to slow. The instruction after it executes
    and plic claim's mmio's write & read execute before it. On the side of
    core with plic, claim is cleared. But on the side of intrGen with plic,
    the source of interrupt is still enabled and trigger interrupt.
    So the "read plic claim to check" get a valid claim and failed.
    4c3daa52
Parameters.scala 16.5 KB