* rtl_jrelop() does not write any registers, so we can writeback to SPM
  before generating the branch instruction

* this is achieved by putting the base of SPM at a dedicated register

X86 opt

See merge request projectn/nemu!53

* we should not write to dsrc1
* the masking of shamt can be eliminated

* shift instructions only use the lower 5 bits as shift amount,
  therefore there is no need to clear the high part of shift amount

* `lui_imm` only have 20 bits

Rv64 statistic

See merge request projectn/nemu!52

Kvm improve

See merge request projectn/nemu!51

* this helps to execute store instructions to mmio in compile mode

Fix x86 eflags

See merge request projectn/nemu!50

* this can directly compute most of the CC, include CC_E and CC_NE
* for CC_S and CC_NS, we should re-compute the difference again

* need refactor

* this can eliminate masking the result of subtraction with 0xff or
  0xffff

* Treating (dsrc1 + CF) as whole, which is introduced in 051786, is
  wrong. (dsrc1 + CF) may generate carry bit. Treating them as whole
  will miss such carry.
* Also we should introduce a new rtl register s2 to compute the CF of
  adc/sbb.

* pass eflagstest

Kvm

See merge request projectn/nemu!49