- 17 4月, 2020 5 次提交
- 16 4月, 2020 4 次提交
- 15 4月, 2020 4 次提交
-
-
由 Zihao Yu 提交于
X86 opt See merge request projectn/nemu!53
-
由 wangkaifan 提交于
-
由 wangkaifan 提交于
-
由 wangkaifan 提交于
-
- 14 4月, 2020 3 次提交
-
-
由 wangkaifan 提交于
-
由 wangkaifan 提交于
-
由 wangkaifan 提交于
-
- 07 4月, 2020 16 次提交
-
-
由 Zihao Yu 提交于
-
由 Zihao Yu 提交于
* we should not write to dsrc1 * the masking of shamt can be eliminated
-
由 Zihao Yu 提交于
-
由 Zihao Yu 提交于
-
由 Zihao Yu 提交于
* shift instructions only use the lower 5 bits as shift amount, therefore there is no need to clear the high part of shift amount
-
由 Zihao Yu 提交于
* `lui_imm` only have 20 bits
-
由 Zihao Yu 提交于
-
由 Zihao Yu 提交于
Rv64 statistic See merge request projectn/nemu!52
-
由 Zihao Yu 提交于
-
由 Zihao Yu 提交于
-
由 Zihao Yu 提交于
Kvm improve See merge request projectn/nemu!51
-
由 Zihao Yu 提交于
* this helps to execute store instructions to mmio in compile mode
-
由 Zihao Yu 提交于
-
由 Zihao Yu 提交于
Fix x86 eflags See merge request projectn/nemu!50
-
由 Zihao Yu 提交于
* this can directly compute most of the CC, include CC_E and CC_NE * for CC_S and CC_NS, we should re-compute the difference again
-
由 Zihao Yu 提交于
-
- 06 4月, 2020 4 次提交
-
-
由 Zihao Yu 提交于
* need refactor
-
由 Zihao Yu 提交于
* this can eliminate masking the result of subtraction with 0xff or 0xffff
-
由 Zihao Yu 提交于
* Treating (dsrc1 + CF) as whole, which is introduced in 051786, is wrong. (dsrc1 + CF) may generate carry bit. Treating them as whole will miss such carry. * Also we should introduce a new rtl register s2 to compute the CF of adc/sbb.
-
由 Zihao Yu 提交于
-
- 05 4月, 2020 3 次提交
- 04 4月, 2020 1 次提交
-
-
由 Zihao Yu 提交于
Kvm See merge request projectn/nemu!49
-