PTW: update a,d throuth pf

src/isa/riscv64/exec/exec.c

@@ -256,6 +256,9 @@ vaddr_t isa_exec_once() {
 
   exec(&s);
   if (cpu.mem_exception != MEM_OK) {
+#ifdef XIANGSHAN_DEBUG
+    printf("[NEMU] raise page fault\n");
+#endif
     raise_intr(&s, cpu.mem_exception, cpu.pc);
     cpu.mem_exception = MEM_OK;
   }

src/isa/riscv64/mmu.c

@@ -108,14 +108,18 @@ static paddr_t ptw(vaddr_t vaddr, int type) {
     pg_base = (pg_base & ~pg_mask) | (vaddr & pg_mask & ~PGMASK);
   }
 
-#if !_SHARE
+// #if !_SHARE
   bool is_write = (type == MEM_TYPE_WRITE);
   if (!pte.a || (!pte.d && is_write)) {
-    pte.a = true;
-    pte.d |= is_write;
-    paddr_write(p_pte, pte.val, PTE_SIZE);
-  }
+#ifdef XIANGSHAN_DEBUG
+  printf("[NEMU] update a/d throgh pf\n");
 #endif
+    return MEM_RET_FAIL;
+    // pte.a = true;
+    // pte.d |= is_write;
+    // paddr_write(p_pte, pte.val, PTE_SIZE);
+  }
+// #endif
 
   return pg_base | MEM_RET_OK;
 }