riscv64,exec,system: fix bug caused by typo

f76d6a1b · Zihao Yu · 1c0510c5 · f76d6a1b
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src/isa/riscv64/exec/system.c src/isa/riscv64/exec/system.c +1 -1

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--- a/src/isa/riscv64/exec/system.c
+++ b/src/isa/riscv64/exec/system.c
@@ -48,7 +48,7 @@ make_EHelper(priv) {
      mstatus->sie = mstatus->spie;
      mstatus->spie = 1;
      change_mode(mstatus->spp);
-      mstatus->mpp = MODE_U;
+      mstatus->spp = MODE_U;
      rtl_li(&s0, sepc->val);
      rtl_jr(&s0);
      cpu.lr = false;