riscv64: use rtl_zext() to perform zero extension

* previously we use rtl_andi(s0, s1, 0xfffffffful), but 0xffffffff can
  not be loaded correctly by load_imm() in the rv64 engine

include/rtl/pseudo.h

@@ -41,6 +41,20 @@ static inline make_rtl(sext, rtlreg_t* dest, const rtlreg_t* src1, int width) {
   }
 }
 
+static inline make_rtl(zext, rtlreg_t* dest, const rtlreg_t* src1, int width) {
+  // dest <- zeroext(src1[(width * 8 - 1) .. 0])
+//  TODO();
+
+  const int word_size = sizeof(word_t);
+  if (width == word_size) {
+    rtl_mv(s, dest, src1);
+  } else {
+    assert(width == 1 || width == 2 || width == 4);
+    rtl_shli(s, dest, src1, (word_size - width) * 8);
+    rtl_shri(s, dest, dest, (word_size - width) * 8);
+  }
+}
+
 static inline make_rtl(msb, rtlreg_t* dest, const rtlreg_t* src1, int width) {
   // dest <- src1[width * 8 - 1]
 //  TODO();

src/isa/riscv64/exec/compute.h

@@ -145,7 +145,7 @@ static inline make_EHelper(srlw) {
   }
   else {
     // srlw
-    rtl_andi(s, s1, dsrc1, 0xffffffffu);
+    rtl_zext(s, s1, dsrc1, 4);
     rtl_shr(s, s0, s1, s0);
     print_asm_template3(srlw);
   }
@@ -178,7 +178,7 @@ static inline make_EHelper(srliw) {
   }
   else {
     // srlw
-    rtl_andi(s, s0, dsrc1, 0xffffffffu);
+    rtl_zext(s, s0, dsrc1, 4);
     rtl_shri(s, s0, s0, id_src2->imm & 0x1f);
     print_asm_template3(srliw);
   }

src/isa/riscv64/exec/muldiv.h

@@ -117,8 +117,8 @@ static inline make_EHelper(remw) {
 }
 
 static inline make_EHelper(divuw) {
-  rtl_andi(s, s0, dsrc1, 0xffffffffu);
-  rtl_andi(s, s1, dsrc2, 0xffffffffu);
+  rtl_zext(s, s0, dsrc1, 4);
+  rtl_zext(s, s1, dsrc2, 4);
   if (*s1 == 0) {
     rtl_li(s, s0, ~0lu);
   } else {
@@ -130,8 +130,8 @@ static inline make_EHelper(divuw) {
 }
 
 static inline make_EHelper(remuw) {
-  rtl_andi(s, s0, dsrc1, 0xffffffffu);
-  rtl_andi(s, s1, dsrc2, 0xffffffffu);
+  rtl_zext(s, s0, dsrc1, 4);
+  rtl_zext(s, s1, dsrc2, 4);
   if (*s1 == 0) {
     //rtl_mv(s, s0, s0);
   } else {