mips32: pass muldiv cputests

src/arch/mips32/decode.c

@@ -28,6 +28,12 @@ make_DHelper(I) {
   decode_op_r(id_dest, decinfo.arch.instr.rt, false);
 }
 
+make_DHelper(IU) {
+  decode_op_r(id_src, decinfo.arch.instr.rs, true);
+  decode_op_i(id_src2, decinfo.arch.instr.imm, true);
+  decode_op_r(id_dest, decinfo.arch.instr.rt, false);
+}
+
 make_DHelper(J) {
   vaddr_t jmp_target = (cpu.pc & 0xf0000000) | (decinfo.arch.instr.jmp_target << 2);
   decode_op_i(id_dest, jmp_target, true);

src/arch/mips32/exec/all-instr.h

@@ -5,16 +5,24 @@ make_EHelper(add);
 make_EHelper(sub);
 make_EHelper(slt);
 make_EHelper(sltu);
+make_EHelper(and);
 make_EHelper(or);
 make_EHelper(xor);
 make_EHelper(sll);
 make_EHelper(srl);
 make_EHelper(sra);
 make_EHelper(movn);
+make_EHelper(movz);
 
 make_EHelper(load);
 make_EHelper(store);
 
+make_EHelper(mfhi);
+make_EHelper(mflo);
+make_EHelper(mul);
+make_EHelper(mult);
+make_EHelper(div);
+
 make_EHelper(j);
 make_EHelper(jal);
 make_EHelper(jr);

src/arch/mips32/exec/compute.c

@@ -35,6 +35,13 @@ make_EHelper(sltu) {
   print_asm_template3(sltu);
 }
 
+make_EHelper(and) {
+  rtl_and(&t0, &id_src->val, &id_src2->val);
+  rtl_sr(id_dest->reg, &t0, 4);
+
+  print_asm_template3(and);
+}
+
 make_EHelper(or) {
   rtl_or(&t0, &id_src->val, &id_src2->val);
   rtl_sr(id_dest->reg, &t0, 4);
@@ -70,6 +77,13 @@ make_EHelper(sra) {
   print_asm_template3(sra);
 }
 
+make_EHelper(movz) {
+  rtl_mux(&t1, &id_src2->val, &id_dest->val, &id_src->val);
+  rtl_sr(id_dest->reg, &t1, 4);
+
+  print_asm_template3(movz);
+}
+
 make_EHelper(movn) {
   rtl_mux(&t1, &id_src2->val, &id_src->val, &id_dest->val);
   rtl_sr(id_dest->reg, &t1, 4);

src/arch/mips32/exec/exec.c

@@ -2,10 +2,10 @@
 #include "all-instr.h"
 
 static OpcodeEntry special_table [64] = {
-  /* b000 */ IDEX(shift, sll), EMPTY, IDEX(shift, srl), EMPTY, EMPTY, EMPTY, IDEX(R, srl), IDEX(R, sra),
-  /* b001 */ IDEX(R, jr), IDEX(R, jalr), EMPTY, IDEX(cmov, movn), EMPTY, EMPTY, EMPTY, EMPTY,
-  /* b010 */ EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
-  /* b011 */ EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
+  /* b000 */ IDEX(shift, sll), EMPTY, IDEX(shift, srl), IDEX(shift, sra), EMPTY, EMPTY, IDEX(R, srl), IDEX(R, sra),
+  /* b001 */ IDEX(R, jr), IDEX(R, jalr), IDEX(cmov, movz), IDEX(cmov, movn), EMPTY, EMPTY, EMPTY, EMPTY,
+  /* b010 */ IDEX(R, mfhi), EMPTY, IDEX(R, mflo), EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
+  /* b011 */ IDEX(R, mult), EMPTY, IDEX(R, div), EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
   /* b100 */ EMPTY, IDEX(R, add), EMPTY, IDEX(R, sub), EMPTY, IDEX(R, or), IDEX(R, xor), EMPTY,
   /* b101 */ EMPTY, EMPTY, IDEX(R, slt), IDEX(R, sltu), EMPTY, EMPTY, EMPTY, EMPTY,
   /* b110 */ EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
@@ -16,11 +16,26 @@ static make_EHelper(special) {
   idex(eip, &special_table[decinfo.arch.instr.func]);
 }
 
+static OpcodeEntry special2_table [64] = {
+  /* b000 */ EMPTY, EMPTY, IDEX(R, mul), EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
+  /* b001 */ EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
+  /* b010 */ EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
+  /* b011 */ EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
+  /* b100 */ EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
+  /* b101 */ EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
+  /* b110 */ EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
+  /* b111 */ EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
+};
+
+static make_EHelper(special2) {
+  idex(eip, &special2_table[decinfo.arch.instr.func]);
+}
+
 static OpcodeEntry opcode_table [64] = {
   /* b000 */ EX(special), EMPTY, IDEX(J, j), IDEX(J, jal), IDEX(B, beq), IDEX(B, bne), IDEX(B, blez), EMPTY,
-  /* b001 */ EMPTY, IDEX(I, add), IDEX(I, slt), IDEX(I, sltu), EMPTY, EMPTY, IDEX(I, xor), IDEX(I, lui),
+  /* b001 */ EMPTY, IDEX(I, add), IDEX(I, slt), IDEX(I, sltu), IDEX(IU, and), IDEX(IU, or), IDEX(IU, xor), IDEX(I, lui),
   /* b010 */ EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
-  /* b011 */ EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
+  /* b011 */ EMPTY, EMPTY, EMPTY, EMPTY, EX(special2), EMPTY, EMPTY, EMPTY,
   /* b100 */ EMPTY, EMPTY, EMPTY, IDEX(I, load), EMPTY, EMPTY, EMPTY, EMPTY,
   /* b101 */ EMPTY, EMPTY, EMPTY, IDEX(store, store), EMPTY, EMPTY, EMPTY, EMPTY,
   /* b110 */ EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,

src/arch/mips32/exec/muldiv.c

+#include "cpu/exec.h"
+
+make_EHelper(mfhi) {
+  rtl_sr(id_dest->reg, &cpu.hi, 4);
+
+  print_asm_template3(mfhi);
+}
+
+make_EHelper(mflo) {
+  rtl_sr(id_dest->reg, &cpu.lo, 4);
+
+  print_asm_template3(mflo);
+}
+
+make_EHelper(mul) {
+  rtl_imul_lo(&t0, &id_src->val, &id_src2->val);
+  rtl_sr(id_dest->reg, &t0, 4);
+
+  print_asm_template3(mul);
+}
+
+make_EHelper(mult) {
+  rtl_imul_lo(&cpu.lo, &id_src->val, &id_src2->val);
+  rtl_imul_hi(&cpu.hi, &id_src->val, &id_src2->val);
+
+  print_asm_template3(mult);
+}
+
+make_EHelper(div) {
+  rtl_div_q(&cpu.lo, &id_src->val, &id_src2->val);
+  rtl_div_r(&cpu.hi, &id_src->val, &id_src2->val);
+
+  print_asm_template3(div);
+}

src/arch/mips32/include/arch/decode.h

@@ -6,6 +6,12 @@ typedef union {
     int32_t  simm   : 16;
 //  uint32_t rt     :  5;
 //  uint32_t rs     :  5;
+//  uint32_t opcode :  6;
+  };
+  struct {
+    uint32_t imm    : 16;
+//  uint32_t rt     :  5;
+//  uint32_t rs     :  5;
 //  uint32_t opcode :  6;
   };
   struct {
@@ -29,6 +35,7 @@ struct CPUDecodeInfo {
 };
 
 make_DHelper(I);
+make_DHelper(IU);
 make_DHelper(J);
 make_DHelper(R);
 make_DHelper(B);

src/arch/mips32/include/arch/reg.h

@@ -7,14 +7,15 @@
 
 typedef struct {
   union {
-    union {
-      rtlreg_t _32;
-      uint16_t _16[2];
-      uint8_t _8[4];
-    } gpr[32];
-  };
+    rtlreg_t _32;
+    uint16_t _16[2];
+    uint8_t _8[4];
+  } gpr[32];
 
   vaddr_t pc;
+
+  rtlreg_t lo, hi;
+
   bool INTR;
 } CPU_state;