finish testing

bsp/imxrt/imxrt1052-sc-internal/.config

-#
-# Automatically generated file; DO NOT EDIT.
-# RT-Thread Configuration
-#
-
-#
-# RT-Thread Kernel
-#
-CONFIG_RT_NAME_MAX=8
-# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
-# CONFIG_RT_USING_SMP is not set
-CONFIG_RT_ALIGN_SIZE=4
-# CONFIG_RT_THREAD_PRIORITY_8 is not set
-CONFIG_RT_THREAD_PRIORITY_32=y
-# CONFIG_RT_THREAD_PRIORITY_256 is not set
-CONFIG_RT_THREAD_PRIORITY_MAX=32
-CONFIG_RT_TICK_PER_SECOND=100
-CONFIG_RT_USING_OVERFLOW_CHECK=y
-CONFIG_RT_USING_HOOK=y
-CONFIG_RT_USING_IDLE_HOOK=y
-CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
-CONFIG_IDLE_THREAD_STACK_SIZE=256
-# CONFIG_RT_USING_TIMER_SOFT is not set
-CONFIG_RT_DEBUG=y
-CONFIG_RT_DEBUG_COLOR=y
-# CONFIG_RT_DEBUG_INIT_CONFIG is not set
-# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
-# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
-# CONFIG_RT_DEBUG_IPC_CONFIG is not set
-# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
-# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
-# CONFIG_RT_DEBUG_MEM_CONFIG is not set
-# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
-# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
-# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
-
-#
-# Inter-Thread communication
-#
-CONFIG_RT_USING_SEMAPHORE=y
-CONFIG_RT_USING_MUTEX=y
-CONFIG_RT_USING_EVENT=y
-CONFIG_RT_USING_MAILBOX=y
-CONFIG_RT_USING_MESSAGEQUEUE=y
-# CONFIG_RT_USING_SIGNALS is not set
-
-#
-# Memory Management
-#
-CONFIG_RT_USING_MEMPOOL=y
-CONFIG_RT_USING_MEMHEAP=y
-# CONFIG_RT_USING_NOHEAP is not set
-# CONFIG_RT_USING_SMALL_MEM is not set
-# CONFIG_RT_USING_SLAB is not set
-CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
-# CONFIG_RT_USING_USERHEAP is not set
-CONFIG_RT_USING_HEAP=y
-
-#
-# Kernel Device Object
-#
-CONFIG_RT_USING_DEVICE=y
-# CONFIG_RT_USING_DEVICE_OPS is not set
-# CONFIG_RT_USING_INTERRUPT_INFO is not set
-CONFIG_RT_USING_CONSOLE=y
-CONFIG_RT_CONSOLEBUF_SIZE=128
-CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
-CONFIG_RT_VER_NUM=0x40003
-# CONFIG_RT_USING_CPU_FFS is not set
-# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
-
-#
-# RT-Thread Components
-#
-CONFIG_RT_USING_COMPONENTS_INIT=y
-CONFIG_RT_USING_USER_MAIN=y
-CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
-CONFIG_RT_MAIN_THREAD_PRIORITY=10
-
-#
-# C++ features
-#
-# CONFIG_RT_USING_CPLUSPLUS is not set
-
-#
-# Command shell
-#
-CONFIG_RT_USING_FINSH=y
-CONFIG_FINSH_THREAD_NAME="tshell"
-CONFIG_FINSH_USING_HISTORY=y
-CONFIG_FINSH_HISTORY_LINES=5
-CONFIG_FINSH_USING_SYMTAB=y
-CONFIG_FINSH_USING_DESCRIPTION=y
-# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
-CONFIG_FINSH_THREAD_PRIORITY=20
-CONFIG_FINSH_THREAD_STACK_SIZE=4096
-CONFIG_FINSH_CMD_SIZE=80
-# CONFIG_FINSH_USING_AUTH is not set
-CONFIG_FINSH_USING_MSH=y
-CONFIG_FINSH_USING_MSH_DEFAULT=y
-CONFIG_FINSH_USING_MSH_ONLY=y
-CONFIG_FINSH_ARG_MAX=10
-
-#
-# Device virtual file system
-#
-CONFIG_RT_USING_DFS=y
-CONFIG_DFS_USING_WORKDIR=y
-CONFIG_DFS_FILESYSTEMS_MAX=2
-CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
-CONFIG_DFS_FD_MAX=16
-# CONFIG_RT_USING_DFS_MNTTABLE is not set
-# CONFIG_RT_USING_DFS_ELMFAT is not set
-CONFIG_RT_USING_DFS_DEVFS=y
-# CONFIG_RT_USING_DFS_ROMFS is not set
-# CONFIG_RT_USING_DFS_RAMFS is not set
-# CONFIG_RT_USING_DFS_UFFS is not set
-# CONFIG_RT_USING_DFS_JFFS2 is not set
-
-#
-# Device Drivers
-#
-CONFIG_RT_USING_DEVICE_IPC=y
-CONFIG_RT_PIPE_BUFSZ=512
-# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
-CONFIG_RT_USING_SERIAL=y
-CONFIG_RT_SERIAL_USING_DMA=y
-CONFIG_RT_SERIAL_RB_BUFSZ=64
-# CONFIG_RT_USING_CAN is not set
-# CONFIG_RT_USING_HWTIMER is not set
-CONFIG_RT_USING_CPUTIME=y
-# CONFIG_RT_USING_I2C is not set
-# CONFIG_RT_USING_PHY is not set
-CONFIG_RT_USING_PIN=y
-# CONFIG_RT_USING_ADC is not set
-# CONFIG_RT_USING_DAC is not set
-# CONFIG_RT_USING_PWM is not set
-# CONFIG_RT_USING_MTD_NOR is not set
-# CONFIG_RT_USING_MTD_NAND is not set
-# CONFIG_RT_USING_PM is not set
-# CONFIG_RT_USING_RTC is not set
-# CONFIG_RT_USING_SDIO is not set
-# CONFIG_RT_USING_SPI is not set
-# CONFIG_RT_USING_WDT is not set
-# CONFIG_RT_USING_AUDIO is not set
-# CONFIG_RT_USING_SENSOR is not set
-# CONFIG_RT_USING_TOUCH is not set
-# CONFIG_RT_USING_HWCRYPTO is not set
-CONFIG_RT_USING_PULSE_ENCODER=y
-# CONFIG_RT_USING_INPUT_CAPTURE is not set
-# CONFIG_RT_USING_WIFI is not set
-
-#
-# Using USB
-#
-CONFIG_RT_USING_USB_HOST=y
-CONFIG_RT_USBH_MSTORAGE=y
-CONFIG_UDISK_MOUNTPOINT="/"
-# CONFIG_RT_USING_USB_DEVICE is not set
-CONFIG_RT_USBD_THREAD_STACK_SZ=4096
-
-#
-# POSIX layer and C standard library
-#
-CONFIG_RT_USING_LIBC=y
-# CONFIG_RT_USING_PTHREADS is not set
-CONFIG_RT_USING_POSIX=y
-# CONFIG_RT_USING_POSIX_MMAP is not set
-# CONFIG_RT_USING_POSIX_TERMIOS is not set
-# CONFIG_RT_USING_POSIX_GETLINE is not set
-# CONFIG_RT_USING_POSIX_AIO is not set
-# CONFIG_RT_USING_MODULE is not set
-
-#
-# Network
-#
-
-#
-# Socket abstraction layer
-#
-# CONFIG_RT_USING_SAL is not set
-
-#
-# Network interface device
-#
-# CONFIG_RT_USING_NETDEV is not set
-
-#
-# light weight TCP/IP stack
-#
-# CONFIG_RT_USING_LWIP is not set
-
-#
-# AT commands
-#
-# CONFIG_RT_USING_AT is not set
-
-#
-# VBUS(Virtual Software BUS)
-#
-# CONFIG_RT_USING_VBUS is not set
-
-#
-# Utilities
-#
-# CONFIG_RT_USING_RYM is not set
-# CONFIG_RT_USING_ULOG is not set
-# CONFIG_RT_USING_UTEST is not set
-
-#
-# RT-Thread online packages
-#
-
-#
-# IoT - internet of things
-#
-# CONFIG_PKG_USING_PAHOMQTT is not set
-# CONFIG_PKG_USING_WEBCLIENT is not set
-# CONFIG_PKG_USING_WEBNET is not set
-# CONFIG_PKG_USING_MONGOOSE is not set
-# CONFIG_PKG_USING_MYMQTT is not set
-# CONFIG_PKG_USING_MQTTCLIENT is not set
-# CONFIG_PKG_USING_WEBTERMINAL is not set
-# CONFIG_PKG_USING_CJSON is not set
-# CONFIG_PKG_USING_JSMN is not set
-# CONFIG_PKG_USING_LIBMODBUS is not set
-# CONFIG_PKG_USING_FREEMODBUS is not set
-# CONFIG_PKG_USING_LJSON is not set
-# CONFIG_PKG_USING_EZXML is not set
-# CONFIG_PKG_USING_NANOPB is not set
-
-#
-# Wi-Fi
-#
-
-#
-# Marvell WiFi
-#
-# CONFIG_PKG_USING_WLANMARVELL is not set
-
-#
-# Wiced WiFi
-#
-# CONFIG_PKG_USING_WLAN_WICED is not set
-# CONFIG_PKG_USING_RW007 is not set
-# CONFIG_PKG_USING_COAP is not set
-# CONFIG_PKG_USING_NOPOLL is not set
-# CONFIG_PKG_USING_NETUTILS is not set
-# CONFIG_PKG_USING_PPP_DEVICE is not set
-# CONFIG_PKG_USING_AT_DEVICE is not set
-# CONFIG_PKG_USING_ATSRV_SOCKET is not set
-# CONFIG_PKG_USING_WIZNET is not set
-
-#
-# IoT Cloud
-#
-# CONFIG_PKG_USING_ONENET is not set
-# CONFIG_PKG_USING_GAGENT_CLOUD is not set
-# CONFIG_PKG_USING_ALI_IOTKIT is not set
-# CONFIG_PKG_USING_AZURE is not set
-# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
-# CONFIG_PKG_USING_JIOT-C-SDK is not set
-# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
-# CONFIG_PKG_USING_NIMBLE is not set
-# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
-# CONFIG_PKG_USING_IPMSG is not set
-# CONFIG_PKG_USING_LSSDP is not set
-# CONFIG_PKG_USING_AIRKISS_OPEN is not set
-# CONFIG_PKG_USING_LIBRWS is not set
-# CONFIG_PKG_USING_TCPSERVER is not set
-# CONFIG_PKG_USING_PROTOBUF_C is not set
-# CONFIG_PKG_USING_ONNX_PARSER is not set
-# CONFIG_PKG_USING_ONNX_BACKEND is not set
-# CONFIG_PKG_USING_DLT645 is not set
-# CONFIG_PKG_USING_QXWZ is not set
-# CONFIG_PKG_USING_SMTP_CLIENT is not set
-# CONFIG_PKG_USING_ABUP_FOTA is not set
-# CONFIG_PKG_USING_LIBCURL2RTT is not set
-# CONFIG_PKG_USING_CAPNP is not set
-# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
-# CONFIG_PKG_USING_AGILE_TELNET is not set
-
-#
-# security packages
-#
-# CONFIG_PKG_USING_MBEDTLS is not set
-# CONFIG_PKG_USING_libsodium is not set
-# CONFIG_PKG_USING_TINYCRYPT is not set
-# CONFIG_PKG_USING_TFM is not set
-
-#
-# language packages
-#
-# CONFIG_PKG_USING_LUA is not set
-# CONFIG_PKG_USING_JERRYSCRIPT is not set
-# CONFIG_PKG_USING_MICROPYTHON is not set
-
-#
-# multimedia packages
-#
-# CONFIG_PKG_USING_OPENMV is not set
-# CONFIG_PKG_USING_MUPDF is not set
-# CONFIG_PKG_USING_STEMWIN is not set
-# CONFIG_PKG_USING_WAVPLAYER is not set
-# CONFIG_PKG_USING_TJPGD is not set
-
-#
-# tools packages
-#
-# CONFIG_PKG_USING_CMBACKTRACE is not set
-# CONFIG_PKG_USING_EASYFLASH is not set
-# CONFIG_PKG_USING_EASYLOGGER is not set
-# CONFIG_PKG_USING_SYSTEMVIEW is not set
-# CONFIG_PKG_USING_RDB is not set
-# CONFIG_PKG_USING_QRCODE is not set
-# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
-# CONFIG_PKG_USING_ADBD is not set
-# CONFIG_PKG_USING_COREMARK is not set
-# CONFIG_PKG_USING_DHRYSTONE is not set
-# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
-# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
-# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
-# CONFIG_PKG_USING_BS8116A is not set
-
-#
-# system packages
-#
-# CONFIG_PKG_USING_GUIENGINE is not set
-# CONFIG_PKG_USING_CAIRO is not set
-# CONFIG_PKG_USING_PIXMAN is not set
-# CONFIG_PKG_USING_LWEXT4 is not set
-# CONFIG_PKG_USING_PARTITION is not set
-# CONFIG_PKG_USING_FAL is not set
-# CONFIG_PKG_USING_SQLITE is not set
-# CONFIG_PKG_USING_RTI is not set
-# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
-# CONFIG_PKG_USING_CMSIS is not set
-# CONFIG_PKG_USING_DFS_YAFFS is not set
-# CONFIG_PKG_USING_LITTLEFS is not set
-# CONFIG_PKG_USING_THREAD_POOL is not set
-# CONFIG_PKG_USING_ROBOTS is not set
-# CONFIG_PKG_USING_EV is not set
-# CONFIG_PKG_USING_SYSWATCH is not set
-
-#
-# peripheral libraries and drivers
-#
-# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
-# CONFIG_PKG_USING_REALTEK_AMEBA is not set
-# CONFIG_PKG_USING_SHT2X is not set
-# CONFIG_PKG_USING_SHT3X is not set
-# CONFIG_PKG_USING_STM32_SDIO is not set
-# CONFIG_PKG_USING_ICM20608 is not set
-# CONFIG_PKG_USING_U8G2 is not set
-# CONFIG_PKG_USING_BUTTON is not set
-# CONFIG_PKG_USING_PCF8574 is not set
-# CONFIG_PKG_USING_SX12XX is not set
-# CONFIG_PKG_USING_SIGNAL_LED is not set
-# CONFIG_PKG_USING_LEDBLINK is not set
-# CONFIG_PKG_USING_LITTLED is not set
-# CONFIG_PKG_USING_WM_LIBRARIES is not set
-# CONFIG_PKG_USING_KENDRYTE_SDK is not set
-# CONFIG_PKG_USING_INFRARED is not set
-# CONFIG_PKG_USING_ROSSERIAL is not set
-# CONFIG_PKG_USING_AGILE_BUTTON is not set
-# CONFIG_PKG_USING_AGILE_LED is not set
-# CONFIG_PKG_USING_AT24CXX is not set
-# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
-# CONFIG_PKG_USING_AD7746 is not set
-# CONFIG_PKG_USING_PCA9685 is not set
-# CONFIG_PKG_USING_I2C_TOOLS is not set
-# CONFIG_PKG_USING_NRF24L01 is not set
-# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
-# CONFIG_PKG_USING_MAX17048 is not set
-# CONFIG_PKG_USING_RPLIDAR is not set
-# CONFIG_PKG_USING_AS608 is not set
-# CONFIG_PKG_USING_RC522 is not set
-# CONFIG_PKG_USING_EMBARC_BSP is not set
-
-#
-# miscellaneous packages
-#
-# CONFIG_PKG_USING_LIBCSV is not set
-# CONFIG_PKG_USING_OPTPARSE is not set
-# CONFIG_PKG_USING_FASTLZ is not set
-# CONFIG_PKG_USING_MINILZO is not set
-# CONFIG_PKG_USING_QUICKLZ is not set
-# CONFIG_PKG_USING_MULTIBUTTON is not set
-# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
-# CONFIG_PKG_USING_CANFESTIVAL is not set
-# CONFIG_PKG_USING_ZLIB is not set
-# CONFIG_PKG_USING_DSTR is not set
-# CONFIG_PKG_USING_TINYFRAME is not set
-# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
-# CONFIG_PKG_USING_DIGITALCTRL is not set
-# CONFIG_PKG_USING_UPACKER is not set
-# CONFIG_PKG_USING_UPARAM is not set
-
-#
-# samples: kernel and components samples
-#
-# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
-# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
-# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
-# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
-# CONFIG_PKG_USING_HELLO is not set
-# CONFIG_PKG_USING_VI is not set
-# CONFIG_PKG_USING_NNOM is not set
-# CONFIG_PKG_USING_LIBANN is not set
-# CONFIG_PKG_USING_ELAPACK is not set
-# CONFIG_PKG_USING_ARMv7M_DWT is not set
-# CONFIG_PKG_USING_VT100 is not set
-# CONFIG_PKG_USING_ULAPACK is not set
-# CONFIG_PKG_USING_UKAL is not set
-
-#
-# Hardware Drivers Config
-#
-CONFIG_SOC_IMXRT1052CVL5B=y
-
-#
-# On-chip Peripheral Drivers
-#
-# CONFIG_BSP_USING_DMA is not set
-CONFIG_BSP_USING_GPIO=y
-CONFIG_BSP_USING_LPUART=y
-CONFIG_BSP_USING_LPUART1=y
-# CONFIG_BSP_LPUART1_RX_USING_DMA is not set
-# CONFIG_BSP_LPUART1_TX_USING_DMA is not set
-# CONFIG_BSP_USING_LPUART4 is not set
-# CONFIG_BSP_USING_PWM is not set
-# CONFIG_BSP_USING_I2C is not set
-# CONFIG_BSP_USING_SPI is not set
-CONFIG_BSP_USING_PULSE_ENCODER=y
-CONFIG_BSP_USING_PULSE_ENCODER1=y
-CONFIG_BSP_USING_USB=y
-CONFIG_BSP_USING_USB0=y
-CONFIG_BSP_USB0_HOST=y
-# CONFIG_BSP_USB0_DEVICE is not set
-# CONFIG_BSP_USING_USB1 is not set
-
-#
-# Onboard Peripheral Drivers
-#
-# CONFIG_BSP_USING_SDRAM is not set
-# CONFIG_BSP_USING_MPU6050 is not set
-
-#
-# Board extended module Drivers
-#

bsp/imxrt/imxrt1052-sc-internal/.vscode/c_cpp_properties.json

-{
-    "configurations": [
-        {
-            "name": "Win32",
-            "includePath": [
-                "${workspaceFolder}/**"
-            ],
-            "defines": [
-                "_DEBUG",
-                "UNICODE",
-                "_UNICODE"
-            ],
-            "intelliSenseMode": "gcc-x64",
-            "compilerPath": "C:/Program Files (x86)/GNU Arm Embedded Toolchain/9 2020-q2-update/bin/arm-none-eabi-gcc.exe"
-        }
-    ],
-    "version": 4
-}
\ No newline at end of file

bsp/imxrt/imxrt1052-sc-internal/.vscode/launch.json

-{
-    // Use IntelliSense to learn about possible attributes.
-    // Hover to view descriptions of existing attributes.
-    // For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387
-    "version": "0.2.0",
-    "configurations": [
-        {
-            "name": "Cortex Debug",
-            "cwd": "${workspaceRoot}",
-            "executable": "./rtthread.elf",
-            "request": "launch",
-            "type": "cortex-debug",
-            "servertype": "jlink",
-            "serverpath": "C:/Program Files (x86)/SEGGER/JLink/JLinkGDBServerCL.exe",
-            "device": "MCIMXRT1052QSPI",
-            "runToMain": true,
-            "interface": "swd"
-        }
-    ]
-}
\ No newline at end of file

bsp/imxrt/imxrt1052-sc-internal/Kconfig

-mainmenu "RT-Thread Configuration"
-
-config RTT_DIR
-    string
-    option env="RTT_ROOT"
-    default "../../.."
-
-config PKGS_DIR
-    string
-    option env="PKGS_ROOT"
-    default "packages"
-
-source "$RTT_DIR/Kconfig"
-source "$PKGS_DIR/Kconfig"
-source "../libraries/Kconfig"
-source "board/Kconfig"

bsp/imxrt/imxrt1052-sc-internal/README.md

-# BSP README 模板
-
-## 简介
-
-本文档为 xxx 开发板的 BSP (板级支持包) 说明。
-
-主要内容如下：
-
-- 开发板资源介绍
-- BSP 快速上手
-- 进阶使用方法
-
-通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
-
-## 开发板介绍
-
-【此处简单介绍一下开发板】
-
-开发板外观如下图所示：
-
-![board](figures/board.png)
-
-该开发板常用 **板载资源** 如下：
-
-- MCU：MIMXRT105xxx，主频 xxxMHz，xxxKB FLASH ，xxxKB RAM
-- 外部 RAM：型号，xMB
-- 外部 FLASH：型号，xMB
-- 常用外设
-  - LED：x个，DS0（红色，PB1），DS1（绿色，PB0）
-  - 按键：x个，K0（兼具唤醒功能，PA0），K1（PC13）
-- 常用接口：USB 转串口、SD 卡接口、以太网接口、LCD 接口等
-- 调试接口，标准 JTAG/SWD
-
-开发板更多详细信息请参考【厂商名】 [xxx开发板介绍](https://xxx)。
-
-## 外设支持
-
-本 BSP 目前对外设的支持情况如下：
-
-| **板载外设**      | **支持情况** | **备注**                              |
-| :----------------- | :----------: | :------------------------------------- |
-| USB 转串口        |     支持     |                                       |
-| SPI Flash         |     支持     |                                       |
-| 以太网            |     支持     |                                       |
-| SD卡              |   暂不支持   |                                       |
-| CAN               |   暂不支持   |                                       |
-| **片上外设**      | **支持情况** | **备注**                              |
-| GPIO              |     支持     | PA0, PA1... PK15 ---> PIN: 0, 1...176 |
-| UART              |     支持     | UART1/x/x                             |
-| SPI               |     支持     | SPI1/x/x                              |
-| I2C               |     支持     | 软件 I2C                              |
-| SDIO              |   暂不支持   | 即将支持                              |
-| RTC               |   暂不支持   | 即将支持                              |
-| PWM               |   暂不支持   | 即将支持                              |
-| USB Device        |   暂不支持   | 即将支持                              |
-| USB Host          |   暂不支持   | 即将支持                              |
-| IWG               |   暂不支持   | 即将支持                              |
-| **扩展模块**      | **支持情况** | **备注**                              |
-|     xxx 模块      |   支持   |                                      |
-
-## 使用说明
-
-使用说明分为如下两个章节：
-
-- 快速上手
-
-    本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
-
-- 进阶使用
-
-    本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
-
-
-### 快速上手
-
-本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
-
-#### 硬件连接
-
-使用数据线连接开发板到 PC，打开电源开关。
-
-#### 编译下载
-
-双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
-
-> 工程默认配置使用 xxx 仿真器下载程序，在通过 xxx 连接开发板的基础上，点击下载按钮即可下载程序到开发板
-
-#### 运行结果
-
-下载程序成功之后，系统会自动运行，【这里写开发板运行起来之后的现象，如：LED 闪烁等】。
-
-连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
-
-```bash
- \ | /
-- RT -     Thread Operating System
- / | \     3.1.1 build Nov 19 2018
- 2006 - 2018 Copyright by rt-thread team
-msh >
-```
-### 进阶使用
-
-此 BSP 默认只开启了 GPIO 和 串口1 的功能，如果需使用 SD 卡、Flash 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下：
-
-1. 在 bsp 下打开 env 工具。
-
-2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
-
-3. 输入`pkgs --update`命令更新软件包。
-
-4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。
-
-本章节更多详细的介绍请参考 [IMXRT 系列 BSP 外设驱动使用教程](../docs/IMXRT系列BSP外设驱动使用教程.md)。
-
-## 注意事项
-
-- xxx
-
-## 联系人信息
-
-维护人:
-
--  [xxx](https://个人主页), 邮箱：<xxx@xxx.com>
\ No newline at end of file

bsp/imxrt/imxrt1052-sc-internal/SConscript

-# for module compiling
-import os
-from building import *
-
-cwd = GetCurrentDir()
-objs = []
-list = os.listdir(cwd)
-
-for d in list:
-    path = os.path.join(cwd, d)
-    if os.path.isfile(os.path.join(path, 'SConscript')):
-        objs = objs + SConscript(os.path.join(d, 'SConscript'))
-
-Return('objs')

bsp/imxrt/imxrt1052-sc-internal/SConstruct

-import os
-import sys
-import rtconfig
-
-if os.getenv('RTT_ROOT'):
-    RTT_ROOT = os.getenv('RTT_ROOT')
-else:
-    RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
-
-sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
-try:
-    from building import *
-except:
-    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
-    print(RTT_ROOT)
-    exit(-1)
-
-TARGET = 'rtthread.' + rtconfig.TARGET_EXT
-DefaultEnvironment(tools=[])
-if rtconfig.PLATFORM == 'armcc':
-    env = Environment(tools = ['mingw'],
-        AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
-        CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
-        CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
-        AR = rtconfig.AR, ARFLAGS = '-rc',
-        LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS,
-        # overwrite cflags, because cflags has '--C99'
-        CXXCOM = '$CXX -o $TARGET --cpp -c $CXXFLAGS $_CCCOMCOM $SOURCES')
-else:
-    env = Environment(tools = ['mingw'],
-        AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
-        CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
-        CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
-        AR = rtconfig.AR, ARFLAGS = '-rc',
-        LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS,
-        CXXCOM = '$CXX -o $TARGET -c $CXXFLAGS $_CCCOMCOM $SOURCES')
-
-env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
-
-if rtconfig.PLATFORM == 'iar':
-    env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
-    env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map')
-
-Export('RTT_ROOT')
-Export('rtconfig')
-
-SDK_ROOT = os.path.abspath('./')
-
-if os.path.exists(SDK_ROOT + '/libraries'):
-    libraries_path_prefix = SDK_ROOT + '/libraries'
-else:
-    libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
-
-SDK_LIB = libraries_path_prefix
-Export('SDK_LIB')
-
-# prepare building environment
-objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
-
-imxrt_library = 'MIMXRT1050'
-rtconfig.BSP_LIBRARY_TYPE = imxrt_library
-
-# include libraries
-objs.extend(SConscript(os.path.join(libraries_path_prefix, imxrt_library, 'SConscript')))
-
-# include drivers
-objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript')))
-
-# make a building
-DoBuilding(TARGET, objs)

bsp/imxrt/imxrt1052-sc-internal/applications/SConscript

-import rtconfig
-from building import *
-
-cwd = GetCurrentDir()
-src = Glob('*.c')
-CPPPATH = [cwd]
-
-# add for startup script 
-if rtconfig.CROSS_TOOL == 'gcc':
-    CPPDEFINES = ['__START=entry']
-else:
-    CPPDEFINES = []
-    
-group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
-
-Return('group')

bsp/imxrt/imxrt1052-sc-internal/applications/main.c

-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2019-04-29     tyustli      first version
- */
-
-#include <rtdevice.h>
-#include "drv_gpio.h"
-
-/* defined the LED pin: GPIO1_IO9 */
-#define LED0_PIN               GET_PIN(1, 9)
-
-int main(void)
-{
-    /* set LED0 pin mode to output */
-    rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
-
-    while (1)
-    {
-        rt_pin_write(LED0_PIN, PIN_HIGH);
-        rt_thread_mdelay(500);
-        rt_pin_write(LED0_PIN, PIN_LOW);
-        rt_thread_mdelay(500);
-    }
-}
-

bsp/imxrt/imxrt1052-sc-internal/board/Kconfig

-menu "Hardware Drivers Config"
-
-config SOC_IMXRT1052CVL5B
-    bool 
-    select SOC_MIMXRT1050_SERIES
-    select RT_USING_COMPONENTS_INIT
-    select RT_USING_USER_MAIN
-    default y
-
-menu "On-chip Peripheral Drivers"
-
-    config BSP_USING_DMA
-        bool "Enable DMA"
-        default n
-        
-    config BSP_USING_GPIO
-        bool "Enable GPIO"
-        select RT_USING_PIN
-        default y
-
-    menuconfig BSP_USING_LPUART
-        bool "Enable UART"
-        select RT_USING_SERIAL
-        default y
-        
-        if BSP_USING_LPUART
-            config BSP_USING_LPUART1
-                bool "Enable LPUART1"
-                default y
-
-                config BSP_LPUART1_RX_USING_DMA
-                    bool "Enable LPUART1 RX DMA"
-                    depends on BSP_USING_LPUART1
-                    select BSP_USING_DMA
-                    select RT_SERIAL_USING_DMA
-                    default n
-
-                    config BSP_LPUART1_RX_DMA_CHANNEL
-                        depends on BSP_LPUART1_RX_USING_DMA
-                        int "Set LPUART1 RX DMA channel (0-32)"
-                        default 0
-
-                config BSP_LPUART1_TX_USING_DMA
-                    bool "Enable LPUART1 TX DMA"
-                    depends on BSP_USING_LPUART1
-                    select BSP_USING_DMA
-                    select RT_SERIAL_USING_DMA
-                    default n
-
-                    config BSP_LPUART1_TX_DMA_CHANNEL
-                        depends on BSP_LPUART1_TX_USING_DMA
-                        int "Set LPUART1 TX DMA channel (0-32)"
-                        default 1
-            config BSP_USING_LPUART4
-                bool "Enable LPUART4"
-                default y
-
-                config BSP_LPUART4_RX_USING_DMA
-                    bool "Enable LPUART4 RX DMA"
-                    depends on BSP_USING_LPUART4
-                    select BSP_USING_DMA
-                    select RT_SERIAL_USING_DMA
-                    default n
-
-                    config BSP_LPUART4_RX_DMA_CHANNEL
-                        depends on BSP_LPUART4_RX_USING_DMA
-                        int "Set LPUART4 RX DMA channel (0-32)"
-                        default 0
-
-                config BSP_LPUART4_TX_USING_DMA
-                    bool "Enable LPUART4 TX DMA"
-                    depends on BSP_USING_LPUART4
-                    select BSP_USING_DMA
-                    select RT_SERIAL_USING_DMA
-                    default n
-
-                    config BSP_LPUART4_TX_DMA_CHANNEL
-                        depends on BSP_LPUART4_TX_USING_DMA
-                        int "Set LPUART4 TX DMA channel (0-32)"
-                        default 1
-        endif
-
-    menuconfig BSP_USING_PWM
-        bool "Enable PWM"
-        default n
-        select RT_USING_PWM
-        if BSP_USING_PWM
-            menuconfig BSP_USING_PWM2
-                bool "Enable output pwm2"
-                default n
-                if BSP_USING_PWM2
-                    config BSP_USING_PWM2_CH0
-                        bool "Enable PWM2 channel0"
-                        default n
-                    config BSP_USING_PWM2_CH1
-                        bool "Enable PWM2 channel1"
-                        default n
-                    config BSP_USING_PWM2_CH2
-                        bool "Enable PWM2 channel2"
-                        default n
-                    config BSP_USING_PWM2_CH3
-                        bool "Enable PWM2 channel3"
-                        default n
-                endif
-        endif
-
-    menuconfig BSP_USING_I2C
-        bool "Enable I2C"
-        select RT_USING_I2C
-        default n
-        if BSP_USING_I2C
-            menuconfig BSP_USING_I2C1
-                bool "Enable I2C1"
-                default n
-                if BSP_USING_I2C1
-                    choice
-                        prompt "Select I2C1 badurate"
-                        default HW_I2C1_BADURATE_100kHZ
-
-                        config HW_I2C1_BADURATE_100kHZ
-                            bool "Badurate 100kHZ"
-
-                        config HW_I2C1_BADURATE_400kHZ
-                            bool "Badurate 400kHZ"
-                    endchoice
-                endif
-            menuconfig BSP_USING_I2C2
-                bool "Enable I2C2"
-                default n
-                if BSP_USING_I2C2
-                    choice
-                        prompt "Select I2C2 badurate"
-                        default HW_I2C2_BADURATE_100kHZ
-
-                        config HW_I2C2_BADURATE_100kHZ
-                            bool "Badurate 100kHZ"
-
-                        config HW_I2C2_BADURATE_400kHZ
-                            bool "Badurate 400kHZ"
-                    endchoice
-                endif
-        endif
-
-    menuconfig BSP_USING_SPI
-        bool "Enable SPI"
-        select RT_USING_SPI
-        select RT_USING_PIN
-        default n
-
-        if BSP_USING_SPI
-            config BSP_USING_SPI4
-                bool "Enable SPI4"
-                default n
-
-            config BSP_SPI4_USING_DMA
-                bool "Enable SPI4 DMA xfer"
-                depends on BSP_USING_SPI4
-                select BSP_USING_DMA
-                default n
-
-            config BSP_SPI4_RX_DMA_CHANNEL
-                depends on BSP_SPI4_USING_DMA
-                int "Set SPI4 RX DMA channel (0-32)"
-                default 4
-
-            config BSP_SPI4_TX_DMA_CHANNEL
-                depends on BSP_SPI4_USING_DMA
-                int "Set SPI4 TX DMA channel (0-32)"
-                default 5
-        endif
-    
-    menuconfig BSP_USING_PULSE_ENCODER
-        bool "Enable Pulse Encoder"
-        select RT_USING_PULSE_ENCODER
-        default n
-
-        if BSP_USING_PULSE_ENCODER
-            config BSP_USING_PULSE_ENCODER1
-                bool "Enable PULSE_ENCODER1"
-                default n
-        endif
-
-    menuconfig BSP_USING_USB
-        bool "Enable USB"
-        default n
-        if BSP_USING_USB
-            config BSP_USING_USB0
-                bool "Enable USB0"
-                default n
-            choice
-                prompt "Select USB0 Role"
-                depends on BSP_USING_USB0
-                default BSP_USB0_HOST
-                
-                config BSP_USB0_HOST
-                    bool "Host"
-                    select RT_USING_USB_HOST
-
-                config BSP_USB0_DEVICE
-                    bool "Device"
-                    select RT_USING_USB_DEVICE
-            endchoice
-            config BSP_USING_USB1
-                bool "Enable USB1"
-                default n
-            choice
-                prompt "Select USB1 Role"
-                depends on BSP_USING_USB1
-                default BSP_USB1_HOST
-                
-                config BSP_USB1_HOST
-                    bool "Host"
-                    select RT_USING_USB_HOST
-
-                config BSP_USB1_DEVICE
-                    bool "Device"
-                    select RT_USING_USB_DEVICE
-            endchoice
-        endif
-endmenu
-
-menu "Onboard Peripheral Drivers"
-
-    config BSP_USING_SDRAM
-        bool "Enable SDRAM"
-        default n
-
-    config BSP_USING_MPU6050
-        bool "Enable MPU6050 (I2C1:J11 --> SCL; K11 --> SDA)"
-        select BSP_USING_I2C1
-        select PKG_USING_MPU6XXX
-        default n
-
-endmenu
-
-menu "Board extended module Drivers"
-
-endmenu
-
-endmenu

bsp/imxrt/imxrt1052-sc-internal/board/MCUX_Config/clock_config.h

-#ifndef _CLOCK_CONFIG_H_
-#define _CLOCK_CONFIG_H_
-
-#include "fsl_common.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-#define BOARD_XTAL0_CLK_HZ                         24000000U  /*!< Board xtal0 frequency in Hz */
-
-#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32k frequency in Hz */
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes default configuration of clocks.
- *
- */
-void BOARD_InitBootClocks(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ********************** Configuration BOARD_BootClockRUN ***********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockRUN configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKRUN_CORE_CLOCK             600000000U  /*!< Core clock frequency: 600000000Hz */
-
-/* Clock outputs (values are in Hz): */
-#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT               600000000UL
-#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT               40000000UL
-#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL
-#define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL
-#define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL
-#define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL
-#define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL
-#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT               60000000UL
-#define BOARD_BOOTCLOCKRUN_ENET1_TX_CLK               2400000UL
-#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK              2400000UL
-#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK           1200000UL
-#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL
-#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT           30000000UL
-#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           261818181UL
-#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      75000000UL
-#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      75000000UL
-#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               150000000UL
-#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT             9642857UL
-#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL
-#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL
-#define BOARD_BOOTCLOCKRUN_LVDS1_CLK                  1200000000UL
-#define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL
-#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            75000000UL
-#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK              480000000UL
-#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL
-#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT              63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1                 63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2                 0UL
-#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3                 30000000UL
-#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL
-#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL
-#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT              75000000UL
-#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL
-#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL
-#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             117333333UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL
-#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK                480000000UL
-#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK                480000000UL
-#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT            158400000UL
-#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT            158400000UL
-
-/*! @brief Arm PLL set for BOARD_BootClockRUN configuration.
- */
-extern const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN;
-/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
- */
-extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
-/*! @brief Usb2 PLL set for BOARD_BootClockRUN configuration.
- */
-extern const clock_usb_pll_config_t usb2PllConfig_BOARD_BootClockRUN;
-/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
- */
-extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
-
-/*******************************************************************************
- * API for BOARD_BootClockRUN configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockRUN(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-#endif /* _CLOCK_CONFIG_H_ */
-

bsp/imxrt/imxrt1052-sc-internal/board/MCUX_Config/pin_mux.c

-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Pins v9.0
-processor: MIMXRT1052xxxxB
-package_id: MIMXRT1052DVL6B
-mcu_data: ksdk2_0
-processor_version: 9.0.0
-board: IMXRT1050-EVKB
-pin_labels:
-- {pin_num: G11, pin_signal: GPIO_AD_B0_03, label: BSP_BEEP}
-- {pin_num: L13, pin_signal: GPIO_AD_B1_10, label: BSP_RS485_RE, identifier: CSI_D7}
-- {pin_num: J13, pin_signal: GPIO_AD_B1_11, label: BSP_DS18B20, identifier: CSI_D6}
-- {pin_num: K12, pin_signal: GPIO_AD_B1_05, label: BSP_AP3216C_INT, identifier: CSI_MCLK}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-
-#include "fsl_common.h"
-#include "fsl_xbara.h"
-#include "fsl_iomuxc.h"
-#include "fsl_gpio.h"
-#include "pin_mux.h"
-
-/* FUNCTION ************************************************************************************************************
- * 
- * Function Name : BOARD_InitBootPins
- * Description   : Calls initialization functions.
- * 
- * END ****************************************************************************************************************/
-void BOARD_InitBootPins(void) {
-}
-
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitPins:
-- options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: K14, peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_12}
-  - {pin_num: L14, peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_13}
-  - {pin_num: J1, peripheral: USDHC1, signal: 'usdhc_data, 0', pin_signal: GPIO_SD_B0_02}
-  - {pin_num: K1, peripheral: USDHC1, signal: 'usdhc_data, 1', pin_signal: GPIO_SD_B0_03}
-  - {pin_num: H2, peripheral: USDHC1, signal: 'usdhc_data, 2', pin_signal: GPIO_SD_B0_04}
-  - {pin_num: J2, peripheral: USDHC1, signal: 'usdhc_data, 3', pin_signal: GPIO_SD_B0_05}
-  - {pin_num: J3, peripheral: USDHC1, signal: usdhc_clk, pin_signal: GPIO_SD_B0_01}
-  - {pin_num: J4, peripheral: USDHC1, signal: usdhc_cmd, pin_signal: GPIO_SD_B0_00}
-  - {pin_num: D13, peripheral: USDHC1, signal: usdhc_cd_b, pin_signal: GPIO_B1_12}
-  - {pin_num: M3, peripheral: PWM2, signal: 'A, 3', pin_signal: GPIO_SD_B1_02}
-  - {pin_num: L5, peripheral: GPIO3, signal: 'gpio_io, 00', pin_signal: GPIO_SD_B1_00, direction: OUTPUT, gpio_init_state: 'true', software_input_on: Enable, open_drain: Enable}
-  - {pin_num: M5, peripheral: GPIO3, signal: 'gpio_io, 01', pin_signal: GPIO_SD_B1_01, direction: OUTPUT, gpio_init_state: 'true', software_input_on: Enable, open_drain: Enable}
-  - {pin_num: J14, peripheral: CSI, signal: 'csi_data, 02', pin_signal: GPIO_AD_B1_15}
-  - {pin_num: G12, peripheral: CSI, signal: 'csi_data, 03', pin_signal: GPIO_AD_B1_14}
-  - {pin_num: H11, peripheral: CSI, signal: 'csi_data, 04', pin_signal: GPIO_AD_B1_13}
-  - {pin_num: H12, peripheral: CSI, signal: 'csi_data, 05', pin_signal: GPIO_AD_B1_12}
-  - {pin_num: J13, peripheral: CSI, signal: 'csi_data, 06', pin_signal: GPIO_AD_B1_11}
-  - {pin_num: L13, peripheral: CSI, signal: 'csi_data, 07', pin_signal: GPIO_AD_B1_10}
-  - {pin_num: M13, peripheral: CSI, signal: 'csi_data, 08', pin_signal: GPIO_AD_B1_09}
-  - {pin_num: H13, peripheral: CSI, signal: 'csi_data, 09', pin_signal: GPIO_AD_B1_08}
-  - {pin_num: L12, peripheral: CSI, signal: csi_pixclk, pin_signal: GPIO_AD_B1_04}
-  - {pin_num: K10, peripheral: CSI, signal: csi_hsync, pin_signal: GPIO_AD_B1_07}
-  - {pin_num: J12, peripheral: CSI, signal: csi_vsync, pin_signal: GPIO_AD_B1_06}
-  - {pin_num: H14, peripheral: ADC1, signal: 'IN, 3', pin_signal: GPIO_AD_B0_14}
-  - {pin_num: M12, peripheral: ADC1, signal: 'IN, 8', pin_signal: GPIO_AD_B1_03}
-  - {pin_num: L11, peripheral: ADC1, signal: 'IN, 7', pin_signal: GPIO_AD_B1_02}
-  - {pin_num: K11, peripheral: LPI2C1, signal: SDA, pin_signal: GPIO_AD_B1_01}
-  - {pin_num: J11, peripheral: LPI2C1, signal: SCL, pin_signal: GPIO_AD_B1_00}
-  - {pin_num: A12, peripheral: GPIO2, signal: 'gpio_io, 24', pin_signal: GPIO_B1_08, direction: INPUT}
-  - {pin_num: B12, peripheral: GPIO2, signal: 'gpio_io, 23', pin_signal: GPIO_B1_07, direction: INPUT}
-  - {pin_num: A13, peripheral: GPIO2, signal: 'gpio_io, 25', pin_signal: GPIO_B1_09, direction: INPUT}
-  - {pin_num: A8, peripheral: PWM2, signal: 'A, 0', pin_signal: GPIO_B0_06}
-  - {pin_num: A9, peripheral: PWM2, signal: 'B, 0', pin_signal: GPIO_B0_07}
-  - {pin_num: B9, peripheral: PWM2, signal: 'A, 1', pin_signal: GPIO_B0_08}
-  - {pin_num: C9, peripheral: PWM2, signal: 'B, 1', pin_signal: GPIO_B0_09}
-  - {pin_num: D9, peripheral: PWM2, signal: 'A, 2', pin_signal: GPIO_B0_10}
-  - {pin_num: A10, peripheral: PWM2, signal: 'B, 2', pin_signal: GPIO_B0_11, identifier: ''}
-  - {pin_num: C10, peripheral: GPIO2, signal: 'gpio_io, 12', pin_signal: GPIO_B0_12, direction: OUTPUT}
-  - {pin_num: B13, peripheral: GPIO2, signal: 'gpio_io, 26', pin_signal: GPIO_B1_10, direction: INPUT}
-  - {pin_num: E7, peripheral: LPSPI4, signal: SDI, pin_signal: GPIO_B0_01}
-  - {pin_num: E8, peripheral: LPSPI4, signal: SDO, pin_signal: GPIO_B0_02}
-  - {pin_num: D8, peripheral: LPSPI4, signal: SCK, pin_signal: GPIO_B0_03}
-  - {pin_num: D7, peripheral: LPSPI4, signal: PCS0, pin_signal: GPIO_B0_00}
-  - {pin_num: D11, peripheral: LPSPI4, signal: PCS1, pin_signal: GPIO_B1_03}
-  - {pin_num: C11, peripheral: LPSPI4, signal: PCS2, pin_signal: GPIO_B1_02}
-  - {pin_num: C13, peripheral: GPIO2, signal: 'gpio_io, 27', pin_signal: GPIO_B1_11, direction: OUTPUT}
-  - {pin_num: C12, peripheral: GPIO2, signal: 'gpio_io, 22', pin_signal: GPIO_B1_06, direction: OUTPUT}
-  - {pin_num: E12, peripheral: GPIO2, signal: 'gpio_io, 20', pin_signal: GPIO_B1_04, direction: OUTPUT}
-  - {pin_num: D12, peripheral: GPIO2, signal: 'gpio_io, 21', pin_signal: GPIO_B1_05, direction: INPUT}
-  - {pin_num: D10, peripheral: ENC1, signal: 'PHASE, A', pin_signal: GPIO_B0_13}
-  - {pin_num: E10, peripheral: ENC1, signal: 'PHASE, B', pin_signal: GPIO_B0_14}
-  - {pin_num: A11, peripheral: LPUART4, signal: TX, pin_signal: GPIO_B1_00}
-  - {pin_num: B11, peripheral: LPUART4, signal: RX, pin_signal: GPIO_B1_01}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-void BOARD_InitPins(void) {
-  CLOCK_EnableClock(kCLOCK_Iomuxc);           
-  CLOCK_EnableClock(kCLOCK_Xbar1);            
-
-  /* GPIO configuration of LCDIF_D8 on GPIO_B0_12 (pin C10) */
-  gpio_pin_config_t LCDIF_D8_config = {
-      .direction = kGPIO_DigitalOutput,
-      .outputLogic = 0U,
-      .interruptMode = kGPIO_NoIntmode
-  };
-  /* Initialize GPIO functionality on GPIO_B0_12 (pin C10) */
-  GPIO_PinInit(GPIO2, 12U, &LCDIF_D8_config);
-
-  /* GPIO configuration of ENET_RXD0 on GPIO_B1_04 (pin E12) */
-  gpio_pin_config_t ENET_RXD0_config = {
-      .direction = kGPIO_DigitalOutput,
-      .outputLogic = 0U,
-      .interruptMode = kGPIO_NoIntmode
-  };
-  /* Initialize GPIO functionality on GPIO_B1_04 (pin E12) */
-  GPIO_PinInit(GPIO2, 20U, &ENET_RXD0_config);
-
-  /* GPIO configuration of ENET_RXD1 on GPIO_B1_05 (pin D12) */
-  gpio_pin_config_t ENET_RXD1_config = {
-      .direction = kGPIO_DigitalInput,
-      .outputLogic = 0U,
-      .interruptMode = kGPIO_NoIntmode
-  };
-  /* Initialize GPIO functionality on GPIO_B1_05 (pin D12) */
-  GPIO_PinInit(GPIO2, 21U, &ENET_RXD1_config);
-
-  /* GPIO configuration of ENET_CRS_DV on GPIO_B1_06 (pin C12) */
-  gpio_pin_config_t ENET_CRS_DV_config = {
-      .direction = kGPIO_DigitalOutput,
-      .outputLogic = 0U,
-      .interruptMode = kGPIO_NoIntmode
-  };
-  /* Initialize GPIO functionality on GPIO_B1_06 (pin C12) */
-  GPIO_PinInit(GPIO2, 22U, &ENET_CRS_DV_config);
-
-  /* GPIO configuration of ENET_TXD0 on GPIO_B1_07 (pin B12) */
-  gpio_pin_config_t ENET_TXD0_config = {
-      .direction = kGPIO_DigitalInput,
-      .outputLogic = 0U,
-      .interruptMode = kGPIO_NoIntmode
-  };
-  /* Initialize GPIO functionality on GPIO_B1_07 (pin B12) */
-  GPIO_PinInit(GPIO2, 23U, &ENET_TXD0_config);
-
-  /* GPIO configuration of ENET_TXD1 on GPIO_B1_08 (pin A12) */
-  gpio_pin_config_t ENET_TXD1_config = {
-      .direction = kGPIO_DigitalInput,
-      .outputLogic = 0U,
-      .interruptMode = kGPIO_NoIntmode
-  };
-  /* Initialize GPIO functionality on GPIO_B1_08 (pin A12) */
-  GPIO_PinInit(GPIO2, 24U, &ENET_TXD1_config);
-
-  /* GPIO configuration of ENET_TXEN on GPIO_B1_09 (pin A13) */
-  gpio_pin_config_t ENET_TXEN_config = {
-      .direction = kGPIO_DigitalInput,
-      .outputLogic = 0U,
-      .interruptMode = kGPIO_NoIntmode
-  };
-  /* Initialize GPIO functionality on GPIO_B1_09 (pin A13) */
-  GPIO_PinInit(GPIO2, 25U, &ENET_TXEN_config);
-
-  /* GPIO configuration of ENET_TX_CLK on GPIO_B1_10 (pin B13) */
-  gpio_pin_config_t ENET_TX_CLK_config = {
-      .direction = kGPIO_DigitalInput,
-      .outputLogic = 0U,
-      .interruptMode = kGPIO_NoIntmode
-  };
-  /* Initialize GPIO functionality on GPIO_B1_10 (pin B13) */
-  GPIO_PinInit(GPIO2, 26U, &ENET_TX_CLK_config);
-
-  /* GPIO configuration of ENET_RXER on GPIO_B1_11 (pin C13) */
-  gpio_pin_config_t ENET_RXER_config = {
-      .direction = kGPIO_DigitalOutput,
-      .outputLogic = 0U,
-      .interruptMode = kGPIO_NoIntmode
-  };
-  /* Initialize GPIO functionality on GPIO_B1_11 (pin C13) */
-  GPIO_PinInit(GPIO2, 27U, &ENET_RXER_config);
-
-  /* GPIO configuration of FlexSPI_D3_B on GPIO_SD_B1_00 (pin L5) */
-  gpio_pin_config_t FlexSPI_D3_B_config = {
-      .direction = kGPIO_DigitalOutput,
-      .outputLogic = 1U,
-      .interruptMode = kGPIO_NoIntmode
-  };
-  /* Initialize GPIO functionality on GPIO_SD_B1_00 (pin L5) */
-  GPIO_PinInit(GPIO3, 0U, &FlexSPI_D3_B_config);
-
-  /* GPIO configuration of FlexSPI_D2_B on GPIO_SD_B1_01 (pin M5) */
-  gpio_pin_config_t FlexSPI_D2_B_config = {
-      .direction = kGPIO_DigitalOutput,
-      .outputLogic = 1U,
-      .interruptMode = kGPIO_NoIntmode
-  };
-  /* Initialize GPIO functionality on GPIO_SD_B1_01 (pin M5) */
-  GPIO_PinInit(GPIO3, 1U, &FlexSPI_D2_B_config);
-
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_14_GPIO1_IO14, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_02_GPIO1_IO18, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_03_GPIO1_IO19, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_04_CSI_PIXCLK, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_CSI_VSYNC, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_CSI_HSYNC, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_08_CSI_DATA09, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_09_CSI_DATA08, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_10_CSI_DATA07, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_11_CSI_DATA06, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_12_CSI_DATA05, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_13_CSI_DATA04, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_CSI_DATA03, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_CSI_DATA02, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B0_00_LPSPI4_PCS0, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B0_01_LPSPI4_SDI, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B0_02_LPSPI4_SDO, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B0_03_LPSPI4_SCK, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B0_06_FLEXPWM2_PWMA00, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B0_07_FLEXPWM2_PWMB00, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B0_08_FLEXPWM2_PWMA01, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B0_09_FLEXPWM2_PWMB01, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B0_10_FLEXPWM2_PWMA02, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B0_11_FLEXPWM2_PWMB02, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B0_12_GPIO2_IO12, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B0_13_XBAR1_INOUT11, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B0_14_XBAR1_INOUT12, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B1_00_LPUART4_TX, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B1_01_LPUART4_RX, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B1_02_LPSPI4_PCS2, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B1_03_LPSPI4_PCS1, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B1_04_GPIO2_IO20, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B1_05_GPIO2_IO21, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B1_06_GPIO2_IO22, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B1_07_GPIO2_IO23, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B1_08_GPIO2_IO24, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B1_09_GPIO2_IO25, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B1_10_GPIO2_IO26, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B1_11_GPIO2_IO27, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_B1_12_USDHC1_CD_B, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_00_USDHC1_CMD, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_01_USDHC1_CLK, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, 0U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_00_GPIO3_IO00, 1U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_01_GPIO3_IO01, 1U); 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_02_FLEXPWM2_PWMA03, 0U); 
-  IOMUXC_GPR->GPR6 = ((IOMUXC_GPR->GPR6 &
-    (~(IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_MASK))) 
-      | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11(0x00U) 
-      | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12(0x00U) 
-    );
-  XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout11, kXBARA1_OutputEnc1PhaseAInput); 
-  XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout12, kXBARA1_OutputEnc1PhaseBInput); 
-  IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_00_GPIO3_IO00, 0x18B0U); 
-  IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_01_GPIO3_IO01, 0x18B0U); 
-}
-
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/

bsp/imxrt/imxrt1052-sc-internal/board/SConscript

-from building import *
-
-cwd = GetCurrentDir()
-
-# add the general drivers.
-src = Split("""
-board.c
-MCUX_Config/clock_config.c
-MCUX_Config/pin_mux.c
-""")
-
-CPPPATH = [cwd,cwd + '/MCUX_Config',cwd + '/ports']
-CPPDEFINES = ['CPU_MIMXRT1052CVL5B', 'SKIP_SYSCLK_INIT', 'EVK_MCIMXRM', 'FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1','XIP_EXTERNAL_FLASH=1','XIP_BOOT_HEADER_ENABLE=1']
-
-group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
-
-Return('group')

bsp/imxrt/imxrt1052-sc-internal/board/board.c

-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2009-01-05     Bernard      first implementation
- */
-
-#include <rthw.h>
-#include <rtthread.h>
-#include "board.h"
-#include "pin_mux.h"
-
-#ifdef BSP_USING_DMA
-#include "fsl_dmamux.h"
-#include "fsl_edma.h"
-#endif
-
-#define NVIC_PRIORITYGROUP_0         0x00000007U /*!< 0 bits for pre-emption priority
-                                                      4 bits for subpriority */
-#define NVIC_PRIORITYGROUP_1         0x00000006U /*!< 1 bits for pre-emption priority
-                                                      3 bits for subpriority */
-#define NVIC_PRIORITYGROUP_2         0x00000005U /*!< 2 bits for pre-emption priority
-                                                      2 bits for subpriority */
-#define NVIC_PRIORITYGROUP_3         0x00000004U /*!< 3 bits for pre-emption priority
-                                                      1 bits for subpriority */
-#define NVIC_PRIORITYGROUP_4         0x00000003U /*!< 4 bits for pre-emption priority
-                                                      0 bits for subpriority */
-
-/* MPU configuration. */
-static void BOARD_ConfigMPU(void)
-{
-    /* Disable I cache and D cache */
-    SCB_DisableICache();
-    SCB_DisableDCache();
-
-    /* Disable MPU */
-    ARM_MPU_Disable();
-
-    /* Region 0 setting */
-    MPU->RBAR = ARM_MPU_RBAR(0, 0xC0000000U);
-    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB);
-
-    /* Region 1 setting */
-    MPU->RBAR = ARM_MPU_RBAR(1, 0x80000000U);
-    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB);
-
-    /* Region 2 setting */
-    // spi flash: normal type, cacheable, no bufferable, no shareable
-    MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U);
-    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 0, 0, ARM_MPU_REGION_SIZE_512MB);
-
-    /* Region 3 setting */
-    MPU->RBAR = ARM_MPU_RBAR(3, 0x00000000U);
-    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB);
-
-    /* Region 4 setting */
-    MPU->RBAR = ARM_MPU_RBAR(4, 0x00000000U);
-    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
-
-    /* Region 5 setting */
-    MPU->RBAR = ARM_MPU_RBAR(5, 0x20000000U);
-    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
-
-    /* Region 6 setting */
-    MPU->RBAR = ARM_MPU_RBAR(6, 0x20200000U);
-    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_256KB);
-
-#if defined(BSP_USING_SDRAM)
-    /* Region 7 setting */
-    MPU->RBAR = ARM_MPU_RBAR(7, 0x80000000U);
-    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_32MB);
-
-    /* Region 8 setting */
-    MPU->RBAR = ARM_MPU_RBAR(8, 0x81E00000U);
-    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 1, 1, 0, 0, 0, ARM_MPU_REGION_SIZE_2MB);
-#endif
-
-    /* Enable MPU */
-    ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);
-
-    /* Enable I cache and D cache */
-    SCB_EnableDCache();
-    SCB_EnableICache();
-}
-
-
-/* This is the timer interrupt service routine. */
-void SysTick_Handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    rt_tick_increase();
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-
-#ifdef BSP_USING_DMA
-void imxrt_dma_init(void)
-{
-    edma_config_t config;
-
-    DMAMUX_Init(DMAMUX);
-    EDMA_GetDefaultConfig(&config);
-    EDMA_Init(DMA0, &config);
-}
-#endif
-
-void rt_hw_board_init()
-{
-    BOARD_ConfigMPU();
-    BOARD_InitPins();
-    BOARD_BootClockRUN();
-
-    NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
-    SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
-
-#ifdef BSP_USING_DMA
-    imxrt_dma_init();
-#endif
-
-#ifdef RT_USING_HEAP
-    rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
-#endif
-
-#ifdef RT_USING_COMPONENTS_INIT
-    rt_components_board_init();
-#endif
-
-#ifdef RT_USING_CONSOLE
-    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
-#endif
-}
-

bsp/imxrt/imxrt1052-sc-internal/board/board.h

-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2009-09-22     Bernard      add board.h to this bsp
- */
-
-// <<< Use Configuration Wizard in Context Menu >>>
-#ifndef __BOARD_H__
-#define __BOARD_H__
-
-#include "fsl_common.h"
-#include "clock_config.h"
-
-#ifdef __CC_ARM
-extern int Image$$RTT_HEAP$$ZI$$Base;
-extern int Image$$RTT_HEAP$$ZI$$Limit;
-#define HEAP_BEGIN          (&Image$$RTT_HEAP$$ZI$$Base)
-#define HEAP_END            (&Image$$RTT_HEAP$$ZI$$Limit)
-
-#elif __ICCARM__
-#pragma section="HEAP"
-#define HEAP_BEGIN          (__segment_end("HEAP"))
-extern void __RTT_HEAP_END;
-#define HEAP_END            (&__RTT_HEAP_END)
-
-#else
-extern int heap_start;
-extern int heap_end;
-#define HEAP_BEGIN          (&heap_start)
-#define HEAP_END            (&heap_end)
-#endif
-
-#define HEAP_SIZE           ((uint32_t)HEAP_END - (uint32_t)HEAP_BEGIN)
-
-#define BOARD_FLASH_SIZE    (0x400000U)
-
-void rt_hw_board_init(void);
-
-#endif
-

bsp/imxrt/imxrt1052-sc-internal/board/linker_scripts/link.icf

-/*
-** ###################################################################
-**     Processors:          MIMXRT1052CVJ5B
-**                          MIMXRT1052CVL5B
-**                          MIMXRT1052DVJ6B
-**                          MIMXRT1052DVL6B
-**
-**     Compiler:            IAR ANSI C/C++ Compiler for ARM
-**     Reference manual:    IMXRT1050RM Rev.1, 03/2018
-**     Version:             rev. 1.0, 2018-09-21
-**     Build:               b180921
-**
-**     Abstract:
-**         Linker file for the IAR ANSI C/C++ Compiler for ARM
-**
-**     Copyright 2016 Freescale Semiconductor, Inc.
-**     Copyright 2016-2018 NXP
-**     All rights reserved.
-**
-**     SPDX-License-Identifier: BSD-3-Clause
-**
-**     http:                 www.nxp.com
-**     mail:                 support@nxp.com
-**
-** ###################################################################
-*/
-
-define symbol m_interrupts_start       = 0x60002000;
-define symbol m_interrupts_end         = 0x600023FF;
-
-define symbol m_text_start             = 0x60002400;
-define symbol m_text_end               = 0x63FFFFFF;
-
-define symbol m_data_start             = 0x20000000;
-define symbol m_data_end               = 0x2001FFFF;
-
-define symbol m_data2_start            = 0x20200000;
-define symbol m_data2_end              = 0x2023FFFF;
-
-define exported symbol m_boot_hdr_conf_start = 0x60000000;
-define symbol m_boot_hdr_ivt_start           = 0x60001000;
-define symbol m_boot_hdr_boot_data_start     = 0x60001020;
-define symbol m_boot_hdr_dcd_data_start      = 0x60001030;
-
-/* Sizes */
-if (isdefinedsymbol(__stack_size__)) {
-  define symbol __size_cstack__        = __stack_size__;
-} else {
-  define symbol __size_cstack__        = 0x0400;
-}
-
-if (isdefinedsymbol(__heap_size__)) {
-  define symbol __size_heap__          = __heap_size__;
-} else {
-  define symbol __size_heap__          = 0x0400;
-}
-
-define exported symbol __VECTOR_TABLE  = m_interrupts_start;
-define exported symbol __VECTOR_RAM    = m_interrupts_start;
-define exported symbol __RAM_VECTOR_TABLE_SIZE = 0x0;
-define exported symbol __RTT_HEAP_END = m_data2_end;
-
-define memory mem with size = 4G;
-define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
-                          | mem:[from m_text_start to m_text_end];
-
-define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__];
-define region DATA2_region = mem:[from m_data2_start to m_data2_end];
-define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];
-
-define block CSTACK    with alignment = 8, size = __size_cstack__   { };
-define block HEAP      with alignment = 8, size = __size_heap__     { };
-define block RW        { readwrite };
-define block ZI        { zi };
-define block NCACHE_VAR    { section NonCacheable , section NonCacheable.init };
-
-initialize by copy { readwrite, section .textrw };
-do not initialize  { section .noinit };
-
-place at address mem: m_interrupts_start    { readonly section .intvec };
-
-place at address mem:m_boot_hdr_conf_start { section .boot_hdr.conf };
-place at address mem:m_boot_hdr_ivt_start { section .boot_hdr.ivt };
-place at address mem:m_boot_hdr_boot_data_start { readonly section .boot_hdr.boot_data };
-place at address mem:m_boot_hdr_dcd_data_start { readonly section .boot_hdr.dcd_data };
-
-keep{ section .boot_hdr.conf, section .boot_hdr.ivt, section .boot_hdr.boot_data, section .boot_hdr.dcd_data };
-
-place in TEXT_region                        { readonly };
-place in DATA_region                        { block RW };
-place in DATA_region                        { block ZI };
-place in DATA_region                        { last block HEAP };
-place in DATA_region                        { block NCACHE_VAR };
-place in CSTACK_region                      { block CSTACK };
-

bsp/imxrt/imxrt1052-sc-internal/board/linker_scripts/link.lds

-/*
-** ###################################################################
-**     Processors:          MIMXRT1052CVJ5B
-**                          MIMXRT1052CVL5B
-**                          MIMXRT1052DVJ6B
-**                          MIMXRT1052DVL6B
-**
-**     Compiler:            GNU C Compiler
-**     Reference manual:    IMXRT1050RM Rev.1, 03/2018
-**     Version:             rev. 0.1, 2017-01-10
-**     Build:               b180509
-**
-**     Abstract:
-**         Linker file for the GNU C Compiler
-**
-**     The Clear BSD License
-**     Copyright 2016 Freescale Semiconductor, Inc.
-**     Copyright 2016-2018 NXP
-**     All rights reserved.
-**
-**     Redistribution and use in source and binary forms, with or without
-**     modification, are permitted (subject to the limitations in the
-**     disclaimer below) provided that the following conditions are met:
-**
-**     * Redistributions of source code must retain the above copyright
-**       notice, this list of conditions and the following disclaimer.
-**
-**     * Redistributions in binary form must reproduce the above copyright
-**       notice, this list of conditions and the following disclaimer in the
-**       documentation and/or other materials provided with the distribution.
-**
-**     * Neither the name of the copyright holder nor the names of its
-**       contributors may be used to endorse or promote products derived from
-**       this software without specific prior written permission.
-**
-**     NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
-**     GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
-**     HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
-**     WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-**     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-**     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
-**     LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-**     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-**     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
-**     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
-**     WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
-**     OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
-**     IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-**
-**     http:                 www.nxp.com
-**     mail:                 support@nxp.com
-**
-** ###################################################################
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0400;
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
-
-/* Specify the memory areas */
-MEMORY
-{
-  m_flash_config        (RX)  : ORIGIN = 0x60000000, LENGTH = 0x00001000
-  m_ivt                 (RX)  : ORIGIN = 0x60001000, LENGTH = 0x00001000
-  m_interrupts          (RX)  : ORIGIN = 0x60002000, LENGTH = 0x00000400
-  m_text                (RX)  : ORIGIN = 0x60002400, LENGTH = 0x03FFDC00
-  m_data                (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00020000
-  m_data2               (RW)  : ORIGIN = 0x20200000, LENGTH = 0x00040000
-}
-
-/* Define output sections */
-SECTIONS
-{
-  .flash_config :
-  {
-    . = ALIGN(4);
-    __FLASH_BASE = .;
-    KEEP(* (.boot_hdr.conf))     /* flash config section */
-    . = ALIGN(4);
-  } > m_flash_config
-
-  ivt_begin= ORIGIN(m_flash_config) + LENGTH(m_flash_config);
-
-  .ivt : AT(ivt_begin)
-  {
-    . = ALIGN(4);
-	KEEP(* (.boot_hdr.ivt))           /* ivt section */
-	KEEP(* (.boot_hdr.boot_data))     /* boot section */
-	KEEP(* (.boot_hdr.dcd_data))      /* dcd section */
-    . = ALIGN(4);
-  } > m_ivt
-
-  /* The startup code goes first into internal RAM */
-  .interrupts :
-  {
-    __VECTOR_TABLE = .;
-    . = ALIGN(4);
-    KEEP(*(.isr_vector))     /* Startup code */
-    . = ALIGN(4);
-  } > m_interrupts
-
-  __VECTOR_RAM = __VECTOR_TABLE;
-  __RAM_VECTOR_TABLE_SIZE_BYTES = 0x0;
-
-  /* The program code and other data goes into internal RAM */
-  .text :
-  {
-    . = ALIGN(4);
-    *(.text)                 /* .text sections (code) */
-    *(.text*)                /* .text* sections (code) */
-    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
-    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
-    *(.glue_7)               /* glue arm to thumb code */
-    *(.glue_7t)              /* glue thumb to arm code */
-    *(.eh_frame)
-    KEEP (*(.init))
-    KEEP (*(.fini))
-    . = ALIGN(4);
-
-    /* section information for finsh shell */
-    . = ALIGN(4);
-    __fsymtab_start = .;
-    KEEP(*(FSymTab))
-    __fsymtab_end = .;
-    . = ALIGN(4);
-    __vsymtab_start = .;
-    KEEP(*(VSymTab))
-    __vsymtab_end = .;
-    . = ALIGN(4);
-
-    /* section information for initial. */
-    . = ALIGN(4);
-    __rt_init_start = .;
-    KEEP(*(SORT(.rti_fn*)))
-    __rt_init_end = .;
-  } > m_text
-
-  .ARM.extab :
-  {
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-  } > m_text
-
-  .ARM :
-  {
-    __exidx_start = .;
-    *(.ARM.exidx*)
-    __exidx_end = .;
-  } > m_text
-
- .ctors :
-  {
-    __CTOR_LIST__ = .;
-    /* gcc uses crtbegin.o to find the start of
-       the constructors, so we make sure it is
-       first.  Because this is a wildcard, it
-       doesn't matter if the user does not
-       actually link against crtbegin.o; the
-       linker won't look for a file to match a
-       wildcard.  The wildcard also means that it
-       doesn't matter which directory crtbegin.o
-       is in.  */
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*crtbegin?.o(.ctors))
-    /* We don't want to include the .ctor section from
-       from the crtend.o file until after the sorted ctors.
-       The .ctor section from the crtend file contains the
-       end of ctors marker and it must be last */
-    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*(.ctors))
-    __CTOR_END__ = .;
-  } > m_text
-
-  .dtors :
-  {
-    __DTOR_LIST__ = .;
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*crtbegin?.o(.dtors))
-    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*(.dtors))
-    __DTOR_END__ = .;
-  } > m_text
-
-  .preinit_array :
-  {
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array*))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-  } > m_text
-
-  .init_array :
-  {
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array*))
-    PROVIDE_HIDDEN (__init_array_end = .);
-  } > m_text
-
-  .fini_array :
-  {
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT(.fini_array.*)))
-    KEEP (*(.fini_array*))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-  } > m_text
-
-  __etext = .;    /* define a global symbol at end of code */
-  __DATA_ROM = .; /* Symbol is used by startup for data initialization */
-
-  .data : AT(__DATA_ROM)
-  {
-    . = ALIGN(4);
-    __DATA_RAM = .;
-    __data_start__ = .;      /* create a global symbol at data start */
-    *(m_usb_dma_init_data)
-    *(.data)                 /* .data sections */
-    *(.data*)                /* .data* sections */
-    KEEP(*(.jcr*))
-    . = ALIGN(4);
-    __data_end__ = .;        /* define a global symbol at data end */
-  } > m_data
-
-  __NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__);
-  .ncache.init : AT(__NDATA_ROM)
-  {
-    __noncachedata_start__ = .;   /* create a global symbol at ncache data start */
-    *(NonCacheable.init)
-    . = ALIGN(4);
-    __noncachedata_init_end__ = .;   /* create a global symbol at initialized ncache data end */
-  } > m_data
-  . = __noncachedata_init_end__;
-  .ncache :
-  {
-    *(NonCacheable)
-    . = ALIGN(4);
-    __noncachedata_end__ = .;     /* define a global symbol at ncache data end */
-  } > m_data
-
-  __DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
-  text_end = ORIGIN(m_text) + LENGTH(m_text);
-  ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
-
-  /* Uninitialized data section */
-  .bss :
-  {
-    /* This is used by the startup in order to initialize the .bss section */
-    . = ALIGN(4);
-    __START_BSS = .;
-    __bss_start__ = .;
-    *(m_usb_dma_noninit_data)
-    *(.bss)
-    *(.bss*)
-    *(COMMON)
-    . = ALIGN(4);
-    __bss_end__ = .;
-    __END_BSS = .;
-  } > m_data
-
-  .heap :
-  {
-    . = ALIGN(8);
-    __end__ = .;
-    PROVIDE(end = .);
-    __HeapBase = .;
-    . += HEAP_SIZE;
-    __HeapLimit = .;
-    __heap_limit = .; /* Add for _sbrk */
-  } > m_data
-
-  .stack :
-  {
-    . = ALIGN(8);
-    stack_start = .;
-    . += STACK_SIZE;
-    stack_end = .;
-    __StackTop = .;
-  } > m_data
-  
-  .RTT_HEAP :
-  {
-    heap_start = .;
-    . = ALIGN(8);
-  } > m_data
-
-  PROVIDE(heap_end = ORIGIN(m_data) + LENGTH(m_data));
-
-  /* Initializes stack on the end of block */
-  __StackLimit = __StackTop - STACK_SIZE;
-  PROVIDE(__stack = __StackTop);
-
-  .ARM.attributes 0 : { *(.ARM.attributes) }
-
-  ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
-}
-

bsp/imxrt/imxrt1052-sc-internal/board/linker_scripts/link.sct

-#! armcc -E
-/*
-** ###################################################################
-**     Processors:          MIMXRT1052CVJ5B
-**                          MIMXRT1052CVL5B
-**                          MIMXRT1052DVJ6B
-**                          MIMXRT1052DVL6B
-**
-**     Compiler:            Keil ARM C/C++ Compiler
-**     Reference manual:    IMXRT1050RM Rev.1, 03/2018
-**     Version:             rev. 1.0, 2018-09-21
-**     Build:               b180921
-**
-**     Abstract:
-**         Linker file for the Keil ARM C/C++ Compiler
-**
-**     Copyright 2016 Freescale Semiconductor, Inc.
-**     Copyright 2016-2018 NXP
-**     All rights reserved.
-**
-**     SPDX-License-Identifier: BSD-3-Clause
-**
-**     http:                 www.nxp.com
-**     mail:                 support@nxp.com
-**
-** ###################################################################
-*/
-
-#define m_flash_config_start           0x60000000
-#define m_flash_config_size            0x00001000
-
-#define m_ivt_start                    0x60001000
-#define m_ivt_size                     0x00001000
-
-#define m_interrupts_start             0x60002000
-#define m_interrupts_size              0x00000400
-
-#define m_text_start                   0x60002400
-#define m_text_size                    0x1fffdbff
-
-#define m_data_start                   0x20000000
-#define m_data_size                    0x00020000
-
-#define m_data2_start                  0x20200000
-#define m_data2_size                   0x00040000
-
-/* Sizes */
-#if (defined(__stack_size__))
-  #define Stack_Size                   __stack_size__
-#else
-  #define Stack_Size                   0x0400
-#endif
-
-#if (defined(__heap_size__))
-  #define Heap_Size                    __heap_size__
-#else
-  #define Heap_Size                    0x0400
-#endif
-
-#define RTT_HEAP_SIZE (m_data_size-ImageLength(RW_m_data)-ImageLength(ARM_LIB_HEAP)-ImageLength(ARM_LIB_STACK))
-
-#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
-LR_m_text m_flash_config_start m_text_start+m_text_size-m_flash_config_start {   ; load region size_region
-  RW_m_config_text m_flash_config_start FIXED m_flash_config_size { ; load address = execution address
-    * (.boot_hdr.conf, +FIRST)
-  }
-
-  RW_m_ivt_text m_ivt_start FIXED m_ivt_size { ; load address = execution address
-    * (.boot_hdr.ivt, +FIRST)
-    * (.boot_hdr.boot_data)
-    * (.boot_hdr.dcd_data)
-  }
-#else
-LR_m_text m_interrupts_start m_text_start+m_text_size-m_interrupts_start {   ; load region size_region
-#endif
-  VECTOR_ROM m_interrupts_start FIXED m_interrupts_size { ; load address = execution address
-    * (RESET,+FIRST)
-  }
-  ER_m_text m_text_start FIXED m_text_size { ; load address = execution address
-    * (InRoot$$Sections)
-    .ANY (+RO)
-  }
-  RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
-    .ANY (+RW +ZI)
-    * (NonCacheable.init)
-    * (NonCacheable)
-  }
-  ARM_LIB_HEAP +0 EMPTY Heap_Size {    ; Heap region growing up
-  }
-  ARM_LIB_STACK +0 EMPTY Stack_Size{} ; Stack region growing down
-  RTT_HEAP +0 EMPTY RTT_HEAP_SIZE{}
-}

bsp/imxrt/imxrt1052-sc-internal/project.eww

-<?xml version="1.0" encoding="iso-8859-1"?>
-
-<workspace>
-  <project>
-    <path>$WS_DIR$\project.ewp</path>
-  </project>
-  <batchBuild/>
-</workspace>
-
-

bsp/imxrt/imxrt1052-sc-internal/template.eww

-<?xml version="1.0" encoding="iso-8859-1"?>
-
-<workspace>
-  <project>
-    <path>$WS_DIR$\template.ewp</path>
-  </project>
-  <batchBuild/>
-</workspace>
-
-

bsp/imxrt/imxrt1052-sc-internal/xip/SConscript

-Import('RTT_ROOT')
-Import('rtconfig')
-from building import *
-
-cwd = GetCurrentDir()
-src = Glob('*.c')
-CPPPATH = [cwd]
-
-if rtconfig.CROSS_TOOL == 'keil':
-    LINKFLAGS  = '--keep=*(.boot_hdr.ivt)'
-    LINKFLAGS += '--keep=*(.boot_hdr.boot_data)'
-    LINKFLAGS += '--keep=*(.boot_hdr.dcd_data)'
-    LINKFLAGS += '--keep=*(.boot_hdr.conf)'
-else:
-    LINKFLAGS = ''
-
-group = DefineGroup('xip', src, depend = [''], CPPPATH = CPPPATH, LINKFLAGS = LINKFLAGS) 
-Return('group')

bsp/imxrt/imxrt1052-sc-internal/xip/fsl_flexspi_nor_boot.c

-/*
- * Copyright 2017 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include "fsl_flexspi_nor_boot.h"
-
-/* Component ID definition, used by tools. */
-#ifndef FSL_COMPONENT_ID
-#define FSL_COMPONENT_ID "platform.drivers.xip_device"
-#endif
-
-#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
-#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
-    __attribute__((section(".boot_hdr.ivt")))
-#elif defined(__ICCARM__)
-#pragma location=".boot_hdr.ivt"
-#endif
-/************************************* 
- *  IVT Data 
- *************************************/
-const ivt image_vector_table = {
-  IVT_HEADER,                         /* IVT Header */
-  IMAGE_ENTRY_ADDRESS,                /* Image Entry Function */
-  IVT_RSVD,                           /* Reserved = 0 */
-  (uint32_t)DCD_ADDRESS,              /* Address where DCD information is stored */
-  (uint32_t)BOOT_DATA_ADDRESS,        /* Address where BOOT Data Structure is stored */
-  (uint32_t)&image_vector_table,      /* Pointer to IVT Self (absolute address */
-  (uint32_t)CSF_ADDRESS,              /* Address where CSF file is stored */
-  IVT_RSVD                            /* Reserved = 0 */
-};
-
-#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
-    __attribute__((section(".boot_hdr.boot_data")))
-#elif defined(__ICCARM__)
-#pragma location=".boot_hdr.boot_data"
-#endif
-/************************************* 
- *  Boot Data 
- *************************************/
-const BOOT_DATA_T boot_data = {
-  FLASH_BASE,                 /* boot start location */
-  FLASH_SIZE,                 /* size */
-  PLUGIN_FLAG,                /* Plugin flag*/
-  0xFFFFFFFF  				  /* empty - extra data word */
-};
-#endif
-
-

bsp/imxrt/libraries/MIMXRT1050/SConscript

@@ -52,9 +52,6 @@ if GetDepend(['BSP_USING_SDRAM']):
 if GetDepend(['BSP_USING_LCD']):
     src += ['MIMXRT1052/drivers/fsl_elcdif.c']
 
-if GetDepend(['RT_USING_USB_HOST']) or GetDepend(['RT_USING_USB_DEVICE']):
-    src += ['MIMXRT1052/drivers/fsl_usdhc.c']
-
 if GetDepend(['BSP_USING_CAN']):
     src += ['MIMXRT1052/drivers/fsl_flexcan.c']