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提交 11a75e40 编写于 作者: B Bernard Xiong
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[bsp][stm32f767-st-nucleo] Fix the eol. 

Fix the end of line issue.
上级 e02f1afd
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Showing with 2320 addition and 2320 deletion
bsp/stm32/stm32f767-st-nucleo/SConscript
浏览文件 @ 11a75e40
# for module compiling # for module compiling
import os import os
Import('RTT_ROOT') Import('RTT_ROOT')
cwd = str(Dir('#')) cwd = str(Dir('#'))
objs = [] objs = []
list = os.listdir(cwd) list = os.listdir(cwd)
for d in list: for d in list:
path = os.path.join(cwd, d) path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')): if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript')) objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs') Return('objs')
bsp/stm32/stm32f767-st-nucleo/applications/SConscript
浏览文件 @ 11a75e40
import rtconfig import rtconfig
from building import * from building import *
cwd = GetCurrentDir() cwd = GetCurrentDir()
CPPPATH = [cwd, str(Dir('#'))] CPPPATH = [cwd, str(Dir('#'))]
src = Split(""" src = Split("""
main.c main.c
""") """)
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group') Return('group')
bsp/stm32/stm32f767-st-nucleo/board/CubeMX_Config/Inc/main.h
浏览文件 @ 11a75e40
/* USER CODE BEGIN Header */ /* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* @file : main.h * @file : main.h
* @brief : Header for main.c file. * @brief : Header for main.c file.
* This file contains the common defines of the application. * This file contains the common defines of the application.
****************************************************************************** ******************************************************************************
** This notice applies to any and all portions of this file ** This notice applies to any and all portions of this file
* that are not between comment pairs USER CODE BEGIN and * that are not between comment pairs USER CODE BEGIN and
* USER CODE END. Other portions of this file, whether * USER CODE END. Other portions of this file, whether
* inserted by the user or by software development tools * inserted by the user or by software development tools
* are owned by their respective copyright owners. * are owned by their respective copyright owners.
* *
* COPYRIGHT(c) 2018 STMicroelectronics * COPYRIGHT(c) 2018 STMicroelectronics
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */ /* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H #ifndef __MAIN_H
#define __MAIN_H #define __MAIN_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32f7xx_hal.h" #include "stm32f7xx_hal.h"
/* Private includes ----------------------------------------------------------*/ /* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */
/* USER CODE END Includes */ /* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */ /* USER CODE BEGIN ET */
/* USER CODE END ET */ /* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */ /* USER CODE BEGIN EC */
/* USER CODE END EC */ /* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */ /* USER CODE BEGIN EM */
/* USER CODE END EM */ /* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/ /* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void); void Error_Handler(void);
/* USER CODE BEGIN EFP */ /* USER CODE BEGIN EFP */
/* USER CODE END EFP */ /* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/ /* Private defines -----------------------------------------------------------*/
#define USER_Btn_Pin GPIO_PIN_13 #define USER_Btn_Pin GPIO_PIN_13
#define USER_Btn_GPIO_Port GPIOC #define USER_Btn_GPIO_Port GPIOC
#define MCO_Pin GPIO_PIN_0 #define MCO_Pin GPIO_PIN_0
#define MCO_GPIO_Port GPIOH #define MCO_GPIO_Port GPIOH
#define RMII_MDC_Pin GPIO_PIN_1 #define RMII_MDC_Pin GPIO_PIN_1
#define RMII_MDC_GPIO_Port GPIOC #define RMII_MDC_GPIO_Port GPIOC
#define RMII_REF_CLK_Pin GPIO_PIN_1 #define RMII_REF_CLK_Pin GPIO_PIN_1
#define RMII_REF_CLK_GPIO_Port GPIOA #define RMII_REF_CLK_GPIO_Port GPIOA
#define RMII_MDIO_Pin GPIO_PIN_2 #define RMII_MDIO_Pin GPIO_PIN_2
#define RMII_MDIO_GPIO_Port GPIOA #define RMII_MDIO_GPIO_Port GPIOA
#define RMII_CRS_DV_Pin GPIO_PIN_7 #define RMII_CRS_DV_Pin GPIO_PIN_7
#define RMII_CRS_DV_GPIO_Port GPIOA #define RMII_CRS_DV_GPIO_Port GPIOA
#define RMII_RXD0_Pin GPIO_PIN_4 #define RMII_RXD0_Pin GPIO_PIN_4
#define RMII_RXD0_GPIO_Port GPIOC #define RMII_RXD0_GPIO_Port GPIOC
#define RMII_RXD1_Pin GPIO_PIN_5 #define RMII_RXD1_Pin GPIO_PIN_5
#define RMII_RXD1_GPIO_Port GPIOC #define RMII_RXD1_GPIO_Port GPIOC
#define RMII_TXD1_Pin GPIO_PIN_13 #define RMII_TXD1_Pin GPIO_PIN_13
#define RMII_TXD1_GPIO_Port GPIOB #define RMII_TXD1_GPIO_Port GPIOB
#define LD3_Pin GPIO_PIN_14 #define LD3_Pin GPIO_PIN_14
#define LD3_GPIO_Port GPIOB #define LD3_GPIO_Port GPIOB
#define STLK_RX_Pin GPIO_PIN_8 #define STLK_RX_Pin GPIO_PIN_8
#define STLK_RX_GPIO_Port GPIOD #define STLK_RX_GPIO_Port GPIOD
#define STLK_TX_Pin GPIO_PIN_9 #define STLK_TX_Pin GPIO_PIN_9
#define STLK_TX_GPIO_Port GPIOD #define STLK_TX_GPIO_Port GPIOD
#define USB_PowerSwitchOn_Pin GPIO_PIN_6 #define USB_PowerSwitchOn_Pin GPIO_PIN_6
#define USB_PowerSwitchOn_GPIO_Port GPIOG #define USB_PowerSwitchOn_GPIO_Port GPIOG
#define USB_OverCurrent_Pin GPIO_PIN_7 #define USB_OverCurrent_Pin GPIO_PIN_7
#define USB_OverCurrent_GPIO_Port GPIOG #define USB_OverCurrent_GPIO_Port GPIOG
#define USB_SOF_Pin GPIO_PIN_8 #define USB_SOF_Pin GPIO_PIN_8
#define USB_SOF_GPIO_Port GPIOA #define USB_SOF_GPIO_Port GPIOA
#define USB_VBUS_Pin GPIO_PIN_9 #define USB_VBUS_Pin GPIO_PIN_9
#define USB_VBUS_GPIO_Port GPIOA #define USB_VBUS_GPIO_Port GPIOA
#define USB_ID_Pin GPIO_PIN_10 #define USB_ID_Pin GPIO_PIN_10
#define USB_ID_GPIO_Port GPIOA #define USB_ID_GPIO_Port GPIOA
#define USB_DM_Pin GPIO_PIN_11 #define USB_DM_Pin GPIO_PIN_11
#define USB_DM_GPIO_Port GPIOA #define USB_DM_GPIO_Port GPIOA
#define USB_DP_Pin GPIO_PIN_12 #define USB_DP_Pin GPIO_PIN_12
#define USB_DP_GPIO_Port GPIOA #define USB_DP_GPIO_Port GPIOA
#define TMS_Pin GPIO_PIN_13 #define TMS_Pin GPIO_PIN_13
#define TMS_GPIO_Port GPIOA #define TMS_GPIO_Port GPIOA
#define TCK_Pin GPIO_PIN_14 #define TCK_Pin GPIO_PIN_14
#define TCK_GPIO_Port GPIOA #define TCK_GPIO_Port GPIOA
#define RMII_TX_EN_Pin GPIO_PIN_11 #define RMII_TX_EN_Pin GPIO_PIN_11
#define RMII_TX_EN_GPIO_Port GPIOG #define RMII_TX_EN_GPIO_Port GPIOG
#define RMII_TXD0_Pin GPIO_PIN_13 #define RMII_TXD0_Pin GPIO_PIN_13
#define RMII_TXD0_GPIO_Port GPIOG #define RMII_TXD0_GPIO_Port GPIOG
#define SWO_Pin GPIO_PIN_3 #define SWO_Pin GPIO_PIN_3
#define SWO_GPIO_Port GPIOB #define SWO_GPIO_Port GPIOB
#define LD2_Pin GPIO_PIN_7 #define LD2_Pin GPIO_PIN_7
#define LD2_GPIO_Port GPIOB #define LD2_GPIO_Port GPIOB
/* USER CODE BEGIN Private defines */ /* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */ /* USER CODE END Private defines */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __MAIN_H */ #endif /* __MAIN_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32/stm32f767-st-nucleo/board/CubeMX_Config/Inc/stm32f7xx_it.h
浏览文件 @ 11a75e40
/* USER CODE BEGIN Header */ /* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f7xx_it.h * @file stm32f7xx_it.h
* @brief This file contains the headers of the interrupt handlers. * @brief This file contains the headers of the interrupt handlers.
****************************************************************************** ******************************************************************************
* *
* COPYRIGHT(c) 2018 STMicroelectronics * COPYRIGHT(c) 2018 STMicroelectronics
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */ /* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F7xx_IT_H #ifndef __STM32F7xx_IT_H
#define __STM32F7xx_IT_H #define __STM32F7xx_IT_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Private includes ----------------------------------------------------------*/ /* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */
/* USER CODE END Includes */ /* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */ /* USER CODE BEGIN ET */
/* USER CODE END ET */ /* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */ /* USER CODE BEGIN EC */
/* USER CODE END EC */ /* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */ /* USER CODE BEGIN EM */
/* USER CODE END EM */ /* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/ /* Exported functions prototypes ---------------------------------------------*/
void NMI_Handler(void); void NMI_Handler(void);
void HardFault_Handler(void); void HardFault_Handler(void);
void MemManage_Handler(void); void MemManage_Handler(void);
void BusFault_Handler(void); void BusFault_Handler(void);
void UsageFault_Handler(void); void UsageFault_Handler(void);
void SVC_Handler(void); void SVC_Handler(void);
void DebugMon_Handler(void); void DebugMon_Handler(void);
void PendSV_Handler(void); void PendSV_Handler(void);
void SysTick_Handler(void); void SysTick_Handler(void);
/* USER CODE BEGIN EFP */ /* USER CODE BEGIN EFP */
/* USER CODE END EFP */ /* USER CODE END EFP */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32F7xx_IT_H */ #endif /* __STM32F7xx_IT_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32/stm32f767-st-nucleo/board/CubeMX_Config/Src/stm32f7xx_it.c
浏览文件 @ 11a75e40
/* USER CODE BEGIN Header */ /* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f7xx_it.c * @file stm32f7xx_it.c
* @brief Interrupt Service Routines. * @brief Interrupt Service Routines.
****************************************************************************** ******************************************************************************
* *
* COPYRIGHT(c) 2018 STMicroelectronics * COPYRIGHT(c) 2018 STMicroelectronics
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */ /* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "main.h" #include "main.h"
#include "stm32f7xx_it.h" #include "stm32f7xx_it.h"
/* Private includes ----------------------------------------------------------*/ /* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */
/* USER CODE END Includes */ /* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/ /* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */ /* USER CODE BEGIN TD */
/* USER CODE END TD */ /* USER CODE END TD */
/* Private define ------------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */ /* USER CODE BEGIN PD */
/* USER CODE END PD */ /* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */ /* USER CODE BEGIN PM */
/* USER CODE END PM */ /* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */ /* USER CODE BEGIN PV */
/* USER CODE END PV */ /* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */ /* USER CODE BEGIN PFP */
/* USER CODE END PFP */ /* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/ /* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */ /* USER CODE BEGIN 0 */
/* USER CODE END 0 */ /* USER CODE END 0 */
/* External variables --------------------------------------------------------*/ /* External variables --------------------------------------------------------*/
/* USER CODE BEGIN EV */ /* USER CODE BEGIN EV */
/* USER CODE END EV */ /* USER CODE END EV */
/******************************************************************************/ /******************************************************************************/
/* Cortex-M7 Processor Interruption and Exception Handlers */ /* Cortex-M7 Processor Interruption and Exception Handlers */
/******************************************************************************/ /******************************************************************************/
/** /**
* @brief This function handles Non maskable interrupt. * @brief This function handles Non maskable interrupt.
*/ */
void NMI_Handler(void) void NMI_Handler(void)
{ {
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
/* USER CODE END NonMaskableInt_IRQn 1 */ /* USER CODE END NonMaskableInt_IRQn 1 */
} }
/** /**
* @brief This function handles Hard fault interrupt. * @brief This function handles Hard fault interrupt.
*/ */
void HardFault_Handler(void) void HardFault_Handler(void)
{ {
/* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */
while (1) while (1)
{ {
/* USER CODE BEGIN W1_HardFault_IRQn 0 */ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */ /* USER CODE END W1_HardFault_IRQn 0 */
} }
} }
/** /**
* @brief This function handles Memory management fault. * @brief This function handles Memory management fault.
*/ */
void MemManage_Handler(void) void MemManage_Handler(void)
{ {
/* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */
while (1) while (1)
{ {
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */ /* USER CODE END W1_MemoryManagement_IRQn 0 */
} }
} }
/** /**
* @brief This function handles Pre-fetch fault, memory access fault. * @brief This function handles Pre-fetch fault, memory access fault.
*/ */
void BusFault_Handler(void) void BusFault_Handler(void)
{ {
/* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */
while (1) while (1)
{ {
/* USER CODE BEGIN W1_BusFault_IRQn 0 */ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */ /* USER CODE END W1_BusFault_IRQn 0 */
} }
} }
/** /**
* @brief This function handles Undefined instruction or illegal state. * @brief This function handles Undefined instruction or illegal state.
*/ */
void UsageFault_Handler(void) void UsageFault_Handler(void)
{ {
/* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */
while (1) while (1)
{ {
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */ /* USER CODE END W1_UsageFault_IRQn 0 */
} }
} }
/** /**
* @brief This function handles System service call via SWI instruction. * @brief This function handles System service call via SWI instruction.
*/ */
void SVC_Handler(void) void SVC_Handler(void)
{ {
/* USER CODE BEGIN SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */ /* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */
} }
/** /**
* @brief This function handles Debug monitor. * @brief This function handles Debug monitor.
*/ */
void DebugMon_Handler(void) void DebugMon_Handler(void)
{ {
/* USER CODE BEGIN DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */
} }
/** /**
* @brief This function handles Pendable request for system service. * @brief This function handles Pendable request for system service.
*/ */
void PendSV_Handler(void) void PendSV_Handler(void)
{ {
/* USER CODE BEGIN PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */ /* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */
} }
/** /**
* @brief This function handles System tick timer. * @brief This function handles System tick timer.
*/ */
void SysTick_Handler(void) void SysTick_Handler(void)
{ {
/* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */
HAL_IncTick(); HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */
} }
/******************************************************************************/ /******************************************************************************/
/* STM32F7xx Peripheral Interrupt Handlers */ /* STM32F7xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */ /* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */ /* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32f7xx.s). */ /* please refer to the startup file (startup_stm32f7xx.s). */
/******************************************************************************/ /******************************************************************************/
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
/* USER CODE END 1 */ /* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32/stm32f767-st-nucleo/board/CubeMX_Config/Src/system_stm32f7xx.c
浏览文件 @ 11a75e40
/** /**
****************************************************************************** ******************************************************************************
* @file system_stm32f7xx.c * @file system_stm32f7xx.c
* @author MCD Application Team * @author MCD Application Team
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer System Source File. * @brief CMSIS Cortex-M7 Device Peripheral Access Layer System Source File.
* *
* This file provides two functions and one global variable to be called from * This file provides two functions and one global variable to be called from
* user application: * user application:
* - SystemInit(): This function is called at startup just after reset and * - SystemInit(): This function is called at startup just after reset and
* before branch to main program. This call is made inside * before branch to main program. This call is made inside
* the "startup_stm32f7xx.s" file. * the "startup_stm32f7xx.s" file.
* *
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick * by the user application to setup the SysTick
* timer or configure other parameters. * timer or configure other parameters.
* *
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed * be called whenever the core clock is changed
* during program execution. * during program execution.
* *
* *
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/** @addtogroup CMSIS /** @addtogroup CMSIS
* @{ * @{
*/ */
/** @addtogroup stm32f7xx_system /** @addtogroup stm32f7xx_system
* @{ * @{
*/ */
/** @addtogroup STM32F7xx_System_Private_Includes /** @addtogroup STM32F7xx_System_Private_Includes
* @{ * @{
*/ */
#include "stm32f7xx.h" #include "stm32f7xx.h"
#if !defined (HSE_VALUE) #if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */ #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
#endif /* HSE_VALUE */ #endif /* HSE_VALUE */
#if !defined (HSI_VALUE) #if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */ #endif /* HSI_VALUE */
/** /**
* @} * @}
*/ */
/** @addtogroup STM32F7xx_System_Private_TypesDefinitions /** @addtogroup STM32F7xx_System_Private_TypesDefinitions
* @{ * @{
*/ */
/** /**
* @} * @}
*/ */
/** @addtogroup STM32F7xx_System_Private_Defines /** @addtogroup STM32F7xx_System_Private_Defines
* @{ * @{
*/ */
/************************* Miscellaneous Configuration ************************/ /************************* Miscellaneous Configuration ************************/
/*!< Uncomment the following line if you need to relocate your vector Table in /*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */ Internal SRAM. */
/* #define VECT_TAB_SRAM */ /* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. #define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */ This value must be a multiple of 0x200. */
/******************************************************************************/ /******************************************************************************/
/** /**
* @} * @}
*/ */
/** @addtogroup STM32F7xx_System_Private_Macros /** @addtogroup STM32F7xx_System_Private_Macros
* @{ * @{
*/ */
/** /**
* @} * @}
*/ */
/** @addtogroup STM32F7xx_System_Private_Variables /** @addtogroup STM32F7xx_System_Private_Variables
* @{ * @{
*/ */
/* This variable is updated in three ways: /* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate() 1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq() 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically. variable is updated automatically.
*/ */
uint32_t SystemCoreClock = 16000000; uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
/** /**
* @} * @}
*/ */
/** @addtogroup STM32F7xx_System_Private_FunctionPrototypes /** @addtogroup STM32F7xx_System_Private_FunctionPrototypes
* @{ * @{
*/ */
/** /**
* @} * @}
*/ */
/** @addtogroup STM32F7xx_System_Private_Functions /** @addtogroup STM32F7xx_System_Private_Functions
* @{ * @{
*/ */
/** /**
* @brief Setup the microcontroller system * @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the * Initialize the Embedded Flash Interface, the PLL and update the
* SystemFrequency variable. * SystemFrequency variable.
* @param None * @param None
* @retval None * @retval None
*/ */
void SystemInit(void) void SystemInit(void)
{ {
/* FPU settings ------------------------------------------------------------*/ /* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
#endif #endif
/* Reset the RCC clock configuration to the default reset state ------------*/ /* Reset the RCC clock configuration to the default reset state ------------*/
/* Set HSION bit */ /* Set HSION bit */
RCC->CR |= (uint32_t)0x00000001; RCC->CR |= (uint32_t)0x00000001;
/* Reset CFGR register */ /* Reset CFGR register */
RCC->CFGR = 0x00000000; RCC->CFGR = 0x00000000;
/* Reset HSEON, CSSON and PLLON bits */ /* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= (uint32_t)0xFEF6FFFF; RCC->CR &= (uint32_t)0xFEF6FFFF;
/* Reset PLLCFGR register */ /* Reset PLLCFGR register */
RCC->PLLCFGR = 0x24003010; RCC->PLLCFGR = 0x24003010;
/* Reset HSEBYP bit */ /* Reset HSEBYP bit */
RCC->CR &= (uint32_t)0xFFFBFFFF; RCC->CR &= (uint32_t)0xFFFBFFFF;
/* Disable all interrupts */ /* Disable all interrupts */
RCC->CIR = 0x00000000; RCC->CIR = 0x00000000;
/* Configure the Vector Table location add offset address ------------------*/ /* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM #ifdef VECT_TAB_SRAM
SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else #else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
#endif #endif
} }
/** /**
* @brief Update SystemCoreClock variable according to Clock Register Values. * @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can * The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure * be used by the user application to setup the SysTick timer or configure
* other parameters. * other parameters.
* *
* @note Each time the core clock (HCLK) changes, this function must be called * @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration * to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect. * based on this variable will be incorrect.
* *
* @note - The system frequency computed by this function is not the real * @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined * frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source: * constant and the selected clock source:
* *
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
* *
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
* *
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied/divided by the PLL factors. * or HSI_VALUE(*) multiplied/divided by the PLL factors.
* *
* (*) HSI_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value * (*) HSI_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value
* 16 MHz) but the real value may vary depending on the variations * 16 MHz) but the real value may vary depending on the variations
* in voltage and temperature. * in voltage and temperature.
* *
* (**) HSE_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value * (**) HSE_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value
* 25 MHz), user has to ensure that HSE_VALUE is same as the real * 25 MHz), user has to ensure that HSE_VALUE is same as the real
* frequency of the crystal used. Otherwise, this function may * frequency of the crystal used. Otherwise, this function may
* have wrong result. * have wrong result.
* *
* - The result of this function could be not correct when using fractional * - The result of this function could be not correct when using fractional
* value for HSE crystal. * value for HSE crystal.
* *
* @param None * @param None
* @retval None * @retval None
*/ */
void SystemCoreClockUpdate(void) void SystemCoreClockUpdate(void)
{ {
uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
/* Get SYSCLK source -------------------------------------------------------*/ /* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS; tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp) switch (tmp)
{ {
case 0x00: /* HSI used as system clock source */ case 0x00: /* HSI used as system clock source */
SystemCoreClock = HSI_VALUE; SystemCoreClock = HSI_VALUE;
break; break;
case 0x04: /* HSE used as system clock source */ case 0x04: /* HSE used as system clock source */
SystemCoreClock = HSE_VALUE; SystemCoreClock = HSE_VALUE;
break; break;
case 0x08: /* PLL used as system clock source */ case 0x08: /* PLL used as system clock source */
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
SYSCLK = PLL_VCO / PLL_P SYSCLK = PLL_VCO / PLL_P
*/ */
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
if (pllsource != 0) if (pllsource != 0)
{ {
/* HSE used as PLL clock source */ /* HSE used as PLL clock source */
pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
} }
else else
{ {
/* HSI used as PLL clock source */ /* HSI used as PLL clock source */
pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
} }
pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2; pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
SystemCoreClock = pllvco/pllp; SystemCoreClock = pllvco/pllp;
break; break;
default: default:
SystemCoreClock = HSI_VALUE; SystemCoreClock = HSI_VALUE;
break; break;
} }
/* Compute HCLK frequency --------------------------------------------------*/ /* Compute HCLK frequency --------------------------------------------------*/
/* Get HCLK prescaler */ /* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
/* HCLK frequency */ /* HCLK frequency */
SystemCoreClock >>= tmp; SystemCoreClock >>= tmp;
} }
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32/stm32f767-st-nucleo/board/SConscript
浏览文件 @ 11a75e40
import rtconfig import rtconfig
from building import * from building import *
cwd = GetCurrentDir() cwd = GetCurrentDir()
# add the general drivers. # add the general drivers.
src = Glob('board.c') src = Glob('board.c')
src += Glob('CubeMX_Config/Src/stm32f7xx_hal_msp.c') src += Glob('CubeMX_Config/Src/stm32f7xx_hal_msp.c')
path = [cwd] path = [cwd]
path += [cwd + '/CubeMX_Config/Inc'] path += [cwd + '/CubeMX_Config/Inc']
if rtconfig.CROSS_TOOL == 'gcc': if rtconfig.CROSS_TOOL == 'gcc':
src += [cwd + '/../../libraries/STM32F7xx_HAL/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/startup_stm32f767xx.s'] src += [cwd + '/../../libraries/STM32F7xx_HAL/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/startup_stm32f767xx.s']
elif rtconfig.CROSS_TOOL == 'keil': elif rtconfig.CROSS_TOOL == 'keil':
src += [cwd + '/../../libraries/STM32F7xx_HAL/CMSIS/Device/ST/STM32F7xx/Source/Templates/arm/startup_stm32f767xx.s'] src += [cwd + '/../../libraries/STM32F7xx_HAL/CMSIS/Device/ST/STM32F7xx/Source/Templates/arm/startup_stm32f767xx.s']
elif rtconfig.CROSS_TOOL == 'iar': elif rtconfig.CROSS_TOOL == 'iar':
src += [cwd + '/../../libraries/STM32F7xx_HAL/CMSIS/Device/ST/STM32F7xx/Source/Templates/iar/startup_stm32f767xx.s'] src += [cwd + '/../../libraries/STM32F7xx_HAL/CMSIS/Device/ST/STM32F7xx/Source/Templates/iar/startup_stm32f767xx.s']
# STM32F756xx || STM32F746xx || STM32F745xx || STM32F767xx || # STM32F756xx || STM32F746xx || STM32F745xx || STM32F767xx ||
# STM32F769xx || STM32F777xx || STM32F779xx || STM32F722xx || # STM32F769xx || STM32F777xx || STM32F779xx || STM32F722xx ||
# STM32F723xx || STM32F732xx || STM32F733xx || STM32F730xx || STM32F750xx # STM32F723xx || STM32F732xx || STM32F733xx || STM32F730xx || STM32F750xx
# You can select chips from the list above # You can select chips from the list above
CPPDEFINES = ['STM32F767xx'] CPPDEFINES = ['STM32F767xx']
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
Return('group') Return('group')
bsp/stm32/stm32f767-st-nucleo/rtconfig.h
浏览文件 @ 11a75e40
#ifndef RT_CONFIG_H__ #ifndef RT_CONFIG_H__
#define RT_CONFIG_H__ #define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */ /* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Configuration */ /* RT-Thread Configuration */
/* RT-Thread Kernel */ /* RT-Thread Kernel */
#define RT_NAME_MAX 8 #define RT_NAME_MAX 8
#define RT_ALIGN_SIZE 4 #define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32 #define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32 #define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 100 #define RT_TICK_PER_SECOND 100
#define RT_USING_OVERFLOW_CHECK #define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK #define RT_USING_HOOK
#define RT_USING_IDLE_HOOK #define RT_USING_IDLE_HOOK
#define RT_IDEL_HOOK_LIST_SIZE 4 #define RT_IDEL_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 256 #define IDLE_THREAD_STACK_SIZE 256
#define RT_DEBUG #define RT_DEBUG
/* Inter-Thread communication */ /* Inter-Thread communication */
#define RT_USING_SEMAPHORE #define RT_USING_SEMAPHORE
#define RT_USING_MUTEX #define RT_USING_MUTEX
#define RT_USING_EVENT #define RT_USING_EVENT
#define RT_USING_MAILBOX #define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE #define RT_USING_MESSAGEQUEUE
/* Memory Management */ /* Memory Management */
#define RT_USING_MEMPOOL #define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM #define RT_USING_SMALL_MEM
#define RT_USING_HEAP #define RT_USING_HEAP
/* Kernel Device Object */ /* Kernel Device Object */
#define RT_USING_DEVICE #define RT_USING_DEVICE
#define RT_USING_CONSOLE #define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart3" #define RT_CONSOLE_DEVICE_NAME "uart3"
#define RT_VER_NUM 0x40000 #define RT_VER_NUM 0x40000
#define ARCH_ARM #define ARCH_ARM
#define ARCH_ARM_CORTEX_M #define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M7 #define ARCH_ARM_CORTEX_M7
/* RT-Thread Components */ /* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT #define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN #define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048 #define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10 #define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */ /* C++ features */
/* Command shell */ /* Command shell */
#define RT_USING_FINSH #define RT_USING_FINSH
#define FINSH_THREAD_NAME "tshell" #define FINSH_THREAD_NAME "tshell"
#define FINSH_USING_HISTORY #define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5 #define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB #define FINSH_USING_SYMTAB
#define FINSH_USING_DESCRIPTION #define FINSH_USING_DESCRIPTION
#define FINSH_THREAD_PRIORITY 20 #define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096 #define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_CMD_SIZE 80 #define FINSH_CMD_SIZE 80
#define FINSH_USING_MSH #define FINSH_USING_MSH
#define FINSH_USING_MSH_DEFAULT #define FINSH_USING_MSH_DEFAULT
#define FINSH_ARG_MAX 10 #define FINSH_ARG_MAX 10
/* Device virtual file system */ /* Device virtual file system */
#define RT_USING_DFS #define RT_USING_DFS
#define DFS_USING_WORKDIR #define DFS_USING_WORKDIR
#define DFS_FILESYSTEMS_MAX 2 #define DFS_FILESYSTEMS_MAX 2
#define DFS_FILESYSTEM_TYPES_MAX 2 #define DFS_FILESYSTEM_TYPES_MAX 2
#define DFS_FD_MAX 16 #define DFS_FD_MAX 16
#define RT_USING_DFS_DEVFS #define RT_USING_DFS_DEVFS
/* Device Drivers */ /* Device Drivers */
#define RT_USING_DEVICE_IPC #define RT_USING_DEVICE_IPC
#define RT_PIPE_BUFSZ 512 #define RT_PIPE_BUFSZ 512
#define RT_USING_SERIAL #define RT_USING_SERIAL
#define RT_SERIAL_USING_DMA #define RT_SERIAL_USING_DMA
#define RT_USING_PIN #define RT_USING_PIN
/* Using WiFi */ /* Using WiFi */
/* Using USB */ /* Using USB */
/* POSIX layer and C standard library */ /* POSIX layer and C standard library */
#define RT_USING_LIBC #define RT_USING_LIBC
#define RT_USING_POSIX #define RT_USING_POSIX
/* Network */ /* Network */
/* Socket abstraction layer */ /* Socket abstraction layer */
/* light weight TCP/IP stack */ /* light weight TCP/IP stack */
/* Modbus master and slave stack */ /* Modbus master and slave stack */
/* AT commands */ /* AT commands */
/* VBUS(Virtual Software BUS) */ /* VBUS(Virtual Software BUS) */
/* Utilities */ /* Utilities */
/* ARM CMSIS */ /* ARM CMSIS */
/* RT-Thread online packages */ /* RT-Thread online packages */
/* IoT - internet of things */ /* IoT - internet of things */
/* Wi-Fi */ /* Wi-Fi */
/* Marvell WiFi */ /* Marvell WiFi */
/* Wiced WiFi */ /* Wiced WiFi */
/* IoT Cloud */ /* IoT Cloud */
/* security packages */ /* security packages */
/* language packages */ /* language packages */
/* multimedia packages */ /* multimedia packages */
/* tools packages */ /* tools packages */
/* system packages */ /* system packages */
/* peripheral libraries and drivers */ /* peripheral libraries and drivers */
/* miscellaneous packages */ /* miscellaneous packages */
/* sample package */ /* sample package */
/* samples: kernel and components samples */ /* samples: kernel and components samples */
/* example package: hello */ /* example package: hello */
#define SOC_FAMILY_STM32 #define SOC_FAMILY_STM32
#define SOC_SERIES_STM32F7 #define SOC_SERIES_STM32F7
/* Hardware Drivers Config */ /* Hardware Drivers Config */
#define SOC_STM32F767ZI #define SOC_STM32F767ZI
/* Onboard Peripheral Drivers */ /* Onboard Peripheral Drivers */
#define BSP_USING_USB_TO_USART #define BSP_USING_USB_TO_USART
/* On-chip Peripheral Drivers */ /* On-chip Peripheral Drivers */
#define BSP_USING_GPIO #define BSP_USING_GPIO
#define BSP_USING_UART #define BSP_USING_UART
#define BSP_USING_UART3 #define BSP_USING_UART3
/* Board extended module Drivers */ /* Board extended module Drivers */
#endif #endif
bsp/stm32/stm32f767-st-nucleo/rtconfig.py
浏览文件 @ 11a75e40
import os import os
# toolchains options # toolchains options
ARCH='arm' ARCH='arm'
CPU='cortex-m7' CPU='cortex-m7'
CROSS_TOOL='gcc' CROSS_TOOL='gcc'
if os.getenv('RTT_CC'): if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC') CROSS_TOOL = os.getenv('RTT_CC')
if os.getenv('RTT_ROOT'): if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT') RTT_ROOT = os.getenv('RTT_ROOT')
# cross_tool provides the cross compiler # cross_tool provides the cross compiler
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR # EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
if CROSS_TOOL == 'gcc': if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc' PLATFORM = 'gcc'
EXEC_PATH = '/usr/local/Cellar/arm-none-eabi-gcc/7-2017-q4-major/gcc/bin/' EXEC_PATH = '/usr/local/Cellar/arm-none-eabi-gcc/7-2017-q4-major/gcc/bin/'
elif CROSS_TOOL == 'keil': elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc' PLATFORM = 'armcc'
EXEC_PATH = r'C:/Keil_v5' EXEC_PATH = r'C:/Keil_v5'
elif CROSS_TOOL == 'iar': elif CROSS_TOOL == 'iar':
PLATFORM = 'iar' PLATFORM = 'iar'
EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
if os.getenv('RTT_EXEC_PATH'): if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH') EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'debug' BUILD = 'debug'
if PLATFORM == 'gcc': if PLATFORM == 'gcc':
# toolchains # toolchains
PREFIX = 'arm-none-eabi-' PREFIX = 'arm-none-eabi-'
CC = PREFIX + 'gcc' CC = PREFIX + 'gcc'
CXX = PREFIX + 'g++' CXX = PREFIX + 'g++'
AS = PREFIX + 'gcc' AS = PREFIX + 'gcc'
AR = PREFIX + 'ar' AR = PREFIX + 'ar'
CXX = PREFIX + 'g++' CXX = PREFIX + 'g++'
LINK = PREFIX + 'gcc' LINK = PREFIX + 'gcc'
TARGET_EXT = 'elf' TARGET_EXT = 'elf'
SIZE = PREFIX + 'size' SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump' OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy' OBJCPY = PREFIX + 'objcopy'
STRIP = PREFIX + 'strip' STRIP = PREFIX + 'strip'
DEVICE = ' -mcpu=' + CPU + ' -mthumb -mfpu=fpv5-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections' DEVICE = ' -mcpu=' + CPU + ' -mthumb -mfpu=fpv5-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
CFLAGS = DEVICE + ' -std=c99 -g -Wall' CFLAGS = DEVICE + ' -std=c99 -g -Wall'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds' LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
CPATH = '' CPATH = ''
LPATH = '' LPATH = ''
if BUILD == 'debug': if BUILD == 'debug':
CFLAGS += ' -O0 -gdwarf-2' CFLAGS += ' -O0 -gdwarf-2'
AFLAGS += ' -gdwarf-2' AFLAGS += ' -gdwarf-2'
else: else:
CFLAGS += ' -O2 -Os' CFLAGS += ' -O2 -Os'
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
# module setting # module setting
CXXFLAGS = ' -Woverloaded-virtual -fno-exceptions -fno-rtti ' CXXFLAGS = ' -Woverloaded-virtual -fno-exceptions -fno-rtti '
M_CFLAGS = CFLAGS + ' -mlong-calls -fPIC ' M_CFLAGS = CFLAGS + ' -mlong-calls -fPIC '
M_CXXFLAGS = CXXFLAGS + ' -mlong-calls -fPIC' M_CXXFLAGS = CXXFLAGS + ' -mlong-calls -fPIC'
M_LFLAGS = DEVICE + CXXFLAGS + ' -Wl,--gc-sections,-z,max-page-size=0x4' +\ M_LFLAGS = DEVICE + CXXFLAGS + ' -Wl,--gc-sections,-z,max-page-size=0x4' +\
' -shared -fPIC -nostartfiles -static-libgcc' ' -shared -fPIC -nostartfiles -static-libgcc'
M_POST_ACTION = STRIP + ' -R .hash $TARGET\n' + SIZE + ' $TARGET \n' M_POST_ACTION = STRIP + ' -R .hash $TARGET\n' + SIZE + ' $TARGET \n'
elif PLATFORM == 'armcc': elif PLATFORM == 'armcc':
# toolchains # toolchains
CC = 'armcc' CC = 'armcc'
CXX = 'armcc' CXX = 'armcc'
AS = 'armasm' AS = 'armasm'
AR = 'armar' AR = 'armar'
LINK = 'armlink' LINK = 'armlink'
TARGET_EXT = 'axf' TARGET_EXT = 'axf'
DEVICE = ' --cpu Cortex-M7.fp.sp --fpu=FPv4-SP' DEVICE = ' --cpu Cortex-M7.fp.sp --fpu=FPv4-SP'
CFLAGS = DEVICE + ' --apcs=interwork ' CFLAGS = DEVICE + ' --apcs=interwork '
AFLAGS = DEVICE AFLAGS = DEVICE
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread.map --scatter rtthread.sct' LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread.map --scatter rtthread.sct'
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/INC' CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/INC'
LFLAGS += ' --libpath "' + EXEC_PATH + '/ARM/ARMCC/lib"' LFLAGS += ' --libpath "' + EXEC_PATH + '/ARM/ARMCC/lib"'
EXEC_PATH += '/arm/bin40/' EXEC_PATH += '/arm/bin40/'
if BUILD == 'debug': if BUILD == 'debug':
CFLAGS += ' -g -O0' CFLAGS += ' -g -O0'
AFLAGS += ' -g' AFLAGS += ' -g'
else: else:
CFLAGS += ' -O2 -Otime' CFLAGS += ' -O2 -Otime'
CXXFLAGS = CFLAGS CXXFLAGS = CFLAGS
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
elif PLATFORM == 'iar': elif PLATFORM == 'iar':
# toolchains # toolchains
CC = 'iccarm' CC = 'iccarm'
CXX = 'iccarm' CXX = 'iccarm'
AS = 'iasmarm' AS = 'iasmarm'
AR = 'iarchive' AR = 'iarchive'
LINK = 'ilinkarm' LINK = 'ilinkarm'
TARGET_EXT = 'out' TARGET_EXT = 'out'
DEVICE = '' DEVICE = ''
CFLAGS = DEVICE CFLAGS = DEVICE
CFLAGS += ' --diag_suppress Pa050' CFLAGS += ' --diag_suppress Pa050'
CFLAGS += ' --no_cse' CFLAGS += ' --no_cse'
CFLAGS += ' --no_unroll' CFLAGS += ' --no_unroll'
CFLAGS += ' --no_inline' CFLAGS += ' --no_inline'
CFLAGS += ' --no_code_motion' CFLAGS += ' --no_code_motion'
CFLAGS += ' --no_tbaa' CFLAGS += ' --no_tbaa'
CFLAGS += ' --no_clustering' CFLAGS += ' --no_clustering'
CFLAGS += ' --no_scheduling' CFLAGS += ' --no_scheduling'
CFLAGS += ' --debug' CFLAGS += ' --debug'
CFLAGS += ' --endian=little' CFLAGS += ' --endian=little'
CFLAGS += ' --cpu=Cortex-M7' CFLAGS += ' --cpu=Cortex-M7'
CFLAGS += ' -e' CFLAGS += ' -e'
CFLAGS += ' --fpu=None' CFLAGS += ' --fpu=None'
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
CFLAGS += ' -Ol' CFLAGS += ' -Ol'
CFLAGS += ' --use_c++_inline' CFLAGS += ' --use_c++_inline'
CFLAGS += ' --silent' CFLAGS += ' --silent'
AFLAGS = '' AFLAGS = ''
AFLAGS += ' -s+' AFLAGS += ' -s+'
AFLAGS += ' -w+' AFLAGS += ' -w+'
AFLAGS += ' -r' AFLAGS += ' -r'
AFLAGS += ' --cpu Cortex-M7' AFLAGS += ' --cpu Cortex-M7'
AFLAGS += ' --fpu None' AFLAGS += ' --fpu None'
AFLAGS += ' -S' AFLAGS += ' -S'
LFLAGS = ' --config rtthread.icf' LFLAGS = ' --config rtthread.icf'
LFLAGS += ' --redirect _Printf=_PrintfTiny' LFLAGS += ' --redirect _Printf=_PrintfTiny'
LFLAGS += ' --redirect _Scanf=_ScanfSmall' LFLAGS += ' --redirect _Scanf=_ScanfSmall'
LFLAGS += ' --entry __iar_program_start' LFLAGS += ' --entry __iar_program_start'
LFLAGS += ' --silent' LFLAGS += ' --silent'
CXXFLAGS = CFLAGS CXXFLAGS = CFLAGS
EXEC_PATH = EXEC_PATH + '/arm/bin/' EXEC_PATH = EXEC_PATH + '/arm/bin/'
POST_ACTION = '' POST_ACTION = ''
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