tensorrt_engine_op.cc 5.1 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
/* Copyright (c) 2018 PaddlePaddle Authors. All Rights Reserved.

   Licensed under the Apache License, Version 2.0 (the "License");
   you may not use this file except in compliance with the License.
   You may obtain a copy of the License at

   http://www.apache.org/licenses/LICENSE-2.0

   Unless required by applicable law or agreed to in writing, software
   distributed under the License is distributed on an "AS IS" BASIS,
   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
   See the License for the specific language governing permissions and
   limitations under the License. */

#ifdef PADDLE_WITH_CUDA

#include "paddle/fluid/operators/tensorrt_engine_op.h"
#include "paddle/fluid/framework/op_registry.h"
#include "paddle/fluid/inference/tensorrt/convert/op_converter.h"
20
#include "paddle/fluid/inference/tensorrt/engine.h"
21 22 23 24 25
#include "paddle/fluid/inference/utils/singleton.h"

namespace paddle {
namespace operators {

26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67
using inference::Singleton;
using inference::tensorrt::TRT_EngineManager;

using FluidDT = framework::proto::VarType_Type;
using TRT_DT = nvinfer1::DataType;

namespace {

TRT_DT FluidDataType2TRT(FluidDT type) {
  switch (type) {
    case FluidDT::VarType_Type_FP32:
      return TRT_DT::kFLOAT;
    case FluidDT::VarType_Type_INT32:
      return TRT_DT::kINT32;
    default:
      return TRT_DT::kINT32;
  }
  PADDLE_THROW("unkown type");
  return TRT_DT::kINT32;
}

nvinfer1::Dims Vec2TRT_Dims(const std::vector<int64_t> &shape) {
  PADDLE_ENFORCE_GT(shape.size(), 1UL,
                    "TensorRT' tensor input requires at least 2 dimensions");
  PADDLE_ENFORCE_LE(shape.size(), 4UL,
                    "TensorRT' tensor input requires at most 4 dimensions");

  switch (shape.size()) {
    case 2:
      return nvinfer1::Dims2(shape[0], shape[1]);
    case 3:
      return nvinfer1::Dims3(shape[0], shape[1], shape[2]);
    case 4:
      return nvinfer1::Dims4(shape[0], shape[1], shape[2], shape[3]);
    default:
      return nvinfer1::Dims();
  }
  return nvinfer1::Dims();
}

}  // namespace

68
template <typename DeviceContext, typename T>
Y
Yan Chunwei 已提交
69
void TensorRTEngineKernel<DeviceContext, T>::Prepare(
70
    const framework::ExecutionContext &context) const {
71
  VLOG(4) << "Prepare engine";
72
  // Get the ProgramDesc and pass to convert.
73 74
  framework::proto::BlockDesc block_desc;
  block_desc.ParseFromString(context.Attr<std::string>("subgraph"));
Y
Yan Chunwei 已提交
75
  int max_batch = context.Attr<int>("max_batch");
76
  auto max_workspace = context.Attr<int>("max_workspace");
Y
Yan Chunwei 已提交
77 78 79 80 81 82 83 84 85 86 87
  auto params = context.Attr<std::vector<std::string>>("parameters");
  std::unordered_set<std::string> parameters;
  for (const auto &param : params) {
    parameters.insert(param);
  }

  // TODO(Superjomn) replace this with a different stream
  auto *engine = Singleton<TRT_EngineManager>::Global().Create(
      max_batch, max_workspace, nullptr /*engine hold its own stream*/,
      context.Attr<std::string>("engine_uniq_key"));
  engine->InitNetwork();
88 89 90 91 92 93 94 95 96 97

  framework::BlockDesc block(nullptr /*programdesc*/, &block_desc);
  // Add inputs
  VLOG(4) << "declare inputs";
  for (auto &input : context.Inputs("Xs")) {
    VLOG(4) << "declare input " << input;
    auto *var = block.FindVar(input);
    PADDLE_ENFORCE_EQ(var->GetType(), FluidDT::VarType_Type_LOD_TENSOR,
                      "TensorRT engine only takes LoDTensor as input");
    auto shape = var->GetShape();
Y
Yan Chunwei 已提交
98
    engine->DeclareInput(
99 100 101 102 103
        input, FluidDataType2TRT(
                   var->Proto()->type().lod_tensor().tensor().data_type()),
        Vec2TRT_Dims(var->GetShape()));
  }

104
  inference::Singleton<inference::tensorrt::OpConverter>::Global().ConvertBlock(
Y
Yan Chunwei 已提交
105
      block_desc, parameters, context.scope(), engine);
106 107 108 109 110

  // Add outputs
  VLOG(4) << "declare outputs";
  for (auto &output : context.Outputs("Ys")) {
    VLOG(4) << "declare output " << output;
Y
Yan Chunwei 已提交
111
    engine->DeclareOutput(output);
112 113
  }

Y
Yan Chunwei 已提交
114
  engine->FreezeNetwork();
115 116 117 118 119 120 121
}

class TensorRTEngineOpMaker : public framework::OpProtoAndCheckerMaker {
 public:
  void Make() override {
    AddInput("Xs", "A list of inputs.").AsDuplicable();
    AddOutput("Ys", "A list of outputs").AsDuplicable();
122
    AddAttr<std::string>("subgraph", "the subgraph.");
Y
Yan Chunwei 已提交
123
    AddAttr<std::string>("engine_uniq_key", "unique key for the TRT engine.");
124 125
    AddAttr<int>("max_batch", "the maximum batch size.");
    AddAttr<int>("max_workspace", "the maximum batch size.");
126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151
    AddComment("TensorRT engine operator.");
  }
};

class TensorRTEngineInferVarType : public framework::VarTypeInference {
 public:
  void operator()(const framework::OpDesc &op_desc,
                  framework::BlockDesc *block) const override {}
};

}  // namespace operators
}  // namespace paddle

namespace ops = paddle::operators;

REGISTER_OPERATOR(tensorrt_engine, ops::TensorRTEngineOp,
                  ops::TensorRTEngineOpMaker, ops::TensorRTEngineOpMaker);

REGISTER_OP_CPU_KERNEL(
    tensorrt_engine,
    ops::TensorRTEngineKernel<paddle::platform::CPUDeviceContext, float>,
    ops::TensorRTEngineKernel<paddle::platform::CPUDeviceContext, double>,
    ops::TensorRTEngineKernel<paddle::platform::CPUDeviceContext, int>,
    ops::TensorRTEngineKernel<paddle::platform::CPUDeviceContext, int64_t>);

#endif  // PADDLE_WITH_CUDA