提交 ea6d73f1 编写于 作者: O onelife.real

*** EFM32 branch ***

1. Upgrade Cortex driver library (CMSIS -> CMSIS & Device): version 2.3.2 -> 3.0.1 & 3.0.0
 - Remove "bsp/efm32/Libraries/CMSIS/Lib/ARM", "bsp/efm32/Libraries/CMSIS/Lib/G++" and "bsp/efm32/Libraries/CMSIS/SVD" to save space
2. Upgrade EFM32 driver libraries (efm32lib -> emlib): version 2.3.2 -> 3.0.0
 - Remove "bsp/efm32/Libraries/Device/EnergyMicro/EFM32LG" and "bsp/efm32/Libraries/Device/EnergyMicro/EFM32TG" to save space
3. Upgrade EFM32GG_DK3750 development kit driver library: version 1.2.2 -> 2.0.1
4. Upgrade EFM32_Gxxx_DK development kit driver library: version 1.7.3 -> 2.0.1
5. Add energy management unit driver and test code
6. Modify linker script and related code to compatible with new version of libraries
7. Change EFM32 branch version number to 1.0
8. Add photo frame demo application

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2122 bbd45198-f89e-11dd-88c7-29a3b14d5316
上级 5f853be2
......@@ -2,16 +2,23 @@
* @file
* @brief EFM32GG_DK3750 board support package
* @author Energy Micro AS
* @version 1.2.2
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* This copyright notice may not be removed from the source code nor changed.
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
......@@ -26,14 +33,15 @@
*
*****************************************************************************/
/***************************************************************************//**
/**************************************************************************//**
* @addtogroup BSP
* @{
******************************************************************************/
*****************************************************************************/
#include "efm32.h"
#include "efm32_gpio.h"
#include "efm32_cmu.h"
#include "em_gpio.h"
#include "em_cmu.h"
#include "em_usart.h"
#include "dvk.h"
#include "dvk_bcregisters.h"
......@@ -41,7 +49,7 @@
DVK_Init_TypeDef dvkOperationMode;
/**************************************************************************//**
* @brief Initialize EMF32GG_DK3750 board support package functionality
* @brief Initialize EFM32GG_DK3750 board support package functionality
* @param[in] mode Initialize in EBI or SPI mode
*****************************************************************************/
void DVK_init(DVK_Init_TypeDef mode)
......@@ -158,7 +166,8 @@ uint16_t DVK_getLEDs(void)
/**************************************************************************//**
* @brief DK3750 Peripheral Access Control
* Enable or disable access to on-board peripherals through switches
* and SPI switch where applicable
* and SPI switch where applicable. Turn off conflicting peripherals when
* enabling another.
* @param[in] perf
* Which peripheral to configure
* @param[in] enable
......@@ -202,6 +211,13 @@ void DVK_peripheralAccess(DVK_Peripheral_TypeDef perf, bool enable)
/* Enable Ethernet analog switches */
perfControl |= (1 << BC_PERICON_I2S_ETH_SHIFT);
perfControl |= (1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
/* Disable Analog Diff Input - pins PD0 and PD1 is shared */
perfControl &= ~(1 << BC_PERICON_ANALOG_DIFF_SHIFT);
/* Disable Touch Inputs - pin PD3 is shared */
perfControl &= ~(1 << BC_PERICON_TOUCH_SHIFT);
/* Disable Analog SE Input - pin PD2 is shared */
perfControl &= ~(1 << BC_PERICON_ANALOG_SE_SHIFT);
break;
case DVK_I2S:
......@@ -213,6 +229,13 @@ void DVK_peripheralAccess(DVK_Peripheral_TypeDef perf, bool enable)
perfControl |= (1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
perfControl |= (1 << BC_PERICON_I2S_ETH_SHIFT);
perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
/* Disable Analog Diff Input - pins PD0 and PD1 is shared */
perfControl &= ~(1 << BC_PERICON_ANALOG_DIFF_SHIFT);
/* Disable Touch Inputs - pin PD3 is shared */
perfControl &= ~(1 << BC_PERICON_TOUCH_SHIFT);
/* Disable Analog SE Input - pin PD2 is shared */
perfControl &= ~(1 << BC_PERICON_ANALOG_SE_SHIFT);
break;
case DVK_TRACE:
......@@ -221,6 +244,10 @@ void DVK_peripheralAccess(DVK_Peripheral_TypeDef perf, bool enable)
case DVK_TOUCH:
perfControl |= (1 << BC_PERICON_TOUCH_SHIFT);
/* Disconnect SPI switch, pin PD3 is shared */
perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
DVK_spiControl(DVK_SPI_OFF);
break;
case DVK_AUDIO_IN:
......@@ -234,10 +261,18 @@ void DVK_peripheralAccess(DVK_Peripheral_TypeDef perf, bool enable)
case DVK_ANALOG_DIFF:
perfControl |= (1 << BC_PERICON_ANALOG_DIFF_SHIFT);
/* Disconnect SPI switch, pin PD0 and PD1 is shared */
perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
DVK_spiControl(DVK_SPI_OFF);
break;
case DVK_ANALOG_SE:
perfControl |= (1 << BC_PERICON_ANALOG_SE_SHIFT);
/* Disconnect SPI switch, pin PD2 is shared */
perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
DVK_spiControl(DVK_SPI_OFF);
break;
case DVK_MICROSD:
......@@ -249,6 +284,12 @@ void DVK_peripheralAccess(DVK_Peripheral_TypeDef perf, bool enable)
DVK_spiControl(DVK_SPI_Display);
/* Enable SPI analog switch */
perfControl |= (1 << BC_PERICON_I2S_ETH_SHIFT);
/* Disable Analog Diff Input - pins D0 and D1 is shared */
perfControl &= ~(1 << BC_PERICON_ANALOG_DIFF_SHIFT);
/* Disable Touch Inputs - pin D3 is shared */
perfControl &= ~(1 << BC_PERICON_TOUCH_SHIFT);
/* Disable Analog SE Input - pin D2 is shared */
perfControl &= ~(1 << BC_PERICON_ANALOG_SE_SHIFT);
break;
}
}
......@@ -275,17 +316,19 @@ void DVK_peripheralAccess(DVK_Peripheral_TypeDef perf, bool enable)
break;
case DVK_ETH:
/* Enable Ethernet analog switches */
/* Disable SPI interface */
perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
DVK_spiControl(DVK_SPI_OFF);
break;
case DVK_I2S:
/* Also make surea Audio out is connected for I2S operation */
/* Disable SPI interface and audio out */
perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SHIFT);
perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
DVK_spiControl(DVK_SPI_OFF);
break;
case DVK_TRACE:
......@@ -318,8 +361,10 @@ void DVK_peripheralAccess(DVK_Peripheral_TypeDef perf, bool enable)
break;
case DVK_TFT:
/* Disable SPI analog switch */
/* Disable SPI interface */
perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
DVK_spiControl(DVK_SPI_OFF);
break;
}
}
......@@ -365,6 +410,11 @@ void DVK_spiControl(DVK_SpiControl_TypeDef device)
case DVK_SPI_Display:
DVK_writeRegister(&BC_REGISTER->SPI_DEMUX, BC_SPI_DEMUX_SLAVE_DISPLAY);
break;
case DVK_SPI_OFF:
USART_Reset(USART1);
CMU_ClockEnable(cmuClock_USART1, false);
break;
}
}
......
......@@ -2,16 +2,23 @@
* @file
* @brief EFM32GG_DK3750 board support package API
* @author Energy Micro AS
* @version 1.2.2
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* This copyright notice may not be removed from the source code nor changed.
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
......@@ -84,6 +91,7 @@ typedef enum
DVK_SPI_Audio, /**< Configure switchable SPI interface to Audio I2S */
DVK_SPI_Ethernet, /**< Configure switchable SPI interface to Ethernet */
DVK_SPI_Display, /**< Configure switchable SPI interface to SSD2119 */
DVK_SPI_OFF, /**< Disable SPI interface */
} DVK_SpiControl_TypeDef;
......@@ -137,8 +145,8 @@ void DVK_clearInterruptFlags(uint16_t flags);
bool DVK_EBI_init(void);
void DVK_EBI_disable(void);
void DVK_EBI_extendedAddressRange(bool enable);
static __INLINE void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t data);
static __INLINE uint16_t DVK_EBI_readRegister(volatile uint16_t *addr);
__STATIC_INLINE void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t data);
__STATIC_INLINE uint16_t DVK_EBI_readRegister(volatile uint16_t *addr);
/* SPI access */
bool DVK_SPI_init(void);
......@@ -165,7 +173,7 @@ int DVK_BRD3600A_usbVBUSGetOCFlagState(void);
* @param addr Address of board controller register
* @param data Data to write into register
*****************************************************************************/
static __INLINE void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t data)
__STATIC_INLINE void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t data)
{
*addr = data;
}
......@@ -176,7 +184,7 @@ static __INLINE void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t dat
* @param addr Register to read from
* @return Value of board controller register
*****************************************************************************/
static __INLINE uint16_t DVK_EBI_readRegister(volatile uint16_t *addr)
__STATIC_INLINE uint16_t DVK_EBI_readRegister(volatile uint16_t *addr)
{
return *addr;
}
......@@ -187,7 +195,7 @@ static __INLINE uint16_t DVK_EBI_readRegister(volatile uint16_t *addr)
* @param addr Register to read
* @return Value of board controller register
*****************************************************************************/
static __INLINE uint16_t DVK_readRegister(volatile uint16_t *addr)
__STATIC_INLINE uint16_t DVK_readRegister(volatile uint16_t *addr)
{
if (dvkOperationMode == DVK_Init_EBI)
{
......@@ -205,7 +213,7 @@ static __INLINE uint16_t DVK_readRegister(volatile uint16_t *addr)
* @param addr Address to board control register
* @param data Data to write into register
*****************************************************************************/
static __INLINE void DVK_writeRegister(volatile uint16_t *addr, uint16_t data)
__STATIC_INLINE void DVK_writeRegister(volatile uint16_t *addr, uint16_t data)
{
if (dvkOperationMode == DVK_Init_EBI)
{
......
......@@ -2,16 +2,23 @@
* @file
* @brief Board Control register definitions
* @author Energy Micro AS
* @version 1.2.2
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* This copyright notice may not be removed from the source code nor changed.
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
......@@ -81,7 +88,7 @@ typedef struct
__IO uint16_t ADC_STATUS; /**< 0x22 - AEM ADC SPI interface */
__IO uint16_t ADC_READ; /**< 0x24 - AEM ADC SPI interface */
__IO uint16_t RESERVED2; /**< 0x26 - Reserved */
__IO uint16_t CLKRST; /**< 0x26 - Clock and reset control */
__IO uint16_t HW_VERSION; /**< 0x28 - Hardware version */
__IO uint16_t FW_BUILDNO; /**< 0x2A - Firmware build number */
......@@ -178,12 +185,14 @@ typedef struct
#define BC_INTEN_DIP (1 << 1) /**< DIP Switch Interrupt enable */
#define BC_INTEN_JOYSTICK (1 << 2) /**< Joystick Interrupt enable */
#define BC_INTEN_AEM (1 << 3) /**< AEM Interrupt enable */
#define BC_INTEN_ETH (1 << 4) /**< Ethernet Interrupt enable */
#define BC_INTFLAG_MASK (0x000f) /**< Interrupt flag mask */
#define BC_INTFLAG_PB (1 << 0) /**< Push Button interrupt triggered */
#define BC_INTFLAG_DIP (1 << 1) /**< DIP interrupt triggered */
#define BC_INTFLAG_JOYSTICK (1 << 2) /**< Joystick interrupt triggered */
#define BC_INTFLAG_AEM (1 << 3) /**< AEM interrupt triggered */
#define BC_INTFLAG_AEM (1 << 3) /**< AEM Interrupt triggered */
#define BC_INTFLAG_ETH (1 << 4) /**< Ethernet Interrupt triggered */
/* Peripheral control registers */
#define BC_PERICON_RS232_SHUTDOWN_SHIFT 13 /**< RS232 enable MUX bit */
......@@ -211,6 +220,10 @@ typedef struct
#define BC_ADC_STATUS_DONE (0) /**< ADC Status Done */
#define BC_ADC_STATUS_BUSY (1) /**< ADC Status Busy */
/* Clock and Reset Control */
#define BC_CLKRST_FLASH_SHIFT (1 << 1) /**< Flash Reset Control */
#define BC_CLKRST_ETH_SHIFT (1 << 2) /**< Ethernet Reset Control */
/* Hardware version information */
#define BC_HW_VERSION_PCB_MASK (0x07f0) /**< PCB Version mask */
#define BC_HW_VERSION_PCB_SHIFT (4) /**< PCB Version shift */
......
......@@ -2,16 +2,23 @@
* @file
* @brief EFM32GG_DK3750 board support package BRD3600A API implementation
* @author Energy Micro AS
* @version 1.2.2
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* This copyright notice may not be removed from the source code nor changed.
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
......@@ -32,9 +39,9 @@
******************************************************************************/
#include "efm32.h"
#include "efm32_gpio.h"
#include "efm32_ebi.h"
#include "efm32_cmu.h"
#include "em_gpio.h"
#include "em_ebi.h"
#include "em_cmu.h"
#include "dvk.h"
#include "dvk_bcregisters.h"
......
......@@ -2,16 +2,23 @@
* @file
* @brief EFM32GG_DK3750 board support package EBI API implementation
* @author Energy Micro AS
* @version 1.2.2
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* This copyright notice may not be removed from the source code nor changed.
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
......@@ -32,9 +39,9 @@
******************************************************************************/
#include "efm32.h"
#include "efm32_gpio.h"
#include "efm32_ebi.h"
#include "efm32_cmu.h"
#include "em_gpio.h"
#include "em_ebi.h"
#include "em_cmu.h"
#include "dvk.h"
#include "dvk_bcregisters.h"
......@@ -147,7 +154,7 @@ bool DVK_EBI_init(void)
ebiConfig.mode = ebiModeD16A16ALE;;
ebiConfig.alePolarity = ebiActiveHigh;
/* keep blEnable */
/* ebiConfig.blEnable = false; - common setting needs to be true for PSRAM */
ebiConfig.blEnable = false;
ebiConfig.addrHalfALE = true;
ebiConfig.readPrefetch = false;
ebiConfig.noIdle = true;
......@@ -206,8 +213,9 @@ bool DVK_EBI_init(void)
ebiConfig.csLines = EBI_CS3;
ebiConfig.mode = ebiModeD16A16ALE;;
ebiConfig.alePolarity = ebiActiveHigh;
/* keep blEnable */
/* ebiConfig.blEnable = false; */
ebiConfig.blEnable = true;
ebiConfig.addrHalfALE = true;
ebiConfig.readPrefetch = false;
ebiConfig.noIdle = true;
......@@ -217,12 +225,12 @@ bool DVK_EBI_init(void)
ebiConfig.addrSetupCycles = 0;
/* Read cycle times */
ebiConfig.readStrobeCycles = 7;
ebiConfig.readStrobeCycles = 5;
ebiConfig.readHoldCycles = 0;
ebiConfig.readSetupCycles = 0;
/* Write cycle times */
ebiConfig.writeStrobeCycles = 2;
ebiConfig.writeStrobeCycles = 5;
ebiConfig.writeHoldCycles = 0;
ebiConfig.writeSetupCycles = 0;
......
......@@ -2,16 +2,23 @@
* @file
* @brief EFM32GG_DK3750 board support package SPI API implementation
* @author Energy Micro AS
* @version 1.2.2
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* This copyright notice may not be removed from the source code nor changed.
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
......@@ -32,9 +39,9 @@
******************************************************************************/
#include "efm32.h"
#include "efm32_gpio.h"
#include "efm32_usart.h"
#include "efm32_cmu.h"
#include "em_gpio.h"
#include "em_usart.h"
#include "em_cmu.h"
#include "dvk.h"
#include "dvk_bcregisters.h"
......
......@@ -2,16 +2,23 @@
* @file
* @brief API for enabling SWO or ETM trace on DK3750 board
* @author Energy Micro AS
* @version 1.2.2
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* This copyright notice may not be removed from the source code nor changed.
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
......@@ -30,10 +37,11 @@
* @addtogroup BSP
* @{
******************************************************************************/
#include <stdbool.h>
#include "efm32.h"
#include "efm32_gpio.h"
#include "efm32_cmu.h"
#include "em_gpio.h"
#include "em_cmu.h"
#include "trace.h"
/**************************************************************************//**
* @brief Configure EFM32GG990F1024 for DK3750 ETM trace output
......@@ -66,7 +74,9 @@ void TRACE_ETMSetup(void)
/**************************************************************************//**
* @brief Configure EFM32GG990F1024 for DK3750 SWO trace output
* @brief Configure trace output for energyAware Profiler
* @note Kit needs to be initialized with SPI-mode;
* @verbatim DVK_init(DVK_Init_SPI); @endverbatim
*****************************************************************************/
void TRACE_SWOSetup(void)
{
......@@ -95,7 +105,6 @@ void TRACE_SWOSetup(void)
while(!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY));
/* Enable trace in core debug */
CoreDebug->DHCSR |= 1;
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
/* Enable PC and IRQ sampling output */
......@@ -112,4 +121,27 @@ void TRACE_SWOSetup(void)
ITM->TCR = 0x10009;
}
/**************************************************************************//**
* @brief Profiler configuration for EFM32GG990F11024/EFM32GG-DK3750
* @return true if energyAware Profiler/SWO is enabled, false if not
* @note If first word of the user page is zero, this will not
* enable SWO profiler output
*****************************************************************************/
bool TRACE_ProfilerSetup(void)
{
volatile uint32_t *userData = (uint32_t *) USER_PAGE;
/* Check magic "trace" word in user page */
if(*userData == 0x00000000UL)
{
return false;
}
else
{
TRACE_SWOSetup();
return true;
}
}
/** @} (end group BSP) */
/**************************************************************************//**
* @file
* @brief API for enabling SWO or ETM trace on DK3750 board
* @brief SWO Trace API (for eAProfiler)
* @author Energy Micro AS
* @version 1.2.2
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* This copyright notice may not be removed from the source code nor changed.
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
......@@ -32,8 +39,9 @@
* @addtogroup BSP
* @{
******************************************************************************/
#include <stdbool.h>
#include <stdint.h>
#include "em_msc.h"
#ifdef __cplusplus
extern "C" {
......@@ -41,6 +49,57 @@ extern "C" {
void TRACE_ETMSetup(void);
void TRACE_SWOSetup(void);
bool TRACE_ProfilerSetup(void);
#define USER_PAGE 0x0FE00000UL
/**************************************************************************//**
* @brief Set or clear word in user page which enables or disables SWO
* for TRACE_ProfilerSetup. If TRACE_ProfilerEnable(false) has been run,
* no example project will enable SWO trace.
* @param[in] enable
* @note Add "em_msc.c" to build to use this function.
*****************************************************************************/
__STATIC_INLINE void TRACE_ProfilerEnable(bool enable)
{
uint32_t data;
volatile uint32_t *userpage = (uint32_t *) USER_PAGE;
/* Check that configuration needs to change */
data = *userpage;
if(enable)
{
if(data == 0xFFFFFFFF)
{
return;
}
}
else
{
if(data == 0x00000000)
{
return;
}
}
/* Initialize MSC */
MSC_Init();
/* Write enble or disable trigger word into flash */
if(enable)
{
data = 0xFFFFFFFF;
MSC_ErasePage((uint32_t *)USER_PAGE);
MSC_WriteWord((uint32_t *)USER_PAGE, (void *) &data, 4);
}
else
{
data = 0x00000000;
MSC_ErasePage((uint32_t *)USER_PAGE);
MSC_WriteWord((uint32_t *)USER_PAGE, (void *) &data, 4);
}
}
#ifdef __cplusplus
}
......
......@@ -2,16 +2,23 @@
* @file
* @brief DVK board support package, initialization
* @author Energy Micro AS
* @version 1.7.3
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* This copyright notice may not be removed from the source code nor changed.
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
......
......@@ -2,16 +2,23 @@
* @file
* @brief DVK Board Support, master header file
* @author Energy Micro AS
* @version 1.7.3
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* This copyright notice may not be removed from the source code nor changed.
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
......
......@@ -2,16 +2,23 @@
* @file
* @brief Board Control register definitions
* @author Energy Micro AS
* @version 1.7.3
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* This copyright notice may not be removed from the source code nor changed.
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
......
......@@ -2,16 +2,23 @@
* @file
* @brief DVK Peripheral Board Control API implementation
* @author Energy Micro AS
* @version 1.7.3
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* This copyright notice may not be removed from the source code nor changed.
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
......
......@@ -2,16 +2,23 @@
* @file
* @brief DVK Peripheral Board Control, prototypes and definitions
* @author Energy Micro AS
* @version 1.7.3
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* This copyright notice may not be removed from the source code nor changed.
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
......
......@@ -4,16 +4,23 @@
* This implementation works for devices w/o LCD display on the
* MCU module, specifically the EFM32_G2xx_DK development board
* @author Energy Micro AS
* @version 1.7.3
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* This copyright notice may not be removed from the source code nor changed.
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
......@@ -28,9 +35,9 @@
*
*****************************************************************************/
#include "efm32.h"
#include "efm32_ebi.h"
#include "efm32_cmu.h"
#include "efm32_gpio.h"
#include "em_ebi.h"
#include "em_cmu.h"
#include "em_gpio.h"
#include "dvk.h"
#include "dvk_bcregisters.h"
......
......@@ -4,16 +4,23 @@
* This implementation use the USART2 SPI interface to control board
* control registers. It works
* @author Energy Micro AS
* @version 1.7.3
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* This copyright notice may not be removed from the source code nor changed.
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
......@@ -35,9 +42,9 @@
#include <stdio.h>
#include "efm32.h"
#include "efm32_usart.h"
#include "efm32_gpio.h"
#include "efm32_cmu.h"
#include "em_usart.h"
#include "em_gpio.h"
#include "em_cmu.h"
#include "dvk.h"
#include "dvk_bcregisters.h"
......
/**************************************************************************//**
* @file
* @brief SWO Trace API (for eAProfiler)
* @author Energy Micro AS
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
* Software "AS IS", with no express or implied warranties of any kind,
* including, but not limited to, any implied warranties of merchantability
* or fitness for any particular purpose or warranties against infringement
* of any proprietary rights of a third party.
*
* Energy Micro AS will not be liable for any consequential, incidental, or
* special damages, or any other relief, or for any claim by any third party,
* arising from your use of this Software.
*
*****************************************************************************/
#include <stdbool.h>
#include "efm32.h"
#include "trace.h"
/***************************************************************************//**
* @addtogroup BSP
* @{
******************************************************************************/
/**************************************************************************//**
* @brief Configure trace output for energyAware Profiler
*****************************************************************************/
void TRACE_SWOSetup(void)
{
uint32_t *dwt_ctrl = (uint32_t *) 0xE0001000;
uint32_t *tpiu_prescaler = (uint32_t *) 0xE0040010;
uint32_t *tpiu_protocol = (uint32_t *) 0xE00400F0;
/* Enable GPIO clock */
CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_GPIO;
/* Enable Serial wire output pin */
GPIO->ROUTE |= GPIO_ROUTE_SWOPEN;
/* Set location 1 */
GPIO->ROUTE = (GPIO->ROUTE & ~(_GPIO_ROUTE_SWLOCATION_MASK)) | GPIO_ROUTE_SWLOCATION_LOC1;
/* Enable output on pin */
GPIO->P[2].MODEH &= ~(_GPIO_P_MODEH_MODE15_MASK);
GPIO->P[2].MODEH |= GPIO_P_MODEH_MODE15_PUSHPULL;
/* Enable debug clock AUXHFRCO */
CMU->OSCENCMD = CMU_OSCENCMD_AUXHFRCOEN;
/* Wait until clock is ready */
while(!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY));
/* Enable trace in core debug */
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
/* Enable PC and IRQ sampling output */
*dwt_ctrl = 0x400113FF;
/* Set TPIU prescaler to 16. */
*tpiu_prescaler = 0xf;
/* Set protocol to NRZ */
*tpiu_protocol = 2;
/* Unlock ITM and output data */
ITM->LAR = 0xC5ACCE55;
ITM->TCR = 0x10009;
}
/**************************************************************************//**
* @brief Profiler configuration
* @return true if energyAware Profiler/SWO is enabled, false if not
* @note If first word of the user page is zero, this will not
* enable SWO profiler output, see trace.h
*****************************************************************************/
bool TRACE_ProfilerSetup(void)
{
volatile uint32_t *userData = (uint32_t *) USER_PAGE;
/* Check magic "trace" word in user page */
if(*userData == 0x00000000UL)
{
return false;
}
else
{
TRACE_SWOSetup();
return true;
}
}
/** @} (end group BSP) */
/**************************************************************************//**
* @file
* @brief SWO Trace API (for eAProfiler)
* @author Energy Micro AS
* @version 2.0.1
******************************************************************************
* @section License
* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
*******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
* 3. This notice may not be removed or altered from any source distribution.
* 4. The source and compiled code may only be used on Energy Micro "EFM32"
* microcontrollers and "EFR4" radios.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
* Software "AS IS", with no express or implied warranties of any kind,
* including, but not limited to, any implied warranties of merchantability
* or fitness for any particular purpose or warranties against infringement
* of any proprietary rights of a third party.
*
* Energy Micro AS will not be liable for any consequential, incidental, or
* special damages, or any other relief, or for any claim by any third party,
* arising from your use of this Software.
*
*****************************************************************************/
#ifndef __TRACE_H
#define __TRACE_H
/***************************************************************************//**
* @addtogroup BSP
* @{
******************************************************************************/
#include <stdint.h>
#include <stdbool.h>
#include "em_msc.h"
#ifdef __cplusplus
extern "C" {
#endif
void TRACE_SWOSetup(void);
bool TRACE_ProfilerSetup(void);
#define USER_PAGE 0x0FE00000UL
/**************************************************************************//**
* @brief Set or clear word in user page which enables or disables SWO
* in TRACE_ProfilerSetup. If TRACE_ProfilerEnable(false) has been run,
* no example project will enable SWO trace.
* @param[in] enable
* @note Add "em_msc.c" to build to use this function.
*****************************************************************************/
__STATIC_INLINE void TRACE_ProfilerEnable(bool enable)
{
uint32_t data;
volatile uint32_t *userpage = (uint32_t *) USER_PAGE;
/* Check that configuration needs to change */
data = *userpage;
if(enable)
{
if(data == 0xFFFFFFFF)
{
return;
}
}
else
{
if(data == 0x00000000)
{
return;
}
}
/* Initialize MSC */
MSC_Init();
/* Write enble or disable trigger word into flash */
if(enable)
{
data = 0xFFFFFFFF;
MSC_ErasePage((uint32_t *)USER_PAGE);
MSC_WriteWord((uint32_t *)USER_PAGE, (void *) &data, 4);
}
else
{
data = 0x00000000;
MSC_ErasePage((uint32_t *)USER_PAGE);
MSC_WriteWord((uint32_t *)USER_PAGE, (void *) &data, 4);
}
}
#ifdef __cplusplus
}
#endif
/** @} (end group BSP) */
#endif
/***************************************************************************//**
* @file efm32_rom_gg.ld
* @brief Linker script for EFM32 giant gecko with GNU ld
* COPYRIGHT (C) 2011, RT-Thread Development Team
* @brief Linker script for EFM32 giant gecko
* COPYRIGHT (C) 2012, RT-Thread Development Team
* @author onelife
* @version 0.4 beta
* @version 1.0
*******************************************************************************
* @section License
* The license and distribution terms for this file may be found in the file
......@@ -11,49 +11,71 @@
*******************************************************************************
* @section Change Logs
* Date Author Notes
* 2011-12-08 onelife Initial creation for EFM3 giant gecko
* support
* 2011-12-08 onelife Initial creation for EFM3 giant gecko support
* 2012-05-15 onelife Modified to compatible with CMSIS v3
******************************************************************************/
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
ENTRY(__cs3_reset)
SEARCH_DIR(.)
GROUP(-lgcc -lc -lcs3 -lcs3unhosted)
MEMORY
{
CODE (rx) : ORIGIN = 0x00000000, LENGTH = 1024K
DATA (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 1048576
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 131072
}
_system_stack_size = 0x200;
/* These force the linker to search for particular symbols from
* the start of the link process and thus ensure the user's
* overrides are picked up
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
EXTERN(__cs3_reset __cs3_reset_efm32)
EXTERN(__cs3_start_asm _start)
PROVIDE(__cs3_reset = __cs3_reset_efm32);
PROVIDE(__cs3_start_asm = _start);
ENTRY(Reset_Handler)
SECTIONS
{
.text :
{
. = ALIGN(4);
KEEP(*(.cs3.interrupt_vector)) /* Startup code */
. = ALIGN(4);
KEEP(*(.isr_vector))
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.cs3.reset)
*(.cs3.init)
*(.text) /* remaining code */
*(.text.*) /* remaining code */
*(.rodata) /* read-only data (constants) */
*(.rodata*)
*(.glue_7)
*(.glue_7t)
*(.gnu.linkonce.t*)
KEEP(*(.eh_frame*))
/* section information for finsh shell */
. = ALIGN(4);
......@@ -64,106 +86,87 @@ SECTIONS
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
} > FLASH = 0
. = ALIGN(4);
_etext = .;
} > CODE = 0
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
/* .ARM.exidx is sorted, so has to go in its own output section. */
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
/* This is used by the startup in order to initialize the .data secion */
_sidata = .;
} > CODE
} > FLASH
__exidx_end = .;
/* .data section which is used for initialized data */
.data : AT (_sidata)
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
*(.ram)
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_sdata = . ;
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_edata = . ;
} >DATA
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
.stack :
{
. = . + _system_stack_size;
. = ALIGN(4);
__cs3_stack = .;
} >DATA
/* All data end */
__data_end__ = .;
} > RAM
__bss_start = .;
.bss :
{
. = ALIGN(4);
/* This is used by the startup in order to initialize the .bss secion */
_sbss = .;
*(.bss)
*(.bss.*)
__bss_start__ = .;
*(.bss*)
*(COMMON)
__bss_end__ = .;
} > RAM
. = ALIGN(4);
/* This is used by the startup in order to initialize the .bss secion */
_ebss = . ;
*(.bss.init)
} > DATA
__bss_end = .;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
* Symbols in the DWARF debugging sections are relative to
* the beginning of the section so we begin them at 0.
*/
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* DWARF 2.1 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
/DISCARD/ : { *(.note.GNU-stack) }
}
.heap :
{
__end__ = .;
end = __end__;
_end = __end__;
*(.heap*)
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy :
{
*(.stack)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}
/**************************************************************************//**
* @file core_cm3.c
* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
* @version V2.00
* @date 13. September 2010
*
* @note
* Copyright (C) 2009-2010 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#include <stdint.h>
/* define compiler specific symbols */
#if defined ( __CC_ARM )
#define __ASM __asm /*!< asm keyword for ARM Compiler */
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
#elif defined ( __ICCARM__ )
#define __ASM __asm /*!< asm keyword for IAR Compiler */
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
#elif defined ( __GNUC__ )
#define __ASM __asm /*!< asm keyword for GNU Compiler */
#define __INLINE inline /*!< inline keyword for GNU Compiler */
#elif defined ( __TASKING__ )
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
#endif
/* ########################## Core Instruction Access ######################### */
#if defined ( __CC_ARM ) /*------------------ RealView Compiler ----------------*/
/** \brief Reverse byte order (16 bit)
This function reverses the byte order in two unsigned short values.
\param [in] value Value to reverse
\return Reversed value
*/
#if (__ARMCC_VERSION < 400677)
__ASM uint32_t __REV16(uint32_t value)
{
rev16 r0, r0
bx lr
}
#endif /* __ARMCC_VERSION */
/** \brief Reverse byte order in signed short value
This function reverses the byte order in a signed short value with sign extension to integer.
\param [in] value Value to reverse
\return Reversed value
*/
#if (__ARMCC_VERSION < 400677)
__ASM int32_t __REVSH(int32_t value)
{
revsh r0, r0
bx lr
}
#endif /* __ARMCC_VERSION */
/** \brief Remove the exclusive lock
This function removes the exclusive lock which is created by LDREX.
*/
#if (__ARMCC_VERSION < 400000)
__ASM void __CLREX(void)
{
clrex
}
#endif /* __ARMCC_VERSION */
#elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/
/* obsolete */
#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
/* obsolete */
#elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/
/* obsolete */
#endif
/* ########################### Core Function Access ########################### */
#if defined ( __CC_ARM ) /*------------------ RealView Compiler ----------------*/
/** \brief Get Control Register
This function returns the content of the Control Register.
\return Control Register value
*/
#if (__ARMCC_VERSION < 400000)
__ASM uint32_t __get_CONTROL(void)
{
mrs r0, control
bx lr
}
#endif /* __ARMCC_VERSION */
/** \brief Set Control Register
This function writes the given value to the Control Register.
\param [in] control Control Register value to set
*/
#if (__ARMCC_VERSION < 400000)
__ASM void __set_CONTROL(uint32_t control)
{
msr control, r0
bx lr
}
#endif /* __ARMCC_VERSION */
/** \brief Get ISPR Register
This function returns the content of the ISPR Register.
\return ISPR Register value
*/
#if (__ARMCC_VERSION < 400000)
__ASM uint32_t __get_IPSR(void)
{
mrs r0, ipsr
bx lr
}
#endif /* __ARMCC_VERSION */
/** \brief Get APSR Register
This function returns the content of the APSR Register.
\return APSR Register value
*/
#if (__ARMCC_VERSION < 400000)
__ASM uint32_t __get_APSR(void)
{
mrs r0, apsr
bx lr
}
#endif /* __ARMCC_VERSION */
/** \brief Get xPSR Register
This function returns the content of the xPSR Register.
\return xPSR Register value
*/
#if (__ARMCC_VERSION < 400000)
__ASM uint32_t __get_xPSR(void)
{
mrs r0, xpsr
bx lr
}
#endif /* __ARMCC_VERSION */
/** \brief Get Process Stack Pointer
This function returns the current value of the Process Stack Pointer (PSP).
\return PSP Register value
*/
#if (__ARMCC_VERSION < 400000)
__ASM uint32_t __get_PSP(void)
{
mrs r0, psp
bx lr
}
#endif /* __ARMCC_VERSION */
/** \brief Set Process Stack Pointer
This function assigns the given value to the Process Stack Pointer (PSP).
\param [in] topOfProcStack Process Stack Pointer value to set
*/
#if (__ARMCC_VERSION < 400000)
__ASM void __set_PSP(uint32_t topOfProcStack)
{
msr psp, r0
bx lr
}
#endif /* __ARMCC_VERSION */
/** \brief Get Main Stack Pointer
This function returns the current value of the Main Stack Pointer (MSP).
\return MSP Register value
*/
#if (__ARMCC_VERSION < 400000)
__ASM uint32_t __get_MSP(void)
{
mrs r0, msp
bx lr
}
#endif /* __ARMCC_VERSION */
/** \brief Set Main Stack Pointer
This function assigns the given value to the Main Stack Pointer (MSP).
\param [in] topOfMainStack Main Stack Pointer value to set
*/
#if (__ARMCC_VERSION < 400000)
__ASM void __set_MSP(uint32_t mainStackPointer)
{
msr msp, r0
bx lr
}
#endif /* __ARMCC_VERSION */
/** \brief Get Base Priority
This function returns the current value of the Base Priority register.
\return Base Priority register value
*/
#if (__ARMCC_VERSION < 400000)
__ASM uint32_t __get_BASEPRI(void)
{
mrs r0, basepri
bx lr
}
#endif /* __ARMCC_VERSION */
/** \brief Set Base Priority
This function assigns the given value to the Base Priority register.
\param [in] basePri Base Priority value to set
*/
#if (__ARMCC_VERSION < 400000)
__ASM void __set_BASEPRI(uint32_t basePri)
{
msr basepri, r0
bx lr
}
#endif /* __ARMCC_VERSION */
/** \brief Get Priority Mask
This function returns the current state of the priority mask bit from the Priority Mask Register.
\return Priority Mask value
*/
#if (__ARMCC_VERSION < 400000)
__ASM uint32_t __get_PRIMASK(void)
{
mrs r0, primask
bx lr
}
#endif /* __ARMCC_VERSION */
/** \brief Set Priority Mask
This function assigns the given value to the Priority Mask Register.
\param [in] priMask Priority Mask
*/
#if (__ARMCC_VERSION < 400000)
__ASM void __set_PRIMASK(uint32_t priMask)
{
msr primask, r0
bx lr
}
#endif /* __ARMCC_VERSION */
/** \brief Get Fault Mask
This function returns the current value of the Fault Mask Register.
\return Fault Mask value
*/
#if (__ARMCC_VERSION < 400000)
__ASM uint32_t __get_FAULTMASK(void)
{
mrs r0, faultmask
bx lr
}
#endif /* __ARMCC_VERSION */
/** \brief Set the Fault Mask
This function assigns the given value to the Fault Mask Register.
\param [in] faultMask Fault Mask value value to set
*/
#if (__ARMCC_VERSION < 400000)
__ASM void __set_FAULTMASK(uint32_t faultMask)
{
msr faultmask, r0
bx lr
}
#endif /* __ARMCC_VERSION */
#elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/
/* obsolete */
#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
/* obsolete */
#elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/
/* obsolete */
#endif
;/*****************************************************************************
; * @file: startup_efm32.s
; * @purpose: CMSIS Cortex-M3 Core Device Startup File
; * for the Energy Micro EFM32 device series
; * @version 2.3.2
; * @date: January 2011
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
; *
; * Copyright (C) 2008 ARM Limited. All rights reserved.
; * ARM Limited (ARM) is supplying this software for use with Cortex-M3
; * processor based microcontrollers. This file can be freely distributed
; * within development tools that are supporting such ARM based processors.
; *
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; *
; *****************************************************************************/
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000200
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000000
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD DMA_IRQHandler ; 0: DMA Interrupt
DCD GPIO_EVEN_IRQHandler ; 1: GPIO_EVEN Interrupt
DCD TIMER0_IRQHandler ; 2: TIMER0 Interrupt
DCD USART0_RX_IRQHandler ; 3: USART0_RX Interrupt
DCD USART0_TX_IRQHandler ; 4: USART0_TX Interrupt
DCD USB_IRQHandler ; 5: USB Interrupt
DCD ACMP0_IRQHandler ; 6: ACMP0 Interrupt
DCD ADC0_IRQHandler ; 7: ADC0 Interrupt
DCD DAC0_IRQHandler ; 8: DAC0 Interrupt
DCD I2C0_IRQHandler ; 9: I2C0 Interrupt
DCD I2C1_IRQHandler ; 10: I2C1 Interrupt
DCD GPIO_ODD_IRQHandler ; 11: GPIO_ODD Interrupt
DCD TIMER1_IRQHandler ; 12: TIMER1 Interrupt
DCD TIMER2_IRQHandler ; 13: TIMER2 Interrupt
DCD TIMER3_IRQHandler ; 14: TIMER3 Interrupt
DCD USART1_RX_IRQHandler ; 15: USART1_RX Interrupt
DCD USART1_TX_IRQHandler ; 16: USART1_TX Interrupt
DCD LESENSE_IRQHandler ; 17: LESENSE Interrupt
DCD USART2_RX_IRQHandler ; 18: USART2_RX Interrupt
DCD USART2_TX_IRQHandler ; 19: USART2_TX Interrupt
DCD UART0_RX_IRQHandler ; 20: UART0_RX Interrupt
DCD UART0_TX_IRQHandler ; 21: UART0_TX Interrupt
DCD UART1_RX_IRQHandler ; 22: UART1_RX Interrupt
DCD UART1_TX_IRQHandler ; 23: UART1_TX Interrupt
DCD LEUART0_IRQHandler ; 24: LEUART0 Interrupt
DCD LEUART1_IRQHandler ; 25: LEUART1 Interrupt
DCD LETIMER0_IRQHandler ; 26: LETIMER0 Interrupt
DCD PCNT0_IRQHandler ; 27: PCNT0 Interrupt
DCD PCNT1_IRQHandler ; 28: PCNT1 Interrupt
DCD PCNT2_IRQHandler ; 29: PCNT2 Interrupt
DCD RTC_IRQHandler ; 30: RTC Interrupt
DCD BURTC_IRQHandler ; 31: BURTC Interrupt
DCD CMU_IRQHandler ; 32: CMU Interrupt
DCD VCMP_IRQHandler ; 33: VCMP Interrupt
DCD LCD_IRQHandler ; 34: LCD Interrupt
DCD MSC_IRQHandler ; 35: MSC Interrupt
DCD AES_IRQHandler ; 36: AES Interrupt
DCD EBI_IRQHandler ; 37: EBI Interrupt
DCD EMU_IRQHandler ; 38: EMU Interrupt
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT DMA_IRQHandler [WEAK]
EXPORT GPIO_EVEN_IRQHandler [WEAK]
EXPORT TIMER0_IRQHandler [WEAK]
EXPORT USART0_RX_IRQHandler [WEAK]
EXPORT USART0_TX_IRQHandler [WEAK]
EXPORT USB_IRQHandler [WEAK]
EXPORT ACMP0_IRQHandler [WEAK]
EXPORT ADC0_IRQHandler [WEAK]
EXPORT DAC0_IRQHandler [WEAK]
EXPORT I2C0_IRQHandler [WEAK]
EXPORT I2C1_IRQHandler [WEAK]
EXPORT GPIO_ODD_IRQHandler [WEAK]
EXPORT TIMER1_IRQHandler [WEAK]
EXPORT TIMER2_IRQHandler [WEAK]
EXPORT TIMER3_IRQHandler [WEAK]
EXPORT USART1_RX_IRQHandler [WEAK]
EXPORT USART1_TX_IRQHandler [WEAK]
EXPORT LESENSE_IRQHandler [WEAK]
EXPORT USART2_RX_IRQHandler [WEAK]
EXPORT USART2_TX_IRQHandler [WEAK]
EXPORT UART0_RX_IRQHandler [WEAK]
EXPORT UART0_TX_IRQHandler [WEAK]
EXPORT UART1_RX_IRQHandler [WEAK]
EXPORT UART1_TX_IRQHandler [WEAK]
EXPORT LEUART0_IRQHandler [WEAK]
EXPORT LEUART1_IRQHandler [WEAK]
EXPORT LETIMER0_IRQHandler [WEAK]
EXPORT PCNT0_IRQHandler [WEAK]
EXPORT PCNT1_IRQHandler [WEAK]
EXPORT PCNT2_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT BURTC_IRQHandler [WEAK]
EXPORT CMU_IRQHandler [WEAK]
EXPORT VCMP_IRQHandler [WEAK]
EXPORT LCD_IRQHandler [WEAK]
EXPORT MSC_IRQHandler [WEAK]
EXPORT AES_IRQHandler [WEAK]
EXPORT EBI_IRQHandler [WEAK]
EXPORT EMU_IRQHandler [WEAK]
DMA_IRQHandler
GPIO_EVEN_IRQHandler
TIMER0_IRQHandler
USART0_RX_IRQHandler
USART0_TX_IRQHandler
USB_IRQHandler
ACMP0_IRQHandler
ADC0_IRQHandler
DAC0_IRQHandler
I2C0_IRQHandler
I2C1_IRQHandler
GPIO_ODD_IRQHandler
TIMER1_IRQHandler
TIMER2_IRQHandler
TIMER3_IRQHandler
USART1_RX_IRQHandler
USART1_TX_IRQHandler
LESENSE_IRQHandler
USART2_RX_IRQHandler
USART2_TX_IRQHandler
UART0_RX_IRQHandler
UART0_TX_IRQHandler
UART1_RX_IRQHandler
UART1_TX_IRQHandler
LEUART0_IRQHandler
LEUART1_IRQHandler
LETIMER0_IRQHandler
PCNT0_IRQHandler
PCNT1_IRQHandler
PCNT2_IRQHandler
RTC_IRQHandler
BURTC_IRQHandler
CMU_IRQHandler
VCMP_IRQHandler
LCD_IRQHandler
MSC_IRQHandler
AES_IRQHandler
EBI_IRQHandler
EMU_IRQHandler
B .
ENDP
ALIGN
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;/*****************************************************************************
; * @file: startup_efm32.s
; * @purpose: CMSIS Cortex-M3 Core Device Startup File
; * for the Energy Micro EFM32 device series
; * @version 2.3.2
; * @date: January 2011
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
; *
; * Copyright (C) 2008 ARM Limited. All rights reserved.
; * ARM Limited (ARM) is supplying this software for use with Cortex-M3
; * processor based microcontrollers. This file can be freely distributed
; * within development tools that are supporting such ARM based processors.
; *
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; *
; *****************************************************************************/
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000200
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000000
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD DMA_IRQHandler ; 0: DMA Interrupt
DCD GPIO_EVEN_IRQHandler ; 1: GPIO_EVEN Interrupt
DCD TIMER0_IRQHandler ; 2: TIMER0 Interrupt
DCD USART0_RX_IRQHandler ; 3: USART0_RX Interrupt
DCD USART0_TX_IRQHandler ; 4: USART0_TX Interrupt
DCD ACMP0_IRQHandler ; 5: ACMP0 Interrupt
DCD ADC0_IRQHandler ; 6: ADC0 Interrupt
DCD DAC0_IRQHandler ; 7: DAC0 Interrupt
DCD I2C0_IRQHandler ; 8: I2C0 Interrupt
DCD GPIO_ODD_IRQHandler ; 9: GPIO_ODD Interrupt
DCD TIMER1_IRQHandler ; 10: TIMER1 Interrupt
DCD USART1_RX_IRQHandler ; 11: USART1_RX Interrupt
DCD USART1_TX_IRQHandler ; 12: USART1_TX Interrupt
DCD LESENSE_IRQHandler ; 13: LESENSE Interrupt
DCD LEUART0_IRQHandler ; 14: LEUART0 Interrupt
DCD LETIMER0_IRQHandler ; 15: LETIMER0 Interrupt
DCD PCNT0_IRQHandler ; 16: PCNT0 Interrupt
DCD RTC_IRQHandler ; 17: RTC Interrupt
DCD CMU_IRQHandler ; 18: CMU Interrupt
DCD VCMP_IRQHandler ; 19: VCMP Interrupt
DCD LCD_IRQHandler ; 20: LCD Interrupt
DCD MSC_IRQHandler ; 21: MSC Interrupt
DCD AES_IRQHandler ; 22: AES Interrupt
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT DMA_IRQHandler [WEAK]
EXPORT GPIO_EVEN_IRQHandler [WEAK]
EXPORT TIMER0_IRQHandler [WEAK]
EXPORT USART0_RX_IRQHandler [WEAK]
EXPORT USART0_TX_IRQHandler [WEAK]
EXPORT ACMP0_IRQHandler [WEAK]
EXPORT ADC0_IRQHandler [WEAK]
EXPORT DAC0_IRQHandler [WEAK]
EXPORT I2C0_IRQHandler [WEAK]
EXPORT GPIO_ODD_IRQHandler [WEAK]
EXPORT TIMER1_IRQHandler [WEAK]
EXPORT USART1_RX_IRQHandler [WEAK]
EXPORT USART1_TX_IRQHandler [WEAK]
EXPORT LESENSE_IRQHandler [WEAK]
EXPORT LEUART0_IRQHandler [WEAK]
EXPORT LETIMER0_IRQHandler [WEAK]
EXPORT PCNT0_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT CMU_IRQHandler [WEAK]
EXPORT VCMP_IRQHandler [WEAK]
EXPORT LCD_IRQHandler [WEAK]
EXPORT MSC_IRQHandler [WEAK]
EXPORT AES_IRQHandler [WEAK]
DMA_IRQHandler
GPIO_EVEN_IRQHandler
TIMER0_IRQHandler
USART0_RX_IRQHandler
USART0_TX_IRQHandler
ACMP0_IRQHandler
ADC0_IRQHandler
DAC0_IRQHandler
I2C0_IRQHandler
GPIO_ODD_IRQHandler
TIMER1_IRQHandler
USART1_RX_IRQHandler
USART1_TX_IRQHandler
LESENSE_IRQHandler
LEUART0_IRQHandler
LETIMER0_IRQHandler
PCNT0_IRQHandler
RTC_IRQHandler
CMU_IRQHandler
VCMP_IRQHandler
LCD_IRQHandler
MSC_IRQHandler
AES_IRQHandler
B .
ENDP
ALIGN
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
/* Linker script for Energy Micro EFM32G
*
* Version: Sourcery G++ 4.4-180
* Support: https://support.codesourcery.com/GNUToolchain/
*
* Copyright (c) 2007, 2008, 2009, 2010 CodeSourcery, Inc.
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
ENTRY(__cs3_reset)
SEARCH_DIR(.)
GROUP(-lgcc -lc -lcs3 -lcs3unhosted)
MEMORY
{
rom (rx) : ORIGIN = 0x00000000, LENGTH = 1048576
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 131072
}
/* These force the linker to search for particular symbols from
* the start of the link process and thus ensure the user's
* overrides are picked up
*/
EXTERN(__cs3_reset __cs3_reset_efm32)
EXTERN(__cs3_start_asm _start)
EXTERN(__cs3_stack)
EXTERN(__cs3_reset)
EXTERN(NMI_Handler)
EXTERN(HardFault_Handler)
EXTERN(MemManage_Handler)
EXTERN(BusFault_Handler)
EXTERN(UsageFault_Handler)
EXTERN(Reserved7_Handler)
EXTERN(Reserved8_Handler)
EXTERN(Reserved9_Handler)
EXTERN(Reserved10_Handler)
EXTERN(SVC_Handler)
EXTERN(DebugMon_Handler)
EXTERN(Reserved13_Handler)
EXTERN(PendSV_Handler)
EXTERN(SysTick_Handler)
EXTERN(DMA_IRQHandler)
EXTERN(GPIO_EVEN_IRQHandler)
EXTERN(TIMER0_IRQHandler)
EXTERN(USART0_RX_IRQHandler)
EXTERN(USART0_TX_IRQHandler)
EXTERN(USB_IRQHandler)
EXTERN(ACMP0_IRQHandler)
EXTERN(ADC0_IRQHandler)
EXTERN(DAC0_IRQHandler)
EXTERN(I2C0_IRQHandler)
EXTERN(I2C1_IRQHandler)
EXTERN(GPIO_ODD_IRQHandler)
EXTERN(TIMER1_IRQHandler)
EXTERN(TIMER2_IRQHandler)
EXTERN(TIMER3_IRQHandler)
EXTERN(USART1_RX_IRQHandler)
EXTERN(USART1_TX_IRQHandler)
EXTERN(LESENSE_IRQHandler)
EXTERN(USART2_RX_IRQHandler)
EXTERN(USART2_TX_IRQHandler)
EXTERN(UART0_RX_IRQHandler)
EXTERN(UART0_TX_IRQHandler)
EXTERN(UART1_RX_IRQHandler)
EXTERN(UART1_TX_IRQHandler)
EXTERN(LEUART0_IRQHandler)
EXTERN(LEUART1_IRQHandler)
EXTERN(LETIMER0_IRQHandler)
EXTERN(PCNT0_IRQHandler)
EXTERN(PCNT1_IRQHandler)
EXTERN(PCNT2_IRQHandler)
EXTERN(RTC_IRQHandler)
EXTERN(BURTC_IRQHandler)
EXTERN(CMU_IRQHandler)
EXTERN(VCMP_IRQHandler)
EXTERN(LCD_IRQHandler)
EXTERN(MSC_IRQHandler)
EXTERN(AES_IRQHandler)
EXTERN(EBI_IRQHandler)
EXTERN(EMU_IRQHandler)
EXTERN(__cs3_interrupt_vector_efm32g)
EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
/* Provide fall-back values */
PROVIDE(__cs3_heap_start = _end);
PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
PROVIDE(__cs3_region_num = (__cs3_regions_end - __cs3_regions) / 20);
PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
SECTIONS
{
.text :
{
CREATE_OBJECT_SYMBOLS
__cs3_region_start_rom = .;
*(.cs3.region-head.rom)
ASSERT (. == __cs3_region_start_rom, ".cs3.region-head.rom not permitted");
__cs3_interrupt_vector = __cs3_interrupt_vector_efm32g;
*(.cs3.interrupt_vector)
/* Make sure we pulled in an interrupt vector. */
ASSERT (. != __cs3_interrupt_vector_efm32g, "No interrupt vector");
PROVIDE(__cs3_reset = __cs3_reset_efm32);
*(.cs3.reset)
PROVIDE(__cs3_start_asm = _start);
*(.text.cs3.init)
*(.text .text.* .gnu.linkonce.t.*)
*(.plt)
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
*(.ARM.extab* .gnu.linkonce.armextab.*)
*(.gcc_except_table)
} >rom
.eh_frame_hdr : ALIGN (4)
{
KEEP (*(.eh_frame_hdr))
} >rom
.eh_frame : ALIGN (4)
{
KEEP (*(.eh_frame))
} >rom
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} >rom
PROVIDE_HIDDEN (__exidx_end = .);
.rodata : ALIGN (4)
{
*(.rodata .rodata.* .gnu.linkonce.r.*)
. = ALIGN(4);
KEEP(*(.init))
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))
__preinit_array_end = .;
. = ALIGN(4);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
. = ALIGN(4);
KEEP(*(.fini))
. = ALIGN(4);
__fini_array_start = .;
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
__fini_array_end = .;
. = ALIGN(0x4);
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
. = ALIGN(0x4);
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
. = ALIGN(4);
__cs3_regions = .;
LONG (0)
LONG (__cs3_region_init_ram)
LONG (__cs3_region_start_ram)
LONG (__cs3_region_init_size_ram)
LONG (__cs3_region_zero_size_ram)
__cs3_regions_end = .;
. = ALIGN (8);
*(.rom)
*(.rom.b .bss.rom)
_etext = .;
} >rom
/* __cs3_region_end_rom is deprecated */
__cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom);
__cs3_region_size_rom = LENGTH(rom);
.data : ALIGN (8)
{
__cs3_region_start_ram = .;
*(.cs3.region-head.ram)
KEEP(*(.jcr))
*(.got.plt) *(.got)
*(.shdata)
*(.data .data.* .gnu.linkonce.d.*)
*(.ram)
. = ALIGN (8);
_edata = .;
} >ram AT>rom
.bss :
{
*(.shbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
*(.ram.b .bss.ram)
_end = .;
__end = .;
} >ram AT>rom
/* __cs3_region_end_ram is deprecated */
__cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
__cs3_region_size_ram = LENGTH(ram);
__cs3_region_init_ram = LOADADDR (.data);
__cs3_region_init_size_ram = _edata - ADDR (.data);
__cs3_region_zero_size_ram = _end - _edata;
.stab 0 (NOLOAD) : { *(.stab) }
.stabstr 0 (NOLOAD) : { *(.stabstr) }
/* DWARF debug sections.
* Symbols in the DWARF debugging sections are relative to
* the beginning of the section so we begin them at 0.
*/
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* DWARF 2.1 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
/DISCARD/ : { *(.note.GNU-stack) }
}
/* Linker script for Energy Micro EFM32G
*
* Version: Sourcery G++ 4.4-180
* Support: https://support.codesourcery.com/GNUToolchain/
*
* Copyright (c) 2007, 2008, 2009, 2010 CodeSourcery, Inc.
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
ENTRY(__cs3_reset)
SEARCH_DIR(.)
GROUP(-lgcc -lc -lcs3 -lcs3unhosted)
MEMORY
{
rom (rx) : ORIGIN = 0x00000000, LENGTH = 262144
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32768
}
/* These force the linker to search for particular symbols from
* the start of the link process and thus ensure the user's
* overrides are picked up
*/
EXTERN(__cs3_reset __cs3_reset_efm32)
EXTERN(__cs3_start_asm _start)
EXTERN(__cs3_stack)
EXTERN(__cs3_reset)
EXTERN(NMI_Handler)
EXTERN(HardFault_Handler)
EXTERN(MemManage_Handler)
EXTERN(BusFault_Handler)
EXTERN(UsageFault_Handler)
EXTERN(Reserved7_Handler)
EXTERN(Reserved8_Handler)
EXTERN(Reserved9_Handler)
EXTERN(Reserved10_Handler)
EXTERN(SVC_Handler)
EXTERN(DebugMon_Handler)
EXTERN(Reserved13_Handler)
EXTERN(PendSV_Handler)
EXTERN(SysTick_Handler)
EXTERN(DMA_IRQHandler)
EXTERN(GPIO_EVEN_IRQHandler)
EXTERN(TIMER0_IRQHandler)
EXTERN(USART0_RX_IRQHandler)
EXTERN(USART0_TX_IRQHandler)
EXTERN(USB_IRQHandler)
EXTERN(ACMP0_IRQHandler)
EXTERN(ADC0_IRQHandler)
EXTERN(DAC0_IRQHandler)
EXTERN(I2C0_IRQHandler)
EXTERN(I2C1_IRQHandler)
EXTERN(GPIO_ODD_IRQHandler)
EXTERN(TIMER1_IRQHandler)
EXTERN(TIMER2_IRQHandler)
EXTERN(TIMER3_IRQHandler)
EXTERN(USART1_RX_IRQHandler)
EXTERN(USART1_TX_IRQHandler)
EXTERN(LESENSE_IRQHandler)
EXTERN(USART2_RX_IRQHandler)
EXTERN(USART2_TX_IRQHandler)
EXTERN(UART0_RX_IRQHandler)
EXTERN(UART0_TX_IRQHandler)
EXTERN(UART1_RX_IRQHandler)
EXTERN(UART1_TX_IRQHandler)
EXTERN(LEUART0_IRQHandler)
EXTERN(LEUART1_IRQHandler)
EXTERN(LETIMER0_IRQHandler)
EXTERN(PCNT0_IRQHandler)
EXTERN(PCNT1_IRQHandler)
EXTERN(PCNT2_IRQHandler)
EXTERN(RTC_IRQHandler)
EXTERN(BURTC_IRQHandler)
EXTERN(CMU_IRQHandler)
EXTERN(VCMP_IRQHandler)
EXTERN(LCD_IRQHandler)
EXTERN(MSC_IRQHandler)
EXTERN(AES_IRQHandler)
EXTERN(EBI_IRQHandler)
EXTERN(EMU_IRQHandler)
EXTERN(__cs3_interrupt_vector_efm32g)
EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
/* Provide fall-back values */
PROVIDE(__cs3_heap_start = _end);
PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
PROVIDE(__cs3_region_num = (__cs3_regions_end - __cs3_regions) / 20);
PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
SECTIONS
{
.text :
{
CREATE_OBJECT_SYMBOLS
__cs3_region_start_rom = .;
*(.cs3.region-head.rom)
ASSERT (. == __cs3_region_start_rom, ".cs3.region-head.rom not permitted");
__cs3_interrupt_vector = __cs3_interrupt_vector_efm32g;
*(.cs3.interrupt_vector)
/* Make sure we pulled in an interrupt vector. */
ASSERT (. != __cs3_interrupt_vector_efm32g, "No interrupt vector");
PROVIDE(__cs3_reset = __cs3_reset_efm32);
*(.cs3.reset)
PROVIDE(__cs3_start_asm = _start);
*(.text.cs3.init)
*(.text .text.* .gnu.linkonce.t.*)
*(.plt)
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
*(.ARM.extab* .gnu.linkonce.armextab.*)
*(.gcc_except_table)
} >rom
.eh_frame_hdr : ALIGN (4)
{
KEEP (*(.eh_frame_hdr))
} >rom
.eh_frame : ALIGN (4)
{
KEEP (*(.eh_frame))
} >rom
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} >rom
PROVIDE_HIDDEN (__exidx_end = .);
.rodata : ALIGN (4)
{
*(.rodata .rodata.* .gnu.linkonce.r.*)
. = ALIGN(4);
KEEP(*(.init))
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))
__preinit_array_end = .;
. = ALIGN(4);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
. = ALIGN(4);
KEEP(*(.fini))
. = ALIGN(4);
__fini_array_start = .;
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
__fini_array_end = .;
. = ALIGN(0x4);
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
. = ALIGN(0x4);
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
. = ALIGN(4);
__cs3_regions = .;
LONG (0)
LONG (__cs3_region_init_ram)
LONG (__cs3_region_start_ram)
LONG (__cs3_region_init_size_ram)
LONG (__cs3_region_zero_size_ram)
__cs3_regions_end = .;
. = ALIGN (8);
*(.rom)
*(.rom.b .bss.rom)
_etext = .;
} >rom
/* __cs3_region_end_rom is deprecated */
__cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom);
__cs3_region_size_rom = LENGTH(rom);
.data : ALIGN (8)
{
__cs3_region_start_ram = .;
*(.cs3.region-head.ram)
KEEP(*(.jcr))
*(.got.plt) *(.got)
*(.shdata)
*(.data .data.* .gnu.linkonce.d.*)
*(.ram)
. = ALIGN (8);
_edata = .;
} >ram AT>rom
.bss :
{
*(.shbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
*(.ram.b .bss.ram)
_end = .;
__end = .;
} >ram AT>rom
/* __cs3_region_end_ram is deprecated */
__cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
__cs3_region_size_ram = LENGTH(ram);
__cs3_region_init_ram = LOADADDR (.data);
__cs3_region_init_size_ram = _edata - ADDR (.data);
__cs3_region_zero_size_ram = _end - _edata;
.stab 0 (NOLOAD) : { *(.stab) }
.stabstr 0 (NOLOAD) : { *(.stabstr) }
/* DWARF debug sections.
* Symbols in the DWARF debugging sections are relative to
* the beginning of the section so we begin them at 0.
*/
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* DWARF 2.1 */
.debug_ranges 0 : { *(.debug_ranges) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
/DISCARD/ : { *(.note.GNU-stack) }
}
/* Vector table for efm32g
*
* Version: Sourcery G++ 4.4-180
* Support: https://support.codesourcery.com/GNUToolchain/
*
* Copyright (c) 2007, 2008, 2009, 2010 CodeSourcery, Inc.
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*
* Energy Micro release version
* @version 2.3.2
*/
.section ".cs3.interrupt_vector", "ax"
.globl __cs3_interrupt_vector_efm32g
.type __cs3_interrupt_vector_efm32g, %object
__cs3_interrupt_vector_efm32g:
.long __cs3_stack
.long __cs3_reset
.long NMI_Handler
.long HardFault_Handler
.long MemManage_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long Reserved7_Handler
.long Reserved8_Handler
.long Reserved9_Handler
.long Reserved10_Handler
.long SVC_Handler
.long DebugMon_Handler
.long Reserved13_Handler
.long PendSV_Handler
.long SysTick_Handler
.long DMA_IRQHandler
.long GPIO_EVEN_IRQHandler
.long TIMER0_IRQHandler
.long USART0_RX_IRQHandler
.long USART0_TX_IRQHandler
.long ACMP0_IRQHandler
.long ADC0_IRQHandler
.long DAC0_IRQHandler
.long I2C0_IRQHandler
.long GPIO_ODD_IRQHandler
.long TIMER1_IRQHandler
.long TIMER2_IRQHandler
.long USART1_RX_IRQHandler
.long USART1_TX_IRQHandler
.long USART2_RX_IRQHandler
.long USART2_TX_IRQHandler
.long UART0_RX_IRQHandler
.long UART0_TX_IRQHandler
.long LEUART0_IRQHandler
.long LEUART1_IRQHandler
.long LETIMER0_IRQHandler
.long PCNT0_IRQHandler
.long PCNT1_IRQHandler
.long PCNT2_IRQHandler
.long RTC_IRQHandler
.long CMU_IRQHandler
.long VCMP_IRQHandler
.long LCD_IRQHandler
.long MSC_IRQHandler
.long AES_IRQHandler
.size __cs3_interrupt_vector_efm32g, . - __cs3_interrupt_vector_efm32g
.thumb
.thumb_func
.section .cs3.reset,"ax",%progbits
.globl __cs3_reset_efm32
.type __cs3_reset_efm32, %function
__cs3_reset_efm32:
/* jump to common start code */
ldr r0,=__cs3_start_asm
bx r0
.pool
.size __cs3_reset_efm32,.-__cs3_reset_efm32
.thumb
.globl _IRQHandlerinterrupt
.type _IRQHandlerinterrupt, %function
_IRQHandlerinterrupt:
b .
.size _IRQHandlerinterrupt, . - _IRQHandlerinterrupt
.weak NMI_Handler
.globl NMI_Handler
.set NMI_Handler, _IRQHandlerinterrupt
.weak HardFault_Handler
.globl HardFault_Handler
.set HardFault_Handler, _IRQHandlerinterrupt
.weak MemManage_Handler
.globl MemManage_Handler
.set MemManage_Handler, _IRQHandlerinterrupt
.weak BusFault_Handler
.globl BusFault_Handler
.set BusFault_Handler, _IRQHandlerinterrupt
.weak UsageFault_Handler
.globl UsageFault_Handler
.set UsageFault_Handler, _IRQHandlerinterrupt
.weak Reserved7_Handler
.globl Reserved7_Handler
.set Reserved7_Handler, _IRQHandlerinterrupt
.weak Reserved8_Handler
.globl Reserved8_Handler
.set Reserved8_Handler, _IRQHandlerinterrupt
.weak Reserved9_Handler
.globl Reserved9_Handler
.set Reserved9_Handler, _IRQHandlerinterrupt
.weak Reserved10_Handler
.globl Reserved10_Handler
.set Reserved10_Handler, _IRQHandlerinterrupt
.weak SVC_Handler
.globl SVC_Handler
.set SVC_Handler, _IRQHandlerinterrupt
.weak DebugMon_Handler
.globl DebugMon_Handler
.set DebugMon_Handler, _IRQHandlerinterrupt
.weak Reserved13_Handler
.globl Reserved13_Handler
.set Reserved13_Handler, _IRQHandlerinterrupt
.weak PendSV_Handler
.globl PendSV_Handler
.set PendSV_Handler, _IRQHandlerinterrupt
.weak SysTick_Handler
.globl SysTick_Handler
.set SysTick_Handler, _IRQHandlerinterrupt
.weak DMA_IRQHandler
.globl DMA_IRQHandler
.set DMA_IRQHandler, _IRQHandlerinterrupt
.weak GPIO_EVEN_IRQHandler
.globl GPIO_EVEN_IRQHandler
.set GPIO_EVEN_IRQHandler, _IRQHandlerinterrupt
.weak TIMER0_IRQHandler
.globl TIMER0_IRQHandler
.set TIMER0_IRQHandler, _IRQHandlerinterrupt
.weak USART0_RX_IRQHandler
.globl USART0_RX_IRQHandler
.set USART0_RX_IRQHandler, _IRQHandlerinterrupt
.weak USART0_TX_IRQHandler
.globl USART0_TX_IRQHandler
.set USART0_TX_IRQHandler, _IRQHandlerinterrupt
.weak ACMP0_IRQHandler
.globl ACMP0_IRQHandler
.set ACMP0_IRQHandler, _IRQHandlerinterrupt
.weak ADC0_IRQHandler
.globl ADC0_IRQHandler
.set ADC0_IRQHandler, _IRQHandlerinterrupt
.weak DAC0_IRQHandler
.globl DAC0_IRQHandler
.set DAC0_IRQHandler, _IRQHandlerinterrupt
.weak I2C0_IRQHandler
.globl I2C0_IRQHandler
.set I2C0_IRQHandler, _IRQHandlerinterrupt
.weak GPIO_ODD_IRQHandler
.globl GPIO_ODD_IRQHandler
.set GPIO_ODD_IRQHandler, _IRQHandlerinterrupt
.weak TIMER1_IRQHandler
.globl TIMER1_IRQHandler
.set TIMER1_IRQHandler, _IRQHandlerinterrupt
.weak TIMER2_IRQHandler
.globl TIMER2_IRQHandler
.set TIMER2_IRQHandler, _IRQHandlerinterrupt
.weak USART1_RX_IRQHandler
.globl USART1_RX_IRQHandler
.set USART1_RX_IRQHandler, _IRQHandlerinterrupt
.weak USART1_TX_IRQHandler
.globl USART1_TX_IRQHandler
.set USART1_TX_IRQHandler, _IRQHandlerinterrupt
.weak USART2_RX_IRQHandler
.globl USART2_RX_IRQHandler
.set USART2_RX_IRQHandler, _IRQHandlerinterrupt
.weak USART2_TX_IRQHandler
.globl USART2_TX_IRQHandler
.set USART2_TX_IRQHandler, _IRQHandlerinterrupt
.weak UART0_RX_IRQHandler
.globl UART0_RX_IRQHandler
.set UART0_RX_IRQHandler, _IRQHandlerinterrupt
.weak UART0_TX_IRQHandler
.globl UART0_TX_IRQHandler
.set UART0_TX_IRQHandler, _IRQHandlerinterrupt
.weak LEUART0_IRQHandler
.globl LEUART0_IRQHandler
.set LEUART0_IRQHandler, _IRQHandlerinterrupt
.weak LEUART1_IRQHandler
.globl LEUART1_IRQHandler
.set LEUART1_IRQHandler, _IRQHandlerinterrupt
.weak LETIMER0_IRQHandler
.globl LETIMER0_IRQHandler
.set LETIMER0_IRQHandler, _IRQHandlerinterrupt
.weak PCNT0_IRQHandler
.globl PCNT0_IRQHandler
.set PCNT0_IRQHandler, _IRQHandlerinterrupt
.weak PCNT1_IRQHandler
.globl PCNT1_IRQHandler
.set PCNT1_IRQHandler, _IRQHandlerinterrupt
.weak PCNT2_IRQHandler
.globl PCNT2_IRQHandler
.set PCNT2_IRQHandler, _IRQHandlerinterrupt
.weak RTC_IRQHandler
.globl RTC_IRQHandler
.set RTC_IRQHandler, _IRQHandlerinterrupt
.weak CMU_IRQHandler
.globl CMU_IRQHandler
.set CMU_IRQHandler, _IRQHandlerinterrupt
.weak VCMP_IRQHandler
.globl VCMP_IRQHandler
.set VCMP_IRQHandler, _IRQHandlerinterrupt
.weak LCD_IRQHandler
.globl LCD_IRQHandler
.set LCD_IRQHandler, _IRQHandlerinterrupt
.weak MSC_IRQHandler
.globl MSC_IRQHandler
.set MSC_IRQHandler, _IRQHandlerinterrupt
.weak AES_IRQHandler
.globl AES_IRQHandler
.set AES_IRQHandler, _IRQHandlerinterrupt
/* Vector table for efm32gg/lg
*
* Version: Sourcery G++ 4.4-180
* Support: https://support.codesourcery.com/GNUToolchain/
*
* Copyright (c) 2007, 2008, 2009, 2010 CodeSourcery, Inc.
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*
* Energy Micro release version
* @version 2.3.2
*/
.section ".cs3.interrupt_vector", "ax"
.globl __cs3_interrupt_vector_efm32g
.type __cs3_interrupt_vector_efm32g, %object
__cs3_interrupt_vector_efm32g:
.long __cs3_stack
.long __cs3_reset
.long NMI_Handler
.long HardFault_Handler
.long MemManage_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long Reserved7_Handler
.long Reserved8_Handler
.long Reserved9_Handler
.long Reserved10_Handler
.long SVC_Handler
.long DebugMon_Handler
.long Reserved13_Handler
.long PendSV_Handler
.long SysTick_Handler
.long DMA_IRQHandler
.long GPIO_EVEN_IRQHandler
.long TIMER0_IRQHandler
.long USART0_RX_IRQHandler
.long USART0_TX_IRQHandler
.long USB_IRQHandler
.long ACMP0_IRQHandler
.long ADC0_IRQHandler
.long DAC0_IRQHandler
.long I2C0_IRQHandler
.long I2C1_IRQHandler
.long GPIO_ODD_IRQHandler
.long TIMER1_IRQHandler
.long TIMER2_IRQHandler
.long TIMER3_IRQHandler
.long USART1_RX_IRQHandler
.long USART1_TX_IRQHandler
.long LESENSE_IRQHandler
.long USART2_RX_IRQHandler
.long USART2_TX_IRQHandler
.long UART0_RX_IRQHandler
.long UART0_TX_IRQHandler
.long UART1_RX_IRQHandler
.long UART1_TX_IRQHandler
.long LEUART0_IRQHandler
.long LEUART1_IRQHandler
.long LETIMER0_IRQHandler
.long PCNT0_IRQHandler
.long PCNT1_IRQHandler
.long PCNT2_IRQHandler
.long RTC_IRQHandler
.long BURTC_IRQHandler
.long CMU_IRQHandler
.long VCMP_IRQHandler
.long LCD_IRQHandler
.long MSC_IRQHandler
.long AES_IRQHandler
.long EBI_IRQHandler
.long EMU_IRQHandler
.size __cs3_interrupt_vector_efm32g, . - __cs3_interrupt_vector_efm32g
.thumb
.thumb_func
.section .cs3.reset,"ax",%progbits
.globl __cs3_reset_efm32
.type __cs3_reset_efm32, %function
__cs3_reset_efm32:
/* jump to common start code */
ldr r0,=__cs3_start_asm
bx r0
.pool
.size __cs3_reset_efm32,.-__cs3_reset_efm32
.thumb
.globl _IRQHandlerinterrupt
.type _IRQHandlerinterrupt, %function
_IRQHandlerinterrupt:
b .
.size _IRQHandlerinterrupt, . - _IRQHandlerinterrupt
.weak NMI_Handler
.globl NMI_Handler
.set NMI_Handler, _IRQHandlerinterrupt
.weak HardFault_Handler
.globl HardFault_Handler
.set HardFault_Handler, _IRQHandlerinterrupt
.weak MemManage_Handler
.globl MemManage_Handler
.set MemManage_Handler, _IRQHandlerinterrupt
.weak BusFault_Handler
.globl BusFault_Handler
.set BusFault_Handler, _IRQHandlerinterrupt
.weak UsageFault_Handler
.globl UsageFault_Handler
.set UsageFault_Handler, _IRQHandlerinterrupt
.weak Reserved7_Handler
.globl Reserved7_Handler
.set Reserved7_Handler, _IRQHandlerinterrupt
.weak Reserved8_Handler
.globl Reserved8_Handler
.set Reserved8_Handler, _IRQHandlerinterrupt
.weak Reserved9_Handler
.globl Reserved9_Handler
.set Reserved9_Handler, _IRQHandlerinterrupt
.weak Reserved10_Handler
.globl Reserved10_Handler
.set Reserved10_Handler, _IRQHandlerinterrupt
.weak SVC_Handler
.globl SVC_Handler
.set SVC_Handler, _IRQHandlerinterrupt
.weak DebugMon_Handler
.globl DebugMon_Handler
.set DebugMon_Handler, _IRQHandlerinterrupt
.weak Reserved13_Handler
.globl Reserved13_Handler
.set Reserved13_Handler, _IRQHandlerinterrupt
.weak PendSV_Handler
.globl PendSV_Handler
.set PendSV_Handler, _IRQHandlerinterrupt
.weak SysTick_Handler
.globl SysTick_Handler
.set SysTick_Handler, _IRQHandlerinterrupt
.weak DMA_IRQHandler
.globl DMA_IRQHandler
.set DMA_IRQHandler, _IRQHandlerinterrupt
.weak GPIO_EVEN_IRQHandler
.globl GPIO_EVEN_IRQHandler
.set GPIO_EVEN_IRQHandler, _IRQHandlerinterrupt
.weak TIMER0_IRQHandler
.globl TIMER0_IRQHandler
.set TIMER0_IRQHandler, _IRQHandlerinterrupt
.weak USART0_RX_IRQHandler
.globl USART0_RX_IRQHandler
.set USART0_RX_IRQHandler, _IRQHandlerinterrupt
.weak USART0_TX_IRQHandler
.globl USART0_TX_IRQHandler
.set USART0_TX_IRQHandler, _IRQHandlerinterrupt
.weak USB_IRQHandler
.globl USB_IRQHandler
.set USB_IRQHandler, _IRQHandlerinterrupt
.weak ACMP0_IRQHandler
.globl ACMP0_IRQHandler
.set ACMP0_IRQHandler, _IRQHandlerinterrupt
.weak ADC0_IRQHandler
.globl ADC0_IRQHandler
.set ADC0_IRQHandler, _IRQHandlerinterrupt
.weak DAC0_IRQHandler
.globl DAC0_IRQHandler
.set DAC0_IRQHandler, _IRQHandlerinterrupt
.weak I2C0_IRQHandler
.globl I2C0_IRQHandler
.set I2C0_IRQHandler, _IRQHandlerinterrupt
.weak I2C1_IRQHandler
.globl I2C1_IRQHandler
.set I2C1_IRQHandler, _IRQHandlerinterrupt
.weak GPIO_ODD_IRQHandler
.globl GPIO_ODD_IRQHandler
.set GPIO_ODD_IRQHandler, _IRQHandlerinterrupt
.weak TIMER1_IRQHandler
.globl TIMER1_IRQHandler
.set TIMER1_IRQHandler, _IRQHandlerinterrupt
.weak TIMER2_IRQHandler
.globl TIMER2_IRQHandler
.set TIMER2_IRQHandler, _IRQHandlerinterrupt
.weak TIMER3_IRQHandler
.globl TIMER3_IRQHandler
.set TIMER3_IRQHandler, _IRQHandlerinterrupt
.weak USART1_RX_IRQHandler
.globl USART1_RX_IRQHandler
.set USART1_RX_IRQHandler, _IRQHandlerinterrupt
.weak USART1_TX_IRQHandler
.globl USART1_TX_IRQHandler
.set USART1_TX_IRQHandler, _IRQHandlerinterrupt
.weak LESENSE_IRQHandler
.globl LESENSE_IRQHandler
.set LESENSE_IRQHandler, _IRQHandlerinterrupt
.weak USART2_RX_IRQHandler
.globl USART2_RX_IRQHandler
.set USART2_RX_IRQHandler, _IRQHandlerinterrupt
.weak USART2_TX_IRQHandler
.globl USART2_TX_IRQHandler
.set USART2_TX_IRQHandler, _IRQHandlerinterrupt
.weak UART0_RX_IRQHandler
.globl UART0_RX_IRQHandler
.set UART0_RX_IRQHandler, _IRQHandlerinterrupt
.weak UART0_TX_IRQHandler
.globl UART0_TX_IRQHandler
.set UART0_TX_IRQHandler, _IRQHandlerinterrupt
.weak UART1_RX_IRQHandler
.globl UART1_RX_IRQHandler
.set UART1_RX_IRQHandler, _IRQHandlerinterrupt
.weak UART1_TX_IRQHandler
.globl UART1_TX_IRQHandler
.set UART1_TX_IRQHandler, _IRQHandlerinterrupt
.weak LEUART0_IRQHandler
.globl LEUART0_IRQHandler
.set LEUART0_IRQHandler, _IRQHandlerinterrupt
.weak LEUART1_IRQHandler
.globl LEUART1_IRQHandler
.set LEUART1_IRQHandler, _IRQHandlerinterrupt
.weak LETIMER0_IRQHandler
.globl LETIMER0_IRQHandler
.set LETIMER0_IRQHandler, _IRQHandlerinterrupt
.weak PCNT0_IRQHandler
.globl PCNT0_IRQHandler
.set PCNT0_IRQHandler, _IRQHandlerinterrupt
.weak PCNT1_IRQHandler
.globl PCNT1_IRQHandler
.set PCNT1_IRQHandler, _IRQHandlerinterrupt
.weak PCNT2_IRQHandler
.globl PCNT2_IRQHandler
.set PCNT2_IRQHandler, _IRQHandlerinterrupt
.weak RTC_IRQHandler
.globl RTC_IRQHandler
.set RTC_IRQHandler, _IRQHandlerinterrupt
.weak BURTC_IRQHandler
.globl BURTC_IRQHandler
.set BURTC_IRQHandler, _IRQHandlerinterrupt
.weak CMU_IRQHandler
.globl CMU_IRQHandler
.set CMU_IRQHandler, _IRQHandlerinterrupt
.weak VCMP_IRQHandler
.globl VCMP_IRQHandler
.set VCMP_IRQHandler, _IRQHandlerinterrupt
.weak LCD_IRQHandler
.globl LCD_IRQHandler
.set LCD_IRQHandler, _IRQHandlerinterrupt
.weak MSC_IRQHandler
.globl MSC_IRQHandler
.set MSC_IRQHandler, _IRQHandlerinterrupt
.weak AES_IRQHandler
.globl AES_IRQHandler
.set AES_IRQHandler, _IRQHandlerinterrupt
.weak EBI_IRQHandler
.globl EBI_IRQHandler
.set EBI_IRQHandler, _IRQHandlerinterrupt
.weak EMU_IRQHandler
.globl EMU_IRQHandler
.set EMU_IRQHandler, _IRQHandlerinterrupt
/* Vector table for efm32gg/lg
*
* Version: Sourcery G++ 4.4-180
* Support: https://support.codesourcery.com/GNUToolchain/
*
* Copyright (c) 2007, 2008, 2009, 2010 CodeSourcery, Inc.
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*
* Energy Micro release version
* @version 2.3.2
*/
.section ".cs3.interrupt_vector", "ax"
.globl __cs3_interrupt_vector_efm32g
.type __cs3_interrupt_vector_efm32g, %object
__cs3_interrupt_vector_efm32g:
.long __cs3_stack
.long __cs3_reset
.long NMI_Handler
.long HardFault_Handler
.long MemManage_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long Reserved7_Handler
.long Reserved8_Handler
.long Reserved9_Handler
.long Reserved10_Handler
.long SVC_Handler
.long DebugMon_Handler
.long Reserved13_Handler
.long PendSV_Handler
.long SysTick_Handler
.long DMA_IRQHandler
.long GPIO_EVEN_IRQHandler
.long TIMER0_IRQHandler
.long USART0_RX_IRQHandler
.long USART0_TX_IRQHandler
.long USB_IRQHandler
.long ACMP0_IRQHandler
.long ADC0_IRQHandler
.long DAC0_IRQHandler
.long I2C0_IRQHandler
.long I2C1_IRQHandler
.long GPIO_ODD_IRQHandler
.long TIMER1_IRQHandler
.long TIMER2_IRQHandler
.long TIMER3_IRQHandler
.long USART1_RX_IRQHandler
.long USART1_TX_IRQHandler
.long LESENSE_IRQHandler
.long USART2_RX_IRQHandler
.long USART2_TX_IRQHandler
.long UART0_RX_IRQHandler
.long UART0_TX_IRQHandler
.long UART1_RX_IRQHandler
.long UART1_TX_IRQHandler
.long LEUART0_IRQHandler
.long LEUART1_IRQHandler
.long LETIMER0_IRQHandler
.long PCNT0_IRQHandler
.long PCNT1_IRQHandler
.long PCNT2_IRQHandler
.long RTC_IRQHandler
.long BURTC_IRQHandler
.long CMU_IRQHandler
.long VCMP_IRQHandler
.long LCD_IRQHandler
.long MSC_IRQHandler
.long AES_IRQHandler
.long EBI_IRQHandler
.long EMU_IRQHandler
.size __cs3_interrupt_vector_efm32g, . - __cs3_interrupt_vector_efm32g
.thumb
.thumb_func
.section .cs3.reset,"ax",%progbits
.globl __cs3_reset_efm32
.type __cs3_reset_efm32, %function
__cs3_reset_efm32:
/* jump to common start code */
ldr r0,=__cs3_start_asm
bx r0
.pool
.size __cs3_reset_efm32,.-__cs3_reset_efm32
.thumb
.globl _IRQHandlerinterrupt
.type _IRQHandlerinterrupt, %function
_IRQHandlerinterrupt:
b .
.size _IRQHandlerinterrupt, . - _IRQHandlerinterrupt
.weak NMI_Handler
.globl NMI_Handler
.set NMI_Handler, _IRQHandlerinterrupt
.weak HardFault_Handler
.globl HardFault_Handler
.set HardFault_Handler, _IRQHandlerinterrupt
.weak MemManage_Handler
.globl MemManage_Handler
.set MemManage_Handler, _IRQHandlerinterrupt
.weak BusFault_Handler
.globl BusFault_Handler
.set BusFault_Handler, _IRQHandlerinterrupt
.weak UsageFault_Handler
.globl UsageFault_Handler
.set UsageFault_Handler, _IRQHandlerinterrupt
.weak Reserved7_Handler
.globl Reserved7_Handler
.set Reserved7_Handler, _IRQHandlerinterrupt
.weak Reserved8_Handler
.globl Reserved8_Handler
.set Reserved8_Handler, _IRQHandlerinterrupt
.weak Reserved9_Handler
.globl Reserved9_Handler
.set Reserved9_Handler, _IRQHandlerinterrupt
.weak Reserved10_Handler
.globl Reserved10_Handler
.set Reserved10_Handler, _IRQHandlerinterrupt
.weak SVC_Handler
.globl SVC_Handler
.set SVC_Handler, _IRQHandlerinterrupt
.weak DebugMon_Handler
.globl DebugMon_Handler
.set DebugMon_Handler, _IRQHandlerinterrupt
.weak Reserved13_Handler
.globl Reserved13_Handler
.set Reserved13_Handler, _IRQHandlerinterrupt
.weak PendSV_Handler
.globl PendSV_Handler
.set PendSV_Handler, _IRQHandlerinterrupt
.weak SysTick_Handler
.globl SysTick_Handler
.set SysTick_Handler, _IRQHandlerinterrupt
.weak DMA_IRQHandler
.globl DMA_IRQHandler
.set DMA_IRQHandler, _IRQHandlerinterrupt
.weak GPIO_EVEN_IRQHandler
.globl GPIO_EVEN_IRQHandler
.set GPIO_EVEN_IRQHandler, _IRQHandlerinterrupt
.weak TIMER0_IRQHandler
.globl TIMER0_IRQHandler
.set TIMER0_IRQHandler, _IRQHandlerinterrupt
.weak USART0_RX_IRQHandler
.globl USART0_RX_IRQHandler
.set USART0_RX_IRQHandler, _IRQHandlerinterrupt
.weak USART0_TX_IRQHandler
.globl USART0_TX_IRQHandler
.set USART0_TX_IRQHandler, _IRQHandlerinterrupt
.weak USB_IRQHandler
.globl USB_IRQHandler
.set USB_IRQHandler, _IRQHandlerinterrupt
.weak ACMP0_IRQHandler
.globl ACMP0_IRQHandler
.set ACMP0_IRQHandler, _IRQHandlerinterrupt
.weak ADC0_IRQHandler
.globl ADC0_IRQHandler
.set ADC0_IRQHandler, _IRQHandlerinterrupt
.weak DAC0_IRQHandler
.globl DAC0_IRQHandler
.set DAC0_IRQHandler, _IRQHandlerinterrupt
.weak I2C0_IRQHandler
.globl I2C0_IRQHandler
.set I2C0_IRQHandler, _IRQHandlerinterrupt
.weak I2C1_IRQHandler
.globl I2C1_IRQHandler
.set I2C1_IRQHandler, _IRQHandlerinterrupt
.weak GPIO_ODD_IRQHandler
.globl GPIO_ODD_IRQHandler
.set GPIO_ODD_IRQHandler, _IRQHandlerinterrupt
.weak TIMER1_IRQHandler
.globl TIMER1_IRQHandler
.set TIMER1_IRQHandler, _IRQHandlerinterrupt
.weak TIMER2_IRQHandler
.globl TIMER2_IRQHandler
.set TIMER2_IRQHandler, _IRQHandlerinterrupt
.weak TIMER3_IRQHandler
.globl TIMER3_IRQHandler
.set TIMER3_IRQHandler, _IRQHandlerinterrupt
.weak USART1_RX_IRQHandler
.globl USART1_RX_IRQHandler
.set USART1_RX_IRQHandler, _IRQHandlerinterrupt
.weak USART1_TX_IRQHandler
.globl USART1_TX_IRQHandler
.set USART1_TX_IRQHandler, _IRQHandlerinterrupt
.weak LESENSE_IRQHandler
.globl LESENSE_IRQHandler
.set LESENSE_IRQHandler, _IRQHandlerinterrupt
.weak USART2_RX_IRQHandler
.globl USART2_RX_IRQHandler
.set USART2_RX_IRQHandler, _IRQHandlerinterrupt
.weak USART2_TX_IRQHandler
.globl USART2_TX_IRQHandler
.set USART2_TX_IRQHandler, _IRQHandlerinterrupt
.weak UART0_RX_IRQHandler
.globl UART0_RX_IRQHandler
.set UART0_RX_IRQHandler, _IRQHandlerinterrupt
.weak UART0_TX_IRQHandler
.globl UART0_TX_IRQHandler
.set UART0_TX_IRQHandler, _IRQHandlerinterrupt
.weak UART1_RX_IRQHandler
.globl UART1_RX_IRQHandler
.set UART1_RX_IRQHandler, _IRQHandlerinterrupt
.weak UART1_TX_IRQHandler
.globl UART1_TX_IRQHandler
.set UART1_TX_IRQHandler, _IRQHandlerinterrupt
.weak LEUART0_IRQHandler
.globl LEUART0_IRQHandler
.set LEUART0_IRQHandler, _IRQHandlerinterrupt
.weak LEUART1_IRQHandler
.globl LEUART1_IRQHandler
.set LEUART1_IRQHandler, _IRQHandlerinterrupt
.weak LETIMER0_IRQHandler
.globl LETIMER0_IRQHandler
.set LETIMER0_IRQHandler, _IRQHandlerinterrupt
.weak PCNT0_IRQHandler
.globl PCNT0_IRQHandler
.set PCNT0_IRQHandler, _IRQHandlerinterrupt
.weak PCNT1_IRQHandler
.globl PCNT1_IRQHandler
.set PCNT1_IRQHandler, _IRQHandlerinterrupt
.weak PCNT2_IRQHandler
.globl PCNT2_IRQHandler
.set PCNT2_IRQHandler, _IRQHandlerinterrupt
.weak RTC_IRQHandler
.globl RTC_IRQHandler
.set RTC_IRQHandler, _IRQHandlerinterrupt
.weak BURTC_IRQHandler
.globl BURTC_IRQHandler
.set BURTC_IRQHandler, _IRQHandlerinterrupt
.weak CMU_IRQHandler
.globl CMU_IRQHandler
.set CMU_IRQHandler, _IRQHandlerinterrupt
.weak VCMP_IRQHandler
.globl VCMP_IRQHandler
.set VCMP_IRQHandler, _IRQHandlerinterrupt
.weak LCD_IRQHandler
.globl LCD_IRQHandler
.set LCD_IRQHandler, _IRQHandlerinterrupt
.weak MSC_IRQHandler
.globl MSC_IRQHandler
.set MSC_IRQHandler, _IRQHandlerinterrupt
.weak AES_IRQHandler
.globl AES_IRQHandler
.set AES_IRQHandler, _IRQHandlerinterrupt
.weak EBI_IRQHandler
.globl EBI_IRQHandler
.set EBI_IRQHandler, _IRQHandlerinterrupt
.weak EMU_IRQHandler
.globl EMU_IRQHandler
.set EMU_IRQHandler, _IRQHandlerinterrupt
/* Vector table for efm32tg
*
* Version: Sourcery G++ 4.4-180
* Support: https://support.codesourcery.com/GNUToolchain/
*
* Copyright (c) 2007, 2008, 2009, 2010 CodeSourcery, Inc.
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*
* Energy Micro release version
* @version 2.3.2
*/
.section ".cs3.interrupt_vector", "ax"
.globl __cs3_interrupt_vector_efm32g
.type __cs3_interrupt_vector_efm32g, %object
__cs3_interrupt_vector_efm32g:
.long __cs3_stack
.long __cs3_reset
.long NMI_Handler
.long HardFault_Handler
.long MemManage_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long Reserved7_Handler
.long Reserved8_Handler
.long Reserved9_Handler
.long Reserved10_Handler
.long SVC_Handler
.long DebugMon_Handler
.long Reserved13_Handler
.long PendSV_Handler
.long SysTick_Handler
.long DMA_IRQHandler
.long GPIO_EVEN_IRQHandler
.long TIMER0_IRQHandler
.long USART0_RX_IRQHandler
.long USART0_TX_IRQHandler
.long ACMP0_IRQHandler
.long ADC0_IRQHandler
.long DAC0_IRQHandler
.long I2C0_IRQHandler
.long GPIO_ODD_IRQHandler
.long TIMER1_IRQHandler
.long USART1_RX_IRQHandler
.long USART1_TX_IRQHandler
.long LESENSE_IRQHandler
.long LEUART0_IRQHandler
.long LETIMER0_IRQHandler
.long PCNT0_IRQHandler
.long RTC_IRQHandler
.long CMU_IRQHandler
.long VCMP_IRQHandler
.long LCD_IRQHandler
.long MSC_IRQHandler
.long AES_IRQHandler
.size __cs3_interrupt_vector_efm32g, . - __cs3_interrupt_vector_efm32g
.thumb
.thumb_func
.section .cs3.reset,"ax",%progbits
.globl __cs3_reset_efm32
.type __cs3_reset_efm32, %function
__cs3_reset_efm32:
/* jump to common start code */
ldr r0,=__cs3_start_asm
bx r0
.pool
.size __cs3_reset_efm32,.-__cs3_reset_efm32
.thumb
.globl _IRQHandlerinterrupt
.type _IRQHandlerinterrupt, %function
_IRQHandlerinterrupt:
b .
.size _IRQHandlerinterrupt, . - _IRQHandlerinterrupt
.weak NMI_Handler
.globl NMI_Handler
.set NMI_Handler, _IRQHandlerinterrupt
.weak HardFault_Handler
.globl HardFault_Handler
.set HardFault_Handler, _IRQHandlerinterrupt
.weak MemManage_Handler
.globl MemManage_Handler
.set MemManage_Handler, _IRQHandlerinterrupt
.weak BusFault_Handler
.globl BusFault_Handler
.set BusFault_Handler, _IRQHandlerinterrupt
.weak UsageFault_Handler
.globl UsageFault_Handler
.set UsageFault_Handler, _IRQHandlerinterrupt
.weak Reserved7_Handler
.globl Reserved7_Handler
.set Reserved7_Handler, _IRQHandlerinterrupt
.weak Reserved8_Handler
.globl Reserved8_Handler
.set Reserved8_Handler, _IRQHandlerinterrupt
.weak Reserved9_Handler
.globl Reserved9_Handler
.set Reserved9_Handler, _IRQHandlerinterrupt
.weak Reserved10_Handler
.globl Reserved10_Handler
.set Reserved10_Handler, _IRQHandlerinterrupt
.weak SVC_Handler
.globl SVC_Handler
.set SVC_Handler, _IRQHandlerinterrupt
.weak DebugMon_Handler
.globl DebugMon_Handler
.set DebugMon_Handler, _IRQHandlerinterrupt
.weak Reserved13_Handler
.globl Reserved13_Handler
.set Reserved13_Handler, _IRQHandlerinterrupt
.weak PendSV_Handler
.globl PendSV_Handler
.set PendSV_Handler, _IRQHandlerinterrupt
.weak SysTick_Handler
.globl SysTick_Handler
.set SysTick_Handler, _IRQHandlerinterrupt
.weak DMA_IRQHandler
.globl DMA_IRQHandler
.set DMA_IRQHandler, _IRQHandlerinterrupt
.weak GPIO_EVEN_IRQHandler
.globl GPIO_EVEN_IRQHandler
.set GPIO_EVEN_IRQHandler, _IRQHandlerinterrupt
.weak TIMER0_IRQHandler
.globl TIMER0_IRQHandler
.set TIMER0_IRQHandler, _IRQHandlerinterrupt
.weak USART0_RX_IRQHandler
.globl USART0_RX_IRQHandler
.set USART0_RX_IRQHandler, _IRQHandlerinterrupt
.weak USART0_TX_IRQHandler
.globl USART0_TX_IRQHandler
.set USART0_TX_IRQHandler, _IRQHandlerinterrupt
.weak ACMP0_IRQHandler
.globl ACMP0_IRQHandler
.set ACMP0_IRQHandler, _IRQHandlerinterrupt
.weak ADC0_IRQHandler
.globl ADC0_IRQHandler
.set ADC0_IRQHandler, _IRQHandlerinterrupt
.weak DAC0_IRQHandler
.globl DAC0_IRQHandler
.set DAC0_IRQHandler, _IRQHandlerinterrupt
.weak I2C0_IRQHandler
.globl I2C0_IRQHandler
.set I2C0_IRQHandler, _IRQHandlerinterrupt
.weak GPIO_ODD_IRQHandler
.globl GPIO_ODD_IRQHandler
.set GPIO_ODD_IRQHandler, _IRQHandlerinterrupt
.weak TIMER1_IRQHandler
.globl TIMER1_IRQHandler
.set TIMER1_IRQHandler, _IRQHandlerinterrupt
.weak USART1_RX_IRQHandler
.globl USART1_RX_IRQHandler
.set USART1_RX_IRQHandler, _IRQHandlerinterrupt
.weak USART1_TX_IRQHandler
.globl USART1_TX_IRQHandler
.set USART1_TX_IRQHandler, _IRQHandlerinterrupt
.weak LESENSE_IRQHandler
.globl LESENSE_IRQHandler
.set LESENSE_IRQHandler, _IRQHandlerinterrupt
.weak LEUART0_IRQHandler
.globl LEUART0_IRQHandler
.set LEUART0_IRQHandler, _IRQHandlerinterrupt
.weak LETIMER0_IRQHandler
.globl LETIMER0_IRQHandler
.set LETIMER0_IRQHandler, _IRQHandlerinterrupt
.weak PCNT0_IRQHandler
.globl PCNT0_IRQHandler
.set PCNT0_IRQHandler, _IRQHandlerinterrupt
.weak RTC_IRQHandler
.globl RTC_IRQHandler
.set RTC_IRQHandler, _IRQHandlerinterrupt
.weak CMU_IRQHandler
.globl CMU_IRQHandler
.set CMU_IRQHandler, _IRQHandlerinterrupt
.weak VCMP_IRQHandler
.globl VCMP_IRQHandler
.set VCMP_IRQHandler, _IRQHandlerinterrupt
.weak LCD_IRQHandler
.globl LCD_IRQHandler
.set LCD_IRQHandler, _IRQHandlerinterrupt
.weak MSC_IRQHandler
.globl MSC_IRQHandler
.set MSC_IRQHandler, _IRQHandlerinterrupt
.weak AES_IRQHandler
.globl AES_IRQHandler
.set AES_IRQHandler, _IRQHandlerinterrupt
/**************************************************************************//**
* @file
* @brief CMSIS Compatible EFM32 startup file in Cfor IAR EWARM
* @author Energy Micro AS
* @version 2.3.2
******************************************************************************
* @section License
* <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
*
* This copyright notice may not be removed from the source code nor changed.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
* Software "AS IS", with no express or implied warranties of any kind,
* including, but not limited to, any implied warranties of merchantability
* or fitness for any particular purpose or warranties against infringement
* of any proprietary rights of a third party.
*
* Energy Micro AS will not be liable for any consequential, incidental, or
* special damages, or any other relief, or for any claim by any third party,
* arising from your use of this Software.
*
*****************************************************************************/
#pragma language=extended
#pragma segment="CSTACK"
/* IAR start function */
extern void __iar_program_start(void);
/* CMSIS init function */
extern void SystemInit(void);
/* Auto defined by linker */
extern unsigned char CSTACK$$Limit;
__weak void Reset_Handler(void)
{
SystemInit();
__iar_program_start();
}
__weak void NMI_Handler(void)
{
while(1);
}
__weak void HardFault_Handler(void)
{
while(1);
}
__weak void MemManage_Handler(void)
{
while(1);
}
__weak void BusFault_Handler(void)
{
while(1);
}
__weak void UsageFault_Handler(void)
{
while(1);
}
__weak void SVC_Handler(void)
{
while(1);
}
__weak void DebugMon_Handler(void)
{
while(1);
}
__weak void PendSV_Handler(void)
{
while(1);
}
__weak void SysTick_Handler(void)
{
while(1);
}
__weak void DMA_IRQHandler(void)
{
while(1);
}
__weak void GPIO_EVEN_IRQHandler(void)
{
while(1);
}
__weak void TIMER0_IRQHandler(void)
{
while(1);
}
__weak void USART0_RX_IRQHandler(void)
{
while(1);
}
__weak void USART0_TX_IRQHandler(void)
{
while(1);
}
__weak void USB_IRQHandler(void)
{
while(1);
}
__weak void ACMP0_IRQHandler(void)
{
while(1);
}
__weak void ADC0_IRQHandler(void)
{
while(1);
}
__weak void DAC0_IRQHandler(void)
{
while(1);
}
__weak void I2C0_IRQHandler(void)
{
while(1);
}
__weak void I2C1_IRQHandler(void)
{
while(1);
}
__weak void GPIO_ODD_IRQHandler(void)
{
while(1);
}
__weak void TIMER1_IRQHandler(void)
{
while(1);
}
__weak void TIMER2_IRQHandler(void)
{
while(1);
}
__weak void TIMER3_IRQHandler(void)
{
while(1);
}
__weak void USART1_RX_IRQHandler(void)
{
while(1);
}
__weak void USART1_TX_IRQHandler(void)
{
while(1);
}
__weak void LESENSE_IRQHandler(void)
{
while(1);
}
__weak void USART2_RX_IRQHandler(void)
{
while(1);
}
__weak void USART2_TX_IRQHandler(void)
{
while(1);
}
__weak void UART0_RX_IRQHandler(void)
{
while(1);
}
__weak void UART0_TX_IRQHandler(void)
{
while(1);
}
__weak void UART1_RX_IRQHandler(void)
{
while(1);
}
__weak void UART1_TX_IRQHandler(void)
{
while(1);
}
__weak void LEUART0_IRQHandler(void)
{
while(1);
}
__weak void LEUART1_IRQHandler(void)
{
while(1);
}
__weak void LETIMER0_IRQHandler(void)
{
while(1);
}
__weak void PCNT0_IRQHandler(void)
{
while(1);
}
__weak void PCNT1_IRQHandler(void)
{
while(1);
}
__weak void PCNT2_IRQHandler(void)
{
while(1);
}
__weak void RTC_IRQHandler(void)
{
while(1);
}
__weak void BURTC_IRQHandler(void)
{
while(1);
}
__weak void CMU_IRQHandler(void)
{
while(1);
}
__weak void VCMP_IRQHandler(void)
{
while(1);
}
__weak void LCD_IRQHandler(void)
{
while(1);
}
__weak void MSC_IRQHandler(void)
{
while(1);
}
__weak void AES_IRQHandler(void)
{
while(1);
}
__weak void EBI_IRQHandler(void)
{
while(1);
}
__weak void EMU_IRQHandler(void)
{
while(1);
}
/* With IAR, the CSTACK is defined via project options settings */
#pragma data_alignment=256
#pragma location = ".intvec"
const void * const __vector_table[]= {
&CSTACK$$Limit,
(void *) Reset_Handler, /* 1 - Reset (start instruction) */
(void *) NMI_Handler, /* 2 - NMI */
(void *) HardFault_Handler, /* 3 - HardFault */
(void *) MemManage_Handler,
(void *) BusFault_Handler,
(void *) UsageFault_Handler,
(void *) 0,
(void *) 0,
(void *) 0,
(void *) 0,
(void *) SVC_Handler,
(void *) DebugMon_Handler,
(void *) 0,
(void *) PendSV_Handler,
(void *) SysTick_Handler,
(void *) DMA_IRQHandler, /* 0 - DMA */
(void *) GPIO_EVEN_IRQHandler, /* 1 - GPIO_EVEN */
(void *) TIMER0_IRQHandler, /* 2 - TIMER0 */
(void *) USART0_RX_IRQHandler, /* 3 - USART0_RX */
(void *) USART0_TX_IRQHandler, /* 4 - USART0_TX */
(void *) USB_IRQHandler, /* 5 - USB */
(void *) ACMP0_IRQHandler, /* 6 - ACMP0 */
(void *) ADC0_IRQHandler, /* 7 - ADC0 */
(void *) DAC0_IRQHandler, /* 8 - DAC0 */
(void *) I2C0_IRQHandler, /* 9 - I2C0 */
(void *) I2C1_IRQHandler, /* 10 - I2C1 */
(void *) GPIO_ODD_IRQHandler, /* 11 - GPIO_ODD */
(void *) TIMER1_IRQHandler, /* 12 - TIMER1 */
(void *) TIMER2_IRQHandler, /* 13 - TIMER2 */
(void *) TIMER3_IRQHandler, /* 14 - TIMER3 */
(void *) USART1_RX_IRQHandler, /* 15 - USART1_RX */
(void *) USART1_TX_IRQHandler, /* 16 - USART1_TX */
(void *) LESENSE_IRQHandler, /* 17 - LESENSE */
(void *) USART2_RX_IRQHandler, /* 18 - USART2_RX */
(void *) USART2_TX_IRQHandler, /* 19 - USART2_TX */
(void *) UART0_RX_IRQHandler, /* 20 - UART0_RX */
(void *) UART0_TX_IRQHandler, /* 21 - UART0_TX */
(void *) UART1_RX_IRQHandler, /* 22 - UART1_RX */
(void *) UART1_TX_IRQHandler, /* 23 - UART1_TX */
(void *) LEUART0_IRQHandler, /* 24 - LEUART0 */
(void *) LEUART1_IRQHandler, /* 25 - LEUART1 */
(void *) LETIMER0_IRQHandler, /* 26 - LETIMER0 */
(void *) PCNT0_IRQHandler, /* 27 - PCNT0 */
(void *) PCNT1_IRQHandler, /* 28 - PCNT1 */
(void *) PCNT2_IRQHandler, /* 29 - PCNT2 */
(void *) RTC_IRQHandler, /* 30 - RTC */
(void *) BURTC_IRQHandler, /* 31 - BURTC */
(void *) CMU_IRQHandler, /* 32 - CMU */
(void *) VCMP_IRQHandler, /* 33 - VCMP */
(void *) LCD_IRQHandler, /* 34 - LCD */
(void *) MSC_IRQHandler, /* 35 - MSC */
(void *) AES_IRQHandler, /* 36 - AES */
(void *) EBI_IRQHandler, /* 37 - EBI */
(void *) EMU_IRQHandler, /* 38 - EMU */
};
;/*************************************************************************//**
; * @file:
; * @purpose: CMSIS Cortex-M3 Core Device Startup File
; * for the Energy Micro 'EFM32LG/GG' Device Series
; * @version 2.3.2
; * @date: January 2011
; *----------------------------------------------------------------------------
; *
; * Copyright (C) 2009 ARM Limited. All rights reserved.
; *
; * ARM Limited (ARM) is supplying this software for use with Cortex-Mx
; * processor based microcontrollers. This file can be freely distributed
; * within development tools that are supporting such ARM based processors.
; *
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; *
; ******************************************************************************/
;
; The modules in this file are included in the libraries, and may be replaced
; by any user-defined modules that define the PUBLIC symbol _program_start or
; a user defined start symbol.
; To override the cstartup defined in the library, simply add your modified
; version to the workbench project.
;
; The vector table is normally located at address 0.
; When debugging in RAM, it can be located in RAM wtih at least a 128 byte
; alignment, 256 byte alignment is requied if all interrupt vectors are in use.
;
; The name "__vector_table" has special meaning for C-SPY:
; it is where the SP start value is found, and the NVIC vector
; table register (VTOR) is initialized to this address if != 0.
;
; Cortex-M version
;
MODULE ?cstartup
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(8)
EXTERN __iar_program_start
EXTERN SystemInit
PUBLIC __vector_table
PUBLIC __vector_table_0x1c
PUBLIC __Vectors
PUBLIC __Vectors_End
PUBLIC __Vectors_Size
DATA
__vector_table
DCD sfe(CSTACK)
DCD Reset_Handler
DCD NMI_Handler
DCD HardFault_Handler
DCD MemManage_Handler
DCD BusFault_Handler
DCD UsageFault_Handler
__vector_table_0x1c
DCD 0
DCD 0
DCD 0
DCD 0
DCD SVC_Handler
DCD DebugMon_Handler
DCD 0
DCD PendSV_Handler
DCD SysTick_Handler
; External Interrupts
DCD DMA_IRQHandler ; 0: DMA Interrupt
DCD GPIO_EVEN_IRQHandler ; 1: GPIO_EVEN Interrupt
DCD TIMER0_IRQHandler ; 2: TIMER0 Interrupt
DCD USART0_RX_IRQHandler ; 3: USART0_RX Interrupt
DCD USART0_TX_IRQHandler ; 4: USART0_TX Interrupt
DCD USB_IRQHandler ; 5: USB Interrupt
DCD ACMP0_IRQHandler ; 6: ACMP0 Interrupt
DCD ADC0_IRQHandler ; 7: ADC0 Interrupt
DCD DAC0_IRQHandler ; 8: DAC0 Interrupt
DCD I2C0_IRQHandler ; 9: I2C0 Interrupt
DCD I2C1_IRQHandler ; 10: I2C1 Interrupt
DCD GPIO_ODD_IRQHandler ; 11: GPIO_ODD Interrupt
DCD TIMER1_IRQHandler ; 12: TIMER1 Interrupt
DCD TIMER2_IRQHandler ; 13: TIMER2 Interrupt
DCD TIMER3_IRQHandler ; 14: TIMER3 Interrupt
DCD USART1_RX_IRQHandler ; 15: USART1_RX Interrupt
DCD USART1_TX_IRQHandler ; 16: USART1_TX Interrupt
DCD LESENSE_IRQHandler ; 17: LESENSE Interrupt
DCD USART2_RX_IRQHandler ; 18: USART2_RX Interrupt
DCD USART2_TX_IRQHandler ; 19: USART2_TX Interrupt
DCD UART0_RX_IRQHandler ; 20: UART0_RX Interrupt
DCD UART0_TX_IRQHandler ; 21: UART0_TX Interrupt
DCD UART1_RX_IRQHandler ; 22: UART1_RX Interrupt
DCD UART1_TX_IRQHandler ; 23: UART1_TX Interrupt
DCD LEUART0_IRQHandler ; 24: LEUART0 Interrupt
DCD LEUART1_IRQHandler ; 25: LEUART1 Interrupt
DCD LETIMER0_IRQHandler ; 26: LETIMER0 Interrupt
DCD PCNT0_IRQHandler ; 27: PCNT0 Interrupt
DCD PCNT1_IRQHandler ; 28: PCNT1 Interrupt
DCD PCNT2_IRQHandler ; 29: PCNT2 Interrupt
DCD RTC_IRQHandler ; 30: RTC Interrupt
DCD BURTC_IRQHandler ; 31: BURTC Interrupt
DCD CMU_IRQHandler ; 32: CMU Interrupt
DCD VCMP_IRQHandler ; 33: VCMP Interrupt
DCD LCD_IRQHandler ; 34: LCD Interrupt
DCD MSC_IRQHandler ; 35: MSC Interrupt
DCD AES_IRQHandler ; 36: AES Interrupt
DCD EBI_IRQHandler ; 37: EBI Interrupt
DCD EMU_IRQHandler ; 38: EMU Interrupt
__Vectors_End
__Vectors EQU __vector_table
__Vectors_Size EQU __Vectors_End - __Vectors
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Default interrupt handlers.
;;
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:REORDER(2)
Reset_Handler
LDR R0, =SystemInit
BLX R0
LDR R0, =__iar_program_start
BX R0
PUBWEAK NMI_Handler
SECTION .text:CODE:REORDER(1)
NMI_Handler
B NMI_Handler
PUBWEAK HardFault_Handler
SECTION .text:CODE:REORDER(1)
HardFault_Handler
B HardFault_Handler
PUBWEAK MemManage_Handler
SECTION .text:CODE:REORDER(1)
MemManage_Handler
B MemManage_Handler
PUBWEAK BusFault_Handler
SECTION .text:CODE:REORDER(1)
BusFault_Handler
B BusFault_Handler
PUBWEAK UsageFault_Handler
SECTION .text:CODE:REORDER(1)
UsageFault_Handler
B UsageFault_Handler
PUBWEAK SVC_Handler
SECTION .text:CODE:REORDER(1)
SVC_Handler
B SVC_Handler
PUBWEAK DebugMon_Handler
SECTION .text:CODE:REORDER(1)
DebugMon_Handler
B DebugMon_Handler
PUBWEAK PendSV_Handler
SECTION .text:CODE:REORDER(1)
PendSV_Handler
B PendSV_Handler
PUBWEAK SysTick_Handler
SECTION .text:CODE:REORDER(1)
SysTick_Handler
B SysTick_Handler
; EFM32G specific interrupt handlers
PUBWEAK DMA_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA_IRQHandler
B DMA_IRQHandler
PUBWEAK GPIO_EVEN_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO_EVEN_IRQHandler
B GPIO_EVEN_IRQHandler
PUBWEAK TIMER0_IRQHandler
SECTION .text:CODE:REORDER(1)
TIMER0_IRQHandler
B TIMER0_IRQHandler
PUBWEAK USART0_RX_IRQHandler
SECTION .text:CODE:REORDER(1)
USART0_RX_IRQHandler
B USART0_RX_IRQHandler
PUBWEAK USART0_TX_IRQHandler
SECTION .text:CODE:REORDER(1)
USART0_TX_IRQHandler
B USART0_TX_IRQHandler
PUBWEAK USB_IRQHandler
SECTION .text:CODE:REORDER(1)
USB_IRQHandler
B USB_IRQHandler
PUBWEAK ACMP0_IRQHandler
SECTION .text:CODE:REORDER(1)
ACMP0_IRQHandler
B ACMP0_IRQHandler
PUBWEAK ADC0_IRQHandler
SECTION .text:CODE:REORDER(1)
ADC0_IRQHandler
B ADC0_IRQHandler
PUBWEAK DAC0_IRQHandler
SECTION .text:CODE:REORDER(1)
DAC0_IRQHandler
B DAC0_IRQHandler
PUBWEAK I2C0_IRQHandler
SECTION .text:CODE:REORDER(1)
I2C0_IRQHandler
B I2C0_IRQHandler
PUBWEAK I2C1_IRQHandler
SECTION .text:CODE:REORDER(1)
I2C1_IRQHandler
B I2C1_IRQHandler
PUBWEAK GPIO_ODD_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO_ODD_IRQHandler
B GPIO_ODD_IRQHandler
PUBWEAK TIMER1_IRQHandler
SECTION .text:CODE:REORDER(1)
TIMER1_IRQHandler
B TIMER1_IRQHandler
PUBWEAK TIMER2_IRQHandler
SECTION .text:CODE:REORDER(1)
TIMER2_IRQHandler
B TIMER2_IRQHandler
PUBWEAK TIMER3_IRQHandler
SECTION .text:CODE:REORDER(1)
TIMER3_IRQHandler
B TIMER3_IRQHandler
PUBWEAK USART1_RX_IRQHandler
SECTION .text:CODE:REORDER(1)
USART1_RX_IRQHandler
B USART1_RX_IRQHandler
PUBWEAK USART1_TX_IRQHandler
SECTION .text:CODE:REORDER(1)
USART1_TX_IRQHandler
B USART1_TX_IRQHandler
PUBWEAK LESENSE_IRQHandler
SECTION .text:CODE:REORDER(1)
LESENSE_IRQHandler
B LESENSE_IRQHandler
PUBWEAK USART2_RX_IRQHandler
SECTION .text:CODE:REORDER(1)
USART2_RX_IRQHandler
B USART2_RX_IRQHandler
PUBWEAK USART2_TX_IRQHandler
SECTION .text:CODE:REORDER(1)
USART2_TX_IRQHandler
B USART2_TX_IRQHandler
PUBWEAK UART0_RX_IRQHandler
SECTION .text:CODE:REORDER(1)
UART0_RX_IRQHandler
B UART0_RX_IRQHandler
PUBWEAK UART0_TX_IRQHandler
SECTION .text:CODE:REORDER(1)
UART0_TX_IRQHandler
B UART0_TX_IRQHandler
PUBWEAK UART1_RX_IRQHandler
SECTION .text:CODE:REORDER(1)
UART1_RX_IRQHandler
B UART1_RX_IRQHandler
PUBWEAK UART1_TX_IRQHandler
SECTION .text:CODE:REORDER(1)
UART1_TX_IRQHandler
B UART1_TX_IRQHandler
PUBWEAK LEUART0_IRQHandler
SECTION .text:CODE:REORDER(1)
LEUART0_IRQHandler
B LEUART0_IRQHandler
PUBWEAK LEUART1_IRQHandler
SECTION .text:CODE:REORDER(1)
LEUART1_IRQHandler
B LEUART1_IRQHandler
PUBWEAK LETIMER0_IRQHandler
SECTION .text:CODE:REORDER(1)
LETIMER0_IRQHandler
B LETIMER0_IRQHandler
PUBWEAK PCNT0_IRQHandler
SECTION .text:CODE:REORDER(1)
PCNT0_IRQHandler
B PCNT0_IRQHandler
PUBWEAK PCNT1_IRQHandler
SECTION .text:CODE:REORDER(1)
PCNT1_IRQHandler
B PCNT1_IRQHandler
PUBWEAK PCNT2_IRQHandler
SECTION .text:CODE:REORDER(1)
PCNT2_IRQHandler
B PCNT2_IRQHandler
PUBWEAK RTC_IRQHandler
SECTION .text:CODE:REORDER(1)
RTC_IRQHandler
B RTC_IRQHandler
PUBWEAK BURTC_IRQHandler
SECTION .text:CODE:REORDER(1)
BURTC_IRQHandler
B BURTC_IRQHandler
PUBWEAK CMU_IRQHandler
SECTION .text:CODE:REORDER(1)
CMU_IRQHandler
B CMU_IRQHandler
PUBWEAK VCMP_IRQHandler
SECTION .text:CODE:REORDER(1)
VCMP_IRQHandler
B VCMP_IRQHandler
PUBWEAK LCD_IRQHandler
SECTION .text:CODE:REORDER(1)
LCD_IRQHandler
B LCD_IRQHandler
PUBWEAK MSC_IRQHandler
SECTION .text:CODE:REORDER(1)
MSC_IRQHandler
B MSC_IRQHandler
PUBWEAK AES_IRQHandler
SECTION .text:CODE:REORDER(1)
AES_IRQHandler
B AES_IRQHandler
PUBWEAK EBI_IRQHandler
SECTION .text:CODE:REORDER(1)
EBI_IRQHandler
B EBI_IRQHandler
PUBWEAK EMU_IRQHandler
SECTION .text:CODE:REORDER(1)
EMU_IRQHandler
B EMU_IRQHandler
END
/**************************************************************************//**
* @file
* @brief CMSIS Compatible EFM32 startup file in C for IAR EWARM
* @author Energy Micro AS
* @version 2.3.2
******************************************************************************
* @section License
* <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
******************************************************************************
*
* This source code is the property of Energy Micro AS. The source and compiled
* code may only be used on Energy Micro "EFM32" microcontrollers.
*
* This copyright notice may not be removed from the source code nor changed.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
* obligation to support this Software. Energy Micro AS is providing the
* Software "AS IS", with no express or implied warranties of any kind,
* including, but not limited to, any implied warranties of merchantability
* or fitness for any particular purpose or warranties against infringement
* of any proprietary rights of a third party.
*
* Energy Micro AS will not be liable for any consequential, incidental, or
* special damages, or any other relief, or for any claim by any third party,
* arising from your use of this Software.
*
*****************************************************************************/
#pragma language=extended
#pragma segment="CSTACK"
/* IAR start function */
extern void __iar_program_start(void);
/* CMSIS init function */
extern void SystemInit(void);
/* Auto defined by linker */
extern unsigned char CSTACK$$Limit;
__weak void Reset_Handler(void)
{
SystemInit();
__iar_program_start();
}
__weak void NMI_Handler(void)
{
while(1);
}
__weak void HardFault_Handler(void)
{
while(1);
}
__weak void MemManage_Handler(void)
{
while(1);
}
__weak void BusFault_Handler(void)
{
while(1);
}
__weak void UsageFault_Handler(void)
{
while(1);
}
__weak void SVC_Handler(void)
{
while(1);
}
__weak void DebugMon_Handler(void)
{
while(1);
}
__weak void PendSV_Handler(void)
{
while(1);
}
__weak void SysTick_Handler(void)
{
while(1);
}
__weak void DMA_IRQHandler(void)
{
while(1);
}
__weak void GPIO_EVEN_IRQHandler(void)
{
while(1);
}
__weak void TIMER0_IRQHandler(void)
{
while(1);
}
__weak void USART0_RX_IRQHandler(void)
{
while(1);
}
__weak void USART0_TX_IRQHandler(void)
{
while(1);
}
__weak void ACMP0_IRQHandler(void)
{
while(1);
}
__weak void ADC0_IRQHandler(void)
{
while(1);
}
__weak void DAC0_IRQHandler(void)
{
while(1);
}
__weak void I2C0_IRQHandler(void)
{
while(1);
}
__weak void GPIO_ODD_IRQHandler(void)
{
while(1);
}
__weak void TIMER1_IRQHandler(void)
{
while(1);
}
__weak void USART1_RX_IRQHandler(void)
{
while(1);
}
__weak void USART1_TX_IRQHandler(void)
{
while(1);
}
__weak void LESENSE_IRQHandler(void)
{
while(1);
}
__weak void LEUART0_IRQHandler(void)
{
while(1);
}
__weak void LETIMER0_IRQHandler(void)
{
while(1);
}
__weak void PCNT0_IRQHandler(void)
{
while(1);
}
__weak void RTC_IRQHandler(void)
{
while(1);
}
__weak void CMU_IRQHandler(void)
{
while(1);
}
__weak void VCMP_IRQHandler(void)
{
while(1);
}
__weak void LCD_IRQHandler(void)
{
while(1);
}
__weak void MSC_IRQHandler(void)
{
while(1);
}
__weak void AES_IRQHandler(void)
{
while(1);
}
/* With IAR, the CSTACK is defined via project options settings */
#pragma data_alignment=256
#pragma location = ".intvec"
const void * const __vector_table[]= {
&CSTACK$$Limit,
(void *) Reset_Handler, /* 1 - Reset (start instruction) */
(void *) NMI_Handler, /* 2 - NMI */
(void *) HardFault_Handler, /* 3 - HardFault */
(void *) MemManage_Handler,
(void *) BusFault_Handler,
(void *) UsageFault_Handler,
(void *) 0,
(void *) 0,
(void *) 0,
(void *) 0,
(void *) SVC_Handler,
(void *) DebugMon_Handler,
(void *) 0,
(void *) PendSV_Handler,
(void *) SysTick_Handler,
(void *) DMA_IRQHandler, /* 0 - DMA */
(void *) GPIO_EVEN_IRQHandler, /* 1 - GPIO_EVEN */
(void *) TIMER0_IRQHandler, /* 2 - TIMER0 */
(void *) USART0_RX_IRQHandler, /* 3 - USART0_RX */
(void *) USART0_TX_IRQHandler, /* 4 - USART0_TX */
(void *) ACMP0_IRQHandler, /* 5 - ACMP0 */
(void *) ADC0_IRQHandler, /* 6 - ADC0 */
(void *) DAC0_IRQHandler, /* 7 - DAC0 */
(void *) I2C0_IRQHandler, /* 8 - I2C0 */
(void *) GPIO_ODD_IRQHandler, /* 9 - GPIO_ODD */
(void *) TIMER1_IRQHandler, /* 10 - TIMER1 */
(void *) USART1_RX_IRQHandler, /* 11 - USART1_RX */
(void *) USART1_TX_IRQHandler, /* 12 - USART1_TX */
(void *) LESENSE_IRQHandler, /* 13 - LESENSE */
(void *) LEUART0_IRQHandler, /* 14 - LEUART0 */
(void *) LETIMER0_IRQHandler, /* 15 - LETIMER0 */
(void *) PCNT0_IRQHandler, /* 16 - PCNT0 */
(void *) RTC_IRQHandler, /* 17 - RTC */
(void *) CMU_IRQHandler, /* 18 - CMU */
(void *) VCMP_IRQHandler, /* 19 - VCMP */
(void *) LCD_IRQHandler, /* 20 - LCD */
(void *) MSC_IRQHandler, /* 21 - MSC */
(void *) AES_IRQHandler, /* 22 - AES */
};
;/*************************************************************************//**
; * @file:
; * @purpose: CMSIS Cortex-M3 Core Device Startup File
; * for the Energy Micro 'EFM32TG' Device Series
; * @version 2.3.2
; * @date: January 2011
; *----------------------------------------------------------------------------
; *
; * Copyright (C) 2009 ARM Limited. All rights reserved.
; *
; * ARM Limited (ARM) is supplying this software for use with Cortex-Mx
; * processor based microcontrollers. This file can be freely distributed
; * within development tools that are supporting such ARM based processors.
; *
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; *
; ******************************************************************************/
;
; The modules in this file are included in the libraries, and may be replaced
; by any user-defined modules that define the PUBLIC symbol _program_start or
; a user defined start symbol.
; To override the cstartup defined in the library, simply add your modified
; version to the workbench project.
;
; The vector table is normally located at address 0.
; When debugging in RAM, it can be located in RAM wtih at least a 128 byte
; alignment, 256 byte alignment is requied if all interrupt vectors are in use.
;
; The name "__vector_table" has special meaning for C-SPY:
; it is where the SP start value is found, and the NVIC vector
; table register (VTOR) is initialized to this address if != 0.
;
; Cortex-M version
;
MODULE ?cstartup
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(8)
EXTERN __iar_program_start
EXTERN SystemInit
PUBLIC __vector_table
PUBLIC __vector_table_0x1c
PUBLIC __Vectors
PUBLIC __Vectors_End
PUBLIC __Vectors_Size
DATA
__vector_table
DCD sfe(CSTACK)
DCD Reset_Handler
DCD NMI_Handler
DCD HardFault_Handler
DCD MemManage_Handler
DCD BusFault_Handler
DCD UsageFault_Handler
__vector_table_0x1c
DCD 0
DCD 0
DCD 0
DCD 0
DCD SVC_Handler
DCD DebugMon_Handler
DCD 0
DCD PendSV_Handler
DCD SysTick_Handler
; External Interrupts
DCD DMA_IRQHandler ; 0: DMA Interrupt
DCD GPIO_EVEN_IRQHandler ; 1: GPIO_EVEN Interrupt
DCD TIMER0_IRQHandler ; 2: TIMER0 Interrupt
DCD USART0_RX_IRQHandler ; 3: USART0_RX Interrupt
DCD USART0_TX_IRQHandler ; 4: USART0_TX Interrupt
DCD ACMP0_IRQHandler ; 5: ACMP0 Interrupt
DCD ADC0_IRQHandler ; 6: ADC0 Interrupt
DCD DAC0_IRQHandler ; 7: DAC0 Interrupt
DCD I2C0_IRQHandler ; 8: I2C0 Interrupt
DCD GPIO_ODD_IRQHandler ; 9: GPIO_ODD Interrupt
DCD TIMER1_IRQHandler ; 10: TIMER1 Interrupt
DCD USART1_RX_IRQHandler ; 11: USART1_RX Interrupt
DCD USART1_TX_IRQHandler ; 12: USART1_TX Interrupt
DCD LESENSE_IRQHandler ; 13: LESENSE Interrupt
DCD LEUART0_IRQHandler ; 14: LEUART0 Interrupt
DCD LETIMER0_IRQHandler ; 15: LETIMER0 Interrupt
DCD PCNT0_IRQHandler ; 16: PCNT0 Interrupt
DCD RTC_IRQHandler ; 17: RTC Interrupt
DCD CMU_IRQHandler ; 18: CMU Interrupt
DCD VCMP_IRQHandler ; 19: VCMP Interrupt
DCD LCD_IRQHandler ; 20: LCD Interrupt
DCD MSC_IRQHandler ; 21: MSC Interrupt
DCD AES_IRQHandler ; 22: AES Interrupt
__Vectors_End
__Vectors EQU __vector_table
__Vectors_Size EQU __Vectors_End - __Vectors
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Default interrupt handlers.
;;
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:REORDER(2)
Reset_Handler
LDR R0, =SystemInit
BLX R0
LDR R0, =__iar_program_start
BX R0
PUBWEAK NMI_Handler
SECTION .text:CODE:REORDER(1)
NMI_Handler
B NMI_Handler
PUBWEAK HardFault_Handler
SECTION .text:CODE:REORDER(1)
HardFault_Handler
B HardFault_Handler
PUBWEAK MemManage_Handler
SECTION .text:CODE:REORDER(1)
MemManage_Handler
B MemManage_Handler
PUBWEAK BusFault_Handler
SECTION .text:CODE:REORDER(1)
BusFault_Handler
B BusFault_Handler
PUBWEAK UsageFault_Handler
SECTION .text:CODE:REORDER(1)
UsageFault_Handler
B UsageFault_Handler
PUBWEAK SVC_Handler
SECTION .text:CODE:REORDER(1)
SVC_Handler
B SVC_Handler
PUBWEAK DebugMon_Handler
SECTION .text:CODE:REORDER(1)
DebugMon_Handler
B DebugMon_Handler
PUBWEAK PendSV_Handler
SECTION .text:CODE:REORDER(1)
PendSV_Handler
B PendSV_Handler
PUBWEAK SysTick_Handler
SECTION .text:CODE:REORDER(1)
SysTick_Handler
B SysTick_Handler
; EFM32G specific interrupt handlers
PUBWEAK DMA_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA_IRQHandler
B DMA_IRQHandler
PUBWEAK GPIO_EVEN_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO_EVEN_IRQHandler
B GPIO_EVEN_IRQHandler
PUBWEAK TIMER0_IRQHandler
SECTION .text:CODE:REORDER(1)
TIMER0_IRQHandler
B TIMER0_IRQHandler
PUBWEAK USART0_RX_IRQHandler
SECTION .text:CODE:REORDER(1)
USART0_RX_IRQHandler
B USART0_RX_IRQHandler
PUBWEAK USART0_TX_IRQHandler
SECTION .text:CODE:REORDER(1)
USART0_TX_IRQHandler
B USART0_TX_IRQHandler
PUBWEAK ACMP0_IRQHandler
SECTION .text:CODE:REORDER(1)
ACMP0_IRQHandler
B ACMP0_IRQHandler
PUBWEAK ADC0_IRQHandler
SECTION .text:CODE:REORDER(1)
ADC0_IRQHandler
B ADC0_IRQHandler
PUBWEAK DAC0_IRQHandler
SECTION .text:CODE:REORDER(1)
DAC0_IRQHandler
B DAC0_IRQHandler
PUBWEAK I2C0_IRQHandler
SECTION .text:CODE:REORDER(1)
I2C0_IRQHandler
B I2C0_IRQHandler
PUBWEAK GPIO_ODD_IRQHandler
SECTION .text:CODE:REORDER(1)
GPIO_ODD_IRQHandler
B GPIO_ODD_IRQHandler
PUBWEAK TIMER1_IRQHandler
SECTION .text:CODE:REORDER(1)
TIMER1_IRQHandler
B TIMER1_IRQHandler
PUBWEAK USART1_RX_IRQHandler
SECTION .text:CODE:REORDER(1)
USART1_RX_IRQHandler
B USART1_RX_IRQHandler
PUBWEAK USART1_TX_IRQHandler
SECTION .text:CODE:REORDER(1)
USART1_TX_IRQHandler
B USART1_TX_IRQHandler
PUBWEAK LESENSE_IRQHandler
SECTION .text:CODE:REORDER(1)
LESENSE_IRQHandler
B LESENSE_IRQHandler
PUBWEAK LEUART0_IRQHandler
SECTION .text:CODE:REORDER(1)
LEUART0_IRQHandler
B LEUART0_IRQHandler
PUBWEAK LETIMER0_IRQHandler
SECTION .text:CODE:REORDER(1)
LETIMER0_IRQHandler
B LETIMER0_IRQHandler
PUBWEAK PCNT0_IRQHandler
SECTION .text:CODE:REORDER(1)
PCNT0_IRQHandler
B PCNT0_IRQHandler
PUBWEAK RTC_IRQHandler
SECTION .text:CODE:REORDER(1)
RTC_IRQHandler
B RTC_IRQHandler
PUBWEAK CMU_IRQHandler
SECTION .text:CODE:REORDER(1)
CMU_IRQHandler
B CMU_IRQHandler
PUBWEAK VCMP_IRQHandler
SECTION .text:CODE:REORDER(1)
VCMP_IRQHandler
B VCMP_IRQHandler
PUBWEAK LCD_IRQHandler
SECTION .text:CODE:REORDER(1)
LCD_IRQHandler
B LCD_IRQHandler
PUBWEAK MSC_IRQHandler
SECTION .text:CODE:REORDER(1)
MSC_IRQHandler
B MSC_IRQHandler
PUBWEAK AES_IRQHandler
SECTION .text:CODE:REORDER(1)
AES_IRQHandler
B AES_IRQHandler
END
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