提交 c794ac02 编写于 作者: Nameless-Y's avatar Nameless-Y

Merge branch 'master' of https://github.com/RT-Thread/rt-thread into dma

#
# Automatically generated file; DO NOT EDIT.
# RT-Thread Project Configuration
#
#
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=100
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=256
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
CONFIG_RT_DEBUG=y
# CONFIG_RT_DEBUG_COLOR is not set
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
#
CONFIG_RT_USING_SEMAPHORE=y
CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
CONFIG_RT_USING_MEMPOOL=y
# CONFIG_RT_USING_MEMHEAP is not set
# CONFIG_RT_USING_NOHEAP is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_HEAP=y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
CONFIG_RT_VER_NUM=0x40002
# CONFIG_RT_USING_CPU_FFS is not set
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
#
CONFIG_RT_USING_COMPONENTS_INIT=y
# CONFIG_RT_USING_USER_MAIN is not set
#
# C++ features
#
# CONFIG_RT_USING_CPLUSPLUS is not set
#
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
CONFIG_FINSH_USING_MSH_ONLY=y
CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
#
# CONFIG_RT_USING_DFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_SERIAL_USING_DMA=y
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
#
# Using Hardware Crypto drivers
#
# CONFIG_RT_USING_HWCRYPTO is not set
#
# Using WiFi
#
# CONFIG_RT_USING_WIFI is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
#
# POSIX layer and C standard library
#
CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_PTHREADS is not set
#
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
# CONFIG_RT_USING_NETDEV is not set
#
# light weight TCP/IP stack
#
# CONFIG_RT_USING_LWIP is not set
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
#
# Utilities
#
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
#
# RT-Thread online packages
#
#
# IoT - internet of things
#
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
#
# Wi-Fi
#
#
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_RW007 is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
#
# IoT Cloud
#
# CONFIG_PKG_USING_ONENET is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
#
# language packages
#
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
#
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ADBD is not set
#
# system packages
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
#
# miscellaneous packages
#
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
#
# samples: kernel and components samples
#
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_LIBANN is not set
......@@ -73,7 +73,7 @@
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
......@@ -101,7 +101,9 @@
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<nTsel>3</nTsel>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>4</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
......@@ -165,6 +167,10 @@
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
</TargetOption>
</Target>
......@@ -358,7 +364,7 @@
<Group>
<GroupName>Applications</GroupName>
<tvExp>1</tvExp>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
......@@ -402,7 +408,7 @@
<Group>
<GroupName>Board</GroupName>
<tvExp>1</tvExp>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
......@@ -434,7 +440,7 @@
<Group>
<GroupName>BLE_STACK</GroupName>
<tvExp>1</tvExp>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
......@@ -538,7 +544,7 @@
<Group>
<GroupName>Startup</GroupName>
<tvExp>1</tvExp>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
......@@ -1032,4 +1038,72 @@
</File>
</Group>
<Group>
<GroupName>libc</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>10</GroupNumber>
<FileNumber>67</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\components\libc\compilers\armlibc\libc.c</PathWithFileName>
<FilenameWithoutPath>libc.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>10</GroupNumber>
<FileNumber>68</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\components\libc\compilers\armlibc\mem_std.c</PathWithFileName>
<FilenameWithoutPath>mem_std.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>10</GroupNumber>
<FileNumber>69</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\components\libc\compilers\armlibc\stubs.c</PathWithFileName>
<FilenameWithoutPath>stubs.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>10</GroupNumber>
<FileNumber>70</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\components\libc\compilers\armlibc\time.c</PathWithFileName>
<FilenameWithoutPath>time.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>10</GroupNumber>
<FileNumber>71</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\components\libc\compilers\common\gmtime_r.c</PathWithFileName>
<FilenameWithoutPath>gmtime_r.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
</ProjectOpt>
......@@ -10,12 +10,13 @@
<TargetName>rtthread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>nRF52832_xxAA</Device>
<Vendor>Nordic Semiconductor</Vendor>
<PackID>NordicSemiconductor.nRF_DeviceFamilyPack.8.17.0</PackID>
<PackID>NordicSemiconductor.nRF_DeviceFamilyPack.8.24.1</PackID>
<PackURL>http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/</PackURL>
<Cpu>IRAM(0x20000000,0x10000) IROM(0x00000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
......@@ -183,10 +184,11 @@
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>1</useUlib>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
......@@ -323,6 +325,7 @@
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
......@@ -333,9 +336,9 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>--reduce_paths</MiscControls>
<Define>NRF52_PAN_55, NRF52_PAN_12, NRF52_PAN_15, NRF52_PAN_58, SWI_DISABLE0, SOFTDEVICE_PRESENT, NRF52_PAN_54, NRF52, BLE_STACK_SUPPORT_REQD, NRF52_PAN_51, NRF52_PAN_36, RTTHREAD, CONFIG_GPIO_AS_PINRESET, NRF52_PAN_64, NRF52_PAN_20, NRF52_PAN_74, NRF52832_XXAA, S132, NRF_SD_BLE_API_VERSION=4, NRF52_PAN_31</Define>
<Define>NRF52_PAN_55, NRF52_PAN_12, NRF52_PAN_15, NRF52_PAN_58, SWI_DISABLE0, SOFTDEVICE_PRESENT, NRF52_PAN_54, NRF52, BLE_STACK_SUPPORT_REQD, NRF52_PAN_51, NRF52_PAN_36, RTTHREAD, CONFIG_GPIO_AS_PINRESET, NRF52_PAN_64, NRF52_PAN_20, NRF52_PAN_74, NRF52832_XXAA, S132, NRF_SD_BLE_API_VERSION=4, NRF52_PAN_31, RT_USING_ARM_LIBC</Define>
<Undefine></Undefine>
<IncludePath>.;..\..\include;applications;.;board;nRF5_SDK_13.0.0_04a0bfd\components;nRF5_SDK_13.0.0_04a0bfd\components\softdevice\common\softdevice_handler;nRF5_SDK_13.0.0_04a0bfd\components\softdevice\s132\headers;nRF5_SDK_13.0.0_04a0bfd\components\softdevice\s132\headers\nrf52;nRF5_SDK_13.0.0_04a0bfd\components\ble\common;nRF5_SDK_13.0.0_04a0bfd\components\ble\nrf_ble_gatt;nRF5_SDK_13.0.0_04a0bfd\components\ble\ble_advertising;nRF5_SDK_13.0.0_04a0bfd\components\ble\ble_services\ble_nus;startups;nRF5_SDK_13.0.0_04a0bfd\components;nRF5_SDK_13.0.0_04a0bfd\components\device;nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\delay;nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\uart;nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\clock;nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\gpiote;nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\common;nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\hal;nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\pwm;nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\saadc;nRF5_SDK_13.0.0_04a0bfd\components\libraries\util;nRF5_SDK_13.0.0_04a0bfd\components\libraries\timer;nRF5_SDK_13.0.0_04a0bfd\components\libraries\fstorage;nRF5_SDK_13.0.0_04a0bfd\components\libraries\experimental_section_vars;nRF5_SDK_13.0.0_04a0bfd\components\libraries\log;nRF5_SDK_13.0.0_04a0bfd\components\libraries\log\src;nRF5_SDK_13.0.0_04a0bfd\components\libraries\strerror;nRF5_SDK_13.0.0_04a0bfd\components\toolchain\cmsis\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m4;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh</IncludePath>
<IncludePath>.;..\..\include;applications;.;board;nRF5_SDK_13.0.0_04a0bfd\components;nRF5_SDK_13.0.0_04a0bfd\components\softdevice\common\softdevice_handler;nRF5_SDK_13.0.0_04a0bfd\components\softdevice\s132\headers;nRF5_SDK_13.0.0_04a0bfd\components\softdevice\s132\headers\nrf52;nRF5_SDK_13.0.0_04a0bfd\components\ble\common;nRF5_SDK_13.0.0_04a0bfd\components\ble\nrf_ble_gatt;nRF5_SDK_13.0.0_04a0bfd\components\ble\ble_advertising;nRF5_SDK_13.0.0_04a0bfd\components\ble\ble_services\ble_nus;startups;nRF5_SDK_13.0.0_04a0bfd\components;nRF5_SDK_13.0.0_04a0bfd\components\device;nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\delay;nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\uart;nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\clock;nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\gpiote;nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\common;nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\hal;nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\pwm;nRF5_SDK_13.0.0_04a0bfd\components\drivers_nrf\saadc;nRF5_SDK_13.0.0_04a0bfd\components\libraries\util;nRF5_SDK_13.0.0_04a0bfd\components\libraries\timer;nRF5_SDK_13.0.0_04a0bfd\components\libraries\fstorage;nRF5_SDK_13.0.0_04a0bfd\components\libraries\experimental_section_vars;nRF5_SDK_13.0.0_04a0bfd\components\libraries\log;nRF5_SDK_13.0.0_04a0bfd\components\libraries\log\src;nRF5_SDK_13.0.0_04a0bfd\components\libraries\strerror;nRF5_SDK_13.0.0_04a0bfd\components\toolchain\cmsis\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m4;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc;..\..\components\libc\compilers\common</IncludePath>
</VariousControls>
</Cads>
<Aads>
......@@ -751,6 +754,36 @@
</File>
</Files>
</Group>
<Group>
<GroupName>libc</GroupName>
<Files>
<File>
<FileName>libc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\libc\compilers\armlibc\libc.c</FilePath>
</File>
<File>
<FileName>mem_std.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\libc\compilers\armlibc\mem_std.c</FilePath>
</File>
<File>
<FileName>stubs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\libc\compilers\armlibc\stubs.c</FilePath>
</File>
<File>
<FileName>time.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\libc\compilers\armlibc\time.c</FilePath>
</File>
<File>
<FileName>gmtime_r.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\libc\compilers\common\gmtime_r.c</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
......
......@@ -41,7 +41,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40001
#define RT_VER_NUM 0x40002
/* RT-Thread Components */
......@@ -78,6 +78,9 @@
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
/* Using Hardware Crypto drivers */
/* Using WiFi */
......@@ -86,16 +89,17 @@
/* POSIX layer and C standard library */
#define RT_USING_LIBC
/* Network */
/* Socket abstraction layer */
/* light weight TCP/IP stack */
/* Network interface device */
/* Modbus master and slave stack */
/* light weight TCP/IP stack */
/* AT commands */
......
......@@ -101,7 +101,9 @@
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<nTsel>3</nTsel>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>4</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
......@@ -165,6 +167,10 @@
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
</TargetOption>
</Target>
......
......@@ -11,11 +11,12 @@
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>nRF52832_xxAA</Device>
<Vendor>Nordic Semiconductor</Vendor>
<PackID>NordicSemiconductor.nRF_DeviceFamilyPack.8.17.0</PackID>
<PackID>NordicSemiconductor.nRF_DeviceFamilyPack.8.24.1</PackID>
<PackURL>http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/</PackURL>
<Cpu>IRAM(0x20000000,0x10000) IROM(0x00000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
......@@ -183,10 +184,11 @@
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>1</useUlib>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
......@@ -323,6 +325,7 @@
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
......
......@@ -376,7 +376,7 @@
</Unit>
<Unit filename="..\..\libcpu\mips\common\cache.h" />
<Unit filename="..\..\libcpu\mips\common\exception.h" />
<Unit filename="..\..\libcpu\mips\common\mips.inc" />
<Unit filename="..\..\libcpu\mips\common\mips_def.h" />
<Unit filename="..\..\libcpu\mips\common\mipscfg.h" />
<Unit filename="..\..\libcpu\mips\common\mipsregs.h" />
<Unit filename="..\..\libcpu\mips\common\stackframe.h" />
......
......@@ -73,7 +73,7 @@ int rt_hw_timer_init(void)
val |= (TIMER_CTRL_32BIT | TIMER_CTRL_PERIODIC | TIMER_CTRL_IE);
TIMER_CTRL(TIMER_HW_BASE) = val;
TIMER_LOAD(TIMER_HW_BASE) = 1000;
TIMER_LOAD(TIMER_HW_BASE) = 1000000/RT_TICK_PER_SECOND;
/* enable timer */
TIMER_CTRL(TIMER_HW_BASE) |= TIMER_CTRL_ENABLE;
......
......@@ -7,20 +7,32 @@
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=100
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_DEBUG_INIT=0
CONFIG_RT_DEBUG_THREAD=0
CONFIG_RT_USING_HOOK=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=256
# CONFIG_RT_USING_TIMER_SOFT is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
......@@ -47,11 +59,14 @@ CONFIG_RT_USING_HEAP=y
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="console"
# CONFIG_RT_USING_MODULE is not set
CONFIG_RT_VER_NUM=0x40002
# CONFIG_RT_USING_CPU_FFS is not set
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
......@@ -72,6 +87,7 @@ CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_CMD_SIZE=80
......@@ -79,6 +95,7 @@ CONFIG_FINSH_CMD_SIZE=80
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
# CONFIG_FINSH_USING_MSH_ONLY is not set
CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
......@@ -86,8 +103,9 @@ CONFIG_FINSH_USING_MSH_DEFAULT=y
CONFIG_RT_USING_DFS=y
CONFIG_DFS_USING_WORKDIR=y
CONFIG_DFS_FILESYSTEMS_MAX=2
CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
CONFIG_DFS_FILESYSTEM_TYPES_MAX=4
CONFIG_DFS_FD_MAX=4
# CONFIG_RT_USING_DFS_MNTTABLE is not set
CONFIG_RT_USING_DFS_ELMFAT=y
#
......@@ -106,30 +124,38 @@ CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
CONFIG_RT_DFS_ELM_REENTRANT=y
CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_NET is not set
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_UFFS is not set
# CONFIG_RT_USING_DFS_JFFS2 is not set
# CONFIG_RT_USING_DFS_NFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_SERIAL_USING_DMA=y
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
# CONFIG_RT_USING_PIN is not set
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_WIFI is not set
#
......@@ -145,8 +171,18 @@ CONFIG_RT_SERIAL_USING_DMA=y
# CONFIG_RT_USING_PTHREADS is not set
#
# Network stack
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
# CONFIG_RT_USING_NETDEV is not set
#
# light weight TCP/IP stack
......@@ -154,9 +190,9 @@ CONFIG_RT_SERIAL_USING_DMA=y
# CONFIG_RT_USING_LWIP is not set
#
# Modbus master and slave stack
# AT commands
#
# CONFIG_RT_USING_MODBUS is not set
# CONFIG_RT_USING_AT is not set
#
# VBUS(Virtual Software BUS)
......@@ -166,46 +202,29 @@ CONFIG_RT_SERIAL_USING_DMA=y
#
# Utilities
#
# CONFIG_RT_USING_LOGTRACE is not set
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
#
# RT-Thread online packages
#
#
# system packages
#
#
# RT-Thread GUI Engine
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_GUIENGINE_IMAGE_JPEG_NONE is not set
# CONFIG_GUIENGINE_IMAGE_JPEG is not set
# CONFIG_GUIENGINE_IMAGE_TJPGD is not set
# CONFIG_GUIENGINE_IMAGE_PNG_NONE is not set
# CONFIG_GUIENGINE_IMAGE_PNG is not set
# CONFIG_GUIENGINE_IMAGE_LODEPNG is not set
# CONFIG_PKG_USING_GUIENGINE_V200 is not set
# CONFIG_PKG_USING_GUIENGINE_LATEST_VERSION is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
#
# IoT - internet of things
#
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
#
# Wi-Fi
......@@ -220,8 +239,29 @@ CONFIG_RT_SERIAL_USING_DMA=y
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_RW007 is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
#
# IoT Cloud
#
# CONFIG_PKG_USING_ONENET is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set
#
# security packages
......@@ -233,6 +273,7 @@ CONFIG_RT_SERIAL_USING_DMA=y
#
# language packages
#
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
......@@ -240,27 +281,90 @@ CONFIG_RT_SERIAL_USING_DMA=y
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_IPERF is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ADBD is not set
#
# system packages
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
# CONFIG_PKG_USING_LCD_DRIVERS is not set
#
# miscellaneous packages
#
CONFIG_PKG_USING_FASTLZ=y
CONFIG_PKG_FASTLZ_PATH="/packages/misc/fastlz"
CONFIG_PKG_FASTLZ_VER="v1.0.0"
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
#
# example package: hello
# samples: kernel and components samples
#
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_LIBANN is not set
CONFIG_RT_USING_DFS_WINSHAREDIR=y
......@@ -72,7 +72,7 @@ else:
env['CC']=rtconfig.CC
env.Append(CCFLAGS=rtconfig.CFLAGS)
env.Append(LINKFLAGS=rtconfig.LFLAGS)
env.Append(LIBS=['m'])
env.Append(LIBS=['winmm'])
# prepare building environment
......
......@@ -8,19 +8,16 @@
#define RT_NAME_MAX 8
#define RT_ALIGN_SIZE 4
/* RT_THREAD_PRIORITY_8 is not set */
#define RT_THREAD_PRIORITY_32
/* RT_THREAD_PRIORITY_256 is not set */
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 100
#define RT_DEBUG
#define RT_DEBUG_COLOR
#define RT_USING_OVERFLOW_CHECK
#define RT_DEBUG_INIT 0
#define RT_DEBUG_THREAD 0
#define RT_USING_HOOK
#define RT_USING_IDLE_HOOK
#define RT_IDEL_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 256
/* RT_USING_TIMER_SOFT is not set */
#define RT_DEBUG
#define RT_DEBUG_COLOR
/* Inter-Thread communication */
......@@ -29,34 +26,26 @@
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
/* RT_USING_SIGNALS is not set */
/* Memory Management */
#define RT_USING_MEMPOOL
/* RT_USING_MEMHEAP is not set */
/* RT_USING_NOHEAP is not set */
#define RT_USING_SMALL_MEM
/* RT_USING_SLAB is not set */
/* RT_USING_MEMTRACE is not set */
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
/* RT_USING_INTERRUPT_INFO is not set */
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "console"
/* RT_USING_MODULE is not set */
#define RT_VER_NUM 0x40002
/* RT-Thread Components */
/* RT_USING_COMPONENTS_INIT is not set */
/* C++ features */
/* RT_USING_CPLUSPLUS is not set */
/* Command shell */
......@@ -69,17 +58,16 @@
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_CMD_SIZE 80
/* FINSH_USING_AUTH is not set */
#define FINSH_USING_MSH
#define FINSH_USING_MSH_DEFAULT
/* FINSH_USING_MSH_ONLY is not set */
#define FINSH_ARG_MAX 10
/* Device virtual file system */
#define RT_USING_DFS
#define DFS_USING_WORKDIR
#define DFS_FILESYSTEMS_MAX 2
#define DFS_FILESYSTEM_TYPES_MAX 2
#define DFS_FILESYSTEM_TYPES_MAX 4
#define DFS_FD_MAX 4
#define RT_USING_DFS_ELMFAT
......@@ -88,146 +76,86 @@
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_0
/* RT_DFS_ELM_USE_LFN_1 is not set */
/* RT_DFS_ELM_USE_LFN_2 is not set */
/* RT_DFS_ELM_USE_LFN_3 is not set */
#define RT_DFS_ELM_USE_LFN 0
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
/* RT_DFS_ELM_USE_ERASE is not set */
#define RT_DFS_ELM_REENTRANT
#define RT_USING_DFS_DEVFS
/* RT_USING_DFS_NET is not set */
/* RT_USING_DFS_ROMFS is not set */
/* RT_USING_DFS_RAMFS is not set */
/* RT_USING_DFS_UFFS is not set */
/* RT_USING_DFS_JFFS2 is not set */
/* RT_USING_DFS_NFS is not set */
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_PIPE_BUFSZ 512
#define RT_USING_SERIAL
#define RT_SERIAL_USING_DMA
/* RT_USING_CAN is not set */
/* RT_USING_HWTIMER is not set */
/* RT_USING_CPUTIME is not set */
/* RT_USING_I2C is not set */
/* RT_USING_PIN is not set */
/* RT_USING_MTD_NOR is not set */
/* RT_USING_MTD_NAND is not set */
/* RT_USING_RTC is not set */
/* RT_USING_SDIO is not set */
/* RT_USING_SPI is not set */
/* RT_USING_WDT is not set */
/* RT_USING_WIFI is not set */
#define RT_SERIAL_RB_BUFSZ 64
/* Using USB */
/* RT_USING_USB_HOST is not set */
/* RT_USING_USB_DEVICE is not set */
/* POSIX layer and C standard library */
/* RT_USING_LIBC is not set */
/* RT_USING_PTHREADS is not set */
/* Network stack */
/* Network */
/* Socket abstraction layer */
/* Network interface device */
/* light weight TCP/IP stack */
/* RT_USING_LWIP is not set */
/* Modbus master and slave stack */
/* AT commands */
/* RT_USING_MODBUS is not set */
/* VBUS(Virtual Software BUS) */
/* RT_USING_VBUS is not set */
/* Utilities */
/* RT_USING_LOGTRACE is not set */
/* RT_USING_RYM is not set */
/* RT-Thread online packages */
/* system packages */
/* RT-Thread GUI Engine */
/* PKG_USING_GUIENGINE is not set */
/* GUIENGINE_IMAGE_JPEG_NONE is not set */
/* GUIENGINE_IMAGE_JPEG is not set */
/* GUIENGINE_IMAGE_TJPGD is not set */
/* GUIENGINE_IMAGE_PNG_NONE is not set */
/* GUIENGINE_IMAGE_PNG is not set */
/* GUIENGINE_IMAGE_LODEPNG is not set */
/* PKG_USING_GUIENGINE_V200 is not set */
/* PKG_USING_GUIENGINE_LATEST_VERSION is not set */
/* PKG_USING_LWEXT4 is not set */
/* PKG_USING_PARTITION is not set */
/* PKG_USING_SQLITE is not set */
/* PKG_USING_RTI is not set */
/* IoT - internet of things */
/* PKG_USING_PAHOMQTT is not set */
/* PKG_USING_WEBCLIENT is not set */
/* PKG_USING_MONGOOSE is not set */
/* PKG_USING_WEBTERMINAL is not set */
/* PKG_USING_CJSON is not set */
/* PKG_USING_LJSON is not set */
/* PKG_USING_EZXML is not set */
/* PKG_USING_NANOPB is not set */
/* PKG_USING_GAGENT_CLOUD is not set */
/* Wi-Fi */
/* Marvell WiFi */
/* PKG_USING_WLANMARVELL is not set */
/* Wiced WiFi */
/* PKG_USING_WLAN_WICED is not set */
/* PKG_USING_COAP is not set */
/* PKG_USING_NOPOLL is not set */
/* IoT Cloud */
/* security packages */
/* PKG_USING_MBEDTLS is not set */
/* PKG_USING_libsodium is not set */
/* PKG_USING_TINYCRYPT is not set */
/* language packages */
/* PKG_USING_JERRYSCRIPT is not set */
/* PKG_USING_MICROPYTHON is not set */
/* multimedia packages */
/* PKG_USING_OPENMV is not set */
/* tools packages */
/* PKG_USING_CMBACKTRACE is not set */
/* PKG_USING_EASYLOGGER is not set */
/* PKG_USING_SYSTEMVIEW is not set */
/* PKG_USING_IPERF is not set */
/* system packages */
/* peripheral libraries and drivers */
/* miscellaneous packages */
#define PKG_USING_FASTLZ
/* PKG_USING_MINILZO is not set */
/* PKG_USING_QUICKLZ is not set */
/* example package: hello */
/* samples: kernel and components samples */
/* PKG_USING_HELLO is not set */
/* PKG_USING_MULTIBUTTON is not set */
#define RT_USING_DFS_WINSHAREDIR
#include "rtconfig_project.h"
......
config BSP_USING_CRC
bool "Enable CRC (CRC-32 0x04C11DB7 Polynomial)"
select RT_USING_HWCRYPTO
select RT_HWCRYPTO_USING_CRC
# "Crypto device frame dose not support above 8-bits granularity"
# "Reserve progress, running well, about 32-bits granularity, such as stm32f1, stm32f4"
depends on (SOC_SERIES_STM32L4 || SOC_SERIES_STM32F0 || SOC_SERIES_STM32F7 || SOC_SERIES_STM32H7)
default n
config BSP_USING_RNG
bool "Enable RNG (Random Number Generator)"
select RT_USING_HWCRYPTO
select RT_HWCRYPTO_USING_RNG
depends on (SOC_SERIES_STM32L4 || SOC_SERIES_STM32F4 || SOC_SERIES_STM32F7 || \
SOC_SERIES_STM32H7)
default n
config BSP_USING_UDID
bool "Enable UDID (Unique Device Identifier)"
select RT_USING_HWCRYPTO
default n
......@@ -72,7 +72,10 @@ if GetDepend(['BSP_USING_ON_CHIP_FLASH', 'SOC_SERIES_STM32F7']):
if GetDepend(['BSP_USING_ON_CHIP_FLASH', 'SOC_SERIES_STM32L4']):
src += ['drv_flash/drv_flash_l4.c']
if GetDepend('RT_USING_HWCRYPTO'):
src += ['drv_crypto.c']
if GetDepend(['BSP_USING_WDT']):
src += ['drv_wdt.c']
......
/*
* Copyright (c) 2019 Winner Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-07-10 Ernest 1st version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <stdlib.h>
#include <string.h>
#include "drv_crypto.h"
#include "board.h"
struct stm32_hwcrypto_device
{
struct rt_hwcrypto_device dev;
struct rt_mutex mutex;
};
#if defined(BSP_USING_CRC)
struct hash_ctx_des
{
CRC_HandleTypeDef contex;
};
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
static struct hwcrypto_crc_cfg crc_backup_cfg;
static int reverse_bit(rt_uint32_t n)
{
n = ((n >> 1) & 0x55555555) | ((n << 1) & 0xaaaaaaaa);
n = ((n >> 2) & 0x33333333) | ((n << 2) & 0xcccccccc);
n = ((n >> 4) & 0x0f0f0f0f) | ((n << 4) & 0xf0f0f0f0);
n = ((n >> 8) & 0x00ff00ff) | ((n << 8) & 0xff00ff00);
n = ((n >> 16) & 0x0000ffff) | ((n << 16) & 0xffff0000);
return n;
}
#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_size_t length)
{
rt_uint32_t result = 0;
struct stm32_hwcrypto_device *stm32_hw_dev = (struct stm32_hwcrypto_device *)ctx->parent.device->user_data;
#if defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
CRC_HandleTypeDef *HW_TypeDef = (CRC_HandleTypeDef *)(ctx->parent.contex);
#endif
rt_mutex_take(&stm32_hw_dev->mutex, RT_WAITING_FOREVER);
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
if (memcmp(&crc_backup_cfg, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg)) != 0)
{
if (HW_TypeDef->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_DISABLE)
{
HW_TypeDef->Init.GeneratingPolynomial = ctx ->crc_cfg.poly;
}
else
{
HW_TypeDef->Init.GeneratingPolynomial = DEFAULT_CRC32_POLY;
}
switch (ctx ->crc_cfg.flags)
{
case 0:
HW_TypeDef->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
HW_TypeDef->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
break;
case CRC_FLAG_REFIN:
HW_TypeDef->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE;
break;
case CRC_FLAG_REFOUT:
HW_TypeDef->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE;
break;
case CRC_FLAG_REFIN|CRC_FLAG_REFOUT:
HW_TypeDef->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE;
HW_TypeDef->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE;
break;
default :
goto _exit;
}
HW_TypeDef->Init.CRCLength = ctx ->crc_cfg.width;
if (HW_TypeDef->Init.DefaultInitValueUse == DEFAULT_INIT_VALUE_DISABLE)
{
HW_TypeDef->Init.InitValue = ctx ->crc_cfg.last_val;
}
if (HAL_CRC_Init(HW_TypeDef) != HAL_OK)
{
goto _exit;
}
memcpy(&crc_backup_cfg, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg));
}
if (HAL_CRC_STATE_READY != HAL_CRC_GetState(HW_TypeDef))
{
goto _exit;
}
#else
if (ctx->crc_cfg.flags != 0 || ctx->crc_cfg.last_val != 0xFFFFFFFF || ctx->crc_cfg.xorout != 0 || length % 4 != 0)
{
goto _exit;
}
length /= 4;
#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
result = HAL_CRC_Accumulate(ctx->parent.contex, (rt_uint32_t *)in, length);
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
if (HW_TypeDef->Init.OutputDataInversionMode)
{
ctx ->crc_cfg.last_val = reverse_bit(result);
}
else
{
ctx ->crc_cfg.last_val = result;
}
crc_backup_cfg.last_val = ctx ->crc_cfg.last_val;
result = (result ? result ^ (ctx ->crc_cfg.xorout) : result);
#endif /* defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
_exit:
rt_mutex_release(&stm32_hw_dev->mutex);
return result;
}
static const struct hwcrypto_crc_ops crc_ops =
{
.update = _crc_update,
};
#endif /* BSP_USING_CRC */
#if defined(BSP_USING_RNG)
static rt_uint32_t _rng_rand(struct hwcrypto_rng *ctx)
{
rt_uint32_t gen_random = 0;
RNG_HandleTypeDef *HW_TypeDef = (RNG_HandleTypeDef *)(ctx->parent.contex);
if (HAL_OK == HAL_RNG_GenerateRandomNumber(HW_TypeDef, &gen_random))
{
return gen_random ;
}
return 0;
}
static const struct hwcrypto_rng_ops rng_ops =
{
.update = _rng_rand,
};
#endif /* BSP_USING_RNG */
static rt_err_t _crypto_create(struct rt_hwcrypto_ctx *ctx)
{
rt_err_t res = RT_EOK;
switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
{
#if defined(BSP_USING_RNG)
case HWCRYPTO_TYPE_RNG:
{
RNG_HandleTypeDef *hrng = rt_calloc(1, sizeof(RNG_HandleTypeDef));
hrng->Instance = RNG;
HAL_RNG_Init(hrng);
ctx->contex = hrng;
((struct hwcrypto_rng *)ctx)->ops = &rng_ops;
break;
}
#endif /* BSP_USING_RNG */
#if defined(BSP_USING_CRC)
case HWCRYPTO_TYPE_CRC:
{
CRC_HandleTypeDef *hcrc = rt_calloc(1, sizeof(CRC_HandleTypeDef));
if (RT_NULL == hcrc)
{
res = -RT_ERROR;
break;
}
hcrc->Instance = CRC;
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
hcrc->Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE;
hcrc->Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_DISABLE;
hcrc->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE;
hcrc->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE;
hcrc->InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
#else
if (HAL_CRC_Init(hcrc) != HAL_OK)
{
res = -RT_ERROR;
}
#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
ctx->contex = hcrc;
((struct hwcrypto_crc *)ctx)->ops = &crc_ops;
break;
}
#endif /* BSP_USING_CRC */
default:
res = -RT_ERROR;
break;
}
return res;
}
static void _crypto_destroy(struct rt_hwcrypto_ctx *ctx)
{
switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
{
#if defined(BSP_USING_RNG)
case HWCRYPTO_TYPE_RNG:
break;
#endif /* BSP_USING_RNG */
#if defined(BSP_USING_CRC)
case HWCRYPTO_TYPE_CRC:
__HAL_CRC_DR_RESET((CRC_HandleTypeDef *)ctx-> contex);
HAL_CRC_DeInit((CRC_HandleTypeDef *)(ctx->contex));
break;
#endif /* BSP_USING_CRC */
default:
break;
}
rt_free(ctx->contex);
}
static rt_err_t _crypto_clone(struct rt_hwcrypto_ctx *des, const struct rt_hwcrypto_ctx *src)
{
rt_err_t res = RT_EOK;
switch (src->type & HWCRYPTO_MAIN_TYPE_MASK)
{
#if defined(BSP_USING_RNG)
case HWCRYPTO_TYPE_RNG:
if (des->contex && src->contex)
{
rt_memcpy(des->contex, src->contex, sizeof(struct hash_ctx_des));
}
break;
#endif /* BSP_USING_RNG */
#if defined(BSP_USING_CRC)
case HWCRYPTO_TYPE_CRC:
if (des->contex && src->contex)
{
rt_memcpy(des->contex, src->contex, sizeof(struct hash_ctx_des));
}
break;
#endif /* BSP_USING_CRC */
default:
res = -RT_ERROR;
break;
}
return res;
}
static void _crypto_reset(struct rt_hwcrypto_ctx *ctx)
{
switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
{
#if defined(BSP_USING_RNG)
case HWCRYPTO_TYPE_RNG:
break;
#endif /* BSP_USING_RNG */
#if defined(BSP_USING_CRC)
case HWCRYPTO_TYPE_CRC:
__HAL_CRC_DR_RESET((CRC_HandleTypeDef *)ctx-> contex);
break;
#endif /* BSP_USING_CRC */
default:
break;
}
}
static const struct rt_hwcrypto_ops _ops =
{
.create = _crypto_create,
.destroy = _crypto_destroy,
.copy = _crypto_clone,
.reset = _crypto_reset,
};
int stm32_hw_crypto_device_init(void)
{
static struct stm32_hwcrypto_device _crypto_dev;
rt_uint32_t cpuid[3] = {0};
_crypto_dev.dev.ops = &_ops;
#if defined(BSP_USING_UDID)
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F7)
cpuid[0] = HAL_GetUIDw0();
cpuid[1] = HAL_GetUIDw1();
#elif defined(SOC_SERIES_STM32F1)
HAL_GetUID(cpuid);
#elif defined(SOC_SERIES_STM32H7)
cpuid[0] = HAL_GetREVID();
cpuid[1] = HAL_GetDEVID();
#endif
#endif /* BSP_USING_UDID */
_crypto_dev.dev.id = 0;
rt_memcpy(&_crypto_dev.dev.id, cpuid, 8);
_crypto_dev.dev.user_data = &_crypto_dev;
if (rt_hwcrypto_register(&_crypto_dev.dev, RT_HWCRYPTO_DEFAULT_NAME) != RT_EOK)
{
return -1;
}
rt_mutex_init(&_crypto_dev.mutex, RT_HWCRYPTO_DEFAULT_NAME, RT_IPC_FLAG_FIFO);
return 0;
}
INIT_DEVICE_EXPORT(stm32_hw_crypto_device_init);
/*
* Copyright (c) 2019 Winner Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-07-10 Ernest 1st version
*/
#ifndef __DRV_CRYPTO_H__
#define __DRV_CRYPTO_H__
int l4_hw_crypto_device_init(void);
#endif /* __DRV_CRYPTO_H__ */
......@@ -16,25 +16,17 @@
#define LOG_TAG "drv.wdt"
#include <drv_log.h>
static IWDG_HandleTypeDef hiwdg;
struct stm32_wdt_obj
{
IWDG_HandleTypeDef hiwdg;
rt_uint16_t is_start;
};
static struct stm32_wdt_obj stm32_wdt;
static struct rt_watchdog_ops ops;
static rt_watchdog_t watchdog;
static rt_err_t wdt_init(rt_watchdog_t *wdt)
{
hiwdg.Instance = IWDG;
hiwdg.Init.Prescaler = IWDG_PRESCALER_256;
hiwdg.Init.Reload = 0x00000FFF;
#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7)
hiwdg.Init.Window = 0x00000FFF;
#endif
if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
{
LOG_E("wdt init failed.");
return -RT_ERROR;
}
return RT_EOK;
}
......@@ -44,38 +36,44 @@ static rt_err_t wdt_control(rt_watchdog_t *wdt, int cmd, void *arg)
{
/* feed the watchdog */
case RT_DEVICE_CTRL_WDT_KEEPALIVE:
HAL_IWDG_Refresh(&hiwdg);
if(HAL_IWDG_Refresh(&stm32_wdt.hiwdg) != HAL_OK)
{
LOG_E("watch dog keepalive fail.");
}
break;
/* set watchdog timeout */
case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
#if defined(LSI_VALUE)
if(LSI_VALUE)
{
hiwdg.Init.Reload = (*((rt_uint32_t*)arg)) * LSI_VALUE / 256 ;
stm32_wdt.hiwdg.Init.Reload = (*((rt_uint32_t*)arg)) * LSI_VALUE / 256 ;
}
else
{
LOG_E("Please define the value of LSI_VALUE!");
}
#else
#error "Please define the value of LSI_VALUE!"
#endif
if(hiwdg.Init.Reload > 0xFFF)
if(stm32_wdt.hiwdg.Init.Reload > 0xFFF)
{
LOG_E("wdg set timeout parameter too large.");
LOG_E("wdg set timeout parameter too large, please less than %ds",0xFFF * 256 / LSI_VALUE);
return -RT_EINVAL;
}
if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
#else
#error "Please define the value of LSI_VALUE!"
#endif
if(stm32_wdt.is_start)
{
LOG_E("wdg set timeout failed.");
return -RT_ERROR;
if (HAL_IWDG_Init(&stm32_wdt.hiwdg) != HAL_OK)
{
LOG_E("wdg set timeout failed.");
return -RT_ERROR;
}
}
break;
case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
#if defined(LSI_VALUE)
if(LSI_VALUE)
{
(*((rt_uint32_t*)arg)) = hiwdg.Init.Reload * 256 / LSI_VALUE;
(*((rt_uint32_t*)arg)) = stm32_wdt.hiwdg.Init.Reload * 256 / LSI_VALUE;
}
else
{
......@@ -85,6 +83,13 @@ static rt_err_t wdt_control(rt_watchdog_t *wdt, int cmd, void *arg)
#error "Please define the value of LSI_VALUE!"
#endif
break;
case RT_DEVICE_CTRL_WDT_START:
if (HAL_IWDG_Init(&stm32_wdt.hiwdg) != HAL_OK)
{
LOG_E("wdt start failed.");
return -RT_ERROR;
}
stm32_wdt.is_start = 1;
default:
return -RT_ERROR;
}
......@@ -93,6 +98,20 @@ static rt_err_t wdt_control(rt_watchdog_t *wdt, int cmd, void *arg)
int rt_wdt_init(void)
{
#if defined(SOC_SERIES_STM32H7)
stm32_wdt.hiwdg.Instance = IWDG1;
#else
stm32_wdt.hiwdg.Instance = IWDG;
#endif
stm32_wdt.hiwdg.Init.Prescaler = IWDG_PRESCALER_256;
stm32_wdt.hiwdg.Init.Reload = 0x00000FFF;
#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) \
|| defined(SOC_SERIES_STM32H7)
stm32_wdt.hiwdg.Init.Window = 0x00000FFF;
#endif
stm32_wdt.is_start = 0;
ops.init = &wdt_init;
ops.control = &wdt_control;
watchdog.ops = &ops;
......
......@@ -11,6 +11,7 @@ CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_crc.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_crc_ex.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c
STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c
......
......@@ -68,7 +68,8 @@ menu "On-chip Peripheral Drivers"
range 1 216
default 16
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -68,7 +68,8 @@ menu "On-chip Peripheral Drivers"
range 1 216
default 16
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -68,7 +68,8 @@ menu "On-chip Peripheral Drivers"
range 1 216
default 16
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -68,7 +68,8 @@ menu "On-chip Peripheral Drivers"
range 1 216
default 16
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -68,7 +68,8 @@ menu "On-chip Peripheral Drivers"
range 1 216
default 16
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -26,7 +26,8 @@ menu "On-chip Peripheral Drivers"
default y
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -68,7 +68,8 @@ menu "On-chip Peripheral Drivers"
range 1 176
default 16
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -77,7 +77,8 @@ menu "On-chip Peripheral Drivers"
range 1 216
default 16
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -156,6 +156,8 @@ menu "On-chip Peripheral Drivers"
select RT_USING_WDT
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -200,7 +200,9 @@ menu "On-chip Peripheral Drivers"
bool "Enable Watchdog Timer"
select RT_USING_WDT
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -200,7 +200,9 @@ menu "On-chip Peripheral Drivers"
bool "Enable Watchdog Timer"
select RT_USING_WDT
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -125,7 +125,8 @@ menu "On-chip Peripheral Drivers"
select RT_USING_SDIO
select RT_USING_DFS
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -30,7 +30,8 @@ menu "On-chip Peripheral Drivers"
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
default n
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -288,7 +288,8 @@ menu "On-chip Peripheral Drivers"
bool "using CAN1"
default n
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -68,7 +68,8 @@ menu "On-chip Peripheral Drivers"
range 1 216
default 16
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -215,6 +215,8 @@ menu "On-chip Peripheral Drivers"
bool "Enable Watchdog Timer"
select RT_USING_WDT
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
[PreviousGenFiles]
HeaderPath=G:/Wondfo/RT-Thread/rt-thread-master1/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Inc
HeaderPath=F:/rt-thread/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Inc
HeaderFiles=stm32f1xx_it.h;stm32f1xx_hal_conf.h;main.h;
SourcePath=G:/Wondfo/RT-Thread/rt-thread-master1/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Src
SourcePath=F:/rt-thread/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Src
SourceFiles=stm32f1xx_it.c;stm32f1xx_hal_msp.c;main.c;
[PreviousLibFiles]
......@@ -10,4 +10,5 @@ LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h;Drivers/STM32F1xx_
[PreviousUsedKeilFiles]
SourceFiles=..\Src\main.c;..\Src\stm32f1xx_it.c;..\Src\stm32f1xx_hal_msp.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../\Src/system_stm32f1xx.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../\Src/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;null;
HeaderPath=..\Drivers\STM32F1xx_HAL_Driver\Inc;..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F1xx\Include;..\Drivers\CMSIS\Include;..\Inc;
CDefines=USE_HAL_DRIVER;STM32F103xB;USE_HAL_DRIVER;STM32F103xB;
......@@ -19,8 +19,9 @@ Mcu.Name=STM32F103C(8-B)Tx
Mcu.Package=LQFP48
Mcu.Pin0=PC14-OSC32_IN
Mcu.Pin1=PC15-OSC32_OUT
Mcu.Pin10=VP_SYS_VS_ND
Mcu.Pin11=VP_SYS_VS_Systick
Mcu.Pin10=PA13
Mcu.Pin11=PA14
Mcu.Pin12=VP_SYS_VS_Systick
Mcu.Pin2=PD0-OSC_IN
Mcu.Pin3=PD1-OSC_OUT
Mcu.Pin4=PA1
......@@ -29,12 +30,12 @@ Mcu.Pin6=PA6
Mcu.Pin7=PA7
Mcu.Pin8=PA9
Mcu.Pin9=PA10
Mcu.PinsNb=12
Mcu.PinsNb=13
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F103C8Tx
MxCube.Version=5.1.0
MxDb.Version=DB.5.0.10
MxCube.Version=5.2.1
MxDb.Version=DB.5.0.21
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
......@@ -48,6 +49,10 @@ NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
PA1.Signal=ADCx_IN1
PA10.Mode=Asynchronous
PA10.Signal=USART1_RX
PA13.Mode=Serial_Wire
PA13.Signal=SYS_JTMS-SWDIO
PA14.Mode=Serial_Wire
PA14.Signal=SYS_JTCK-SWCLK
PA5.Mode=Full_Duplex_Master
PA5.Signal=SPI1_SCK
PA6.Mode=Full_Duplex_Master
......@@ -100,39 +105,36 @@ ProjectManager.TargetToolchain=MDK-ARM V5
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true
RCC.ADCFreqValue=36000000
RCC.AHBFreq_Value=72000000
RCC.ADCFreqValue=8000000
RCC.AHBFreq_Value=16000000
RCC.APB1CLKDivider=RCC_HCLK_DIV2
RCC.APB1Freq_Value=36000000
RCC.APB1TimFreq_Value=72000000
RCC.APB2Freq_Value=72000000
RCC.APB2TimFreq_Value=72000000
RCC.FCLKCortexFreq_Value=72000000
RCC.APB1Freq_Value=8000000
RCC.APB1TimFreq_Value=16000000
RCC.APB2Freq_Value=16000000
RCC.APB2TimFreq_Value=16000000
RCC.FCLKCortexFreq_Value=16000000
RCC.FamilyName=M
RCC.HCLKFreq_Value=72000000
RCC.IPParameters=ADCFreqValue,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,PLLSourceVirtual,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USBFreq_Value,VCOOutput2Freq_Value
RCC.MCOFreq_Value=72000000
RCC.PLLCLKFreq_Value=72000000
RCC.PLLMCOFreq_Value=36000000
RCC.PLLMUL=RCC_PLL_MUL9
RCC.HCLKFreq_Value=16000000
RCC.IPParameters=ADCFreqValue,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLSourceVirtual,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USBFreq_Value,VCOOutput2Freq_Value
RCC.MCOFreq_Value=16000000
RCC.PLLCLKFreq_Value=16000000
RCC.PLLMCOFreq_Value=8000000
RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
RCC.SYSCLKFreq_VALUE=72000000
RCC.SYSCLKFreq_VALUE=16000000
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
RCC.TimSysFreq_Value=72000000
RCC.USBFreq_Value=72000000
RCC.TimSysFreq_Value=16000000
RCC.USBFreq_Value=16000000
RCC.VCOOutput2Freq_Value=8000000
SH.ADCx_IN1.0=ADC1_IN1,IN1
SH.ADCx_IN1.ConfNb=1
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_8
SPI1.CalculateBaudRate=9.0 MBits/s
SPI1.CalculateBaudRate=2.0 MBits/s
SPI1.Direction=SPI_DIRECTION_2LINES
SPI1.IPParameters=VirtualType,Mode,Direction,BaudRatePrescaler,CalculateBaudRate
SPI1.Mode=SPI_MODE_MASTER
SPI1.VirtualType=VM_MASTER
USART1.IPParameters=VirtualMode
USART1.VirtualMode=VM_ASYNC
VP_SYS_VS_ND.Mode=No_Debug
VP_SYS_VS_ND.Signal=SYS_VS_ND
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
board=custom
......@@ -76,6 +76,7 @@ int main(void)
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
......@@ -131,7 +132,7 @@ void SystemClock_Config(void)
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL2;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
......@@ -145,7 +146,7 @@ void SystemClock_Config(void)
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
{
Error_Handler();
}
......
......@@ -72,9 +72,9 @@ void HAL_MspInit(void)
/* System interrupt init*/
/** DISABLE: JTAG-DP Disabled and SW-DP Disabled
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
__HAL_AFIO_REMAP_SWJ_DISABLE();
__HAL_AFIO_REMAP_SWJ_NOJTAG();
/* USER CODE BEGIN MspInit 1 */
......
......@@ -68,7 +68,8 @@ menu "On-chip Peripheral Drivers"
default n
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -68,7 +68,8 @@ menu "On-chip Peripheral Drivers"
range 1 216
default 16
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -39,7 +39,8 @@ menu "On-chip Peripheral Drivers"
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -68,7 +68,8 @@ menu "On-chip Peripheral Drivers"
range 1 216
default 16
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -30,7 +30,8 @@ menu "On-chip Peripheral Drivers"
depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
default n
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -293,7 +293,8 @@ menu "On-chip Peripheral Drivers"
select RT_USING_SDIO
select RT_USING_DFS
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -68,7 +68,8 @@ menu "On-chip Peripheral Drivers"
range 1 216
default 25
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -127,7 +127,8 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_ON_CHIP_FLASH
bool "Enable on-chip FLASH"
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -218,6 +218,8 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_LTDC
bool
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -251,6 +251,8 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_FMC
bool
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -240,6 +240,8 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_LTDC
bool
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -30,7 +30,8 @@ menu "On-chip Peripheral Drivers"
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
default n
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -155,6 +155,8 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_LTDC
bool "Enable LTDC"
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -107,6 +107,8 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_LTDC
bool
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -244,7 +244,9 @@ menu "On-chip Peripheral Drivers"
select RT_USING_SDIO
select RT_USING_DFS
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -225,6 +225,8 @@ menuconfig BSP_USING_SPI
bool
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -54,7 +54,8 @@ menu "On-chip Peripheral Drivers"
depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
default n
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -167,7 +167,8 @@ menu "On-chip Peripheral Drivers"
bool "Enable Watchdog Timer"
select RT_USING_WDT
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -48,11 +48,12 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
# Memory Management
#
CONFIG_RT_USING_MEMPOOL=y
CONFIG_RT_USING_MEMHEAP=y
# CONFIG_RT_USING_MEMHEAP is not set
# CONFIG_RT_USING_NOHEAP is not set
# CONFIG_RT_USING_SMALL_MEM is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_HEAP=y
#
......@@ -64,8 +65,9 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x40001
CONFIG_RT_VER_NUM=0x40002
CONFIG_ARCH_ARM=y
CONFIG_RT_USING_CPU_FFS=y
CONFIG_ARCH_ARM_CORTEX_M=y
CONFIG_ARCH_ARM_CORTEX_M7=y
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
......@@ -125,7 +127,6 @@ CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_MTD is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
......@@ -133,6 +134,12 @@ CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
#
# Using Hardware Crypto drivers
#
# CONFIG_RT_USING_HWCRYPTO is not set
#
# Using WiFi
......@@ -161,14 +168,14 @@ CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_SAL is not set
#
# light weight TCP/IP stack
# Network interface device
#
# CONFIG_RT_USING_LWIP is not set
# CONFIG_RT_USING_NETDEV is not set
#
# Modbus master and slave stack
# light weight TCP/IP stack
#
# CONFIG_RT_USING_MODBUS is not set
# CONFIG_RT_USING_LWIP is not set
#
# AT commands
......@@ -183,7 +190,6 @@ CONFIG_RT_USING_PIN=y
#
# Utilities
#
# CONFIG_RT_USING_LOGTRACE is not set
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
......@@ -204,6 +210,7 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
......@@ -226,6 +233,7 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
#
......@@ -235,9 +243,13 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTKIT is not set
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
#
# security packages
......@@ -296,20 +308,25 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_AHT10 is not set
# CONFIG_PKG_USING_AP3216C is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_MPU6XXX is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
#
# miscellaneous packages
......@@ -325,6 +342,7 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
#
# samples: kernel and components samples
......@@ -336,6 +354,7 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_LIBANN is not set
CONFIG_SOC_FAMILY_STM32=y
CONFIG_SOC_SERIES_STM32H7=y
......@@ -358,6 +377,7 @@ CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART1=y
# CONFIG_BSP_USING_FMC is not set
# CONFIG_BSP_USING_LTDC is not set
# CONFIG_BSP_USING_ONCHIP_RTC is not set
#
# Board extended module Drivers
......
......@@ -58,7 +58,7 @@
| PWM | 暂不支持 | |
| USB Device | 暂不支持 | |
| USB Host | 暂不支持 | |
| IWG | 暂不支持 | |
| IWG | 支持 | |
## 使用说明
......
......@@ -5,10 +5,10 @@ SourcePath=D:/rt_thread_master/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Confi
SourceFiles=stm32h7xx_it.c;stm32h7xx_hal_msp.c;main.c;
[PreviousLibFiles]
LibFiles=Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_cortex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma2d.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_fmc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_sdram.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_ltdc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_ltdc_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dsi.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rtc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rtc_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_flash.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_flash_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_gpio.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_gpio_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_hsem.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_mdma.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_def.h;Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_i2c.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_i2c_ex.h;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma2d.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_fmc.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sdram.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dsi.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_hsem.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_cortex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma2d.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_fmc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_sdram.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_ltdc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_ltdc_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dsi.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rtc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rtc_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_flash.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_flash_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_gpio.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_gpio_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_hsem.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_mdma.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_def.h;Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_i2c.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_i2c_ex.h;Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h743xx.h;Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h7xx.h;Drivers/CMSIS/Device/ST/STM32H7xx/Include/system_stm32h7xx.h;Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/system_stm32h7xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/tz_context.h;
LibFiles=Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_cortex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma2d.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_fmc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_sdram.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_iwdg.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_ltdc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_ltdc_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dsi.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rtc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rtc_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_flash.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_flash_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_gpio.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_gpio_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_hsem.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_mdma.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_def.h;Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_i2c.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_i2c_ex.h;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma2d.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_fmc.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sdram.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_iwdg.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dsi.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_hsem.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_cortex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma2d.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_fmc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_sdram.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_iwdg.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_ltdc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_ltdc_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dsi.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rtc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rtc_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_flash.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_flash_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_gpio.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_gpio_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_hsem.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_mdma.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_def.h;Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_i2c.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_i2c_ex.h;Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h743xx.h;Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h7xx.h;Drivers/CMSIS/Device/ST/STM32H7xx/Include/system_stm32h7xx.h;Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/system_stm32h7xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/tz_context.h;
[PreviousUsedKeilFiles]
SourceFiles=..\Src\main.c;..\Src\stm32h7xx_it.c;..\Src\stm32h7xx_hal_msp.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma2d.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_fmc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sdram.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_ltdc_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dsi.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_hsem.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c;../\Src/system_stm32h7xx.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma2d.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_fmc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sdram.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_ltdc_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dsi.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_hsem.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c;../\Src/system_stm32h7xx.c;../Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/system_stm32h7xx.c;null;
SourceFiles=..\Src\main.c;..\Src\stm32h7xx_it.c;..\Src\stm32h7xx_hal_msp.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma2d.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_fmc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sdram.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_iwdg.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_ltdc_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dsi.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_hsem.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c;../\Src/system_stm32h7xx.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma2d.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_fmc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sdram.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_iwdg.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_ltdc_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dsi.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rtc_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_hsem.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c;../\Src/system_stm32h7xx.c;../Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/system_stm32h7xx.c;null;
HeaderPath=..\Drivers\STM32H7xx_HAL_Driver\Inc;..\Drivers\STM32H7xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32H7xx\Include;..\Drivers\CMSIS\Include;..\Inc;
CDefines=USE_HAL_DRIVER;STM32H743xx;USE_HAL_DRIVER;STM32H743xx;
......@@ -23,15 +23,16 @@ KeepUserPlacement=false
Mcu.Family=STM32H7
Mcu.IP0=CORTEX_M7
Mcu.IP1=DEBUG
Mcu.IP10=USART1
Mcu.IP2=DMA2D
Mcu.IP3=FMC
Mcu.IP4=LTDC
Mcu.IP5=NVIC
Mcu.IP6=RCC
Mcu.IP7=RTC
Mcu.IP8=SYS
Mcu.IP9=USART1
Mcu.IPNb=10
Mcu.IP4=IWDG1
Mcu.IP5=LTDC
Mcu.IP6=NVIC
Mcu.IP7=RCC
Mcu.IP8=RTC
Mcu.IP9=SYS
Mcu.IPNb=11
Mcu.Name=STM32H743IITx
Mcu.Package=LQFP176
Mcu.Pin0=PC13
......@@ -100,12 +101,13 @@ Mcu.Pin65=PI5
Mcu.Pin66=PI6
Mcu.Pin67=PI7
Mcu.Pin68=VP_DMA2D_VS_DMA2D
Mcu.Pin69=VP_RTC_VS_RTC_Activate
Mcu.Pin69=VP_IWDG1_VS_IWDG
Mcu.Pin7=PF2
Mcu.Pin70=VP_SYS_VS_Systick
Mcu.Pin70=VP_RTC_VS_RTC_Activate
Mcu.Pin71=VP_SYS_VS_Systick
Mcu.Pin8=PF3
Mcu.Pin9=PF4
Mcu.PinsNb=71
Mcu.PinsNb=72
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32H743IITx
......@@ -273,7 +275,7 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=MDK-ARM V5
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_FMC_Init-FMC-false-HAL-true,6-MX_DMA2D_Init-DMA2D-false-HAL-true,7-MX_LTDC_Init-LTDC-false-HAL-true,8-MX_RTC_Init-RTC-false-HAL-true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_FMC_Init-FMC-false-HAL-true,6-MX_DMA2D_Init-DMA2D-false-HAL-true,7-MX_LTDC_Init-LTDC-false-HAL-true,8-MX_RTC_Init-RTC-false-HAL-true,9-MX_IWDG1_Init-IWDG1-false-HAL-true
RCC.ADCFreq_Value=50390625
RCC.AHB12Freq_Value=200000000
RCC.AHB4Freq_Value=200000000
......@@ -435,6 +437,8 @@ USART1.IPParameters=VirtualMode-Asynchronous
USART1.VirtualMode-Asynchronous=VM_ASYNC
VP_DMA2D_VS_DMA2D.Mode=DMA2D_Activate
VP_DMA2D_VS_DMA2D.Signal=DMA2D_VS_DMA2D
VP_IWDG1_VS_IWDG.Mode=IWDG_Activate
VP_IWDG1_VS_IWDG.Signal=IWDG1_VS_IWDG
VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
VP_SYS_VS_Systick.Mode=SysTick
......
......@@ -54,7 +54,7 @@
/* #define HAL_OPAMP_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_SMBUS_MODULE_ENABLED */
/* #define HAL_IWDG_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED
/* #define HAL_LPTIM_MODULE_ENABLED */
#define HAL_LTDC_MODULE_ENABLED
/* #define HAL_QSPI_MODULE_ENABLED */
......
......@@ -65,6 +65,8 @@
DMA2D_HandleTypeDef hdma2d;
IWDG_HandleTypeDef hiwdg1;
LTDC_HandleTypeDef hltdc;
RTC_HandleTypeDef hrtc;
......@@ -85,6 +87,7 @@ static void MX_FMC_Init(void);
static void MX_DMA2D_Init(void);
static void MX_LTDC_Init(void);
static void MX_RTC_Init(void);
static void MX_IWDG1_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
......@@ -134,6 +137,7 @@ int main(void)
MX_DMA2D_Init();
MX_LTDC_Init();
MX_RTC_Init();
MX_IWDG1_Init();
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
......@@ -176,9 +180,11 @@ void SystemClock_Config(void)
__HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSE);
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE
|RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 5;
......@@ -258,6 +264,35 @@ static void MX_DMA2D_Init(void)
}
/**
* @brief IWDG1 Initialization Function
* @param None
* @retval None
*/
static void MX_IWDG1_Init(void)
{
/* USER CODE BEGIN IWDG1_Init 0 */
/* USER CODE END IWDG1_Init 0 */
/* USER CODE BEGIN IWDG1_Init 1 */
/* USER CODE END IWDG1_Init 1 */
hiwdg1.Instance = IWDG1;
hiwdg1.Init.Prescaler = IWDG_PRESCALER_4;
hiwdg1.Init.Window = 4095;
hiwdg1.Init.Reload = 4095;
if (HAL_IWDG_Init(&hiwdg1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN IWDG1_Init 2 */
/* USER CODE END IWDG1_Init 2 */
}
/**
* @brief LTDC Initialization Function
* @param None
......
......@@ -63,6 +63,14 @@ menu "On-chip Peripheral Drivers"
endchoice
endif
config BSP_USING_WDT
bool "Enable Watchdog Timer"
select RT_USING_WDT
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -33,9 +33,11 @@ void SystemClock_Config(void)
__HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSE);
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE
|RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 5;
......
......@@ -20,6 +20,10 @@
extern "C" {
#endif
#if !defined (LSI_VALUE)
#define LSI_VALUE ((uint32_t)32000)
#endif
#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000)
#define STM32_FLASH_SIZE (2048 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
......
......@@ -17,16 +17,16 @@ int mpu_init(void)
/* Disable the MPU */
HAL_MPU_Disable();
/* Configure the MPU attributes as WB for AXI SRAM */
/* Configure the MPU attributes as WT for AXI SRAM */
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
MPU_InitStruct.BaseAddress = 0x24000000;
MPU_InitStruct.Size = MPU_REGION_SIZE_512KB;
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
MPU_InitStruct.Number = MPU_REGION_NUMBER0;
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
MPU_InitStruct.SubRegionDisable = 0X00;
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
......
......@@ -28,7 +28,7 @@
<TargetOption>
<CLKADS>12000000</CLKADS>
<OPTTT>
<gFlags>0</gFlags>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
......@@ -77,7 +77,7 @@
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>0</CpuCode>
<CpuCode>18</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
......@@ -101,7 +101,7 @@
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<nTsel>0</nTsel>
<nTsel>5</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
......@@ -112,7 +112,7 @@
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>BIN\UL2CM3.DLL</pMon>
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
......
......@@ -333,7 +333,7 @@
<MiscControls />
<Define>USE_HAL_DRIVER, STM32H743xx</Define>
<Undefine />
<IncludePath>.;..\..\..\include;board;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m7;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Inc;..\libraries\STM32H7xx_HAL\CMSIS\Device\ST\STM32H7xx\Include;..\libraries\STM32H7xx_HAL\CMSIS\Include</IncludePath>
<IncludePath>.;..\..\..\include;board;board\CubeMX_Config\Inc;board\ports;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m7;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Inc;..\libraries\STM32H7xx_HAL\CMSIS\Device\ST\STM32H7xx\Include;..\libraries\STM32H7xx_HAL\CMSIS\Include</IncludePath>
</VariousControls>
</Cads>
<Aads>
......@@ -501,6 +501,13 @@
<FilePath>board\board.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>drv_mpu.c</FileName>
<FileType>1</FileType>
<FilePath>board\drv_mpu.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32h7xx_hal_msp.c</FileName>
......@@ -560,6 +567,13 @@
<FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cpu_cache.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\cortex-m7\cpu_cache.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cpuport.c</FileName>
......@@ -765,6 +779,13 @@
<FilePath>..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma_ex.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32h7xx_hal_mdma.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_mdma.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32h7xx_hal_pwr.c</FileName>
......
......@@ -29,8 +29,7 @@
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_MEMHEAP
#define RT_USING_MEMHEAP_AS_HEAP
#define RT_USING_SMALL_MEM
#define RT_USING_HEAP
/* Kernel Device Object */
......@@ -39,8 +38,9 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x40001
#define RT_VER_NUM 0x40002
#define ARCH_ARM
#define RT_USING_CPU_FFS
#define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M7
......@@ -82,6 +82,9 @@
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
/* Using Hardware Crypto drivers */
/* Using WiFi */
......@@ -96,10 +99,10 @@
/* Socket abstraction layer */
/* light weight TCP/IP stack */
/* Network interface device */
/* Modbus master and slave stack */
/* light weight TCP/IP stack */
/* AT commands */
......
......@@ -101,6 +101,8 @@
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>5</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
......@@ -115,6 +117,11 @@
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>ST-LINKIII-KEIL_SWO</Key>
<Name>-U -O206 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(6BA02477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32H7x_2048.FLM -FS08000000 -FL0200000 -FP0($$Device:STM32H743IITx$CMSIS\Flash\STM32H7x_2048.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
......@@ -166,6 +173,7 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
......
......@@ -16,8 +16,8 @@
<TargetCommonOption>
<Device>STM32H743IITx</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32H7xx_DFP.2.1.0</PackID>
<PackURL>http://www.keil.com/pack</PackURL>
<PackID>Keil.STM32H7xx_DFP.2.3.0</PackID>
<PackURL>https://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x24000000,0x00080000) IROM(0x08000000,0x00200000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
......@@ -138,7 +138,7 @@
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3></Flash3>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
......@@ -184,6 +184,7 @@
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>3</RvdsVP>
<RvdsMve>0</RvdsMve>
<hadIRAM2>1</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
......@@ -208,7 +209,7 @@
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im1Chk>0</Im1Chk>
<Im2Chk>1</Im2Chk>
<OnChipMemories>
<Ocm1>
......@@ -324,6 +325,7 @@
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
......
......@@ -35,7 +35,8 @@ menu "On-chip Peripheral Drivers"
depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
default n
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -61,7 +61,8 @@ menu "On-chip Peripheral Drivers"
bool "Enable Watchdog Timer"
select RT_USING_WDT
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -77,7 +77,8 @@ menu "On-chip Peripheral Drivers"
range 1 176
default 16
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -250,7 +250,9 @@ menu "On-chip Peripheral Drivers"
bool "Enable OTGFS as USB device"
select RT_USING_USB_DEVICE
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -30,6 +30,8 @@ menu "On-chip Peripheral Drivers"
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
default n
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -105,6 +105,8 @@ menu "On-chip Peripheral Drivers"
endchoice
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -218,7 +218,9 @@ menu "On-chip Peripheral Drivers"
bool "Enable Watchdog Timer"
select RT_USING_WDT
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
......@@ -88,7 +88,8 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_FMC
bool
default n
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
......
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2017-11-11 enkiller first version
*/
#include <board.h>
#include <rtthread.h>
#include <rtdevice.h>
......@@ -132,13 +142,17 @@ int io_realboard_v2(void)
gpio_direction_output(AUDIO_SHUTDOWN_PORT,AUDIO_SHUTDOWN_PIN, AUDIO_SHUTDOWN_MUTE);
gpio_set_value(AUDIO_SHUTDOWN_PORT,AUDIO_SHUTDOWN_PIN, AUDIO_SHUTDOWN_MUTE);
/* Reset lcd,TP,... */
#ifdef RT_USING_TOUCH
/* Reset LCD */
gpio_direction_output(LCD_TP_INT_PORT, LCD_TP_INT_PIN,1);
_delay_ms(300);
#endif
#ifdef RT_USING_SLCD
/* Reset TP */
gpio_direction_output(LCD_RST_PORT, LCD_RST_PIN,0);
_delay_ms(100);
gpio_set_value(LCD_RST_PORT, LCD_RST_PIN, 1);
#endif
/* LED */
gpio_direction_output(BLINK_LED0_PORT, BLINK_LED0_PIN,1);
......@@ -146,7 +160,6 @@ int io_realboard_v2(void)
gpio_direction_output(BLINK_LED2_PORT, BLINK_LED2_PIN,1);
gpio_direction_output(BLINK_LED3_PORT, BLINK_LED3_PIN,1);
return 0;
}
INIT_BOARD_EXPORT(io_realboard_v2);
......
/*
* File : drv_mmc.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2013 - 2015, RT-Thread Development Team
* Copyright (c) 2006-2019, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2013-03-09 aozima the first version
* 2013-03-29 aozima support Jz4770.
* 2013-04-01 aozima add interrupt support for Jz4770.
* 2013-03-29 aozima support JZ4770.
* 2013-04-01 aozima add interrupt support for JZ4770.
* 2019-04-04 Jean-Luc fix bug in jzmmc_submit_dma.
*/
#include <rthw.h>
......@@ -275,7 +272,7 @@ rt_inline void jzmmc_submit_dma(struct jzmmc_host *host, struct rt_mmcsd_data *d
host->dma_desc.nda = 0;
host->dma_desc.len = data->blks * data->blksize;
host->dma_desc.da = virt_to_phys(data->buf);
host->dma_desc.dcmd = DMACMD_ENDI | DMACMD_LINK; /* only one DMA descriptor */
host->dma_desc.dcmd = DMACMD_ENDI; /* only one DMA descriptor */
#ifdef DMA_BUFFER
if ((uint32_t)(data->buf) & (DMA_ALIGN - 1))
......
/*
* File : x1000_ram.lds
* COPYRIGHT (C) 2015, RT-Thread Development Team
* Copyright (c) 2006-2019, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* 2015-12-12 bernard first version
* Date Author Notes
* 2015-12-12 bernard first version
* 2019-04-04 Jean-Luc add support for large number of sections.
*/
OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips")
......@@ -43,6 +32,11 @@ SECTIONS
.text :
{
*(.text.unlikely .text.*_unlikely .text.unlikely.*)
*(.text.exit .text.exit.*)
*(.text.startup .text.startup.*)
*(.text.hot .text.hot.*)
*(.text .stub .text.* .gnu.linkonce.t.*)
*(.text) /* remaining code */
*(.text.*) /* remaining code */
*(.rodata) /* read-only data (constants) */
......@@ -87,6 +81,12 @@ SECTIONS
} > DRAM
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } > DRAM
. = ALIGN(4);
.gnu_extab :
{
*(.gnu_extab.*)
} > DRAM
. = ALIGN(4);
.ctors :
{
......
......@@ -254,9 +254,8 @@ config RT_USING_TOUCH
bool "Using Touch device drivers"
default n
menu "Using Hardware Crypto drivers"
config RT_USING_HWCRYPTO
bool "Using Hardware Crypto"
menuconfig RT_USING_HWCRYPTO
bool "Using Hardware Crypto drivers"
default n
if RT_USING_HWCRYPTO
......@@ -420,69 +419,120 @@ menu "Using Hardware Crypto drivers"
default n
endif
endif
endmenu
menu "Using WiFi"
config RT_USING_WIFI
bool "Using Wi-Fi framework"
default n
menuconfig RT_USING_WIFI
bool "Using Wi-Fi framework"
default n
if RT_USING_WIFI
config RT_WLAN_DEVICE_STA_NAME
string "The WiFi device name for station"
string "The device name for station"
default "wlan0"
config RT_WLAN_DEVICE_AP_NAME
string "The WiFi device name for ap"
string "The device name for ap"
default "wlan1"
config RT_WLAN_DEFAULT_PROT
string "Default transport protocol"
default "lwip"
config RT_WLAN_SCAN_WAIT_MS
int "Set scan timeout time(ms)"
default 10000
config RT_WLAN_CONNECT_WAIT_MS
int "Set connect timeout time(ms)"
default 10000
config RT_WLAN_SSID_MAX_LENGTH
int "SSID name maximum length"
int "SSID maximum length"
default 32
config RT_WLAN_PASSWORD_MAX_LENGTH
int "Maximum password length"
int "Password maximum length"
default 32
config RT_WLAN_SCAN_SORT
bool "Automatic sorting of scan results"
config RT_WLAN_DEV_EVENT_NUM
int "Driver events maxcount"
default 2
config RT_WLAN_MANAGE_ENABLE
bool "Connection management Enable"
default y
config RT_WLAN_CFG_INFO_MAX
int "Maximum number of WiFi information automatically saved"
default 3
if RT_WLAN_MANAGE_ENABLE
config RT_WLAN_SCAN_WAIT_MS
int "Set scan timeout time(ms)"
default 10000
config RT_WLAN_WORKQUEUE_THREAD_NAME
string "WiFi work queue thread name"
default "wlan_job"
config RT_WLAN_CONNECT_WAIT_MS
int "Set connect timeout time(ms)"
default 10000
config RT_WLAN_WORKQUEUE_THREAD_SIZE
int "wifi work queue thread size"
default 2048
config RT_WLAN_SCAN_SORT
bool "Automatic sorting of scan results"
default y
config RT_WLAN_WORKQUEUE_THREAD_PRIO
int "WiFi work queue thread priority"
default 22
config RT_WLAN_MSH_CMD_ENABLE
bool "MSH command Enable"
default y
config RT_WLAN_DEV_EVENT_NUM
int "Maximum number of driver events"
default 2
config RT_WLAN_AUTO_CONNECT_ENABLE
bool "Auto connect Enable"
select RT_WLAN_CFG_ENABLE
select RT_WLAN_WORK_THREAD_ENABLE
default y
endif
config RT_WLAN_PROT_LWIP_PBUF_FORCE
bool "Forced use of PBUF transmission"
default n
config RT_WLAN_CFG_ENABLE
bool "WiFi information automatically saved Enable"
default y
if RT_WLAN_CFG_ENABLE
config RT_WLAN_CFG_INFO_MAX
int "Maximum number of WiFi information automatically saved"
default 3
endif
config RT_WLAN_PROT_ENABLE
bool "Transport protocol manage Enable"
default y
if RT_WLAN_PROT_ENABLE
config RT_WLAN_PROT_NAME_LEN
int "Transport protocol name length"
default 8
config RT_WLAN_PROT_MAX
int "Transport protocol maxcount"
default 2
config RT_WLAN_DEFAULT_PROT
string "Default transport protocol"
default "lwip"
config RT_WLAN_PROT_LWIP_ENABLE
bool "LWIP transport protocol Enable"
select RT_USING_LWIP
default y
if RT_WLAN_PROT_LWIP_ENABLE
config RT_WLAN_PROT_LWIP_NAME
string "LWIP transport protocol name"
default "lwip"
config RT_WLAN_PROT_LWIP_PBUF_FORCE
bool "Forced use of PBUF transmission"
default n
endif
endif
config RT_WLAN_WORK_THREAD_ENABLE
bool "WLAN work queue thread Enable"
default y
if RT_WLAN_WORK_THREAD_ENABLE
config RT_WLAN_WORKQUEUE_THREAD_NAME
string "WLAN work queue thread name"
default "wlan"
config RT_WLAN_WORKQUEUE_THREAD_SIZE
int "WLAN work queue thread size"
default 2048
config RT_WLAN_WORKQUEUE_THREAD_PRIO
int "WLAN work queue thread priority"
default 15
endif
menuconfig RT_WLAN_DEBUG
bool "Enable WLAN Debugging Options"
......@@ -514,7 +564,6 @@ menu "Using WiFi"
default n
endif
endif
endmenu
menu "Using USB"
config RT_USING_USB_HOST
......
......@@ -22,7 +22,7 @@ rt_inline rt_err_t hwcrypto_bignum_dev_is_init(void)
{
return RT_EOK;
}
dev = rt_hwcrypto_dev_dufault();
dev = rt_hwcrypto_dev_default();
if (dev == RT_NULL)
{
return -RT_ERROR;
......
......@@ -103,8 +103,8 @@ rt_uint32_t rt_hwcrypto_rng_update(void)
/* Default device does not exist ? */
if (ctx_default == RT_NULL)
{
/* try create Context from dufault device */
rt_hwcrypto_rng_default(rt_hwcrypto_dev_dufault());
/* try create Context from default device */
rt_hwcrypto_rng_default(rt_hwcrypto_dev_default());
}
return rt_hwcrypto_rng_update_ctx(ctx_default);
}
......@@ -171,7 +171,7 @@ rt_err_t rt_hwcrypto_ctx_cpy(struct rt_hwcrypto_ctx *des, const struct rt_hwcryp
* @return Hardware crypto device
*
*/
struct rt_hwcrypto_device *rt_hwcrypto_dev_dufault(void)
struct rt_hwcrypto_device *rt_hwcrypto_dev_default(void)
{
static struct rt_hwcrypto_device *hwcrypto_dev;
......
......@@ -175,7 +175,7 @@ rt_err_t rt_hwcrypto_register(struct rt_hwcrypto_device *device, const char *nam
* @return Hardware crypto device
*
*/
struct rt_hwcrypto_device *rt_hwcrypto_dev_dufault(void);
struct rt_hwcrypto_device *rt_hwcrypto_dev_default(void);
/**
* @brief Get the unique ID of the device
......
......@@ -4,8 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2015-06-15 hichard first version
* Date Author Notes
* 2015-06-15 hichard first version
*/
#include <drivers/mmcsd_core.h>
......@@ -182,6 +182,8 @@ static int mmc_get_ext_csd(struct rt_mmcsd_card *card, rt_uint8_t **new_ext_csd)
*/
static int mmc_parse_ext_csd(struct rt_mmcsd_card *card, rt_uint8_t *ext_csd)
{
rt_uint64_t card_capacity = 0;
if(card == RT_NULL || ext_csd == RT_NULL)
{
LOG_E("emmc parse ext csd fail, invaild args");
......@@ -191,9 +193,10 @@ static int mmc_parse_ext_csd(struct rt_mmcsd_card *card, rt_uint8_t *ext_csd)
card->flags |= CARD_FLAG_HIGHSPEED;
card->hs_max_data_rate = 200000000;
card->card_capacity = *((rt_uint32_t *)&ext_csd[EXT_CSD_SEC_CNT]);
card->card_capacity *= card->card_blksize;
card->card_capacity >>= 10; /* unit:KB */
card_capacity = *((rt_uint32_t *)&ext_csd[EXT_CSD_SEC_CNT]);
card_capacity *= card->card_blksize;
card_capacity >>= 10; /* unit:KB */
card->card_capacity = card_capacity;
LOG_I("emmc card capacity %d KB.", card->card_capacity);
return 0;
......
......@@ -55,6 +55,7 @@ extern "C" {
#define RT_SENSOR_VENDOR_SEMTECH (4) /* Semtech */
#define RT_SENSOR_VENDOR_GOERTEK (5) /* Goertek */
#define RT_SENSOR_VENDOR_MIRAMEMS (6) /* MiraMEMS */
#define RT_SENSOR_VENDOR_DALLAS (7) /* Dallas */
/* Sensor unit types */
......
......@@ -4,8 +4,9 @@
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-01-31 flybreak first version
* Date Author Notes
* 2019-01-31 flybreak first version
* 2019-07-16 WillianChan Increase the output of sensor information
*/
#include "sensor.h"
......@@ -268,13 +269,88 @@ static void sensor(int argc, char **argv)
else if (!strcmp(argv[1], "info"))
{
struct rt_sensor_info info;
if (dev == RT_NULL)
{
LOG_W("Please probe sensor device first!");
return ;
}
rt_device_control(dev, RT_SENSOR_CTRL_GET_INFO, &info);
rt_kprintf("vendor :%d\n", info.vendor);
rt_kprintf("model :%s\n", info.model);
rt_kprintf("unit :%d\n", info.unit);
switch (info.vendor)
{
case RT_SENSOR_VENDOR_UNKNOWN:
rt_kprintf("vendor :unknown vendor\n");
break;
case RT_SENSOR_VENDOR_STM:
rt_kprintf("vendor :STMicroelectronics\n");
break;
case RT_SENSOR_VENDOR_BOSCH:
rt_kprintf("vendor :Bosch\n");
break;
case RT_SENSOR_VENDOR_INVENSENSE:
rt_kprintf("vendor :Invensense\n");
break;
case RT_SENSOR_VENDOR_SEMTECH:
rt_kprintf("vendor :Semtech\n");
break;
case RT_SENSOR_VENDOR_GOERTEK:
rt_kprintf("vendor :Goertek\n");
break;
case RT_SENSOR_VENDOR_MIRAMEMS:
rt_kprintf("vendor :MiraMEMS\n");
break;
case RT_SENSOR_VENDOR_DALLAS:
rt_kprintf("vendor :Dallas\n");
break;
}
rt_kprintf("model :%s\n", info.model);
switch (info.unit)
{
case RT_SENSOR_UNIT_NONE:
rt_kprintf("unit :none\n");
break;
case RT_SENSOR_UNIT_MG:
rt_kprintf("unit :mG\n");
break;
case RT_SENSOR_UNIT_MDPS:
rt_kprintf("unit :mdps\n");
break;
case RT_SENSOR_UNIT_MGAUSS:
rt_kprintf("unit :mGauss\n");
break;
case RT_SENSOR_UNIT_LUX:
rt_kprintf("unit :lux\n");
break;
case RT_SENSOR_UNIT_CM:
rt_kprintf("unit :cm\n");
break;
case RT_SENSOR_UNIT_PA:
rt_kprintf("unit :pa\n");
break;
case RT_SENSOR_UNIT_PERMILLAGE:
rt_kprintf("unit :permillage\n");
break;
case RT_SENSOR_UNIT_DCELSIUS:
rt_kprintf("unit :Celsius\n");
break;
case RT_SENSOR_UNIT_HZ:
rt_kprintf("unit :HZ\n");
break;
case RT_SENSOR_UNIT_ONE:
rt_kprintf("unit :1\n");
break;
case RT_SENSOR_UNIT_BPM:
rt_kprintf("unit :bpm\n");
break;
case RT_SENSOR_UNIT_MM:
rt_kprintf("unit :mm\n");
break;
case RT_SENSOR_UNIT_MN:
rt_kprintf("unit :mN\n");
break;
}
rt_kprintf("range_max :%d\n", info.range_max);
rt_kprintf("range_min :%d\n", info.range_min);
rt_kprintf("period_min:%d\n", info.period_min);
rt_kprintf("period_min:%dms\n", info.period_min);
rt_kprintf("fifo_max :%d\n", info.fifo_max);
}
else if (!strcmp(argv[1], "read"))
......
......@@ -372,7 +372,7 @@ const static char* _ustring[] =
"Interface",
};
static void dump_data(uint8_t *data, rt_size_t size)
static void dump_data(rt_uint8_t *data, rt_size_t size)
{
rt_size_t i;
for (i = 0; i < size; i++)
......
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd]
src = Split('''
wlan_dev.c
''')
if GetDepend(['RT_WLAN_MANAGE_ENABLE']):
src += ['wlan_mgnt.c']
if GetDepend(['RT_WLAN_MSH_CMD_ENABLE']):
src += ['wlan_cmd.c']
if GetDepend(['RT_WLAN_PROT_ENABLE']):
src += ['wlan_prot.c']
if GetDepend(['RT_WLAN_PROT_LWIP_ENABLE']):
src += ['wlan_lwip.c']
if GetDepend(['RT_WLAN_CFG_ENABLE']):
src += ['wlan_cfg.c']
if GetDepend(['RT_WLAN_WORK_THREAD_ENABLE']):
src += ['wlan_workqueue.c']
group = DefineGroup('DeviceDrivers', src, depend = ['RT_USING_WIFI'], CPPPATH = CPPPATH)
Return('group')
......@@ -19,6 +19,8 @@
#endif /* RT_WLAN_CFG_DEBUG */
#include <rtdbg.h>
#ifdef RT_WLAN_CFG_ENABLE
#define WLAN_CFG_LOCK() (rt_mutex_take(&cfg_mutex, RT_WAITING_FOREVER))
#define WLAN_CFG_UNLOCK() (rt_mutex_release(&cfg_mutex))
......@@ -462,3 +464,5 @@ void rt_wlan_cfg_dump(void)
rt_kprintf("%3d \n", info->channel);
}
}
#endif
......@@ -13,6 +13,8 @@
#include <wlan_cfg.h>
#include <wlan_prot.h>
#if defined(RT_WLAN_MANAGE_ENABLE) && defined(RT_WLAN_MSH_CMD_ENABLE)
struct wifi_cmd_des
{
const char *cmd;
......@@ -75,7 +77,7 @@ static int wifi_help(int argc, char *argv[])
{
rt_kprintf("wifi\n");
rt_kprintf("wifi help\n");
rt_kprintf("wifi scan\n");
rt_kprintf("wifi scan [SSID]\n");
rt_kprintf("wifi join [SSID] [PASSWORD]\n");
rt_kprintf("wifi ap SSID [PASSWORD]\n");
rt_kprintf("wifi disc\n");
......@@ -143,12 +145,23 @@ static int wifi_status(int argc, char *argv[])
static int wifi_scan(int argc, char *argv[])
{
struct rt_wlan_scan_result *scan_result = RT_NULL;
struct rt_wlan_info *info = RT_NULL;
struct rt_wlan_info filter;
if (argc > 2)
if (argc > 3)
return -1;
if (argc == 3)
{
INVALID_INFO(&filter);
SSID_SET(&filter, argv[2]);
info = &filter;
}
/* clean scan result */
rt_wlan_scan_result_clean();
/* scan ap info */
scan_result = rt_wlan_scan_sync();
scan_result = rt_wlan_scan_with_info(info);
if (scan_result)
{
int index, num;
......@@ -224,8 +237,10 @@ static int wifi_join(int argc, char *argv[])
const char *key = RT_NULL;
struct rt_wlan_cfg_info cfg_info;
rt_memset(&cfg_info, 0, sizeof(cfg_info));
if (argc == 2)
{
#ifdef RT_WLAN_CFG_ENABLE
/* get info to connect */
if (rt_wlan_cfg_read_index(&cfg_info, 0) == 1)
{
......@@ -234,8 +249,9 @@ static int wifi_join(int argc, char *argv[])
key = (char *)(&cfg_info.key.val[0]);
}
else
#endif
{
rt_kprintf("not find info\n");
rt_kprintf("not find connect info\n");
}
}
else if (argc == 3)
......@@ -387,8 +403,9 @@ static int wifi_debug_save_cfg(int argc, char *argv[])
rt_memcpy(&cfg_info.key.val[0], password, len);
cfg_info.key.len = len;
}
#ifdef RT_WLAN_CFG_ENABLE
rt_wlan_cfg_save(&cfg_info);
#endif
return 0;
}
......@@ -396,7 +413,9 @@ static int wifi_debug_dump_cfg(int argc, char *argv[])
{
if (argc == 1)
{
#ifdef RT_WLAN_CFG_ENABLE
rt_wlan_cfg_dump();
#endif
}
else
{
......@@ -409,8 +428,10 @@ static int wifi_debug_clear_cfg(int argc, char *argv[])
{
if (argc == 1)
{
#ifdef RT_WLAN_CFG_ENABLE
rt_wlan_cfg_delete_all();
rt_wlan_cfg_cache_save();
#endif
}
else
{
......@@ -564,3 +585,5 @@ static int wifi_msh(int argc, char *argv[])
#if defined(RT_USING_FINSH) && defined(FINSH_USING_MSH)
FINSH_FUNCTION_EXPORT_ALIAS(wifi_msh, __cmd_wifi, wifi command.);
#endif
#endif
......@@ -21,6 +21,8 @@
#endif /* RT_WLAN_DEV_DEBUG */
#include <rtdbg.h>
#if defined(RT_USING_WIFI) || defined(RT_USING_WLAN)
#ifndef RT_DEVICE
#define RT_DEVICE(__device) ((rt_device_t)__device)
#endif
......@@ -56,6 +58,17 @@ rt_err_t rt_wlan_dev_init(struct rt_wlan_device *device, rt_wlan_mode_t mode)
return -RT_ERROR;
}
if (mode == RT_WLAN_AP && device->flags & RT_WLAN_FLAG_STA_ONLY)
{
LOG_E("F:%s L:%d This wlan device can only be set to sta mode!", __FUNCTION__, __LINE__);
return -RT_ERROR;
}
else if (mode == RT_WLAN_STATION && device->flags & RT_WLAN_FLAG_AP_ONLY)
{
LOG_E("F:%s L:%d This wlan device can only be set to ap mode!", __FUNCTION__, __LINE__);
return -RT_ERROR;
}
result = rt_device_init(RT_DEVICE(device));
if (result != RT_EOK)
{
......@@ -545,7 +558,11 @@ rt_err_t rt_wlan_dev_scan_stop(struct rt_wlan_device *device)
rt_err_t rt_wlan_dev_report_data(struct rt_wlan_device *device, void *buff, int len)
{
#ifdef RT_WLAN_PROT_ENABLE
return rt_wlan_dev_transfer_prot(device, buff, len);
#else
return -RT_ERROR;
#endif
}
static rt_err_t _rt_wlan_dev_init(rt_device_t dev)
......@@ -768,14 +785,15 @@ rt_err_t rt_wlan_dev_register(struct rt_wlan_device *wlan, const char *name, con
{
rt_err_t err = RT_EOK;
if ((wlan == RT_NULL) || (name == RT_NULL) || (ops == RT_NULL))
if ((wlan == RT_NULL) || (name == RT_NULL) || (ops == RT_NULL) ||
(flag & RT_WLAN_FLAG_STA_ONLY && flag & RT_WLAN_FLAG_AP_ONLY))
{
LOG_E("F:%s L:%d parameter Wrongful", __FUNCTION__, __LINE__);
return RT_NULL;
}
rt_memset(wlan, 0, sizeof(struct rt_wlan_device));
#ifdef RT_USING_DEVICE_OPS
wlan->device.ops = &wlan_ops;
#else
......@@ -801,3 +819,5 @@ rt_err_t rt_wlan_dev_register(struct rt_wlan_device *wlan, const char *name, con
return err;
}
#endif
......@@ -381,6 +381,11 @@ typedef struct rt_wlan_key rt_wlan_key_t;
(_info)->channel = -1; \
} while(0)
#define SSID_SET(_info, _ssid) do { \
rt_strncpy((char *)(_info)->ssid.val, (_ssid), RT_WLAN_SSID_MAX_LENGTH); \
(_info)->ssid.len = rt_strlen((char *)(_info)->ssid.val); \
} while(0)
struct rt_wlan_info
{
/* security type */
......@@ -442,6 +447,7 @@ struct rt_wlan_device
rt_wlan_pormisc_callback_t pormisc_callback;
const struct rt_wlan_dev_ops *ops;
rt_uint32_t flags;
struct netdev *netdev;
void *prot;
void *user_data;
};
......
......@@ -14,12 +14,17 @@
#include <wlan_prot.h>
#include <wlan_workqueue.h>
#if defined(RT_WLAN_PROT_ENABLE) && defined(RT_WLAN_PROT_LWIP_ENABLE)
#ifdef RT_USING_LWIP
#include <netif/ethernetif.h>
#include <lwip/netifapi.h>
#ifdef LWIP_USING_DHCPD
#include <dhcp_server.h>
#endif
#ifdef RT_USING_NETDEV
#include <netdev.h>
#endif
#define DBG_TAG "WLAN.lwip"
#ifdef RT_WLAN_LWIP_DEBUG
......@@ -33,6 +38,10 @@
#define IPADDR_STRLEN_MAX (32)
#endif
#ifndef RT_WLAN_PROT_LWIP_NAME
#define RT_WLAN_PROT_LWIP_NAME ("lwip")
#endif
struct lwip_prot_des
{
struct rt_wlan_prot prot;
......@@ -100,12 +109,16 @@ static void netif_is_ready(struct rt_work *work, void *parameter)
LOG_I("Got IP address : %s", str);
exit:
level = rt_hw_interrupt_disable();
rt_memset(work, 0, sizeof(struct rt_work));
if (work)
{
rt_memset(work, 0, sizeof(struct rt_work));
}
rt_hw_interrupt_enable(level);
}
static void timer_callback(void *parameter)
{
#ifdef RT_WLAN_WORK_THREAD_ENABLE
struct rt_workqueue *workqueue;
struct rt_wlan_device *wlan = parameter;
struct lwip_prot_des *lwip_prot = (struct lwip_prot_des *)wlan->prot;
......@@ -125,6 +138,10 @@ static void timer_callback(void *parameter)
rt_hw_interrupt_enable(level);
}
}
#else
netif_is_ready(RT_NULL, parameter);
#endif
}
static void netif_set_connected(void *parameter)
......@@ -238,8 +255,11 @@ static void rt_wlan_lwip_event_handle(struct rt_wlan_prot *port, struct rt_wlan_
}
if (flag_old != lwip_prot->connected_flag)
{
#ifdef RT_WLAN_WORK_THREAD_ENABLE
rt_wlan_workqueue_dowork(netif_set_connected, wlan);
// netif_set_connected(wlan);
#else
netif_set_connected(wlan);
#endif
}
}
......@@ -460,7 +480,9 @@ static struct rt_wlan_prot *rt_wlan_lwip_protocol_register(struct rt_wlan_prot *
}
netif_set_up(eth->netif);
LOG_I("eth device init ok name:%s", eth_name);
#ifdef RT_USING_NETDEV
wlan->netdev = netdev_get_by_name(eth_name);
#endif
return &lwip_prot->prot;
}
......@@ -483,7 +505,7 @@ int rt_wlan_lwip_init(void)
rt_wlan_prot_event_t event;
rt_memset(&prot, 0, sizeof(prot));
rt_strncpy(&prot.name[0], RT_WLAN_PROT_LWIP, RT_WLAN_PROT_NAME_LEN);
rt_strncpy(&prot.name[0], RT_WLAN_PROT_LWIP_NAME, RT_WLAN_PROT_NAME_LEN);
prot.ops = &ops;
if (rt_wlan_prot_regisetr(&prot) != RT_EOK)
......@@ -502,3 +524,4 @@ int rt_wlan_lwip_init(void)
INIT_PREV_EXPORT(rt_wlan_lwip_init);
#endif
#endif
此差异已折叠。
......@@ -37,6 +37,10 @@ extern "C" {
#define RT_WLAN_EBOX_NUM (10)
#endif
#ifndef RT_WLAN_SCAN_RETRY_CNT
#define RT_WLAN_SCAN_RETRY_CNT (3)
#endif
/*state fot station*/
#define RT_WLAN_STATE_CONNECT (1UL << 0)
#define RT_WLAN_STATE_CONNECTING (1UL << 1)
......
......@@ -21,6 +21,8 @@
#endif /* RT_WLAN_PROT_DEBUG */
#include <rtdbg.h>
#ifdef RT_WLAN_PROT_ENABLE
#if RT_WLAN_PROT_NAME_LEN < 4
#error "The name is too short"
#endif
......@@ -160,7 +162,7 @@ rt_err_t rt_wlan_prot_attach_dev(struct rt_wlan_device *wlan, const char *prot_n
{
int i = 0;
struct rt_wlan_prot *prot = wlan->prot;
rt_wlan_dev_event_t event;
rt_wlan_dev_event_handler handler = rt_wlan_prot_event_handle;
if (wlan == RT_NULL)
{
......@@ -180,7 +182,7 @@ rt_err_t rt_wlan_prot_attach_dev(struct rt_wlan_device *wlan, const char *prot_n
rt_wlan_prot_detach_dev(wlan);
#ifdef RT_WLAN_PROT_LWIP_PBUF_FORCE
if (rt_strcmp(RT_WLAN_PROT_LWIP, prot_name) != 0)
if (rt_strcmp(RT_WLAN_PROT_LWIP_NAME, prot_name) != 0)
{
return -RT_ERROR;
}
......@@ -202,13 +204,12 @@ rt_err_t rt_wlan_prot_attach_dev(struct rt_wlan_device *wlan, const char *prot_n
return -RT_ERROR;
}
for (event = RT_WLAN_DEV_EVT_INIT_DONE; event < RT_WLAN_DEV_EVT_MAX; event ++)
{
if (rt_wlan_dev_register_event_handler(wlan, event, rt_wlan_prot_event_handle, RT_NULL) != RT_EOK)
{
LOG_E("prot register event filed:%d", event);
}
}
rt_wlan_dev_register_event_handler(wlan, RT_WLAN_DEV_EVT_CONNECT, handler, RT_NULL);
rt_wlan_dev_register_event_handler(wlan, RT_WLAN_DEV_EVT_DISCONNECT, handler, RT_NULL);
rt_wlan_dev_register_event_handler(wlan, RT_WLAN_DEV_EVT_AP_START, handler, RT_NULL);
rt_wlan_dev_register_event_handler(wlan, RT_WLAN_DEV_EVT_AP_STOP, handler, RT_NULL);
rt_wlan_dev_register_event_handler(wlan, RT_WLAN_DEV_EVT_AP_ASSOCIATED, handler, RT_NULL);
rt_wlan_dev_register_event_handler(wlan, RT_WLAN_DEV_EVT_AP_DISASSOCIATED, handler, RT_NULL);
return RT_EOK;
}
......@@ -360,3 +361,4 @@ void rt_wlan_prot_dump(void)
}
}
}
#endif
......@@ -25,8 +25,6 @@ extern "C" {
#define RT_LWAN_ID_PREFIX (0x5054)
#define RT_WLAN_PROT_LWIP ("lwip")
typedef enum
{
RT_WLAN_PROT_EVT_INIT_DONE = 0,
......
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