提交 bae79275 编写于 作者: lymzzyh's avatar lymzzyh

[Bsp][STM32F4xx-HAL]Fix Clock tree Support HSI| 修复时钟树,支持HSI

上级 b0dbdf42
...@@ -287,7 +287,7 @@ config RT_USING_HSI ...@@ -287,7 +287,7 @@ config RT_USING_HSI
bool "Using HSI as clock source" bool "Using HSI as clock source"
default n default n
config BSP_HSE_BY_PASS config BSP_HSE_BY_PASS
bool "HES Bypass" bool "HSE Bypass"
depends on !RT_USING_HSI depends on !RT_USING_HSI
default n default n
config RT_HSE_VALUE config RT_HSE_VALUE
......
...@@ -18,9 +18,6 @@ ...@@ -18,9 +18,6 @@
* @addtogroup STM32 * @addtogroup STM32
*/ */
/*@{*/ /*@{*/
#ifdef RT_USING_HSI
#error Can not using HSI on this bsp
#endif
#if defined(RCC_PERIPHCLK_SDIO) || defined(RCC_PERIPHCLK_CEC) || defined(RCC_PERIPHCLK_LTDC)\ #if defined(RCC_PERIPHCLK_SDIO) || defined(RCC_PERIPHCLK_CEC) || defined(RCC_PERIPHCLK_LTDC)\
|| defined(RCC_PERIPHCLK_SPDIFRX) || defined(RCC_PERIPHCLK_FMPI2C1) || defined(RCC_PERIPHCLK_LPTIM1) || defined(RCC_PERIPHCLK_SPDIFRX) || defined(RCC_PERIPHCLK_FMPI2C1) || defined(RCC_PERIPHCLK_LPTIM1)
#warning Please give priority to the correctness of the clock tree when the peripherals are abnormal #warning Please give priority to the correctness of the clock tree when the peripherals are abnormal
...@@ -28,11 +25,18 @@ ...@@ -28,11 +25,18 @@
static void SystemClock_Config(void) static void SystemClock_Config(void)
{ {
rt_uint32_t hse_clk, sys_clk; rt_uint32_t source_clk, sys_clk;
#if (RT_HSE_VALVE % 1000000 != 0)
#if !defined(RT_USING_HSI) && (RT_HSE_VALVE % 1000000 != 0)
#error HSE must be integer of MHz #error HSE must be integer of MHz
#endif #endif
hse_clk = HSE_VALUE / 1000000UL; #ifdef RT_USING_HSI
#define CLOCK_SOURE_VALUE HSI_VALUE
#else
#define CLOCK_SOURE_VALUE HSE_VALUE
#endif
source_clk = CLOCK_SOURE_VALUE / 1000000UL;
sys_clk = HCLK_VALUE / 1000000UL; sys_clk = HCLK_VALUE / 1000000UL;
RCC_OscInitTypeDef RCC_OscInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_ClkInitTypeDef RCC_ClkInitStruct;
...@@ -45,27 +49,35 @@ static void SystemClock_Config(void) ...@@ -45,27 +49,35 @@ static void SystemClock_Config(void)
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/**Initializes the CPU, AHB and APB busses clocks /**Initializes the CPU, AHB and APB busses clocks
*/ */
#ifdef RT_USING_HSI
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
#else
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
#endif
#ifdef RT_USING_RTC #ifdef RT_USING_RTC
RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_LSI; RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_LSI;
RCC_OscInitStruct.LSIState = RCC_LSI_ON; RCC_OscInitStruct.LSIState = RCC_LSI_ON;
#endif #endif
#ifdef RT_USING_HSI
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = source_clk;
#else
#ifdef BSP_HSE_BY_PASS #ifdef BSP_HSE_BY_PASS
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
#elif !defined(RT_USING_HSI) #else
RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSEState = RCC_HSE_ON;
#endif
#endif #endif
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
#ifdef RT_USING_HSI
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
#else
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
if (hse_clk % 2 == 0) #endif
if (source_clk % 2 == 0)
{ {
RCC_OscInitStruct.PLL.PLLM = hse_clk / 2; //Get 2M clock RCC_OscInitStruct.PLL.PLLM = source_clk / 2; //Get 2M clock
if ((sys_clk * 2) % 48 == 0) if ((sys_clk * 4) % 48 == 0)
{
RCC_OscInitStruct.PLL.PLLN = sys_clk;//Get 2*HCLK_VALUE
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;//Get HCLK_VALUE
}
else if ((sys_clk * 4) % 48 == 0)
{ {
RCC_OscInitStruct.PLL.PLLN = sys_clk * 2;//Get 4*HCLK_VALUE RCC_OscInitStruct.PLL.PLLN = sys_clk * 2;//Get 4*HCLK_VALUE
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;//Get HCLK_VALUE RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;//Get HCLK_VALUE
...@@ -80,16 +92,17 @@ static void SystemClock_Config(void) ...@@ -80,16 +92,17 @@ static void SystemClock_Config(void)
RCC_OscInitStruct.PLL.PLLN = sys_clk * 4;//Get 8*HCLK_VALUE RCC_OscInitStruct.PLL.PLLN = sys_clk * 4;//Get 8*HCLK_VALUE
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV8;//Get HCLK_VALUE RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV8;//Get HCLK_VALUE
} }
} else
else
{
RCC_OscInitStruct.PLL.PLLM = hse_clk;//Get 1M clock
if ((sys_clk * 2) % 48 == 0)
{ {
RCC_OscInitStruct.PLL.PLLN = sys_clk * 2;//Get 2*HCLK_VALUE //can not get 48M Clock USB is unuseable
RCC_OscInitStruct.PLL.PLLN = sys_clk;//Get 2*HCLK_VALUE
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;//Get HCLK_VALUE RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;//Get HCLK_VALUE
} }
else if ((sys_clk * 4) % 48 == 0) }
else
{
RCC_OscInitStruct.PLL.PLLM = source_clk;//Get 1M clock
if ((sys_clk * 4) % 48 == 0)
{ {
RCC_OscInitStruct.PLL.PLLN = sys_clk * 4;//Get 4*HCLK_VALUE RCC_OscInitStruct.PLL.PLLN = sys_clk * 4;//Get 4*HCLK_VALUE
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;//Get HCLK_VALUE RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;//Get HCLK_VALUE
...@@ -104,8 +117,14 @@ static void SystemClock_Config(void) ...@@ -104,8 +117,14 @@ static void SystemClock_Config(void)
RCC_OscInitStruct.PLL.PLLN = sys_clk * 8;//Get 8*HCLK_VALUE RCC_OscInitStruct.PLL.PLLN = sys_clk * 8;//Get 8*HCLK_VALUE
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV8;//Get HCLK_VALUE RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV8;//Get HCLK_VALUE
} }
else
{
//can not get 48M Clock USB is unuseable
RCC_OscInitStruct.PLL.PLLN = sys_clk * 2;//Get 2*HCLK_VALUE
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;//Get HCLK_VALUE
}
} }
RCC_OscInitStruct.PLL.PLLQ = hse_clk / RCC_OscInitStruct.PLL.PLLM * RCC_OscInitStruct.PLL.PLLN / 48; //Get 48M Clock RCC_OscInitStruct.PLL.PLLQ = source_clk / RCC_OscInitStruct.PLL.PLLM * RCC_OscInitStruct.PLL.PLLN / 48; //Get 48M Clock
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{ {
while (1) while (1)
...@@ -133,6 +152,14 @@ static void SystemClock_Config(void) ...@@ -133,6 +152,14 @@ static void SystemClock_Config(void)
while (1) while (1)
{} {}
} }
#elif (RT_HSE_HCLK <= 100000000UL)
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
{
while (1)
{}
}
#elif (RT_HSE_HCLK <= 168000000UL) #elif (RT_HSE_HCLK <= 168000000UL)
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
......
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