Skip to content

R
rt-thread

BaiXuePrincess / rt-thread
与 Fork 源项目一致

Fork自 RT-Thread / rt-thread

通知 1
Star 0
Fork 0
R
rt-thread
未验证 提交 71d50fb8 编写于 作者: T Tanek 提交者： GitHub
浏览文件
操作

Merge pull request #1334 from liu2guang/master 

[BSP][RT1050] Optimized spi bus driver. | 优化spi bus驱动.
上级 5674a256 0bbb3491
隐藏空白更改
内联 并排
Showing with 417 addition and 138 deletion
bsp/imxrt1052-evk/.config
浏览文件 @ 71d50fb8
......@@ -135,7 +135,13 @@ CONFIG_RT_USING_RTC=y
# CONFIG_RT_USING_SOFT_RTC is not set
# CONFIG_RTC_SYNC_USING_NTP is not set
CONFIG_RT_USING_SDIO=y
# CONFIG_RT_USING_SPI is not set
CONFIG_RT_USING_SPI=y
# CONFIG_RT_USING_SPI_MSD is not set
# CONFIG_RT_USING_SFUD is not set
# CONFIG_RT_USING_W25QXX is not set
# CONFIG_RT_USING_GD is not set
# CONFIG_RT_USING_ENC28J60 is not set
# CONFIG_RT_USING_SPI_WIFI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_WIFI is not set
......@@ -310,6 +316,7 @@ CONFIG_LWIP_NETIF_LOOPBACK=0
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_SAMPLES is not set
#
# example package: hello
......@@ -320,11 +327,11 @@ CONFIG_BOARD_RT1050_EVK=y
# CONFIG_BOARD_RT1050_FIRE is not set
#
# RT1050_EVK Bsp Config
# RT1050 Bsp Config
#
#
# Select uart device
# Select uart drivers
#
CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART2 is not set
......@@ -334,5 +341,25 @@ CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART6 is not set
# CONFIG_RT_USING_UART7 is not set
# CONFIG_RT_USING_UART8 is not set
#
# Select spi bus drivers
#
CONFIG_LPSPI_CLK_SOURCE_FROM_PLL3PFD1=y
# CONFIG_LPSPI_CLK_SOURCE_FROM_PLL3PFD0 is not set
# CONFIG_LPSPI_CLK_SOURCE_FROM_PLL2 is not set
# CONFIG_LPSPI_CLK_SOURCE_FROM_PLL2PFD2 is not set
CONFIG_LPSPI_CLK_SOURCE=0
CONFIG_LPSPI_CLK_SOURCE_DIVIDER=7
# CONFIG_RT_USING_SPIBUS1 is not set
# CONFIG_RT_USING_SPIBUS2 is not set
# CONFIG_RT_USING_SPIBUS3 is not set
CONFIG_RT_USING_SPIBUS4=y
CONFIG_LPSPI4_SCK_GPIO_1=y
# CONFIG_LPSPI4_SCK_GPIO_2 is not set
CONFIG_LPSPI4_SDO_GPIO_1=y
# CONFIG_LPSPI4_SDO_GPIO_2 is not set
CONFIG_LPSPI4_SDI_GPIO_1=y
# CONFIG_LPSPI4_SDI_GPIO_2 is not set
CONFIG_RT_USING_SDRAM=y
CONFIG_RT_USING_RTC_HP=y
bsp/imxrt1052-evk/Kconfig
浏览文件 @ 71d50fb8
......@@ -33,8 +33,7 @@ choice
bool "RT1050_FIRE"
endchoice
if BOARD_RT1050_EVK
menu "RT1050_EVK Bsp Config"
menu "RT1050 Bsp Config"
menu "Select uart drivers"
config RT_USING_UART1
......@@ -71,23 +70,159 @@ menu "Select uart drivers"
default n
endmenu
menu "Select spibus drivers"
menu "Select spi bus drivers"
choice
prompt "SPI bus clock source"
default LPSPI_CLK_SOURCE_FROM_PLL3PFD1
config LPSPI_CLK_SOURCE_FROM_PLL3PFD1
bool "PLL3PFD1"
config LPSPI_CLK_SOURCE_FROM_PLL3PFD0
bool "PLL3PFD0"
config LPSPI_CLK_SOURCE_FROM_PLL2
bool "PLL2"
config LPSPI_CLK_SOURCE_FROM_PLL2PFD2
bool "PLL2PFD2"
endchoice
config LPSPI_CLK_SOURCE
int
default 0 if LPSPI_CLK_SOURCE_FROM_PLL3PFD1
default 1 if LPSPI_CLK_SOURCE_FROM_PLL3PFD0
default 2 if LPSPI_CLK_SOURCE_FROM_PLL2
default 3 if LPSPI_CLK_SOURCE_FROM_PLL2PFD2
config LPSPI_CLK_SOURCE_DIVIDER
int "SPI bus clock source divider"
range 0 8
default 7
config RT_USING_SPIBUS1
bool "Using spi1 bus"
select RT_USING_SPI
default n
choice
prompt "spi1 bus sck io choice"
default LPSPI1_SCK_GPIO_1
depends on RT_USING_SPIBUS1
config LPSPI1_SCK_GPIO_1
bool "GPIO_EMC_27"
config LPSPI1_SCK_GPIO_2
bool "GPIO_SD_B0_00"
endchoice
choice
prompt "spi1 bus sdo io choice"
default LPSPI1_SDO_GPIO_1
depends on RT_USING_SPIBUS1
config LPSPI1_SDO_GPIO_1
bool "GPIO_EMC_28"
config LPSPI1_SDO_GPIO_2
bool "GPIO_SD_B0_02"
endchoice
choice
prompt "spi1 bus sdi io choice"
default LPSPI1_SDI_GPIO_1
depends on RT_USING_SPIBUS1
config LPSPI1_SDI_GPIO_1
bool "GPIO_EMC_29"
config LPSPI1_SDI_GPIO_2
bool "GPIO_SD_B0_03"
endchoice
config RT_USING_SPIBUS2
bool "Using spi2 bus"
select RT_USING_SPI
default n
choice
prompt "spi2 bus sck io choice"
default LPSPI2_SCK_GPIO_1
depends on RT_USING_SPIBUS2
config LPSPI2_SCK_GPIO_1
bool "GPIO_SD_B1_07"
config LPSPI2_SCK_GPIO_2
bool "GPIO_EMC_00"
endchoice
choice
prompt "spi2 bus sdo io choice"
default LPSPI2_SDO_GPIO_1
depends on RT_USING_SPIBUS2
config LPSPI2_SDO_GPIO_1
bool "GPIO_SD_B1_08"
config LPSPI2_SDO_GPIO_2
bool "GPIO_EMC_02"
endchoice
choice
prompt "spi2 bus sdi io choice"
default LPSPI2_SDI_GPIO_1
depends on RT_USING_SPIBUS2
config LPSPI2_SDI_GPIO_1
bool "GPIO_SD_B1_09"
config LPSPI2_SDI_GPIO_2
bool "GPIO_EMC_03"
endchoice
config RT_USING_SPIBUS3
bool "Using spi3 bus"
select RT_USING_SPI
default n
choice
prompt "spi3 bus sck io choice"
default LPSPI3_SCK_GPIO_1
depends on RT_USING_SPIBUS3
config LPSPI3_SCK_GPIO_1
bool "GPIO_AD_B1_15"
config LPSPI3_SCK_GPIO_2
bool "GPIO_AD_B0_00"
endchoice
choice
prompt "spi3 bus sdo io choice"
default LPSPI3_SDO_GPIO_1
depends on RT_USING_SPIBUS3
config LPSPI3_SDO_GPIO_1
bool "GPIO_AD_B1_14"
config LPSPI3_SDO_GPIO_2
bool "GPIO_AD_B0_01"
endchoice
choice
prompt "spi3 bus sdi io choice"
default LPSPI3_SDI_GPIO_1
depends on RT_USING_SPIBUS3
config LPSPI3_SDI_GPIO_1
bool "GPIO_AD_B1_13"
config LPSPI3_SDI_GPIO_2
bool "GPIO_AD_B0_02"
endchoice
config RT_USING_SPIBUS4
bool "Using spi4 bus"
select RT_USING_SPI
default y
choice
prompt "spi4 bus sck io choice"
default LPSPI4_SCK_GPIO_1
depends on RT_USING_SPIBUS4
config LPSPI4_SCK_GPIO_1
bool "GPIO_B0_03"
config LPSPI4_SCK_GPIO_2
bool "GPIO_B1_07"
endchoice
choice
prompt "spi4 bus sdo io choice"
default LPSPI4_SDO_GPIO_1
depends on RT_USING_SPIBUS4
config LPSPI4_SDO_GPIO_1
bool "GPIO_B0_02"
config LPSPI4_SDO_GPIO_2
bool "GPIO_B1_06"
endchoice
choice
prompt "spi4 bus sdi io choice"
default LPSPI4_SDI_GPIO_1
depends on RT_USING_SPIBUS4
config LPSPI4_SDI_GPIO_1
bool "GPIO_B0_01"
config LPSPI4_SDI_GPIO_2
bool "GPIO_B1_05"
endchoice
endmenu
#menu "SDRAM driver support"
......@@ -103,6 +238,7 @@ endmenu
default n
#endmenu
if BOARD_RT1050_EVK
if RT_USING_USB_DEVICE
choice
prompt "select usb device controller"
......@@ -114,79 +250,6 @@ if RT_USING_USB_DEVICE
bool "set EHCI1 as device"
endchoice
endif
endmenu
endif
if BOARD_RT1050_FIRE
menu "RT1050_FIRE Bsp Config"
menu "Select uart drivers"
config RT_USING_UART1
bool "Using uart1"
select RT_USING_SERIAL
default y
config RT_USING_UART2
bool "Using uart2"
select RT_USING_SERIAL
default n
config RT_USING_UART3
bool "Using uart3"
select RT_USING_SERIAL
default n
config RT_USING_UART4
bool "Using uart4"
select RT_USING_SERIAL
default n
config RT_USING_UART5
bool "Using uart5"
select RT_USING_SERIAL
default n
config RT_USING_UART6
bool "Using uart6"
select RT_USING_SERIAL
default n
config RT_USING_UART7
bool "Using uart7"
select RT_USING_SERIAL
default n
config RT_USING_UART8
bool "Using uart8"
select RT_USING_SERIAL
default n
endmenu
menu "Select spibus drivers"
config RT_USING_SPIBUS1
bool "Using spi1 bus"
select RT_USING_SPI
default n
config RT_USING_SPIBUS2
bool "Using spi2 bus"
select RT_USING_SPI
default n
config RT_USING_SPIBUS3
bool "Using spi3 bus"
select RT_USING_SPI
default n
config RT_USING_SPIBUS4
bool "Using spi4 bus"
select RT_USING_SPI
default y
endmenu
#menu "SDRAM driver support"
config RT_USING_SDRAM
bool "Using sdram"
default y
#endmenu
#menu "RTC driver support"
config RT_USING_RTC_HP
bool "Using hp rtc"
select RT_USING_RTC
default n
#endmenu
endmenu
endif
bsp/imxrt1052-evk/drivers/drv_spi_bus.c
浏览文件 @ 71d50fb8
......@@ -20,20 +20,124 @@
#ifdef RT_USING_SPI
#define LPSPI_CLK_SOURCE (1U)
#define LPSPI_CLK_SOURCE_DIVIDER (7U)
#if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL
#error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!"
#endif
#if !defined(LPSPI_CLK_SOURCE)
#define LPSPI_CLK_SOURCE (1U) /* PLL3 PFD0 */
#endif
#if !defined(LPSPI_CLK_SOURCE_DIVIDER)
#define LPSPI_CLK_SOURCE_DIVIDER (7U) /* 8div */
#endif
/* LPSPI1 SCK SDO SDI IOMUX Config */
#if defined(LPSPI1_SCK_GPIO_1)
#define LPSPI1_SCK_GPIO IOMUXC_GPIO_EMC_27_LPSPI1_SCK
#elif defined(LPSPI1_SCK_GPIO_2)
#define LPSPI1_SCK_GPIO IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK
#else
#define LPSPI1_SCK_GPIO IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK
#endif
#if defined(LPSPI1_SDO_GPIO_1)
#define LPSPI1_SDO_GPIO IOMUXC_GPIO_EMC_28_LPSPI1_SDO
#elif defined(LPSPI1_SDO_GPIO_2)
#define LPSPI1_SDO_GPIO IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO
#else
#define LPSPI1_SDO_GPIO IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO
#endif
#if defined(LPSPI1_SDI_GPIO_1)
#define LPSPI1_SDI_GPIO IOMUXC_GPIO_EMC_29_LPSPI1_SDI
#elif defined(LPSPI1_SDI_GPIO_2)
#define LPSPI1_SDI_GPIO IOMUXC_GPIO_SD_B0_03_LPSPI1_SDI
#else
#define LPSPI1_SDI_GPIO IOMUXC_GPIO_SD_B0_03_LPSPI1_SDI
#endif
/* LPSPI2 SCK SDO SDI IOMUX Config */
#if defined(LPSPI2_SCK_GPIO_1)
#define LPSPI2_SCK_GPIO IOMUXC_GPIO_SD_B1_07_LPSPI2_SCK
#elif defined(LPSPI2_SCK_GPIO_2)
#define LPSPI2_SCK_GPIO IOMUXC_GPIO_EMC_00_LPSPI2_SCK
#else
#define LPSPI2_SCK_GPIO IOMUXC_GPIO_SD_B1_07_LPSPI2_SCK
#endif
#if defined(LPSPI2_SDO_GPIO_1)
#define LPSPI2_SDO_GPIO IOMUXC_GPIO_SD_B1_08_LPSPI2_SD0
#elif defined(LPSPI2_SDO_GPIO_2)
#define LPSPI2_SDO_GPIO IOMUXC_GPIO_EMC_02_LPSPI2_SDO
#else
#define LPSPI2_SDO_GPIO IOMUXC_GPIO_SD_B1_08_LPSPI2_SD0
#endif
#if defined(LPSPI2_SDI_GPIO_1)
#define LPSPI2_SDI_GPIO IOMUXC_GPIO_SD_B1_09_LPSPI2_SDI
#elif defined(LPSPI2_SDI_GPIO_2)
#define LPSPI2_SDI_GPIO IOMUXC_GPIO_EMC_03_LPSPI2_SDI
#else
#define LPSPI2_SDI_GPIO IOMUXC_GPIO_SD_B1_09_LPSPI2_SDI
#endif
/* LPSPI3 SCK SDO SDI IOMUX Config */
#if defined(LPSPI3_SCK_GPIO_1)
#define LPSPI3_SCK_GPIO IOMUXC_GPIO_AD_B1_15_LPSPI3_SCK
#elif defined(LPSPI3_SCK_GPIO_2)
#define LPSPI3_SCK_GPIO IOMUXC_GPIO_AD_B0_00_LPSPI3_SCK
#else
#define LPSPI3_SCK_GPIO IOMUXC_GPIO_AD_B0_00_LPSPI3_SCK
#endif
#if defined(LPSPI3_SDO_GPIO_1)
#define LPSPI3_SDO_GPIO IOMUXC_GPIO_AD_B1_14_LPSPI3_SDO
#elif defined(LPSPI3_SDO_GPIO_2)
#define LPSPI3_SDO_GPIO IOMUXC_GPIO_AD_B0_01_LPSPI3_SDO
#else
#define LPSPI3_SDO_GPIO IOMUXC_GPIO_AD_B0_01_LPSPI3_SDO
#endif
#if defined(LPSPI3_SDI_GPIO_1)
#define LPSPI3_SDI_GPIO IOMUXC_GPIO_AD_B1_13_LPSPI3_SDI
#elif defined(LPSPI3_SDI_GPIO_2)
#define LPSPI3_SDI_GPIO IOMUXC_GPIO_AD_B0_02_LPSPI3_SDI
#else
#define LPSPI3_SDI_GPIO IOMUXC_GPIO_AD_B0_02_LPSPI3_SDI
#endif
/* LPSPI4 SCK SDO SDI IOMUX Config */
#if defined(LPSPI4_SCK_GPIO_1)
#define LPSPI4_SCK_GPIO IOMUXC_GPIO_B0_03_LPSPI4_SCK
#elif defined(LPSPI4_SCK_GPIO_2)
#define LPSPI4_SCK_GPIO IOMUXC_GPIO_B1_07_LPSPI4_SCK
#else
#define LPSPI4_SCK_GPIO IOMUXC_GPIO_B0_03_LPSPI4_SCK
#endif
#if defined(LPSPI4_SDO_GPIO_1)
#define LPSPI4_SDO_GPIO IOMUXC_GPIO_B0_02_LPSPI4_SDO
#elif defined(LPSPI4_SDO_GPIO_2)
#define LPSPI4_SDO_GPIO IOMUXC_GPIO_B1_06_LPSPI4_SDO
#else
#define LPSPI4_SDO_GPIO IOMUXC_GPIO_B0_02_LPSPI4_SDO
#endif
#if defined(LPSPI4_SDI_GPIO_1)
#define LPSPI4_SDI_GPIO IOMUXC_GPIO_B0_01_LPSPI4_SDI
#elif defined(LPSPI4_SDI_GPIO_2)
#define LPSPI4_SDI_GPIO IOMUXC_GPIO_B1_05_LPSPI4_SDI
#else
#define LPSPI4_SDI_GPIO IOMUXC_GPIO_B0_01_LPSPI4_SDI
#endif
struct rt1050_spi
{
LPSPI_Type *base;
struct rt_spi_configuration *cfg;
};
struct rt1050_hw_spi_cs
struct rt1050_sw_spi_cs
{
rt_uint32_t pin;
};
......@@ -76,6 +180,8 @@ static rt_err_t rt1050_spi_init(LPSPI_Type *base, struct rt_spi_configuration *c
{
lpspi_master_config_t masterConfig;
RT_ASSERT(cfg != RT_NULL);
if(cfg->data_width != 8 && cfg->data_width != 16 && cfg->data_width != 32)
{
return RT_EINVAL;
......@@ -84,69 +190,57 @@ static rt_err_t rt1050_spi_init(LPSPI_Type *base, struct rt_spi_configuration *c
#if defined(RT_USING_SPIBUS1)
if(base == LPSPI1)
{
IOMUXC_SetPinMux (IOMUXC_GPIO_EMC_27_LPSPI1_SCK, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_27_LPSPI1_SCK, 0x10B0u);
IOMUXC_SetPinMux (IOMUXC_GPIO_EMC_28_LPSPI1_SDO, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_28_LPSPI1_SDO, 0x10B0u);
IOMUXC_SetPinMux (IOMUXC_GPIO_EMC_29_LPSPI1_SDI, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_29_LPSPI1_SDI, 0x10B0u);
IOMUXC_SetPinMux (LPSPI1_SCK_GPIO, 0U);
IOMUXC_SetPinConfig(LPSPI1_SCK_GPIO, 0x10B0u);
IOMUXC_SetPinMux (LPSPI1_SDO_GPIO, 0U);
IOMUXC_SetPinConfig(LPSPI1_SDO_GPIO, 0x10B0u);
IOMUXC_SetPinMux (LPSPI1_SDI_GPIO, 0U);
IOMUXC_SetPinConfig(LPSPI1_SDI_GPIO, 0x10B0u);
}
#endif
#if defined(RT_USING_SPIBUS2)
if(base == LPSPI2)
{
IOMUXC_SetPinMux (IOMUXC_GPIO_SD_B1_07_LPSPI2_SCK, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_07_LPSPI2_SCK, 0x10B0u);
IOMUXC_SetPinMux (IOMUXC_GPIO_SD_B1_08_LPSPI2_SD0, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_08_LPSPI2_SD0, 0x10B0u);
IOMUXC_SetPinMux (IOMUXC_GPIO_SD_B1_09_LPSPI2_SDI, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_09_LPSPI2_SDI, 0x10B0u);
/* Optional IO config */
//IOMUXC_SetPinMux (IOMUXC_GPIO_EMC_00_LPSPI2_SCK, 0U);
//IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_00_LPSPI2_SCK, 0x10B0u);
//IOMUXC_SetPinMux (IOMUXC_GPIO_EMC_02_LPSPI2_SDO, 0U);
//IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_02_LPSPI2_SDO, 0x10B0u);
//IOMUXC_SetPinMux (IOMUXC_GPIO_EMC_03_LPSPI2_SDI, 0U);
//IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_03_LPSPI2_SDI, 0x10B0u);
IOMUXC_SetPinMux (LPSPI2_SCK_GPIO, 0U);
IOMUXC_SetPinConfig(LPSPI2_SCK_GPIO, 0x10B0u);
IOMUXC_SetPinMux (LPSPI2_SDO_GPIO, 0U);
IOMUXC_SetPinConfig(LPSPI2_SDO_GPIO, 0x10B0u);
IOMUXC_SetPinMux (LPSPI2_SDI_GPIO, 0U);
IOMUXC_SetPinConfig(LPSPI2_SDI_GPIO, 0x10B0u);
}
#endif
#if defined(RT_USING_SPIBUS3)
if(base == LPSPI3)
{
IOMUXC_SetPinMux (IOMUXC_GPIO_AD_B1_13_LPSPI3_SDI, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_13_LPSPI3_SDI, 0x10B0u);
IOMUXC_SetPinMux (IOMUXC_GPIO_AD_B1_14_LPSPI3_SDO, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_14_LPSPI3_SDO, 0x10B0u);
IOMUXC_SetPinMux (IOMUXC_GPIO_AD_B1_15_LPSPI3_SCK, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_15_LPSPI3_SCK, 0x10B0u);
IOMUXC_SetPinMux (LPSPI3_SCK_GPIO, 0U);
IOMUXC_SetPinConfig(LPSPI3_SCK_GPIO, 0x10B0u);
IOMUXC_SetPinMux (LPSPI3_SDO_GPIO, 0U);
IOMUXC_SetPinConfig(LPSPI3_SDO_GPIO, 0x10B0u);
IOMUXC_SetPinMux (LPSPI3_SDI_GPIO, 0U);
IOMUXC_SetPinConfig(LPSPI3_SDI_GPIO, 0x10B0u);
}
#endif
#if defined(RT_USING_SPIBUS4)
if(base == LPSPI4)
{
IOMUXC_SetPinMux (IOMUXC_GPIO_B0_01_LPSPI4_SDI, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_01_LPSPI4_SDI, 0x10B0u);
IOMUXC_SetPinMux (IOMUXC_GPIO_B0_02_LPSPI4_SDO, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_02_LPSPI4_SDO, 0x10B0u);
IOMUXC_SetPinMux (IOMUXC_GPIO_B0_03_LPSPI4_SCK, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_03_LPSPI4_SCK, 0x10B0u);
/* Optional IO config */
//IOMUXC_SetPinMux (IOMUXC_GPIO_B1_07_LPSPI4_SCK, 0U);
//IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_07_LPSPI4_SCK, 0x10B0u);
//IOMUXC_SetPinMux (IOMUXC_GPIO_B1_06_LPSPI4_SDO, 0U);
//IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_06_LPSPI4_SDO, 0x10B0u);
//IOMUXC_SetPinMux (IOMUXC_GPIO_B1_05_LPSPI4_SDI, 0U);
//IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_05_LPSPI4_SDI, 0x10B0u);
IOMUXC_SetPinMux (LPSPI4_SCK_GPIO, 0U);
IOMUXC_SetPinConfig(LPSPI4_SCK_GPIO, 0x10B0u);
IOMUXC_SetPinMux (LPSPI4_SDO_GPIO, 0U);
IOMUXC_SetPinConfig(LPSPI4_SDO_GPIO, 0x10B0u);
IOMUXC_SetPinMux (LPSPI4_SDI_GPIO, 0U);
IOMUXC_SetPinConfig(LPSPI4_SDI_GPIO, 0x10B0u);
}
#endif
LPSPI_MasterGetDefaultConfig(&masterConfig);
if(cfg->max_hz > 40*1000*1000)
{
cfg->max_hz = 40*1000*1000;
}
masterConfig.baudRate = cfg->max_hz;
masterConfig.bitsPerFrame = cfg->data_width;
......@@ -191,12 +285,12 @@ static rt_err_t rt1050_spi_init(LPSPI_Type *base, struct rt_spi_configuration *c
rt_err_t rt1050_spi_bus_attach_device(const char *bus_name, const char *device_name, rt_uint32_t pin)
{
rt_err_t ret;
rt_err_t ret = RT_EOK;
struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
RT_ASSERT(spi_device != RT_NULL);
struct rt1050_hw_spi_cs *cs_pin = (struct rt1050_hw_spi_cs *)rt_malloc(sizeof(struct rt1050_hw_spi_cs));
struct rt1050_sw_spi_cs *cs_pin = (struct rt1050_sw_spi_cs *)rt_malloc(sizeof(struct rt1050_sw_spi_cs));
RT_ASSERT(cs_pin != RT_NULL);
cs_pin->pin = pin;
......@@ -210,7 +304,7 @@ rt_err_t rt1050_spi_bus_attach_device(const char *bus_name, const char *device_n
static rt_err_t spi_configure(struct rt_spi_device *device, struct rt_spi_configuration *cfg)
{
rt_err_t ret;
rt_err_t ret = RT_EOK;
struct rt1050_spi *spi = RT_NULL;
RT_ASSERT(cfg != RT_NULL);
......@@ -232,17 +326,18 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *
RT_ASSERT(device->bus->parent.user_data != RT_NULL);
struct rt1050_spi *spi = (struct rt1050_spi *)(device->bus->parent.user_data);
struct rt1050_hw_spi_cs *cs = device->parent.user_data;
struct rt1050_sw_spi_cs *cs = device->parent.user_data;
if(message->cs_take)
{
rt_pin_write(cs->pin, PIN_LOW);
}
transfer.rxData = (uint8_t *)(message->recv_buf);
transfer.txData = (uint8_t *)(message->send_buf);
transfer.dataSize = message->length;
status_t stat = LPSPI_MasterTransferBlocking(spi->base, &transfer);
transfer.rxData = (uint8_t *)(message->recv_buf);
transfer.txData = (uint8_t *)(message->send_buf);
LPSPI_MasterTransferBlocking(spi->base, &transfer);
if(message->cs_release)
{
......@@ -314,19 +409,19 @@ int rt_hw_spi_bus_init(void)
#endif
#if defined(RT_USING_SPIBUS1)
rt_spi_bus_register(&spi1_bus, "spibus1", &rt1050_spi_ops);
rt_spi_bus_register(&spi1_bus, "spi1", &rt1050_spi_ops);
#endif
#if defined(RT_USING_SPIBUS2)
rt_spi_bus_register(&spi2_bus, "spibus2", &rt1050_spi_ops);
rt_spi_bus_register(&spi2_bus, "spi2", &rt1050_spi_ops);
#endif
#if defined(RT_USING_SPIBUS3)
rt_spi_bus_register(&spi3_bus, "spibus3", &rt1050_spi_ops);
rt_spi_bus_register(&spi3_bus, "spi3", &rt1050_spi_ops);
#endif
#if defined(RT_USING_SPIBUS4)
rt_spi_bus_register(&spi4_bus, "spibus4", &rt1050_spi_ops);
rt_spi_bus_register(&spi4_bus, "spi4", &rt1050_spi_ops);
#endif
return RT_EOK;
......
bsp/imxrt1052-evk/project.uvprojx
浏览文件 @ 71d50fb8
......@@ -10,7 +10,7 @@
<TargetName>RT-Thread IMXRT1052</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
<pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
<TargetOption>
<TargetCommonOption>
<Device>MIMXRT1052:M7</Device>
......@@ -334,7 +334,7 @@
<MiscControls>--library_interface=armcc --library_type=standardlib --diag_suppress=66,1296,186</MiscControls>
<Define>SKIP_SYSCLK_INIT, CPU_MIMXRT1052DVL6A, FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1, EVK_MCIMXRM, FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE, RT_USING_ARM_LIBC</Define>
<Undefine></Undefine>
<IncludePath>applications;.;drivers;Libraries;Libraries\drivers;Libraries\utilities;Libraries\CMSIS\Include;..\..\include;..\..\libcpu\arm\cortex-m7;..\..\libcpu\arm\common;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\dfs\filesystems\elmfat;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc;..\..\components\net\lwip-2.0.2\src;..\..\components\net\lwip-2.0.2\src\include;..\..\components\net\lwip-2.0.2\src\include\ipv4;..\..\components\net\lwip-2.0.2\src\arch\include;..\..\components\net\lwip-2.0.2\src\include\netif;..\..\components\net\lwip-2.0.2\src\include\posix</IncludePath>
<IncludePath>applications;.;drivers;Libraries;Libraries\drivers;Libraries\utilities;Libraries\CMSIS\Include;..\..\include;..\..\libcpu\arm\cortex-m7;..\..\libcpu\arm\common;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\dfs\filesystems\elmfat;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\spi;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc;..\..\components\net\lwip-2.0.2\src;..\..\components\net\lwip-2.0.2\src\include;..\..\components\net\lwip-2.0.2\src\include\ipv4;..\..\components\net\lwip-2.0.2\src\arch\include;..\..\components\net\lwip-2.0.2\src\include\netif;..\..\components\net\lwip-2.0.2\src\include\posix</IncludePath>
</VariousControls>
</Cads>
<Aads>
......@@ -428,6 +428,11 @@
<FileType>1</FileType>
<FilePath>drivers\drv_rtc.c</FilePath>
</File>
<File>
<FileName>drv_spi_bus.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\drv_spi_bus.c</FilePath>
</File>
<File>
<FileName>hyper_flash_boot.c</FileName>
<FileType>1</FileType>
......@@ -907,6 +912,74 @@
</Group>
<Group>
<GroupName>DeviceDrivers</GroupName>
<GroupOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>0</ComprImg>
</CommonProperty>
<GroupArmAds>
<Cads>
<interw>2</interw>
<Optim>0</Optim>
<oTime>2</oTime>
<SplitLS>2</SplitLS>
<OneElfS>2</OneElfS>
<Strict>2</Strict>
<EnumInt>2</EnumInt>
<PlainCh>2</PlainCh>
<Ropi>2</Ropi>
<Rwpi>2</Rwpi>
<wLevel>0</wLevel>
<uThumb>2</uThumb>
<uSurpInc>2</uSurpInc>
<uC99>2</uC99>
<useXO>2</useXO>
<v6Lang>0</v6Lang>
<v6LangP>0</v6LangP>
<vShortEn>2</vShortEn>
<vShortWch>2</vShortWch>
<v6Lto>2</v6Lto>
<v6WtE>2</v6WtE>
<v6Rtti>2</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define> </Define>
<Undefine> </Undefine>
<IncludePath> </IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>2</interw>
<Ropi>2</Ropi>
<Rwpi>2</Rwpi>
<thumb>2</thumb>
<SplitLS>2</SplitLS>
<SwStkChk>2</SwStkChk>
<NoWarn>2</NoWarn>
<uSurpInc>2</uSurpInc>
<useXO>2</useXO>
<uClangAs>2</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
</GroupArmAds>
</GroupOption>
<Files>
<File>
<FileName>i2c_core.c</FileName>
......@@ -963,6 +1036,16 @@
<FileType>1</FileType>
<FilePath>..\..\components\drivers\serial\serial.c</FilePath>
</File>
<File>
<FileName>spi_core.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\drivers\spi\spi_core.c</FilePath>
</File>
<File>
<FileName>spi_dev.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\drivers\spi\spi_dev.c</FilePath>
</File>
<File>
<FileName>completion.c</FileName>
<FileType>1</FileType>
......
bsp/imxrt1052-evk/rtconfig.h
浏览文件 @ 71d50fb8
......@@ -95,6 +95,7 @@
#define RT_USING_PIN
#define RT_USING_RTC
#define RT_USING_SDIO
#define RT_USING_SPI
/* Using USB */
......@@ -193,11 +194,21 @@
#define SOC_IMXRT1052
#define BOARD_RT1050_EVK
/* RT1050_EVK Bsp Config */
/* RT1050 Bsp Config */
/* Select uart device */
/* Select uart drivers */
#define RT_USING_UART1
/* Select spi bus drivers */
#define LPSPI_CLK_SOURCE_FROM_PLL3PFD1
#define LPSPI_CLK_SOURCE 0
#define LPSPI_CLK_SOURCE_DIVIDER 7
#define RT_USING_SPIBUS4
#define LPSPI4_SCK_GPIO_1
#define LPSPI4_SDO_GPIO_1
#define LPSPI4_SDI_GPIO_1
#define RT_USING_SDRAM
#define RT_USING_RTC_HP
......
Markdown is supported
0% 或 .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑！
想要评论请 注册 或