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前往新版Gitcode,体验更适合开发者的 AI 搜索 >>
提交
576e7f10
编写于
12月 21, 2021
作者:
L
liuhy
提交者:
Bernard Xiong
12月 21, 2021
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
[essemi][es32f369x] fix bugs and update libraries.
上级
2539c7ff
变更
15
隐藏空白更改
内联
并排
Showing
15 changed file
with
116 addition
and
56 deletion
+116
-56
bsp/essemi/es32f369x/drivers/drv_gpio.c
bsp/essemi/es32f369x/drivers/drv_gpio.c
+8
-1
bsp/essemi/es32f369x/drivers/drv_uart.c
bsp/essemi/es32f369x/drivers/drv_uart.c
+1
-1
bsp/essemi/es32f369x/libraries/CMSIS/Device/EastSoft/ES32F36xx/Include/es32f36xx.h
...aries/CMSIS/Device/EastSoft/ES32F36xx/Include/es32f36xx.h
+2
-2
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Include/ald_adc.h
...ibraries/ES32F36xx_ALD_StdPeriph_Driver/Include/ald_adc.h
+1
-0
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Include/ald_i2c.h
...ibraries/ES32F36xx_ALD_StdPeriph_Driver/Include/ald_i2c.h
+2
-0
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Include/ald_qspi.h
...braries/ES32F36xx_ALD_StdPeriph_Driver/Include/ald_qspi.h
+0
-1
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_adc.c
...libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_adc.c
+42
-0
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_cmu.c
...libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_cmu.c
+1
-1
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_crc.c
...libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_crc.c
+1
-1
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_i2c.c
...libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_i2c.c
+2
-2
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_nand.c
...ibraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_nand.c
+32
-32
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_pis.c
...libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_pis.c
+2
-2
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_qspi.c
...ibraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_qspi.c
+1
-9
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_wdt.c
...libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_wdt.c
+11
-1
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/utils.c
...x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/utils.c
+10
-3
未找到文件。
bsp/essemi/es32f369x/drivers/drv_gpio.c
浏览文件 @
576e7f10
...
...
@@ -385,7 +385,14 @@ rt_err_t es32f3_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
{
return
RT_ENOSYS
;
}
irqindex
=
index
->
pin
&
0x00FF
;
for
(
irqindex
=
0
;
irqindex
<
16
;
irqindex
++
)
{
if
((
0x01
<<
irqindex
)
==
index
->
pin
)
{
break
;
}
}
if
(
irqindex
<
0
||
irqindex
>=
ITEM_NUM
(
pin_irq_map
))
{
return
RT_ENOSYS
;
...
...
bsp/essemi/es32f369x/drivers/drv_uart.c
浏览文件 @
576e7f10
...
...
@@ -245,7 +245,7 @@ struct es32_uart uart2 =
{
UART2
},
&
serial2
,
UART2_IRQn
,
#ifdef RT_
USING_SERIAL
#ifdef RT_
SERIAL_USING_DMA
UART2_DMATX_CHANNEL
,
UART2_DMARX_CHANNEL
#endif
/* RT_SERIAL_USING_DMA */
...
...
bsp/essemi/es32f369x/libraries/CMSIS/Device/EastSoft/ES32F36xx/Include/es32f36xx.h
浏览文件 @
576e7f10
...
...
@@ -222,11 +222,11 @@ typedef struct
/****************** Bit definition for MSC_FLASHADDR register ************************/
#define MSC_FLASHADDR_IFREN_POS 1
8
U
#define MSC_FLASHADDR_IFREN_POS 1
9
U
#define MSC_FLASHADDR_IFREN_MSK BIT(MSC_FLASHADDR_IFREN_POS)
#define MSC_FLASHADDR_ADDR_POSS 0U
#define MSC_FLASHADDR_ADDR_POSE 1
7
U
#define MSC_FLASHADDR_ADDR_POSE 1
8
U
#define MSC_FLASHADDR_ADDR_MSK BITS(MSC_FLASHADDR_ADDR_POSS,MSC_FLASHADDR_ADDR_POSE)
/****************** Bit definition for MSC_FLASHFIFO register ************************/
...
...
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Include/ald_adc.h
浏览文件 @
576e7f10
...
...
@@ -504,6 +504,7 @@ typedef struct {
*/
ald_status_t
ald_adc_init
(
adc_handle_t
*
hperh
);
ald_status_t
ald_adc_reset
(
adc_handle_t
*
hperh
);
void
ald_adc_offset_adjust
(
uint32_t
refmv
);
/**
* @}
*/
...
...
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Include/ald_i2c.h
浏览文件 @
576e7f10
...
...
@@ -323,6 +323,8 @@ typedef struct i2c_handle_s {
#define I2C_SLAVE_GET_DIR(x) (READ_BIT(((x)->perh->STAT), I2C_STAT_DIR_MSK))
#define I2C_ENABLE(x) (SET_BIT((x)->perh->CON1, I2C_CON1_PE_MSK))
#define I2C_DISABLE(x) (CLEAR_BIT((x)->perh->CON1, I2C_CON1_PE_MSK))
#define I2C_RST_TXFIFO(x) (SET_BIT((x)->perh->FCON, I2C_FCON_TXFRST_MSK))
#define I2C_RST_RXFIFO(x) (SET_BIT((x)->perh->FCON, I2C_FCON_RXFRST_MSK))
/**
* @}
*/
...
...
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Include/ald_qspi.h
浏览文件 @
576e7f10
...
...
@@ -299,7 +299,6 @@ typedef struct {
typedef
struct
{
uint32_t
dlytd
;
/**< Delay transmitted data [0 ~ 15]*/
uint32_t
dlydcl
;
/**< Delay the read data capturing logic [0 ~ 15]*/
type_func_t
bypsalcc
;
/**< Bypass of the adapted loopback clock circuit @ref type_func_t*/
qspi_data_sampled_t
smpledge
;
/**< Sample edge selection(of the flash data outputs) @ref qspi_data_sampled_t*/
}
qspi_data_capture_cfg_t
;
...
...
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_adc.c
浏览文件 @
576e7f10
...
...
@@ -57,6 +57,11 @@
#ifdef ALD_ADC
#define INFO_ADC0DA *(uint32_t*)0x000802C0
#define INFO_ADC1DA *(uint32_t*)0x000802C8
#define CFG_ADC0DA *(uint32_t*)0x40083C60
#define CFG_ADC1DA *(uint32_t*)0x40083C64
/** @addtogroup ADC_Private_Functions
* @{
*/
...
...
@@ -1118,6 +1123,43 @@ uint32_t ald_adc_get_error(adc_handle_t *hperh)
return
hperh
->
error_code
;
}
/**
* @brief Adc offset adjust
* @param refmv: ADC reference voltage, unit: mV.
* @retval None
*/
void
ald_adc_offset_adjust
(
uint32_t
refmv
)
{
uint32_t
tmp
=
0
,
os
=
0
;
if
(
refmv
==
0
)
return
;
*
((
volatile
uint32_t
*
)(
0x40080000
))
=
0x55AA6996
;
*
((
volatile
uint32_t
*
)(
0x40080100
))
=
0x5A962814
;
*
((
volatile
uint32_t
*
)(
0x40080100
))
=
0xE7CB69A5
;
tmp
=
INFO_ADC0DA
;
os
=
tmp
&
0x7F
;
os
=
(
uint32_t
)((
os
*
5000
)
/
refmv
+
0
.
5
);
tmp
=
tmp
&
0xFF80
;
tmp
|=
os
;
tmp
|=
0x55AA0000
;
CFG_ADC0DA
=
tmp
;
tmp
=
INFO_ADC1DA
;
os
=
tmp
&
0x7F
;
os
=
(
uint32_t
)((
os
*
5000
)
/
refmv
+
0
.
5
);
tmp
=
tmp
&
0xFF80
;
tmp
|=
os
;
tmp
|=
0x55AA0000
;
CFG_ADC1DA
=
tmp
;
*
((
volatile
uint32_t
*
)(
0x40080100
))
=
0x123456
;
*
((
volatile
uint32_t
*
)(
0x40080100
))
=
0x123456
;
*
((
volatile
uint32_t
*
)(
0x40080000
))
=
0x123456
;
}
/**
*@}
*/
...
...
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_cmu.c
浏览文件 @
576e7f10
...
...
@@ -1106,7 +1106,7 @@ void ald_cmu_perh_clock_config(cmu_perh_t perh, type_func_t status)
return
;
}
idx
=
(
perh
>>
27
)
&
0x3
;
idx
=
(
uint32_t
)(
perh
>>
27
)
&
0x3
;
pos
=
perh
&
~
(
0x3
<<
27
);
if
(
status
)
{
...
...
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_crc.c
浏览文件 @
576e7f10
...
...
@@ -90,7 +90,7 @@ ald_status_t ald_crc_init(crc_handle_t *hperh)
tmp
=
hperh
->
perh
->
CR
;
tmp
|=
((
hperh
->
init
.
chs_rev
<<
CRC_CR_CHSREV_POS
)
|
(
hperh
->
init
.
data_inv
<<
CRC_CR_DAT
RE
V_POS
)
|
tmp
|=
((
hperh
->
init
.
chs_rev
<<
CRC_CR_CHSREV_POS
)
|
(
hperh
->
init
.
data_inv
<<
CRC_CR_DAT
IN
V_POS
)
|
(
hperh
->
init
.
chs_inv
<<
CRC_CR_CHSINV_POS
)
|
(
hperh
->
init
.
mode
<<
CRC_CR_MODE_POSS
)
|
(
CRC_DATASIZE_8
<<
CRC_CR_DATLEN_POSS
)
|
(
hperh
->
init
.
data_rev
<<
CRC_CR_DATREV_POS
)
|
(
0
<<
CRC_CR_BYTORD_POS
));
...
...
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_i2c.c
浏览文件 @
576e7f10
...
...
@@ -411,8 +411,8 @@ ald_status_t ald_i2c_reset(i2c_handle_t *hperh)
WRITE_REG
(
hperh
->
perh
->
ADDR2
,
0
);
WRITE_REG
(
hperh
->
perh
->
TIMINGR
,
0
);
WRITE_REG
(
hperh
->
perh
->
TIMEOUTR
,
0
);
WRITE_REG
(
hperh
->
perh
->
FCON
,
0
);
WRITE_REG
(
hperh
->
perh
->
TXDATA
,
0
);
SET_BIT
(
hperh
->
perh
->
FCON
,
I2C_FCON_TXFRST_MSK
);
SET_BIT
(
hperh
->
perh
->
FCON
,
I2C_FCON_RXFRST_MSK
);
WRITE_REG
(
hperh
->
perh
->
IDR
,
I2C_FLAG_MASK
);
WRITE_REG
(
hperh
->
perh
->
ICR
,
I2C_FLAG_MASK
);
...
...
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_nand.c
浏览文件 @
576e7f10
...
...
@@ -260,12 +260,12 @@ ald_status_t ald_nand_read_page_8b(nand_handle_t *hperh, nand_address_t *addr, u
/* Cards with page size <= 512 bytes */
if
((
hperh
->
config
.
page_size
)
<=
512U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
5
U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
6
U
)
{
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
}
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
5
*/
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
6
*/
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
...
...
@@ -273,13 +273,13 @@ ald_status_t ald_nand_read_page_8b(nand_handle_t *hperh, nand_address_t *addr, u
}
}
else
{
/* (hperh->config.page_size) > 512 */
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
5
U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
6
U
)
{
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
}
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
5
*/
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
6
*/
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
...
...
@@ -365,12 +365,12 @@ ald_status_t ald_nand_write_page_8b(nand_handle_t *hperh, nand_address_t *addr,
/* Cards with page size <= 512 bytes */
if
((
hperh
->
config
.
page_size
)
<=
512U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
5
U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
6
U
)
{
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
}
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
5
*/
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
6
*/
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
...
...
@@ -378,13 +378,13 @@ ald_status_t ald_nand_write_page_8b(nand_handle_t *hperh, nand_address_t *addr,
}
}
else
{
/* (hperh->config.page_size) > 512 */
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
5
U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
6
U
)
{
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
}
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
5
*/
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
6
*/
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
...
...
@@ -462,12 +462,12 @@ ald_status_t ald_nand_read_sparearea_8b(nand_handle_t *hperh, nand_address_t *ad
/* Send read spare area command sequence */
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
CMD_AREA
))
=
NAND_CMD_AREA_C
;
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
5
U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
6
U
)
{
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
}
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
5
*/
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
6
*/
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
...
...
@@ -478,13 +478,13 @@ ald_status_t ald_nand_read_sparearea_8b(nand_handle_t *hperh, nand_address_t *ad
/* Send read spare area command sequence */
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
CMD_AREA
))
=
NAND_CMD_AREA_A
;
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
5
U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
6
U
)
{
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
COLUMN_1ST_CYCLE
(
columnaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
COLUMN_2ND_CYCLE
(
columnaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
}
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
5
*/
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
6
*/
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
COLUMN_1ST_CYCLE
(
columnaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
COLUMN_2ND_CYCLE
(
columnaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
...
...
@@ -567,12 +567,12 @@ ald_status_t ald_nand_write_sparearea_8b(nand_handle_t *hperh, nand_address_t *a
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
CMD_AREA
))
=
NAND_CMD_AREA_C
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
CMD_AREA
))
=
NAND_CMD_WRITE0
;
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
5
U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
6
U
)
{
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
}
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
5
*/
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
6
*/
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
...
...
@@ -584,13 +584,13 @@ ald_status_t ald_nand_write_sparearea_8b(nand_handle_t *hperh, nand_address_t *a
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
CMD_AREA
))
=
NAND_CMD_AREA_A
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
CMD_AREA
))
=
NAND_CMD_WRITE0
;
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
5
U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
6
U
)
{
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
COLUMN_1ST_CYCLE
(
columnaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
COLUMN_2ND_CYCLE
(
columnaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
}
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
5
*/
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
6
*/
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
COLUMN_1ST_CYCLE
(
columnaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
COLUMN_2ND_CYCLE
(
columnaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
...
...
@@ -661,12 +661,12 @@ ald_status_t ald_nand_read_page_16b(nand_handle_t *hperh, nand_address_t *addr,
/* Cards with page size <= 512 bytes */
if
((
hperh
->
config
.
page_size
)
<=
512U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
5
U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
6
U
)
{
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
}
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
5
*/
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
6
*/
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
...
...
@@ -674,13 +674,13 @@ ald_status_t ald_nand_read_page_16b(nand_handle_t *hperh, nand_address_t *addr,
}
}
else
{
/* (hperh->config.page_size) > 512 */
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
5
U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
6
U
)
{
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
}
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
5
*/
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
6
*/
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
...
...
@@ -760,12 +760,12 @@ ald_status_t ald_nand_write_page_16b(nand_handle_t *hperh, nand_address_t *addr,
/* Cards with page size <= 512 bytes */
if
((
hperh
->
config
.
page_size
)
<=
512U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
5
U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
6
U
)
{
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
}
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
5
*/
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
6
*/
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
...
...
@@ -773,13 +773,13 @@ ald_status_t ald_nand_write_page_16b(nand_handle_t *hperh, nand_address_t *addr,
}
}
else
{
/* (hperh->config.page_size) > 512 */
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
5
U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
6
U
)
{
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
}
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
5
*/
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
6
*/
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
...
...
@@ -859,12 +859,12 @@ ald_status_t ald_nand_read_sparearea_16b(nand_handle_t *hperh, nand_address_t *a
/* Send read spare area command sequence */
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
CMD_AREA
))
=
NAND_CMD_AREA_C
;
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
5
U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
6
U
)
{
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
}
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
5
*/
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
6
*/
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
...
...
@@ -875,13 +875,13 @@ ald_status_t ald_nand_read_sparearea_16b(nand_handle_t *hperh, nand_address_t *a
/* Send read spare area command sequence */
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
CMD_AREA
))
=
NAND_CMD_AREA_A
;
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
5
U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
6
U
)
{
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
COLUMN_1ST_CYCLE
(
columnaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
COLUMN_2ND_CYCLE
(
columnaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
}
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
5
*/
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
6
*/
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
COLUMN_1ST_CYCLE
(
columnaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
COLUMN_2ND_CYCLE
(
columnaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
...
...
@@ -965,12 +965,12 @@ ald_status_t ald_nand_write_sparearea_16b(nand_handle_t *hperh, nand_address_t *
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
CMD_AREA
))
=
NAND_CMD_AREA_C
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
CMD_AREA
))
=
NAND_CMD_WRITE0
;
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
5
U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
6
U
)
{
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
}
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
5
*/
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
6
*/
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
0x00
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
...
...
@@ -982,13 +982,13 @@ ald_status_t ald_nand_write_sparearea_16b(nand_handle_t *hperh, nand_address_t *
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
CMD_AREA
))
=
NAND_CMD_AREA_A
;
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
CMD_AREA
))
=
NAND_CMD_WRITE0
;
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
5
U
)
{
if
(((
hperh
->
config
.
block_size
)
*
(
hperh
->
config
.
block_nbr
))
<=
6553
6
U
)
{
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
COLUMN_1ST_CYCLE
(
columnaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
COLUMN_2ND_CYCLE
(
columnaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_2ND_CYCLE
(
nandaddr
);
}
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
5
*/
else
{
/* ((hperh->config.block_size)*(hperh->config.block_nbr)) > 6553
6
*/
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
COLUMN_1ST_CYCLE
(
columnaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
COLUMN_2ND_CYCLE
(
columnaddr
);
*
(
__IO
uint8_t
*
)((
uint32_t
)(
deviceaddr
|
ADDR_AREA
))
=
ADDR_1ST_CYCLE
(
nandaddr
);
...
...
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_pis.c
浏览文件 @
576e7f10
...
...
@@ -192,7 +192,7 @@ ald_status_t ald_pis_output_start(pis_handle_t *hperh, pis_out_ch_t ch)
assert_param
(
IS_PIS
(
hperh
->
perh
));
assert_param
(
IS_PIS_OUPUT_CH
(
ch
));
__LOCK
(
hperh
);
SET_BIT
(
PIS
->
CH_OER
,
(
1
<<
ch
));
SET_BIT
(
PIS
->
CH_OER
,
(
1
<<
(
uint32_t
)
ch
));
__UNLOCK
(
hperh
);
return
OK
;
...
...
@@ -215,7 +215,7 @@ ald_status_t ald_pis_output_stop(pis_handle_t *hperh, pis_out_ch_t ch)
assert_param
(
IS_PIS
(
hperh
->
perh
));
assert_param
(
IS_PIS_OUPUT_CH
(
ch
));
__LOCK
(
hperh
);
CLEAR_BIT
(
PIS
->
CH_OER
,
(
1
<<
ch
));
CLEAR_BIT
(
PIS
->
CH_OER
,
(
1
<<
(
uint32_t
)
ch
));
__UNLOCK
(
hperh
);
return
OK
;
...
...
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_qspi.c
浏览文件 @
576e7f10
...
...
@@ -259,7 +259,7 @@ ald_status_t ald_qspi_read_data_capture_config(qspi_handle_t * hperh, qspi_data_
return
status
;
MODIFY_REG
(
hperh
->
perh
->
RDCR
,
QSPI_RDCR_BYLPC_MSK
|
QSPI_RDCR_DLYR_MSK
|
QSPI_RDCR_SMES_MSK
|
QSPI_RDCR_DLYT_MSK
,
\
dtcptcfg
->
bypsalcc
|
(
dtcptcfg
->
dlydcl
<<
1
)
|
(
dtcptcfg
->
smpledge
<<
5
)
|
(
dtcptcfg
->
dlytd
<<
16
));
0x1U
|
(
dtcptcfg
->
dlydcl
<<
1
)
|
(
dtcptcfg
->
smpledge
<<
5
)
|
(
dtcptcfg
->
dlytd
<<
16
));
return
status
;
}
...
...
@@ -330,14 +330,6 @@ ald_status_t qspi_dac_config(qspi_handle_t * hperh, qspi_dac_cfg_t * dcfg)
if
(
ald_qspi_read_config
(
hperh
,
&
dcfg
->
rdinit
)
!=
OK
)
return
ERROR
;
MODIFY_REG
(
hperh
->
perh
->
DWIR
,
QSPI_DWIR_WINST_MSK
|
QSPI_DWIR_DCYC_MSK
|
\
QSPI_DWIR_ADMODE_MSK
|
QSPI_DWIR_DMODE_MSK
|
\
QSPI_DWIR_WELD_MSK
,
dcfg
->
wrinit
.
wrcde
|
dcfg
->
wrinit
.
autowel
<<
8
|
\
(
dcfg
->
wrinit
.
addxfer
<<
12
)
|
\
(
dcfg
->
wrinit
.
datxfer
<<
16
)
|
\
(
dcfg
->
wrinit
.
dcyles
<<
24
));
MODIFY_REG
(
hperh
->
perh
->
DRIR
,
QSPI_DRIR_RINST_MSK
,
dcfg
->
wrinit
.
instxfer
);
if
(
dcfg
->
addrremap
)
MODIFY_REG
(
hperh
->
perh
->
RAR
,
QSPI_RAR_READDR_MSK
,
dcfg
->
remapaddr
);
...
...
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_wdt.c
浏览文件 @
576e7f10
...
...
@@ -124,9 +124,13 @@ void ald_wwdt_clear_flag_status(void)
*/
void
ald_wwdt_feed_dog
(
void
)
{
uint16_t
i
=
0
;
WWDT_UNLOCK
();
WRITE_REG
(
WWDT
->
INTCLR
,
0x1
);
WWDT_LOCK
();
for
(
i
=
0
;
i
<
0x2ff
;
++
i
)
__nop
();
return
;
}
...
...
@@ -198,7 +202,9 @@ it_status_t ald_iwdt_get_flag_status(void)
*/
void
ald_iwdt_clear_flag_status
(
void
)
{
IWDT_UNLOCK
();
WRITE_REG
(
IWDT
->
INTCLR
,
1
);
IWDT_LOCK
();
return
;
}
...
...
@@ -208,10 +214,14 @@ void ald_iwdt_clear_flag_status(void)
*/
void
ald_iwdt_feed_dog
(
void
)
{
uint16_t
i
=
0
;
IWDT_UNLOCK
();
WRITE_REG
(
IWDT
->
INTCLR
,
1
);
IWDT_LOCK
();
for
(
i
=
0
;
i
<
0x2ff
;
++
i
)
__NOP
();
return
;
}
/**
...
...
bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/utils.c
浏览文件 @
576e7f10
...
...
@@ -175,6 +175,8 @@ __weak void ald_tick_init(uint32_t prio)
void
ald_systick_interval_select
(
systick_interval_t
value
)
{
assert_param
(
IS_SYSTICK_INTERVAL
(
value
));
if
(
value
==
0
)
return
;
SysTick_Config
(
ald_cmu_get_sys_clock
()
/
value
);
__systick_interval
=
value
;
...
...
@@ -506,7 +508,7 @@ void sys_config(void)
{
uint32_t
i
=
0
,
tmp
=
0
;
uint8_t
err
=
0
,
flag
=
0
;
uint32_t
inf014
=
0
,
inf0154
=
0
;
uint32_t
inf014
=
0
,
inf0154
=
0
,
inf0244
=
0
;
uint8_t
cnt
=
4
;
uint32_t
*
inf0_addr
=
(
uint32_t
*
)
0x20003C00
;
...
...
@@ -514,7 +516,12 @@ void sys_config(void)
inf014
=
*
((
uint32_t
*
)(
0x80000
+
56
));
/* read VR1_VREF register */
inf0154
=
*
((
uint32_t
*
)(
0x80000
+
616
));
/* read Chip_v */
inf0244
=
*
((
uint32_t
*
)(
0x80000
+
0x03D0
));
/* if D version ,do nothing */
if
(
inf0244
==
0xFFFFFF44
)
return
;
if
(
inf0154
==
0xFFFFFFFF
)
while
(
1
);
...
...
@@ -528,7 +535,7 @@ void sys_config(void)
/* change CFG_VR1_VREF value, FLASH ref 0xA */
tmp
=
(
inf0154
>>
8
)
&
0xF
;
if
(
0xA
!=
tmp
)
{
inf0154
&=
~
(
0xF
<<
8
);
inf0154
&=
(
uint32_t
)
~
(
0xF
<<
8
);
inf0154
|=
(
0xA
<<
8
);
inf0154
=
(
inf0154
&
(
0x0000FFFF
))
|
((
~
(
inf0154
&
0xFFFF
))
<<
16
);
flag
=
0x1
;
...
...
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