*** EFM32 branch ***

Add missing folder

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1842 bbd45198-f89e-11dd-88c7-29a3b14d5316

bsp/efm32/EFM32GG_DK3750/dvk.c

+/**************************************************************************//**
+ * @file
+ * @brief EFM32GG_DK3750 board support package
+ * @author Energy Micro AS
+ * @version 1.2.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
+ ******************************************************************************
+ *
+ * This source code is the property of Energy Micro AS. The source and compiled
+ * code may only be used on Energy Micro "EFM32" microcontrollers.
+ *
+ * This copyright notice may not be removed from the source code nor changed.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include "efm32.h"
+#include "efm32_gpio.h"
+#include "efm32_cmu.h"
+#include "dvk.h"
+#include "dvk_bcregisters.h"
+
+/** Keep intialization mode */
+DVK_Init_TypeDef dvkOperationMode;
+
+/**************************************************************************//**
+ * @brief Initialize EMF32GG_DK3750 board support package functionality
+ * @param[in] mode Initialize in EBI or SPI mode
+ *****************************************************************************/
+void DVK_init(DVK_Init_TypeDef mode)
+{
+  bool ret = false;
+
+  if (mode == DVK_Init_EBI)
+  {
+    dvkOperationMode = mode;
+    DVK_busControlMode(DVK_BusControl_EBI);
+    ret = DVK_EBI_init();
+  }
+  if (mode == DVK_Init_SPI)
+  {
+    dvkOperationMode = mode;
+    DVK_busControlMode(DVK_BusControl_SPI);
+    ret = DVK_SPI_init();
+  }
+
+  if (ret == false)
+  {
+    /* Unable to access board control, this is an abornomal situation. */
+    /* Try to restart kit and reprogram EFM32 with a standard example */
+    /* as this is most likely caused by a peripheral misconfiguration. */
+    while (1) ;
+  }
+
+  DVK_setEnergyMode(0);
+}
+
+
+/**************************************************************************//**
+ * @brief Disable EFM32GG_DK3750 board support package functionality
+ *****************************************************************************/
+void DVK_disable(void)
+{
+  if (dvkOperationMode == DVK_Init_EBI)
+  {
+    DVK_EBI_disable();
+  }
+  if (dvkOperationMode == DVK_Init_SPI)
+  {
+    DVK_SPI_disable();
+  }
+  DVK_busControlMode(DVK_BusControl_OFF);
+}
+
+
+/**************************************************************************//**
+ * @brief Configure Board Controller bus decode logic
+ * @param[in] mode Mode of operation for decode logic
+ *****************************************************************************/
+void DVK_busControlMode(DVK_BusControl_TypeDef mode)
+{
+  /* Configure GPIO pins for Board Bus mode */
+  /* Note: Inverter on GPIO lines to BC, so signals are active low */
+  CMU_ClockEnable(cmuClock_GPIO, true);
+
+  switch (mode)
+  {
+  case DVK_BusControl_OFF:
+    /* Configure board for OFF mode on PB15 MCU_EBI_CONNECT */
+    GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 1);
+    /* Configure board for OFF mode on PD13 MCU_SPI_CONNECT */
+    GPIO_PinModeSet(gpioPortD, 13, gpioModePushPull, 1);
+    break;
+  case DVK_BusControl_DIRECT:
+    /* Configure board for DIRECT on PB15 MCU_EBI_CONNECT */
+    GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 0);
+    /* Configure board for DIRECT on PD13 MCU_SPI_CONNECT */
+    GPIO_PinModeSet(gpioPortD, 13, gpioModePushPull, 0);
+    break;
+  case DVK_BusControl_SPI:
+    /* Configure board for SPI mode on PB15 MCU_EBI_CONNECT */
+    GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 1);
+    /* Configure board for SPI mode on PD13 MCU_SPI_CONNECT */
+    GPIO_PinModeSet(gpioPortD, 13, gpioModePushPull, 0);
+    break;
+  case DVK_BusControl_EBI:
+  default:
+    /* Configure board for EBI mode on PB15 MCU_EBI_CONNECT */
+    GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 0);
+    /* Configure board for EBI mode on PD13 MCU_SPI_CONNECT */
+    GPIO_PinModeSet(gpioPortD, 13, gpioModePushPull, 1);
+    break;
+  }
+}
+
+
+/**************************************************************************//**
+ * @brief Set board LEDs
+ *
+ * @param[in] leds
+ *    16 bits enabling or disabling individual board LEDs
+ *****************************************************************************/
+void DVK_setLEDs(uint16_t leds)
+{
+  DVK_writeRegister(&BC_REGISTER->UIF_LEDS, leds);
+}
+
+
+/**************************************************************************//**
+ * @brief Get board LED configuration
+ *
+ * @return
+ *    16 bits of LED status
+ *****************************************************************************/
+uint16_t DVK_getLEDs(void)
+{
+  return DVK_readRegister(&BC_REGISTER->UIF_LEDS);
+}
+
+
+/**************************************************************************//**
+ * @brief DK3750 Peripheral Access Control
+ *    Enable or disable access to on-board peripherals through switches
+ *    and SPI switch where applicable
+ * @param[in] perf
+ *    Which peripheral to configure
+ * @param[in] enable
+ *    If true, sets up access to peripheral, if false disables it
+ *****************************************************************************/
+void DVK_peripheralAccess(DVK_Peripheral_TypeDef perf, bool enable)
+{
+  uint16_t perfControl;
+
+  perfControl = DVK_readRegister(&BC_REGISTER->PERICON);
+
+  /* Enable or disable the specificed peripheral by setting board control switch */
+  if (enable)
+  {
+    switch (perf)
+    {
+    case DVK_RS232_SHUTDOWN:
+      perfControl |= (1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
+      break;
+
+    case DVK_RS232_UART:
+      perfControl &= ~(1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_RS232_LEUART_SHIFT);
+      perfControl |= (1 << BC_PERICON_RS232_UART_SHIFT);
+      break;
+
+    case DVK_RS232_LEUART:
+      perfControl &= ~(1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_RS232_UART_SHIFT);
+      perfControl |= (1 << BC_PERICON_RS232_LEUART_SHIFT);
+      break;
+
+    case DVK_I2C:
+      perfControl |= (1 << BC_PERICON_I2C_SHIFT);
+      break;
+
+    case DVK_ETH:
+      /* Enable SPI interface */
+      DVK_spiControl(DVK_SPI_Ethernet);
+
+      /* Enable Ethernet analog switches */
+      perfControl |= (1 << BC_PERICON_I2S_ETH_SHIFT);
+      perfControl |= (1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
+      break;
+
+    case DVK_I2S:
+      /* Direct SPI interface to I2S DAC */
+      DVK_spiControl(DVK_SPI_Audio);
+
+      /* Also make surea Audio out is connected for I2S operation */
+      perfControl |= (1 << BC_PERICON_AUDIO_OUT_SHIFT);
+      perfControl |= (1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
+      perfControl |= (1 << BC_PERICON_I2S_ETH_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
+      break;
+
+    case DVK_TRACE:
+      perfControl |= (1 << BC_PERICON_TRACE_SHIFT);
+      break;
+
+    case DVK_TOUCH:
+      perfControl |= (1 << BC_PERICON_TOUCH_SHIFT);
+      break;
+
+    case DVK_AUDIO_IN:
+      perfControl |= (1 << BC_PERICON_AUDIO_IN_SHIFT);
+      break;
+
+    case DVK_AUDIO_OUT:
+      perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
+      perfControl |= (1 << BC_PERICON_AUDIO_OUT_SHIFT);
+      break;
+
+    case DVK_ANALOG_DIFF:
+      perfControl |= (1 << BC_PERICON_ANALOG_DIFF_SHIFT);
+      break;
+
+    case DVK_ANALOG_SE:
+      perfControl |= (1 << BC_PERICON_ANALOG_SE_SHIFT);
+      break;
+
+    case DVK_MICROSD:
+      perfControl |= (1 << BC_PERICON_SPI_SHIFT);
+      break;
+
+    case DVK_TFT:
+      /* Enable SPI to SSD2119 */
+      DVK_spiControl(DVK_SPI_Display);
+      /* Enable SPI analog switch */
+      perfControl |= (1 << BC_PERICON_I2S_ETH_SHIFT);
+      break;
+    }
+  }
+  else
+  {
+    switch (perf)
+    {
+    case DVK_RS232_SHUTDOWN:
+      perfControl &= ~(1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
+      break;
+
+    case DVK_RS232_UART:
+      perfControl |= (1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_RS232_UART_SHIFT);
+      break;
+
+    case DVK_RS232_LEUART:
+      perfControl |= (1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_RS232_LEUART_SHIFT);
+      break;
+
+    case DVK_I2C:
+      perfControl &= ~(1 << BC_PERICON_I2C_SHIFT);
+      break;
+
+    case DVK_ETH:
+      /* Enable Ethernet analog switches */
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
+      break;
+
+    case DVK_I2S:
+      /* Also make surea Audio out is connected for I2S operation */
+      perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
+      break;
+
+    case DVK_TRACE:
+      perfControl &= ~(1 << BC_PERICON_TRACE_SHIFT);
+      break;
+
+    case DVK_TOUCH:
+      perfControl &= ~(1 << BC_PERICON_TOUCH_SHIFT);
+      break;
+
+    case DVK_AUDIO_IN:
+      perfControl &= ~(1 << BC_PERICON_AUDIO_IN_SHIFT);
+      break;
+
+    case DVK_AUDIO_OUT:
+      perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SHIFT);
+      break;
+
+    case DVK_ANALOG_DIFF:
+      perfControl &= ~(1 << BC_PERICON_ANALOG_DIFF_SHIFT);
+      break;
+
+    case DVK_ANALOG_SE:
+      perfControl &= ~(1 << BC_PERICON_ANALOG_SE_SHIFT);
+      break;
+
+    case DVK_MICROSD:
+      perfControl &= ~(1 << BC_PERICON_SPI_SHIFT);
+      break;
+
+    case DVK_TFT:
+      /* Disable SPI analog switch */
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
+      break;
+    }
+  }
+  /* Write back register */
+  DVK_writeRegister(&BC_REGISTER->PERICON, perfControl);
+}
+
+
+/**************************************************************************//**
+ * @brief Get status of push buttons on kit
+ *
+ * @return
+ *    Button state, each bit representing each push button PB0-PB4
+ *****************************************************************************/
+uint16_t DVK_getPushButtons(void)
+{
+  uint16_t tmp;
+
+  tmp = DVK_readRegister(&BC_REGISTER->UIF_PB);
+
+  return (~tmp) & 0x000F;
+}
+
+
+/**************************************************************************//**
+ * @brief Configure SPI for correct peripheral
+ *
+ * @param[in] device
+ *    Device to enable SPI bus for
+ *****************************************************************************/
+void DVK_spiControl(DVK_SpiControl_TypeDef device)
+{
+  switch (device)
+  {
+  case DVK_SPI_Audio:
+    DVK_writeRegister(&BC_REGISTER->SPI_DEMUX, BC_SPI_DEMUX_SLAVE_AUDIO);
+    break;
+
+  case DVK_SPI_Ethernet:
+    DVK_writeRegister(&BC_REGISTER->SPI_DEMUX, BC_SPI_DEMUX_SLAVE_ETHERNET);
+    break;
+
+  case DVK_SPI_Display:
+    DVK_writeRegister(&BC_REGISTER->SPI_DEMUX, BC_SPI_DEMUX_SLAVE_DISPLAY);
+    break;
+  }
+}
+
+
+/**************************************************************************//**
+ * @brief Inform AEM/Board Controller about what energy mode we are currently
+ *        entering. This information can be used for better visual feedback of
+ *        EFM32GG activity for the board controller and PC applications
+ * @param energyMode What energy mode we are going to use next
+ *****************************************************************************/
+void DVK_setEnergyMode(uint16_t energyMode)
+{
+  DVK_writeRegister(&BC_REGISTER->EM, energyMode);
+}
+
+
+/**************************************************************************//**
+ * @brief Enable "Control" buttons/joystick/dip switch interrupts
+ * @param flags Board control interrupt flags, INTEN_<something>
+ *****************************************************************************/
+void DVK_enableInterrupt(uint16_t flags)
+{
+  uint16_t tmp;
+
+  /* Add flags to interrupt enable register */
+  tmp  = DVK_readRegister(&BC_REGISTER->INTEN);
+  tmp |= flags;
+  DVK_writeRegister(&BC_REGISTER->INTEN, tmp);
+}
+
+
+/**************************************************************************//**
+ * @brief Disable "Control" buttons/joystick/dip switch interrupts
+ * @param flags Board control interrupt flags, BC_INTEN_<something>
+ *****************************************************************************/
+void DVK_disableInterrupt(uint16_t flags)
+{
+  uint16_t tmp;
+
+  /* Clear flags from interrupt enable register */
+  tmp   = DVK_readRegister(&BC_REGISTER->INTEN);
+  flags = ~(flags);
+  tmp  &= flags;
+  DVK_writeRegister(&BC_REGISTER->INTEN, tmp);
+}
+
+
+/**************************************************************************//**
+ * @brief Clear interrupts
+ * @param flags Board control interrupt flags, BC_INTEN_<something>
+ *****************************************************************************/
+void DVK_clearInterruptFlags(uint16_t flags)
+{
+  uint16_t tmp;
+  tmp  = DVK_readRegister(&BC_REGISTER->INTFLAG);
+  tmp &= ~(flags);
+  DVK_writeRegister(&BC_REGISTER->INTFLAG, tmp);
+}
+
+
+/**************************************************************************//**
+ * @brief Read interrupt flags
+ * @return Returns currently triggered interrupts
+ *****************************************************************************/
+uint16_t DVK_getInterruptFlags(void)
+{
+  return DVK_readRegister(&BC_REGISTER->INTFLAG);
+}
+
+
+/**************************************************************************//**
+ * @brief Get joystick button status
+ * @return Joystick controller status
+ *****************************************************************************/
+uint16_t DVK_getJoystick(void)
+{
+  uint16_t joyStick = 0;
+
+  joyStick = ~(DVK_readRegister(&BC_REGISTER->UIF_JOYSTICK)) & 0x001f;
+
+  return joyStick;
+}
+
+
+/**************************************************************************//**
+ * @brief Get dipswitch status
+ *        The DIP switches are free for user programmable purposes
+ * @return Dip switch
+ *****************************************************************************/
+uint16_t DVK_getDipSwitch(void)
+{
+  return DVK_readRegister(&BC_REGISTER->UIF_DIP) & 0x000f;
+}
+
+
+/**************************************************************************//**
+ * @brief Configure display control
+ *****************************************************************************/
+void DVK_displayControl(DVK_Display_TypeDef option)
+{
+  uint16_t tmp;
+
+  switch (option)
+  {
+  case DVK_Display_EBI:
+    DVK_writeRegister(&BC_REGISTER->ARB_CTRL, BC_ARB_CTRL_EBI);
+    break;
+
+  case DVK_Display_SPI:
+    DVK_writeRegister(&BC_REGISTER->ARB_CTRL, BC_ARB_CTRL_SPI);
+    break;
+
+  case DVK_Display_BC:
+    DVK_writeRegister(&BC_REGISTER->ARB_CTRL, BC_ARB_CTRL_BC);
+    break;
+
+  case DVK_Display_PowerEnable:
+    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
+    tmp |= (BC_DISPLAY_CTRL_POWER_ENABLE);
+    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
+    break;
+
+  case DVK_Display_PowerDisable:
+    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
+    tmp &= ~(BC_DISPLAY_CTRL_POWER_ENABLE);
+    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
+    break;
+
+  case DVK_Display_ResetAssert:
+    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
+    tmp |= (BC_DISPLAY_CTRL_RESET);
+    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
+    break;
+
+  case DVK_Display_ResetRelease:
+    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
+    tmp &= ~(BC_DISPLAY_CTRL_RESET);
+    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
+    break;
+
+  case DVK_Display_Mode8080:
+    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
+    tmp &= ~(BC_DISPLAY_CTRL_MODE_GENERIC);
+    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
+    break;
+
+  case DVK_Display_ModeGeneric:
+    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
+    tmp |= (BC_DISPLAY_CTRL_MODE_GENERIC);
+    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
+    break;
+
+  default:
+    /* Unknown command */
+    while (1) ;
+  }
+}
+
+/** @} (end group BSP) */

bsp/efm32/EFM32GG_DK3750/dvk.h

+/**************************************************************************//**
+ * @file
+ * @brief EFM32GG_DK3750 board support package API
+ * @author Energy Micro AS
+ * @version 1.2.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
+ ******************************************************************************
+ *
+ * This source code is the property of Energy Micro AS. The source and compiled
+ * code may only be used on Energy Micro "EFM32" microcontrollers.
+ *
+ * This copyright notice may not be removed from the source code nor changed.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+#ifndef __DVK_H
+#define __DVK_H
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "efm32.h"
+#include "dvk_bcregisters.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** DVK board control access method */
+typedef enum
+{
+  DVK_Init_EBI,    /**< Use EBI to interface board control functionality */
+  DVK_Init_SPI,    /**< Use SPI to interface board control functionality */
+  DVK_Init_DIRECT, /**< No board control, only GPIO */
+  DVK_Init_OFF,    /**< Disabled */
+} DVK_Init_TypeDef;
+
+extern DVK_Init_TypeDef dvkOperationMode;
+
+/** Bus control access */
+typedef enum
+{
+  DVK_BusControl_OFF,    /**< Board control disable */
+  DVK_BusControl_DIRECT, /**< GPIO direct drive (n/a) */
+  DVK_BusControl_SPI,    /**< Configure Board controller for SPI mode */
+  DVK_BusControl_EBI,    /**< Configure Board controller for EBI mode */
+} DVK_BusControl_TypeDef;
+
+
+/** Display Control */
+typedef enum
+{
+  DVK_Display_EBI,          /**< SSD2119 TFT controller driven by EFM32GG EBI interface */
+  DVK_Display_SPI,          /**< SSD2119 TFT controller driven by EFM32GG SPI interface */
+  DVK_Display_BC,           /**< SSD2119 TFT controller driven by board controller (AEM) */
+  DVK_Display_PowerEnable,  /**< SSD2119 Enable power  */
+  DVK_Display_PowerDisable, /**< SSD2119 Disable power  */
+  DVK_Display_ResetAssert,  /**< Hold SSD2119 in reset */
+  DVK_Display_ResetRelease, /**< Release SSD2119 in reset */
+  DVK_Display_Mode8080,     /**< Configure SSD2119 for 8080 mode of operation  */
+  DVK_Display_ModeGeneric,  /**< Configure SSD2119 for Generic+SPI mode of operation */
+} DVK_Display_TypeDef;
+
+
+/** SPI control */
+typedef enum
+{
+  DVK_SPI_Audio,    /**< Configure switchable SPI interface to Audio I2S */
+  DVK_SPI_Ethernet, /**< Configure switchable SPI interface to Ethernet */
+  DVK_SPI_Display,  /**< Configure switchable SPI interface to SSD2119 */
+} DVK_SpiControl_TypeDef;
+
+
+/** Peripherals control structure */
+typedef enum
+{
+  DVK_RS232_SHUTDOWN, /**< Disable RS232 */
+  DVK_RS232_UART,     /**< UART control of RS232 */
+  DVK_RS232_LEUART,   /**< LEUART control of RS232 */
+  DVK_I2C,            /**< I2C */
+  DVK_ETH,            /**< Ethernet */
+  DVK_I2S,            /**< Audio I2S */
+  DVK_TRACE,          /**< ETM Trace */
+  DVK_TOUCH,          /**< Display touch interface */
+  DVK_AUDIO_IN,       /**< Audio In */
+  DVK_AUDIO_OUT,      /**< Audio Out */
+  DVK_ANALOG_DIFF,    /**< Analog DIFF */
+  DVK_ANALOG_SE,      /**< Analog SE */
+  DVK_MICROSD,        /**< MicroSD SPI interace */
+  DVK_TFT,            /**< SSD2119 TFT controller */
+} DVK_Peripheral_TypeDef;
+
+
+/* Initalize DVK board for access to external PSRAM, Flash and BC registers */
+void DVK_init(DVK_Init_TypeDef mode);
+void DVK_disable(void);
+
+/* Board controller control API */
+void DVK_busControlMode(DVK_BusControl_TypeDef mode);
+void DVK_peripheralAccess(DVK_Peripheral_TypeDef perf, bool enable);
+void DVK_spiControl(DVK_SpiControl_TypeDef device);
+
+/* Board controller access function  */
+uint16_t DVK_getPushButtons(void);
+uint16_t DVK_getJoystick(void);
+uint16_t DVK_getDipSwitch(void);
+void DVK_setLEDs(uint16_t leds);
+uint16_t DVK_getLEDs(void);
+
+/* Miscellaneous */
+void DVK_setEnergyMode(uint16_t energyMode);
+void DVK_displayControl(DVK_Display_TypeDef option);
+
+/* Board controller interrupt support */
+void DVK_enableInterrupt(uint16_t flags);
+void DVK_disableInterrupt(uint16_t flags);
+uint16_t DVK_getInterruptFlags(void);
+void DVK_clearInterruptFlags(uint16_t flags);
+
+/* EBI access */
+bool DVK_EBI_init(void);
+void DVK_EBI_disable(void);
+void DVK_EBI_extendedAddressRange(bool enable);
+static __INLINE void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t data);
+static __INLINE uint16_t DVK_EBI_readRegister(volatile uint16_t *addr);
+
+/* SPI access */
+bool DVK_SPI_init(void);
+void DVK_SPI_disable(void);
+uint16_t DVK_SPI_readRegister(volatile uint16_t *addr);
+void DVK_SPI_writeRegister(volatile uint16_t *addr, uint16_t data);
+
+/* MCU-plug-in-board (BRD3600) API */
+void DVK_BRD3600A_init(void);
+void DVK_BRD3600A_deInit(void);
+void DVK_BRD3600A_usbStatusLEDEnable(int enable);
+void DVK_BRD3600A_usbVBUSSwitchEnable(int enable);
+int  DVK_BRD3600A_usbVBUSGetOCFlagState(void);
+
+
+/* For "backward compatibility" with DVK */
+/** DVK_enablePeripheral() backward compatibility */
+#define DVK_enablePeripheral(X)     DVK_peripheralAccess(X, true) 
+/** DVK_disablePeripheral() backward compatibility */
+#define DVK_disablePeripheral(X)    DVK_peripheralAccess(X, false)
+
+/**************************************************************************//**
+ * @brief Write data into 16-bit board control register using mem.mapped EBI
+ * @param addr Address of board controller register
+ * @param data Data to write into register
+ *****************************************************************************/
+static __INLINE void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t data)
+{
+  *addr = data;
+}
+
+
+/**************************************************************************//**
+ * @brief Read data from 16-bit board control register using memory mapped EBI
+ * @param addr Register to read from
+ * @return Value of board controller register
+ *****************************************************************************/
+static __INLINE uint16_t DVK_EBI_readRegister(volatile uint16_t *addr)
+{
+  return *addr;
+}
+
+
+/**************************************************************************//**
+ * @brief Read data from 16-bit board control register
+ * @param addr Register to read
+ * @return Value of board controller register 
+ *****************************************************************************/
+static __INLINE uint16_t DVK_readRegister(volatile uint16_t *addr)
+{
+  if (dvkOperationMode == DVK_Init_EBI)
+  {
+    return DVK_EBI_readRegister(addr);
+  }
+  else
+  {
+    return DVK_SPI_readRegister(addr);
+  }
+}
+
+
+/**************************************************************************//**
+ * @brief Write data into 16-bit board control register
+ * @param addr Address to board control register
+ * @param data Data to write into register
+ *****************************************************************************/
+static __INLINE void DVK_writeRegister(volatile uint16_t *addr, uint16_t data)
+{
+  if (dvkOperationMode == DVK_Init_EBI)
+  {
+    DVK_EBI_writeRegister(addr, data);
+  }
+  else
+  {
+    DVK_SPI_writeRegister(addr, data);
+  }
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} (end group BSP) */
+
+#endif

bsp/efm32/EFM32GG_DK3750/dvk_bcregisters.h

+/**************************************************************************//**
+ * @file
+ * @brief Board Control register definitions
+ * @author Energy Micro AS
+ * @version 1.2.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
+ ******************************************************************************
+ *
+ * This source code is the property of Energy Micro AS. The source and compiled
+ * code may only be used on Energy Micro "EFM32" microcontrollers.
+ *
+ * This copyright notice may not be removed from the source code nor changed.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+#ifndef __DVK_BCREGISTERS_H
+#define __DVK_BCREGISTERS_H
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**************************************************************************//**
+ * Defines FPGA register bank for Energy Micro Development Kit (DVK) board,
+ * i.e. board control registers
+ *****************************************************************************/
+#define BC_REGISTER_BASE    0x80000000  /**< Board Controller registers base address */
+#define BC_SSD2119_BASE     0x84000000  /**< TFT-LCD controller */
+#define BC_PSRAM_BASE       0x88000000  /**< PSRAM base address */
+#define BC_FLASH_BASE       0x8C000000  /**< External Flash base address */
+
+
+/**************************************************************************//**
+ * Defines bit fields for board control registers
+ *****************************************************************************/
+
+/* Define registers in a similar manner to CMSIS standards */
+/** Read/Write board controller register */
+#define __IO    volatile
+
+/** Board Controller Register definiton */
+typedef struct
+{
+  __IO uint16_t RESERVERD0;        /**< 0x00 - Reserved */
+  __IO uint16_t EM;                /**< 0x02 - Energy Mode indicator  */
+  __IO uint16_t MAGIC;             /**< 0x04 - Should always read 0xEF32 */
+
+  __IO uint16_t UIF_LEDS;          /**< 0x06 - On board LEDs */
+  __IO uint16_t UIF_PB;            /**< 0x08 - Push button PB0-PB4 status */
+  __IO uint16_t UIF_DIP;           /**< 0x0A - DIP switch status */
+  __IO uint16_t UIF_JOYSTICK;      /**< 0x0C - Joystick presses */
+  __IO uint16_t UIF_AEM;           /**< 0x0E - AEM button */
+  __IO uint16_t UIF_CTRL;          /**< 0x10 - CPLD control register */
+  __IO uint16_t DISPLAY_CTRL;      /**< 0x12 - SSD2119 TFT display control */
+  __IO uint16_t EBI_CTRL;          /**< 0x14 - Extended Address Mode control */
+  __IO uint16_t ARB_CTRL;          /**< 0x16 - Arbiter control, board control or EFM32GG access to display */
+  __IO uint16_t PERICON;           /**< 0x18 - Peripheral Control, on board switches */
+  __IO uint16_t SPI_DEMUX;         /**< 0x1A - SPI DEMUX */
+  __IO uint16_t RESERVERD1[0x02];  /**< 0x1C - Reserved */
+
+  __IO uint16_t ADC_WRITE;         /**< 0x20 - AEM ADC SPI interface */
+  __IO uint16_t ADC_STATUS;        /**< 0x22 - AEM ADC SPI interface */
+  __IO uint16_t ADC_READ;          /**< 0x24 - AEM ADC SPI interface */
+
+  __IO uint16_t RESERVED2;         /**< 0x26 - Reserved */
+
+  __IO uint16_t HW_VERSION;        /**< 0x28 - Hardware version */
+  __IO uint16_t FW_BUILDNO;        /**< 0x2A - Firmware build number */
+  __IO uint16_t FW_VERSION;        /**< 0x2C - Firmware version */
+
+  __IO uint16_t SCRATCH_COMMON;    /**< 0x2E - Shared register between board controller and EFM32 */
+
+  __IO uint16_t SCRATCH_EFM0;      /**< 0x30 - EFM32 accessible registers */
+  __IO uint16_t SCRATCH_EFM1;      /**< 0x32 */
+  __IO uint16_t SCRATCH_EFM2;      /**< 0x34 */
+  __IO uint16_t SCRATCH_EFM3;      /**< 0x36 */
+
+  __IO uint16_t SCRATCH_BC0;       /**< 0x38 - Board Control registers */
+  __IO uint16_t SCRATCH_BC1;       /**< 0x3A */
+  __IO uint16_t SCRATCH_BC2;       /**< 0x3C */
+  __IO uint16_t SCRATCH_BC3;       /**< 0x3E */
+
+  __IO uint16_t INTFLAG;           /**< 0x40 - Interrupt Status flags */
+  __IO uint16_t INTEN;             /**< 0x42 - Interrupt Enable flags */
+
+  __IO uint16_t RESERVERD3[0x1e];  /**< 0x44 - Reserved */
+
+  __IO uint16_t BC_MBOX_TXCTRL;    /**< 0x80 - BC <-> EFM32 communication channel */
+  __IO uint16_t BC_MBOX_TXDATA;    /**< 0x82 */
+  __IO uint16_t BC_MBOX_TXSTATUS0; /**< 0x84 */
+  __IO uint16_t BC_MBOX_TXSTATUS1; /**< 0x86 */
+
+  __IO uint16_t RESERVED4[0x0d];   /**< 0xa0 - Reserved */
+
+  __IO uint16_t MBOX_TXCTRL;       /**< 0xa2 - BC <-> EFM32 communication channel */
+  __IO uint16_t MBOX_TXDATA;       /**< 0xa4 */
+  __IO uint16_t MBOX_TXSTATUS0;    /**< 0xa6 */
+  __IO uint16_t MBOX_TXSTATUS1;    /**< 0xa8 */
+
+  __IO uint16_t RESERVED5[0x0b];   /**< 0xaa - Reserved */
+
+  __IO uint16_t BUF_CTRL;          /**< 0xc0 - Buffer Controller Control */
+} BC_TypeDef;
+
+/* Cast into register structure */
+#define BC_REGISTER                         ((BC_TypeDef *) BC_REGISTER_BASE) /**< Register block base */
+
+/* Energy Mode indicator */
+#define BC_EM_EM0                           (0)  /**< Indicate EM0 */
+#define BC_EM_EM1                           (1)  /**< Indicate EM1 */
+#define BC_EM_EM2                           (2)  /**< Indicate EM2 */
+#define BC_EM_EM3                           (3)  /**< Indicate EM3 */
+#define BC_EM_EM4                           (4)  /**< Indicate EM4 */
+
+/* Magic value */
+#define BC_MAGIC_VALUE                      (0xef32)  /**< Magic */
+
+/* Push buttons, PB1-PB4 */
+#define BC_UIF_PB_MASK                      (0x000f) /**< Push button mask */
+#define BC_UIF_PB1                          (1 << 0) /**< Push button PB1 */
+#define BC_UIF_PB2                          (1 << 1) /**< Push button PB2 */
+#define BC_UIF_PB3                          (1 << 2) /**< Push button PB3 */
+#define BC_UIF_PB4                          (1 << 3) /**< Push button PB4 */
+
+/* Dip switch */
+#define BC_DIPSWITCH_MASK                   (0x000f)  /**< Dip switch mask */
+
+/* Joystick directions */
+#define BC_UIF_JOYSTICK_MASK                (0x001f)      /**< Joystick mask */
+#define BC_UIF_JOYSTICK_DOWN                (1 << 0)      /**< Joystick down */
+#define BC_UIF_JOYSTICK_RIGHT               (1 << 1)      /**< Joystick right */
+#define BC_UIF_JOYSTICK_UP                  (1 << 2)      /**< Joystick up */
+#define BC_UIF_JOYSTICK_LEFT                (1 << 3)      /**< Joystick left */
+#define BC_UIF_JOYSTICK_CENTER              (1 << 4)      /**< Joystick center button */
+
+/* AEM state */
+#define BC_UIF_AEM_BC                       (0) /**< AEM button state, BC controls buttons */
+#define BC_UIF_AEM_EFM                      (1) /**< AEM button state, EFM32 controls buttons */
+
+/* Display control */
+#define BC_DISPLAY_CTRL_RESET               (1 << 1)                          /**< Reset */
+#define BC_DISPLAY_CTRL_POWER_ENABLE        (1 << 0)                          /**< Display Control Power and Backlight Enable */
+#define BC_DISPLAY_CTRL_MODE_SHIFT          2                                 /**< Bit offset value for Display_Mode setting */
+#define BC_DISPLAY_CTRL_MODE_8080           (0 << BC_DISPLAY_CTRL_MODE_SHIFT) /**< Address mapped mode */
+#define BC_DISPLAY_CTRL_MODE_GENERIC        (1 << BC_DISPLAY_CTRL_MODE_SHIFT) /**< Direct Drive + SPI mode */
+
+/* EBI control - extended address range enable bit  */
+#define BC_EBI_CTRL_EXTADDR_MASK            (0x0001) /**< Enable extended addressing support */
+
+/* Arbiter control - directs access to display controller  */
+#define BC_ARB_CTRL_SHIFT                   0 /**< Bit offset value for ARB_CTRL setting */
+#define BC_ARB_CTRL_BC                      (0 << BC_ARB_CTRL_SHIFT) /**< BC drives display */
+#define BC_ARB_CTRL_EBI                     (1 << BC_ARB_CTRL_SHIFT) /**< EFM32GG EBI drives display, memory mapped or direct drive */
+#define BC_ARB_CTRL_SPI                     (2 << BC_ARB_CTRL_SHIFT) /**< EFM32GG SPI drives display */
+
+/* Interrupt flag registers, INTEN and INTFLAG */
+#define BC_INTEN_MASK                       (0x000f)  /**< Interrupt enable mask */
+#define BC_INTEN_PB                         (1 << 0)  /**< Push Button Interrupt enable */
+#define BC_INTEN_DIP                        (1 << 1)  /**< DIP Switch Interrupt enable */
+#define BC_INTEN_JOYSTICK                   (1 << 2)  /**< Joystick Interrupt enable */
+#define BC_INTEN_AEM                        (1 << 3)  /**< AEM Interrupt enable */
+
+#define BC_INTFLAG_MASK                     (0x000f)  /**< Interrupt flag mask */
+#define BC_INTFLAG_PB                       (1 << 0)  /**< Push Button interrupt triggered */
+#define BC_INTFLAG_DIP                      (1 << 1)  /**< DIP interrupt triggered */
+#define BC_INTFLAG_JOYSTICK                 (1 << 2)  /**< Joystick interrupt triggered */
+#define BC_INTFLAG_AEM                      (1 << 3)  /**< AEM interrupt triggered */
+
+/* Peripheral control registers */
+#define BC_PERICON_RS232_SHUTDOWN_SHIFT     13 /**< RS232 enable MUX bit */
+#define BC_PERICON_RS232_UART_SHIFT         12 /**< UART enable */
+#define BC_PERICON_RS232_LEUART_SHIFT       11 /**< LEUART enable */
+#define BC_PERICON_I2C_SHIFT                10 /**< I2C enable */
+#define BC_PERICON_I2S_ETH_SEL_SHIFT        9 /**< I2S/ETH/TFT SPI enable */
+#define BC_PERICON_I2S_ETH_SHIFT            8 /**< I2S/ETH mux select */
+#define BC_PERICON_TRACE_SHIFT              7 /**< ETM Trace enable */
+#define BC_PERICON_TOUCH_SHIFT              6 /**< Touch enable */
+#define BC_PERICON_AUDIO_IN_SHIFT           5 /**< Audio In enable */
+#define BC_PERICON_AUDIO_OUT_SEL_SHIFT      4 /**< Audio Out I2S/DAC select */
+#define BC_PERICON_AUDIO_OUT_SHIFT          3 /**< Audio Out enable */
+#define BC_PERICON_ANALOG_DIFF_SHIFT        2 /**< Analog Diff enable */
+#define BC_PERICON_ANALOG_SE_SHIFT          1 /**< Anallog SE enable */
+#define BC_PERICON_SPI_SHIFT                0 /**< Micro-SD SPI enable */
+
+/* SPI DEMUX control */
+#define BC_SPI_DEMUX_SLAVE_MASK             (0x0003) /**< Mask for SPI MUX bits */
+#define BC_SPI_DEMUX_SLAVE_AUDIO            (0) /**< SPI interface to I2S Audio */
+#define BC_SPI_DEMUX_SLAVE_ETHERNET         (1) /**< SPI interface to Ethernet controller */
+#define BC_SPI_DEMUX_SLAVE_DISPLAY          (2) /**< SPI interface to TFT-LCD-SSD2119 controller */
+
+/* ADC */
+#define BC_ADC_STATUS_DONE                  (0)  /**< ADC Status Done */
+#define BC_ADC_STATUS_BUSY                  (1)  /**< ADC Status Busy */
+
+/* Hardware version information */
+#define BC_HW_VERSION_PCB_MASK              (0x07f0)  /**< PCB Version mask */
+#define BC_HW_VERSION_PCB_SHIFT             (4)       /**< PCB Version shift */
+#define BC_HW_VERSION_BOARD_MASK            (0x000f)  /**< Board version mask */
+#define BC_HW_VERSION_BOARD_SHIFT           (0)       /**< Board version shift  */
+
+/* Firmware version information */
+#define BC_FW_VERSION_MAJOR_MASK            (0xf000) /**< FW Version major mask */
+#define BC_FW_VERSION_MAJOR_SHIFT           (12)     /**< FW version major shift */
+#define BC_FW_VERSION_MINOR_MASK            (0x0f00) /**< FW version minor mask */
+#define BC_FW_VERSION_MINOR_SHIFT           (8)      /**< FW version minor shift */
+#define BC_FW_VERSION_PATCHLEVEL_MASK       (0x00ff) /**< FW Patchlevel mask */
+#define BC_FW_VERSION_PATCHLEVEL_SHIFT      (0)      /**< FW Patchlevel shift */
+
+/* MBOX - BC <-> EFM32 communication */
+#define BC_MBOX_TXSTATUS0_FIFOEMPTY         (1 << 0) /**< BC/EFM32 communication register */
+#define BC_MBOX_TXSTATUS0_FIFOFULL          (1 << 1) /**< BC/EFM32 communication register */
+#define BC_MBOX_TXSTATUS0_FIFOUNDERFLOW     (1 << 4) /**< BC/EFM32 communication register */
+#define BC_MBOX_TXSTATUS0_FIFOOVERFLOW      (1 << 5) /**< BC/EFM32 communication register */
+
+#define BC_MBOX_TXSTATUS1_WORDCOUNT_MASK    (0x07FF) /**< BC/EFM32 communication register */
+
+/* Buffer Controller */
+#define BC_BUF_CTRL_CS_ENABLE               (1 << 0) /**< BC/EFM32 communication register */
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} (end group BSP) */
+
+#endif

bsp/efm32/EFM32GG_DK3750/dvk_brd3600.c

+/**************************************************************************//**
+ * @file
+ * @brief EFM32GG_DK3750 board support package BRD3600A API implementation
+ * @author Energy Micro AS
+ * @version 1.2.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
+ ******************************************************************************
+ *
+ * This source code is the property of Energy Micro AS. The source and compiled
+ * code may only be used on Energy Micro "EFM32" microcontrollers.
+ *
+ * This copyright notice may not be removed from the source code nor changed.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include "efm32.h"
+#include "efm32_gpio.h"
+#include "efm32_ebi.h"
+#include "efm32_cmu.h"
+#include "dvk.h"
+#include "dvk_bcregisters.h"
+
+/**************************************************************************//**
+ * @brief Configure BRD3600A on-board peripherals.
+ *****************************************************************************/
+void DVK_BRD3600A_init(void)
+{
+  /* Enable CMU GPIO clocks */
+  CMU_ClockEnable(cmuClock_GPIO, true);
+
+  /* USB status LED - configure PE1 as push pull */
+  GPIO_PinModeSet(gpioPortE, 1, gpioModePushPull, 0);
+
+  /* USB overcurrent status - configure PE2 as push pull */
+  GPIO_PinModeSet(gpioPortE, 2, gpioModeInput, 0);
+
+  /* USB VBUS switch - configure PF5 as push pull - Default OFF */
+  GPIO_PinModeSet(gpioPortF, 5, gpioModePushPull, 0);
+
+  return;
+}
+
+
+/**************************************************************************//**
+ * @brief Disable EFM32GG_DK3750 EBI board support package functionality
+ *****************************************************************************/
+void DVK_BRD3600A_deInit(void)
+{
+  /* Disable PE1 */
+  GPIO_PinModeSet(gpioPortE, 1, gpioModePushPull, 0);
+
+  /* Disable CMU GPIO clocks */
+  CMU_ClockEnable(cmuClock_GPIO, false);
+
+
+  return;
+}
+
+/**************************************************************************//**
+ * @brief Set state of USB status LED
+ * @param[in] enable Set to true to light LED, false to dim it
+ *****************************************************************************/
+void DVK_BRD3600A_usbStatusLEDEnable(int enable)
+{
+  GPIO_PinModeSet(gpioPortE, 1, gpioModePushPull, enable);
+
+  return;
+}
+
+/**************************************************************************//**
+ * @brief Enable VBUS switch
+ * @param[in] enable Set to true to enable switch
+ *****************************************************************************/
+void DVK_BRD3600A_usbVBUSSwitchEnable(int enable)
+{
+  GPIO_PinModeSet(gpioPortF, 5, gpioModePushPull, enable);
+
+  return;
+}
+
+/**************************************************************************//**
+ * @brief Get state of VBUS switch overcurrent flag
+ *****************************************************************************/
+int DVK_BRD3600A_usbVBUSGetOCFlagState(void)
+{
+  return ~GPIO_PinInGet(gpioPortE, 2);
+}
+
+/** @} (end group BSP) */

bsp/efm32/EFM32GG_DK3750/dvk_ebi.c

+/**************************************************************************//**
+ * @file
+ * @brief EFM32GG_DK3750 board support package EBI API implementation
+ * @author Energy Micro AS
+ * @version 1.2.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
+ ******************************************************************************
+ *
+ * This source code is the property of Energy Micro AS. The source and compiled
+ * code may only be used on Energy Micro "EFM32" microcontrollers.
+ *
+ * This copyright notice may not be removed from the source code nor changed.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include "efm32.h"
+#include "efm32_gpio.h"
+#include "efm32_ebi.h"
+#include "efm32_cmu.h"
+#include "dvk.h"
+#include "dvk_bcregisters.h"
+
+#if defined(EBI_PRESENT)
+/**************************************************************************//**
+ * @brief Configure EFM32GG_DK3750 EBI (external bus interface) access for
+ *    - 0x80000000: Board Control registers (Xilinx Spartan FPGA)
+ *    - 0x84000000: TFT memory mapped drive (URT/SSD2119 controller)
+ *    - 0x88000000: PSRAM external memory (Micron MT45W2MW16PGA-70 IT)
+ *    - 0x8c000000: NOR flash (Spansion flash S29GLxxx_FBGA)
+ * @return true if successful, false if board controller access failed
+ *****************************************************************************/
+bool DVK_EBI_init(void)
+{
+  EBI_Init_TypeDef ebiConfig = EBI_INIT_DEFAULT;
+
+  /* Enable clocks */
+  CMU_ClockEnable(cmuClock_EBI, true);
+  CMU_ClockEnable(cmuClock_GPIO, true);
+
+  /* Configure GPIO pins as push pull */
+  /* EBI AD9..15 */
+  GPIO_PinModeSet(gpioPortA, 0, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 1, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 2, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 3, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 4, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 5, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 6, gpioModePushPull, 0);
+
+  /* EBI AD8 */
+  GPIO_PinModeSet(gpioPortA, 15, gpioModePushPull, 0);
+
+  /* EBI A16-A22 */
+  GPIO_PinModeSet(gpioPortB, 0, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortB, 1, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortB, 2, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortB, 3, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortB, 4, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortB, 5, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortB, 6, gpioModePushPull, 0);
+
+  /* EBI CS0-CS3 */
+  GPIO_PinModeSet(gpioPortD, 9, gpioModePushPull, 1);
+  GPIO_PinModeSet(gpioPortD, 10, gpioModePushPull, 1);
+  GPIO_PinModeSet(gpioPortD, 11, gpioModePushPull, 1);
+  GPIO_PinModeSet(gpioPortD, 12, gpioModePushPull, 1);
+
+  /* EBI AD0..7 */
+  GPIO_PinModeSet(gpioPortE, 8, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 9, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 10, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 11, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 12, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 13, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 14, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 15, gpioModePushPull, 0);
+
+  /* EBI ARDY/WEN/REN/ALE */
+  /* ARDY on Port F Pin 2 is not used                 */
+  /* GPIO_PinModeSet(gpioPortF, 2, gpioModeInput, 0); */
+  GPIO_PinModeSet(gpioPortF, 8, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortF, 9, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortC, 11, gpioModePushPull, 0);
+
+  /* EBI Byte Lane 0 support BL0/BL1 */
+  GPIO_PinModeSet(gpioPortF, 6, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortF, 7, gpioModePushPull, 0);
+
+  /* ---------------------------------------------------- */
+  /* External 4MB PSRAM, Bank 2, Base Address 0x88000000  */
+  /* Micron MT45W2MW16PGA-70 IT, 32Mb Cellular RAM        */
+  /* ---------------------------------------------------- */
+  ebiConfig.banks        = EBI_BANK2;
+  ebiConfig.csLines      = EBI_CS2;
+  ebiConfig.mode         = ebiModeD16A16ALE;
+  ebiConfig.alePolarity  = ebiActiveHigh;
+  ebiConfig.blEnable     = true;
+  ebiConfig.noIdle       = true;
+  ebiConfig.ardyEnable   = false;
+  ebiConfig.addrHalfALE  = true;
+  ebiConfig.readPrefetch = true;
+  ebiConfig.aLow         = ebiALowA16;
+  ebiConfig.aHigh        = ebiAHighA23;
+  ebiConfig.location     = ebiLocation1;
+
+  /* Address Setup and hold time */
+  ebiConfig.addrHoldCycles  = 0;
+  ebiConfig.addrSetupCycles = 0;
+
+  /* Read cycle times */
+  ebiConfig.readStrobeCycles = 4;
+  ebiConfig.readHoldCycles   = 0;
+  ebiConfig.readSetupCycles  = 0;
+
+  /* Write cycle times */
+  ebiConfig.writeStrobeCycles = 2;
+  ebiConfig.writeHoldCycles   = 0;
+  ebiConfig.writeSetupCycles  = 0;
+
+  /* Configure EBI bank 2 - external PSRAM */
+  EBI_Init(&ebiConfig);
+
+  /* --------------------------------------------------------- */
+  /* Board Control Registers, Bank 0, Base Address 0x80000000  */
+  /* FPGA Xilinx Spartan XC6SLX9 CSG324                        */
+  /* --------------------------------------------------------- */
+  ebiConfig.banks       = EBI_BANK0;
+  ebiConfig.csLines     = EBI_CS0;
+  ebiConfig.mode        = ebiModeD16A16ALE;;
+  ebiConfig.alePolarity = ebiActiveHigh;
+  /* keep blEnable */
+  /* ebiConfig.blEnable = false; - common setting needs to be true for PSRAM */
+  ebiConfig.addrHalfALE  = true;
+  ebiConfig.readPrefetch = false;
+  ebiConfig.noIdle       = true;
+
+  /* keep alow/ahigh configuration */
+  /* ebiConfig.aLow = ebiALowA0; - needs to be set for PSRAM */
+  /* ebiConfig.aHigh = ebiAHighA0; - needs to be set for PSRAM */
+
+  /* Address Setup and hold time */
+  ebiConfig.addrHoldCycles  = 3;
+  ebiConfig.addrSetupCycles = 3;
+
+  /* Read cycle times */
+  ebiConfig.readStrobeCycles = 7;
+  ebiConfig.readHoldCycles   = 3;
+  ebiConfig.readSetupCycles  = 3;
+
+  /* Write cycle times */
+  ebiConfig.writeStrobeCycles = 7;
+  ebiConfig.writeHoldCycles   = 3;
+  ebiConfig.writeSetupCycles  = 3;
+
+  /* Configure EBI bank 0 */
+  EBI_Init(&ebiConfig);
+
+  /* ----------------------------------------------------- */
+  /* TFT-LCD Registers, Bank1, Base Address 0x84000000     */
+  /* URT USMH_8252MD_320X240_RGB                           */
+  /* Solomon Systech SSD 2119                              */
+  /* ----------------------------------------------------- */
+  ebiConfig.banks   = EBI_BANK1;
+  ebiConfig.csLines = EBI_CS1;
+
+  /* Address Setup and hold time */
+  ebiConfig.addrHoldCycles  = 1;
+  ebiConfig.addrSetupCycles = 1;
+
+  /* Read cycle times */
+  ebiConfig.readStrobeCycles = 7;
+  ebiConfig.readHoldCycles   = 3;
+  ebiConfig.readSetupCycles  = 3;
+
+  /* Write cycle times */
+  ebiConfig.writeStrobeCycles = 2;
+  ebiConfig.writeHoldCycles   = 1;
+  ebiConfig.writeSetupCycles  = 1;
+
+  /* Configure EBI bank 1 */
+  EBI_Init(&ebiConfig);
+
+  /* ----------------------------------------- */
+  /* NOR Flash, Bank3, Base Address 0x8c000000 */
+  /* Spansion flash S29GLxxx_FBGA              */
+  /* ----------------------------------------- */
+  ebiConfig.banks       = EBI_BANK3;
+  ebiConfig.csLines     = EBI_CS3;
+  ebiConfig.mode        = ebiModeD16A16ALE;;
+  ebiConfig.alePolarity = ebiActiveHigh;
+  /* keep blEnable */
+  /* ebiConfig.blEnable = false; */
+  ebiConfig.addrHalfALE  = true;
+  ebiConfig.readPrefetch = false;
+  ebiConfig.noIdle       = true;
+
+  /* Address Setup and hold time */
+  ebiConfig.addrHoldCycles  = 0;
+  ebiConfig.addrSetupCycles = 0;
+
+  /* Read cycle times */
+  ebiConfig.readStrobeCycles = 7;
+  ebiConfig.readHoldCycles   = 0;
+  ebiConfig.readSetupCycles  = 0;
+
+  /* Write cycle times */
+  ebiConfig.writeStrobeCycles = 2;
+  ebiConfig.writeHoldCycles   = 0;
+  ebiConfig.writeSetupCycles  = 0;
+
+  /* Configure EBI bank 3 */
+  EBI_Init(&ebiConfig);
+
+  /* Enable extended address range */
+  DVK_EBI_extendedAddressRange(true);
+
+  /* Verify connectivity to Board Control registers */
+  if (BC_REGISTER->MAGIC != 0xef32)
+  {
+    return false;
+  }
+  else
+  {
+    return true;
+  }
+}
+
+
+/**************************************************************************//**
+ * @brief Disable EFM32GG_DK3750 EBI board support package functionality
+ *****************************************************************************/
+void DVK_EBI_disable(void)
+{
+  /* Configure GPIO pins as push pull */
+  /* EBI AD9..15 */
+  GPIO_PinModeSet(gpioPortA, 0, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 1, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 2, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 3, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 4, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 5, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 6, gpioModeDisabled, 0);
+
+  /* EBI AD8 */
+  GPIO_PinModeSet(gpioPortA, 15, gpioModeDisabled, 0);
+
+  /* EBI A16-A22 */
+  GPIO_PinModeSet(gpioPortB, 0, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortB, 1, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortB, 2, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortB, 3, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortB, 4, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortB, 5, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortB, 6, gpioModeDisabled, 0);
+
+  /* EBI CS0-CS3 */
+  GPIO_PinModeSet(gpioPortD, 9, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortD, 10, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortD, 11, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortD, 12, gpioModeDisabled, 0);
+
+  /* EBI AD0..7 */
+  GPIO_PinModeSet(gpioPortE, 8, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 9, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 10, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 11, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 12, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 13, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 14, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 15, gpioModeDisabled, 0);
+
+  /* EBI ARDY/WEN/REN/ALE */
+  /* ARDY on Port F Pin 2 is not used                 */
+  /* GPIO_PinModeSet(gpioPortF, 2, gpioModeDisabled, 0); */
+  GPIO_PinModeSet(gpioPortF, 8, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortF, 9, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortC, 11, gpioModeDisabled, 0);
+
+  /* EBI Byte Lane 0 support BL0/BL1 */
+  GPIO_PinModeSet(gpioPortF, 6, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortF, 7, gpioModeDisabled, 0);
+
+  /* Reset EBI configuration */
+  EBI_Disable();
+  /* Turn off EBI clock */
+  CMU_ClockEnable(cmuClock_EBI, false);
+}
+
+
+/**************************************************************************//**
+ * @brief Configure EBI extended Address Range
+ *
+ * @param[in] enable
+ *   Controls extended address range mode
+ *****************************************************************************/
+void DVK_EBI_extendedAddressRange(bool enable)
+{
+  if (enable)
+  {
+    BC_REGISTER->EBI_CTRL = 0x0001;
+  }
+  else
+  {
+    BC_REGISTER->EBI_CTRL = 0x0000;
+  }
+}
+
+#endif
+
+/** @} (end group BSP) */
+

bsp/efm32/EFM32GG_DK3750/dvk_spi.c

+/**************************************************************************//**
+ * @file
+ * @brief EFM32GG_DK3750 board support package SPI API implementation
+ * @author Energy Micro AS
+ * @version 1.2.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
+ ******************************************************************************
+ *
+ * This source code is the property of Energy Micro AS. The source and compiled
+ * code may only be used on Energy Micro "EFM32" microcontrollers.
+ *
+ * This copyright notice may not be removed from the source code nor changed.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include "efm32.h"
+#include "efm32_gpio.h"
+#include "efm32_usart.h"
+#include "efm32_cmu.h"
+#include "dvk.h"
+#include "dvk_bcregisters.h"
+
+/* USART used for SPI access */
+#define USART_USED      USART2 /**< USART used for BC register interface */
+#define USART_CLK       cmuClock_USART2 /**< Clock for BC register USART */
+
+/* GPIO pins used, please refer to DVK user guide. */
+#define PORT_SPI_TX     gpioPortC /**< SPI transmit GPIO port */
+#define PIN_SPI_TX      2         /**< SPI transmit GPIO pin */
+#define PORT_SPI_RX     gpioPortC /**< SPI receive GPIO port */
+#define PIN_SPI_RX      3         /**< SPI receive GPIO pin */
+#define PORT_SPI_CLK    gpioPortC /**< SPI clock port */
+#define PIN_SPI_CLK     4         /**< SPI clock pin */
+#define PORT_SPI_CS     gpioPortC /**< SPI Chip Select port */
+#define PIN_SPI_CS      5         /**< SPI Chip Select pin */
+
+static volatile const uint16_t *lastAddr = 0; /**< Last register accessed */
+
+/**************************************************************************//**
+ * @brief  Initializes SPI interface for access to board controller
+ *         FPGA registers
+ *****************************************************************************/
+static void SPI_BC_Init(void)
+{
+  USART_InitSync_TypeDef bcinit = USART_INITSYNC_DEFAULT;
+
+  /* Enable module clocks */
+  CMU_ClockEnable(USART_CLK, true);
+
+  /* Configure SPI pins */
+  GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModePushPull, 0);
+  GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModeInput, 0);
+  GPIO_PinModeSet(PORT_SPI_CLK, PIN_SPI_CLK, gpioModePushPull, 0);
+
+  /* Keep CS high to not activate slave */
+  GPIO_PinModeSet(PORT_SPI_CS, PIN_SPI_CS, gpioModePushPull, 1);
+
+  /* Configure to use SPI master with manual CS */
+  /* For now, configure SPI for worst case 32MHz clock in order to work for all */
+  /* configurations. */
+  bcinit.refFreq  = 48000000;
+  bcinit.baudrate = 7000000;
+
+  USART_Reset(USART_USED);
+  /* Initialize USART */
+  USART_InitSync(USART_USED, &bcinit);
+
+  /* Enable pins at default location */
+  USART_USED->ROUTE = USART_ROUTE_TXPEN | USART_ROUTE_RXPEN | USART_ROUTE_CLKPEN;
+}
+
+
+/**************************************************************************//**
+ * @brief  Disables GPIO pins and USART from FPGA register access
+ *****************************************************************************/
+static void SPI_BC_Disable(void)
+{
+  USART_Reset(USART_USED);
+
+  GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModeDisabled, 0);
+  GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModeDisabled, 0);
+  GPIO_PinModeSet(PORT_SPI_CLK, PIN_SPI_CLK, gpioModeDisabled, 0);
+  GPIO_PinModeSet(PORT_SPI_CS, PIN_SPI_CS, gpioModeDisabled, 0);
+
+  /* Disable USART clock - we can't disable GPIO or HFPER as we don't know who else
+   * might be using it */
+  CMU_ClockEnable(USART_CLK, false);
+}
+
+
+/**************************************************************************//**
+ * @brief  Perform SPI Transfer
+ * @param addr Register offset, starting at 0
+ * @param rw 0 on write, 1 on read accesses
+ * @param data 16-bit data to write into register/dummy data for reads
+ * @return 16-bit data received from SPI access
+ *****************************************************************************/
+static uint16_t SPI_BC_Access(uint8_t addr, uint8_t rw, uint16_t data)
+{
+  uint16_t tmp;
+
+  /* Enable CS */
+  GPIO_PinOutClear(PORT_SPI_CS, PIN_SPI_CS);
+
+  /* Write SPI address MSB */
+  USART_Tx(USART_USED, (addr & 0x3) | rw << 3);
+  /* Just ignore data read back */
+  USART_Rx(USART_USED);
+
+  /* Write SPI address  LSB */
+  USART_Tx(USART_USED, data & 0xFF);
+
+  tmp = (uint16_t) USART_Rx(USART_USED);
+
+  /* SPI data MSB */
+  USART_Tx(USART_USED, data >> 8);
+  tmp |= (uint16_t) USART_Rx(USART_USED) << 8;
+
+  /* Disable CS */
+  GPIO_PinOutSet(PORT_SPI_CS, PIN_SPI_CS);
+
+  return tmp;
+}
+
+
+/**************************************************************************//**
+ * @brief  Performs SPI write to FPGA register
+ * @param  addr Address of register
+ * @param  data Data to write
+ *****************************************************************************/
+static void SPI_BC_Write(uint8_t addr, uint16_t data)
+{
+  SPI_BC_Access(addr, 0, data);
+}
+
+
+/**************************************************************************//**
+ * @brief  Performs SPI read from FPGA register
+ * @param  addr Address of register
+ * @param  data Dummy data
+ * @return 16-bit value of board controller register
+ *****************************************************************************/
+static uint16_t SPI_BC_Read(uint8_t addr, uint16_t data)
+{
+  return SPI_BC_Access(addr, 1, data);
+}
+
+
+/**************************************************************************//**
+ * @brief  Initializes DVK register access
+ * @return true on success, false on failure
+ *****************************************************************************/
+bool DVK_SPI_init(void)
+{
+  uint16_t bcMagic;
+
+  /* Enable HF and GPIO clocks */
+  CMU_ClockEnable(cmuClock_HFPER, true);
+  CMU_ClockEnable(cmuClock_GPIO, true);
+
+  /* Configure SPI mode of operation */
+  DVK_busControlMode(DVK_BusControl_SPI);
+
+  SPI_BC_Init();
+  /* Read "board control Magic" register to verify SPI is up and running */
+  /*  if not FPGA is configured to be in EBI mode  */
+
+  bcMagic = DVK_SPI_readRegister(&BC_REGISTER->MAGIC);
+  if (bcMagic != BC_MAGIC_VALUE)
+  {
+    return false;
+  }
+  else
+  {
+    return true;
+  }
+}
+
+
+/**************************************************************************//**
+ * @brief  Disable and free up resources used by SPI board control access
+ *****************************************************************************/
+void DVK_SPI_disable(void)
+{
+  SPI_BC_Disable();
+}
+
+
+/**************************************************************************//**
+ * @brief     Perform read from DVK board control register
+ * @param[in] addr Address of register to read from
+ * @return    Value of board controller register
+ *****************************************************************************/
+uint16_t DVK_SPI_readRegister(volatile uint16_t *addr)
+{
+  uint16_t data;
+
+  if (addr != lastAddr)
+  {
+    SPI_BC_Write(0x00, 0xFFFF & ((uint32_t) addr));             /*LSBs of address*/
+    SPI_BC_Write(0x01, 0xFF & ((uint32_t) addr >> 16));         /*MSBs of address*/
+    SPI_BC_Write(0x02, (0x0C000000 & (uint32_t) addr) >> 26);   /*Chip select*/
+  }
+  /* Read twice */
+  data     = SPI_BC_Read(0x03, 0);
+  data     = SPI_BC_Read(0x03, 0);
+  lastAddr = addr;
+  return data;
+}
+
+
+/**************************************************************************//**
+ * @brief Perform write to DVK board control register
+ * @param addr Address of register to write to
+ * @param data 16-bit to  write into register
+ *****************************************************************************/
+void DVK_SPI_writeRegister(volatile uint16_t *addr, uint16_t data)
+{
+  if (addr != lastAddr)
+  {
+    SPI_BC_Write(0x00, 0xFFFF & ((uint32_t) addr));             /*LSBs of address*/
+    SPI_BC_Write(0x01, 0xFF & ((uint32_t) addr >> 16));         /*MSBs of address*/
+    SPI_BC_Write(0x02, (0x0C000000 & (uint32_t) addr) >> 26);   /*Chip select*/
+  }
+  SPI_BC_Write(0x03, data);                                     /*Data*/
+  lastAddr = addr;
+}
+
+/** @} (end group BSP) */

bsp/efm32/EFM32GG_DK3750/trace.c

+/**************************************************************************//**
+ * @file
+ * @brief API for enabling SWO or ETM trace on DK3750 board
+ * @author Energy Micro AS
+ * @version 1.2.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
+ ******************************************************************************
+ *
+ * This source code is the property of Energy Micro AS. The source and compiled
+ * code may only be used on Energy Micro "EFM32" microcontrollers.
+ *
+ * This copyright notice may not be removed from the source code nor changed.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include "efm32.h"
+#include "efm32_gpio.h"
+#include "efm32_cmu.h"
+
+/**************************************************************************//**
+ * @brief Configure EFM32GG990F1024 for DK3750 ETM trace output
+ * @note You need to configure ETM trace on on kit config menu as well!
+ *****************************************************************************/
+void TRACE_ETMSetup(void)
+{
+  /* Enable peripheral clocks */
+  CMU->HFCORECLKEN0 |= CMU_HFCORECLKEN0_LE;
+  CMU->HFPERCLKEN0  |= CMU_HFPERCLKEN0_GPIO;
+  CMU->OSCENCMD      = CMU_OSCENCMD_AUXHFRCOEN;
+
+  /* Wait until AUXHFRCO clock is ready */
+  while (!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY)) ;
+
+  /* Enable Port D, pins 3,4,5,6 for ETM Trace Data output */
+  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE3_MASK) | GPIO_P_MODEL_MODE3_PUSHPULL;
+  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE4_MASK) | GPIO_P_MODEL_MODE4_PUSHPULL;
+  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE5_MASK) | GPIO_P_MODEL_MODE5_PUSHPULL;
+  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE6_MASK) | GPIO_P_MODEL_MODE6_PUSHPULL;
+
+  /* Enable Port D, pin 7 for DBG_TCLK */
+  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE7_MASK) | GPIO_P_MODEL_MODE7_PUSHPULL;
+
+  /* Configure trace output for alternate location */
+  GPIO->ROUTE = GPIO->ROUTE | GPIO_ROUTE_TCLKPEN | GPIO_ROUTE_TD0PEN | GPIO_ROUTE_TD1PEN
+                | GPIO_ROUTE_TD2PEN | GPIO_ROUTE_TD3PEN
+                | GPIO_ROUTE_ETMLOCATION_LOC0;
+}
+
+
+/**************************************************************************//**
+ * @brief Configure EFM32GG990F1024 for DK3750 SWO trace output
+ *****************************************************************************/
+void TRACE_SWOSetup(void)
+{
+  /* Debug logic registers */
+  volatile uint32_t *dwt_ctrl = (uint32_t *) 0xE0001000;
+  volatile uint32_t *tpiu_prescaler = (uint32_t *) 0xE0040010;
+  volatile uint32_t *tpiu_protocol = (uint32_t *) 0xE00400F0;
+
+  /* Enable GPIO clock */
+  CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_GPIO;
+
+  /* Enable Serial wire output pin */
+  GPIO->ROUTE |= GPIO_ROUTE_SWOPEN;
+
+  /* Set location 0 */
+  GPIO->ROUTE = (GPIO->ROUTE & ~(_GPIO_ROUTE_SWLOCATION_MASK)) | GPIO_ROUTE_SWLOCATION_LOC0;
+
+  /* Enable output on pin - GPIO Port F, Pin 2 */
+  GPIO->P[5].MODEL &= ~(_GPIO_P_MODEL_MODE2_MASK);
+  GPIO->P[5].MODEL |= GPIO_P_MODEL_MODE2_PUSHPULL;
+
+  /* Enable debug clock AUXHFRCO */
+  CMU->OSCENCMD = CMU_OSCENCMD_AUXHFRCOEN;
+
+  /* Wait until clock is ready */
+  while(!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY));
+
+  /* Enable trace in core debug */
+  CoreDebug->DHCSR |= 1;
+  CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+
+  /* Enable PC and IRQ sampling output */
+  *dwt_ctrl = 0x400113FF;
+
+  /* Set TPIU prescaler to 16. */
+  *tpiu_prescaler = 0xf;
+
+  /* Set protocol to NRZ */
+  *tpiu_protocol = 2;
+
+  /* Unlock ITM and output data */
+  ITM->LAR = 0xC5ACCE55;
+  ITM->TCR = 0x10009;
+}
+
+/** @} (end group BSP) */

bsp/efm32/EFM32GG_DK3750/trace.h

+/**************************************************************************//**
+ * @file
+ * @brief API for enabling SWO or ETM trace on DK3750 board
+ * @author Energy Micro AS
+ * @version 1.2.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2011 Energy Micro AS, http://www.energymicro.com</b>
+ ******************************************************************************
+ *
+ * This source code is the property of Energy Micro AS. The source and compiled
+ * code may only be used on Energy Micro "EFM32" microcontrollers.
+ *
+ * This copyright notice may not be removed from the source code nor changed.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+#ifndef __TRACE_H
+#define __TRACE_H
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void TRACE_ETMSetup(void);
+void TRACE_SWOSetup(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} (end group BSP) */
+
+#endif