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2331ebdc
编写于
8月 18, 2017
作者:
B
Bernard Xiong
提交者:
GitHub
8月 18, 2017
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差异文件
Merge pull request #811 from aozima/update_cortex-m_port
[libcpu] Update cortex m port
上级
f975ef51
959b97aa
变更
13
隐藏空白更改
内联
并排
Showing
13 changed file
with
28 addition
and
9 deletion
+28
-9
bsp/stm32f20x/stm32_rom.icf
bsp/stm32f20x/stm32_rom.icf
+2
-2
libcpu/arm/cortex-m0/context_gcc.S
libcpu/arm/cortex-m0/context_gcc.S
+3
-1
libcpu/arm/cortex-m0/context_iar.S
libcpu/arm/cortex-m0/context_iar.S
+1
-0
libcpu/arm/cortex-m0/context_rvds.S
libcpu/arm/cortex-m0/context_rvds.S
+1
-0
libcpu/arm/cortex-m3/context_gcc.S
libcpu/arm/cortex-m3/context_gcc.S
+3
-1
libcpu/arm/cortex-m3/context_iar.S
libcpu/arm/cortex-m3/context_iar.S
+3
-1
libcpu/arm/cortex-m3/context_rvds.S
libcpu/arm/cortex-m3/context_rvds.S
+1
-0
libcpu/arm/cortex-m4/context_gcc.S
libcpu/arm/cortex-m4/context_gcc.S
+3
-1
libcpu/arm/cortex-m4/context_iar.S
libcpu/arm/cortex-m4/context_iar.S
+3
-1
libcpu/arm/cortex-m4/context_rvds.S
libcpu/arm/cortex-m4/context_rvds.S
+1
-0
libcpu/arm/cortex-m7/context_gcc.S
libcpu/arm/cortex-m7/context_gcc.S
+3
-1
libcpu/arm/cortex-m7/context_iar.S
libcpu/arm/cortex-m7/context_iar.S
+3
-1
libcpu/arm/cortex-m7/context_rvds.S
libcpu/arm/cortex-m7/context_rvds.S
+1
-0
未找到文件。
bsp/stm32f20x/stm32_rom.icf
浏览文件 @
2331ebdc
...
...
@@ -28,8 +28,8 @@ do not initialize { section .noinit };
keep { section FSymTab };
keep { section VSymTab };
keep { section .rti_fn* };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly, block RTT_INIT_FUNC };
place in RAM_region { readwrite,
block CSTACK, block HEAP };
\ No newline at end of file
place in RAM_region { readwrite, block CSTACK, last block HEAP};
libcpu/arm/cortex-m0/context_gcc.S
浏览文件 @
2331ebdc
...
...
@@ -181,7 +181,9 @@ rt_hw_context_switch_to:
NOP
MSR
MSP
,
R0
CPSIE
I
/*
enable
interrupts
at
processor
level
*/
/
*
enable
interrupts
at
processor
level
*/
CPSIE
F
CPSIE
I
/
*
never
reach
here
!
*/
...
...
libcpu/arm/cortex-m0/context_iar.S
浏览文件 @
2331ebdc
...
...
@@ -188,6 +188,7 @@ rt_hw_context_switch_to:
MSR
msp
,
r0
; enable interrupts at processor level
CPSIE
F
CPSIE
I
; never reach here!
...
...
libcpu/arm/cortex-m0/context_rvds.S
浏览文件 @
2331ebdc
...
...
@@ -191,6 +191,7 @@ rt_hw_context_switch_to PROC
MSR
msp
,
r0
; enable interrupts at processor level
CPSIE
F
CPSIE
I
; never reach here!
...
...
libcpu/arm/cortex-m3/context_gcc.S
浏览文件 @
2331ebdc
...
...
@@ -162,7 +162,9 @@ rt_hw_context_switch_to:
NOP
MSR
msp
,
r0
CPSIE
I
/*
enable
interrupts
at
processor
level
*/
/
*
enable
interrupts
at
processor
level
*/
CPSIE
F
CPSIE
I
/
*
never
reach
here
!
*/
...
...
libcpu/arm/cortex-m3/context_iar.S
浏览文件 @
2331ebdc
...
...
@@ -161,7 +161,9 @@ rt_hw_context_switch_to:
NOP
MSR
msp
,
r0
CPSIE
I
; enable interrupts at processor level
; enable interrupts at processor level
CPSIE
F
CPSIE
I
; never reach here!
...
...
libcpu/arm/cortex-m3/context_rvds.S
浏览文件 @
2331ebdc
...
...
@@ -168,6 +168,7 @@ rt_hw_context_switch_to PROC
MSR
msp
,
r0
; enable interrupts at processor level
CPSIE
F
CPSIE
I
; never reach here!
...
...
libcpu/arm/cortex-m4/context_gcc.S
浏览文件 @
2331ebdc
...
...
@@ -203,7 +203,9 @@ rt_hw_context_switch_to:
NOP
MSR
msp
,
r0
CPSIE
I
/*
enable
interrupts
at
processor
level
*/
/
*
enable
interrupts
at
processor
level
*/
CPSIE
F
CPSIE
I
/
*
never
reach
here
!
*/
...
...
libcpu/arm/cortex-m4/context_iar.S
浏览文件 @
2331ebdc
...
...
@@ -207,7 +207,9 @@ rt_hw_context_switch_to:
NOP
MSR
msp
,
r0
CPSIE
I
; enable interrupts at processor level
; enable interrupts at processor level
CPSIE
F
CPSIE
I
; never reach here!
...
...
libcpu/arm/cortex-m4/context_rvds.S
浏览文件 @
2331ebdc
...
...
@@ -208,6 +208,7 @@ rt_hw_context_switch_to PROC
MSR
msp
,
r0
; enable interrupts at processor level
CPSIE
F
CPSIE
I
; never reach here!
...
...
libcpu/arm/cortex-m7/context_gcc.S
浏览文件 @
2331ebdc
...
...
@@ -203,7 +203,9 @@ rt_hw_context_switch_to:
NOP
MSR
msp
,
r0
CPSIE
I
/*
enable
interrupts
at
processor
level
*/
/
*
enable
interrupts
at
processor
level
*/
CPSIE
F
CPSIE
I
/
*
never
reach
here
!
*/
...
...
libcpu/arm/cortex-m7/context_iar.S
浏览文件 @
2331ebdc
...
...
@@ -207,7 +207,9 @@ rt_hw_context_switch_to:
NOP
MSR
msp
,
r0
CPSIE
I
; enable interrupts at processor level
; enable interrupts at processor level
CPSIE
F
CPSIE
I
; never reach here!
...
...
libcpu/arm/cortex-m7/context_rvds.S
浏览文件 @
2331ebdc
...
...
@@ -208,6 +208,7 @@ rt_hw_context_switch_to PROC
MSR
msp
,
r0
; enable interrupts at processor level
CPSIE
F
CPSIE
I
; never reach here!
...
...
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