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体验新版 GitCode,发现更多精彩内容 >>
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1d48f9ff
编写于
4月 18, 2018
作者:
lymzzyh
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
[Bsp][stm32f4xx-HAL]剔除多余空行格式化
上级
a7160288
变更
22
隐藏空白更改
内联
并排
Showing
22 changed file
with
548 addition
and
784 deletion
+548
-784
bsp/stm32f4xx-HAL/applications/main.c
bsp/stm32f4xx-HAL/applications/main.c
+2
-2
bsp/stm32f4xx-HAL/drivers/board.c
bsp/stm32f4xx-HAL/drivers/board.c
+51
-71
bsp/stm32f4xx-HAL/drivers/board.h
bsp/stm32f4xx-HAL/drivers/board.h
+64
-69
bsp/stm32f4xx-HAL/drivers/drv_gpio.c
bsp/stm32f4xx-HAL/drivers/drv_gpio.c
+90
-100
bsp/stm32f4xx-HAL/drivers/drv_gpio.h
bsp/stm32f4xx-HAL/drivers/drv_gpio.h
+0
-6
bsp/stm32f4xx-HAL/drivers/drv_i2c.c
bsp/stm32f4xx-HAL/drivers/drv_i2c.c
+2
-17
bsp/stm32f4xx-HAL/drivers/drv_i2c.h
bsp/stm32f4xx-HAL/drivers/drv_i2c.h
+0
-3
bsp/stm32f4xx-HAL/drivers/drv_iwg.c
bsp/stm32f4xx-HAL/drivers/drv_iwg.c
+5
-11
bsp/stm32f4xx-HAL/drivers/drv_iwg.h
bsp/stm32f4xx-HAL/drivers/drv_iwg.h
+0
-11
bsp/stm32f4xx-HAL/drivers/drv_rtc.c
bsp/stm32f4xx-HAL/drivers/drv_rtc.c
+15
-38
bsp/stm32f4xx-HAL/drivers/drv_spi.c
bsp/stm32f4xx-HAL/drivers/drv_spi.c
+59
-99
bsp/stm32f4xx-HAL/drivers/drv_spi.h
bsp/stm32f4xx-HAL/drivers/drv_spi.h
+1
-16
bsp/stm32f4xx-HAL/drivers/drv_spiflash.c
bsp/stm32f4xx-HAL/drivers/drv_spiflash.c
+2
-11
bsp/stm32f4xx-HAL/drivers/drv_spiflash.h
bsp/stm32f4xx-HAL/drivers/drv_spiflash.h
+0
-11
bsp/stm32f4xx-HAL/drivers/drv_usart.c
bsp/stm32f4xx-HAL/drivers/drv_usart.c
+97
-133
bsp/stm32f4xx-HAL/drivers/drv_usart.h
bsp/stm32f4xx-HAL/drivers/drv_usart.h
+1
-3
bsp/stm32f4xx-HAL/drivers/drv_usbd.c
bsp/stm32f4xx-HAL/drivers/drv_usbd.c
+18
-41
bsp/stm32f4xx-HAL/drivers/drv_usbd.h
bsp/stm32f4xx-HAL/drivers/drv_usbd.h
+0
-2
bsp/stm32f4xx-HAL/drivers/drv_usbh.c
bsp/stm32f4xx-HAL/drivers/drv_usbh.c
+23
-20
bsp/stm32f4xx-HAL/drivers/drv_usbh.h
bsp/stm32f4xx-HAL/drivers/drv_usbh.h
+0
-2
bsp/stm32f4xx-HAL/drivers/stm32f4xx_hal_conf.h
bsp/stm32f4xx-HAL/drivers/stm32f4xx_hal_conf.h
+106
-106
bsp/stm32f4xx-HAL/drivers/stm32f4xx_it.c
bsp/stm32f4xx-HAL/drivers/stm32f4xx_it.c
+12
-12
未找到文件。
bsp/stm32f4xx-HAL/applications/main.c
浏览文件 @
1d48f9ff
...
...
@@ -16,9 +16,9 @@
int
main
(
void
)
{
/* user app entry */
/* user app entry */
return
0
;
return
0
;
}
...
...
bsp/stm32f4xx-HAL/drivers/board.c
浏览文件 @
1d48f9ff
...
...
@@ -12,42 +12,38 @@
* 2009-09-22 Bernard add board.h to this bsp
* 2017-12-29 ZYH Correctly generate the 48M clock
*/
#include <rtthread.h>
#include "board.h"
/**
* @addtogroup STM32
*/
/*@{*/
#ifdef RT_USING_HSI
#error Can not using HSI on this bsp
#endif
#if defined(RCC_PERIPHCLK_SDIO) || defined(RCC_PERIPHCLK_CEC) || defined(RCC_PERIPHCLK_LTDC)\
|| defined(RCC_PERIPHCLK_SPDIFRX) || defined(RCC_PERIPHCLK_FMPI2C1) || defined(RCC_PERIPHCLK_LPTIM1)
#warning Please give priority to the correctness of the clock tree when the peripherals are abnormal
#warning Please give priority to the correctness of the clock tree when the peripherals are abnormal
#endif
static
void
SystemClock_Config
(
void
)
{
rt_uint32_t
hse_clk
,
sys_clk
;
rt_uint32_t
hse_clk
,
sys_clk
;
#if (RT_HSE_VALVE % 1000000 != 0)
#error HSE must be integer of MHz
#error HSE must be integer of MHz
#endif
hse_clk
=
HSE_VALUE
/
1000000UL
;
sys_clk
=
HCLK_VALUE
/
1000000UL
;
hse_clk
=
HSE_VALUE
/
1000000UL
;
sys_clk
=
HCLK_VALUE
/
1000000UL
;
RCC_OscInitTypeDef
RCC_OscInitStruct
;
RCC_ClkInitTypeDef
RCC_ClkInitStruct
;
#if defined(RT_USING_RTC) || defined(RCC_PERIPHCLK_CLK48)
RCC_PeriphCLKInitTypeDef
PeriphClkInitStruct
;
#endif
/**Configure the main internal regulator output voltage
/**Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE
();
__HAL_PWR_VOLTAGESCALING_CONFIG
(
PWR_REGULATOR_VOLTAGE_SCALE1
);
/**Initializes the CPU, AHB and APB busses clocks
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct
.
OscillatorType
=
RCC_OSCILLATORTYPE_HSE
;
#ifdef RT_USING_RTC
...
...
@@ -57,25 +53,25 @@ static void SystemClock_Config(void)
RCC_OscInitStruct
.
HSEState
=
RCC_HSE_ON
;
RCC_OscInitStruct
.
PLL
.
PLLState
=
RCC_PLL_ON
;
RCC_OscInitStruct
.
PLL
.
PLLSource
=
RCC_PLLSOURCE_HSE
;
if
(
hse_clk
%
2
==
0
)
if
(
hse_clk
%
2
==
0
)
{
RCC_OscInitStruct
.
PLL
.
PLLM
=
hse_clk
/
2
;
//Get 2M clock
if
((
sys_clk
*
2
)
%
48
==
0
)
RCC_OscInitStruct
.
PLL
.
PLLM
=
hse_clk
/
2
;
//Get 2M clock
if
((
sys_clk
*
2
)
%
48
==
0
)
{
RCC_OscInitStruct
.
PLL
.
PLLN
=
sys_clk
;
//Get 2*HCLK_VALUE
RCC_OscInitStruct
.
PLL
.
PLLP
=
RCC_PLLP_DIV2
;
//Get HCLK_VALUE
}
else
if
((
sys_clk
*
4
)
%
48
==
0
)
else
if
((
sys_clk
*
4
)
%
48
==
0
)
{
RCC_OscInitStruct
.
PLL
.
PLLN
=
sys_clk
*
2
;
//Get 4*HCLK_VALUE
RCC_OscInitStruct
.
PLL
.
PLLP
=
RCC_PLLP_DIV4
;
//Get HCLK_VALUE
}
else
if
((
sys_clk
*
6
)
%
48
==
0
)
else
if
((
sys_clk
*
6
)
%
48
==
0
)
{
RCC_OscInitStruct
.
PLL
.
PLLN
=
sys_clk
*
3
;
//Get 6*HCLK_VALUE
RCC_OscInitStruct
.
PLL
.
PLLP
=
RCC_PLLP_DIV6
;
//Get HCLK_VALUE
}
else
if
((
sys_clk
*
8
)
%
48
==
0
)
else
if
((
sys_clk
*
8
)
%
48
==
0
)
{
RCC_OscInitStruct
.
PLL
.
PLLN
=
sys_clk
*
4
;
//Get 8*HCLK_VALUE
RCC_OscInitStruct
.
PLL
.
PLLP
=
RCC_PLLP_DIV8
;
//Get HCLK_VALUE
...
...
@@ -84,47 +80,45 @@ static void SystemClock_Config(void)
else
{
RCC_OscInitStruct
.
PLL
.
PLLM
=
hse_clk
;
//Get 1M clock
if
((
sys_clk
*
2
)
%
48
==
0
)
if
((
sys_clk
*
2
)
%
48
==
0
)
{
RCC_OscInitStruct
.
PLL
.
PLLN
=
sys_clk
*
2
;
//Get 2*HCLK_VALUE
RCC_OscInitStruct
.
PLL
.
PLLP
=
RCC_PLLP_DIV2
;
//Get HCLK_VALUE
}
else
if
((
sys_clk
*
4
)
%
48
==
0
)
else
if
((
sys_clk
*
4
)
%
48
==
0
)
{
RCC_OscInitStruct
.
PLL
.
PLLN
=
sys_clk
*
4
;
//Get 4*HCLK_VALUE
RCC_OscInitStruct
.
PLL
.
PLLP
=
RCC_PLLP_DIV4
;
//Get HCLK_VALUE
}
else
if
((
sys_clk
*
6
)
%
48
==
0
)
else
if
((
sys_clk
*
6
)
%
48
==
0
)
{
RCC_OscInitStruct
.
PLL
.
PLLN
=
sys_clk
*
6
;
//Get 6*HCLK_VALUE
RCC_OscInitStruct
.
PLL
.
PLLP
=
RCC_PLLP_DIV6
;
//Get HCLK_VALUE
}
else
if
((
sys_clk
*
8
)
%
48
==
0
)
else
if
((
sys_clk
*
8
)
%
48
==
0
)
{
RCC_OscInitStruct
.
PLL
.
PLLN
=
sys_clk
*
8
;
//Get 8*HCLK_VALUE
RCC_OscInitStruct
.
PLL
.
PLLP
=
RCC_PLLP_DIV8
;
//Get HCLK_VALUE
}
}
RCC_OscInitStruct
.
PLL
.
PLLQ
=
hse_clk
/
RCC_OscInitStruct
.
PLL
.
PLLM
*
RCC_OscInitStruct
.
PLL
.
PLLN
/
48
;
//Get 48M Clock
RCC_OscInitStruct
.
PLL
.
PLLQ
=
hse_clk
/
RCC_OscInitStruct
.
PLL
.
PLLM
*
RCC_OscInitStruct
.
PLL
.
PLLN
/
48
;
//Get 48M Clock
if
(
HAL_RCC_OscConfig
(
&
RCC_OscInitStruct
)
!=
HAL_OK
)
{
while
(
1
)
while
(
1
)
{}
}
/**Initializes the CPU, AHB and APB busses clocks
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_ClkInitStruct
.
ClockType
=
RCC_CLOCKTYPE_HCLK
|
RCC_CLOCKTYPE_SYSCLK
|
RCC_CLOCKTYPE_PCLK1
|
RCC_CLOCKTYPE_PCLK2
;
RCC_ClkInitStruct
.
ClockType
=
RCC_CLOCKTYPE_HCLK
|
RCC_CLOCKTYPE_SYSCLK
|
RCC_CLOCKTYPE_PCLK1
|
RCC_CLOCKTYPE_PCLK2
;
RCC_ClkInitStruct
.
SYSCLKSource
=
RCC_SYSCLKSOURCE_PLLCLK
;
RCC_ClkInitStruct
.
AHBCLKDivider
=
RCC_SYSCLK_DIV1
;
#if (RT_HSE_HCLK <= 42000000UL)
RCC_ClkInitStruct
.
APB1CLKDivider
=
RCC_HCLK_DIV1
;
RCC_ClkInitStruct
.
APB2CLKDivider
=
RCC_HCLK_DIV1
;
if
(
HAL_RCC_ClockConfig
(
&
RCC_ClkInitStruct
,
FLASH_LATENCY_1
)
!=
HAL_OK
)
{
while
(
1
)
while
(
1
)
{}
}
#elif (RT_HSE_HCLK <= 84000000UL)
...
...
@@ -132,7 +126,7 @@ static void SystemClock_Config(void)
RCC_ClkInitStruct
.
APB2CLKDivider
=
RCC_HCLK_DIV1
;
if
(
HAL_RCC_ClockConfig
(
&
RCC_ClkInitStruct
,
FLASH_LATENCY_2
)
!=
HAL_OK
)
{
while
(
1
)
while
(
1
)
{}
}
#elif (RT_HSE_HCLK <= 168000000UL)
...
...
@@ -140,7 +134,7 @@ static void SystemClock_Config(void)
RCC_ClkInitStruct
.
APB2CLKDivider
=
RCC_HCLK_DIV2
;
if
(
HAL_RCC_ClockConfig
(
&
RCC_ClkInitStruct
,
FLASH_LATENCY_5
)
!=
HAL_OK
)
{
while
(
1
)
while
(
1
)
{}
}
#else
...
...
@@ -148,27 +142,28 @@ static void SystemClock_Config(void)
RCC_ClkInitStruct
.
APB2CLKDivider
=
RCC_HCLK_DIV4
;
if
(
HAL_RCC_ClockConfig
(
&
RCC_ClkInitStruct
,
FLASH_LATENCY_7
)
!=
HAL_OK
)
{
while
(
1
)
while
(
1
)
{}
}
#endif
#if defined(RT_USING_RTC) || defined(RCC_PERIPHCLK_CLK48)
PeriphClkInitStruct
.
PeriphClockSelection
=
0
;
#ifdef RT_USING_RTC
#ifdef RT_USING_RTC
PeriphClkInitStruct
.
PeriphClockSelection
|=
RCC_PERIPHCLK_RTC
;
PeriphClkInitStruct
.
RTCClockSelection
=
RCC_RTCCLKSOURCE_LSI
;
#endif
#ifdef RCC_PERIPHCLK_CLK48
#endif
#ifdef RCC_PERIPHCLK_CLK48
PeriphClkInitStruct
.
PeriphClockSelection
|=
RCC_PERIPHCLK_CLK48
;
PeriphClkInitStruct
.
Clk48ClockSelection
=
RCC_CLK48CLKSOURCE_PLLQ
;
#endif
#endif
if
(
HAL_RCCEx_PeriphCLKConfig
(
&
PeriphClkInitStruct
)
!=
HAL_OK
)
{
while
(
1
)
while
(
1
)
{}
}
#endif
}
/**
* This is the timer interrupt service routine.
*
...
...
@@ -179,9 +174,7 @@ void SysTick_Handler(void)
rt_interrupt_enter
();
/* tick for HAL Library */
HAL_IncTick
();
rt_tick_increase
();
/* leave interrupt */
rt_interrupt_leave
();
}
...
...
@@ -191,10 +184,8 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
/*Configure the SysTick to have interrupt in 1ms time basis*/
HAL_SYSTICK_Config
(
HAL_RCC_GetHCLKFreq
()
/
RT_TICK_PER_SECOND
);
/*Configure the SysTick IRQ priority */
HAL_NVIC_SetPriority
(
SysTick_IRQn
,
TickPriority
,
0
);
HAL_NVIC_SetPriority
(
SysTick_IRQn
,
TickPriority
,
0
);
/* Return function status */
return
HAL_OK
;
}
...
...
@@ -213,26 +204,25 @@ void HAL_ResumeTick(void)
{
/* we should not resume tick */
}
void
HAL_MspInit
(
void
)
{
HAL_NVIC_SetPriorityGrouping
(
NVIC_PRIORITYGROUP_4
);
/* System interrupt init*/
/* MemoryManagement_IRQn interrupt configuration */
HAL_NVIC_SetPriority
(
MemoryManagement_IRQn
,
0
,
0
);
/* BusFault_IRQn interrupt configuration */
HAL_NVIC_SetPriority
(
BusFault_IRQn
,
0
,
0
);
/* UsageFault_IRQn interrupt configuration */
HAL_NVIC_SetPriority
(
UsageFault_IRQn
,
0
,
0
);
/* SVCall_IRQn interrupt configuration */
HAL_NVIC_SetPriority
(
SVCall_IRQn
,
0
,
0
);
/* DebugMonitor_IRQn interrupt configuration */
HAL_NVIC_SetPriority
(
DebugMonitor_IRQn
,
0
,
0
);
/* PendSV_IRQn interrupt configuration */
HAL_NVIC_SetPriority
(
PendSV_IRQn
,
15
,
0
);
/* SysTick_IRQn interrupt configuration */
HAL_NVIC_SetPriority
(
SysTick_IRQn
,
15
,
0
);
HAL_NVIC_SetPriorityGrouping
(
NVIC_PRIORITYGROUP_4
);
/* System interrupt init*/
/* MemoryManagement_IRQn interrupt configuration */
HAL_NVIC_SetPriority
(
MemoryManagement_IRQn
,
0
,
0
);
/* BusFault_IRQn interrupt configuration */
HAL_NVIC_SetPriority
(
BusFault_IRQn
,
0
,
0
);
/* UsageFault_IRQn interrupt configuration */
HAL_NVIC_SetPriority
(
UsageFault_IRQn
,
0
,
0
);
/* SVCall_IRQn interrupt configuration */
HAL_NVIC_SetPriority
(
SVCall_IRQn
,
0
,
0
);
/* DebugMonitor_IRQn interrupt configuration */
HAL_NVIC_SetPriority
(
DebugMonitor_IRQn
,
0
,
0
);
/* PendSV_IRQn interrupt configuration */
HAL_NVIC_SetPriority
(
PendSV_IRQn
,
15
,
0
);
/* SysTick_IRQn interrupt configuration */
HAL_NVIC_SetPriority
(
SysTick_IRQn
,
15
,
0
);
}
/**
...
...
@@ -240,26 +230,16 @@ void HAL_MspInit(void)
*/
void
rt_hw_board_init
()
{
/* Configure the system clock @ 84 Mhz */
SystemClock_Config
();
HAL_Init
();
#ifdef RT_USING_HEAP
rt_system_heap_init
((
void
*
)
HEAP_BEGIN
,
(
void
*
)
HEAP_END
);
#endif
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init
();
#endif
#ifdef RT_USING_CONSOLE
rt_console_set_device
(
RT_CONSOLE_DEVICE_NAME
);
#endif
}
/*@}*/
bsp/stm32f4xx-HAL/drivers/board.h
浏览文件 @
1d48f9ff
...
...
@@ -11,19 +11,16 @@
* Date Author Notes
* 2009-09-22 Bernard add board.h to this bsp
*/
// <<< Use Configuration Wizard in Context Menu >>>
#ifndef __BOARD_H__
#define __BOARD_H__
#include <stm32f4xx.h>
#include <stm32f4xx_hal.h>
#include <rtthread.h>
#if \
defined(SOC_STM32F410T8)||\
defined(SOC_STM32F410TB)
#define STM32F4xx_PIN_NUMBERS 36
#define STM32F4xx_PIN_NUMBERS 36
#elif \
defined(SOC_STM32F401CB)||\
defined(SOC_STM32F401CC)||\
...
...
@@ -38,7 +35,7 @@
defined(SOC_STM32F413CH)||\
defined(SOC_STM32F413CG)||\
defined(SOC_STM32F423CH)
#define STM32F4xx_PIN_NUMBERS 48
#define STM32F4xx_PIN_NUMBERS 48
#elif \
defined(SOC_STM32F405RG)||\
defined(SOC_STM32F415RG)||\
...
...
@@ -59,13 +56,13 @@
defined(SOC_STM32F413RH)||\
defined(SOC_STM32F413RG)||\
defined(SOC_STM32F423RH)
#define STM32F4xx_PIN_NUMBERS 64
#define STM32F4xx_PIN_NUMBERS 64
#elif \
defined(SOC_STM32F446MC)||\
defined(SOC_STM32F446ME)||\
defined(SOC_STM32F413MH)||\
defined(SOC_STM32F413MG)
#define STM32F4xx_PIN_NUMBERS 81
#define STM32F4xx_PIN_NUMBERS 81
#elif \
defined(SOC_STM32F405VG)||\
defined(SOC_STM32F415VG)||\
...
...
@@ -96,7 +93,7 @@
defined(SOC_STM32F413VH)||\
defined(SOC_STM32F413VG)||\
defined(SOC_STM32F423VH)
#define STM32F4xx_PIN_NUMBERS 100
#define STM32F4xx_PIN_NUMBERS 100
#elif \
defined(SOC_STM32F405ZG)||\
defined(SOC_STM32F415ZG)||\
...
...
@@ -121,14 +118,14 @@
defined(SOC_STM32F413ZH)||\
defined(SOC_STM32F413ZG)||\
defined(SOC_STM32F423ZH)
#define STM32F4xx_PIN_NUMBERS 144
#define STM32F4xx_PIN_NUMBERS 144
#elif \
defined(SOC_STM32F469AI)||\
defined(SOC_STM32F469AG)||\
defined(SOC_STM32F469AE)||\
defined(SOC_STM32F479AI)||\
defined(SOC_STM32F479AG)
#define STM32F4xx_PIN_NUMBERS 169
#define STM32F4xx_PIN_NUMBERS 169
#elif \
defined(SOC_STM32F407IG)||\
defined(SOC_STM32F407IE)||\
...
...
@@ -147,7 +144,7 @@
defined(SOC_STM32F469IE)||\
defined(SOC_STM32F479II)||\
defined(SOC_STM32F479IG)
#define STM32F4xx_PIN_NUMBERS 176
#define STM32F4xx_PIN_NUMBERS 176
#elif \
defined(SOC_STM32F429BG)||\
defined(SOC_STM32F429BI)||\
...
...
@@ -158,7 +155,7 @@
defined(SOC_STM32F469BE)||\
defined(SOC_STM32F479BI)||\
defined(SOC_STM32F479BG)
#define STM32F4xx_PIN_NUMBERS 208
#define STM32F4xx_PIN_NUMBERS 208
#elif \
defined(SOC_STM32F429NG)||\
defined(SOC_STM32F439NI)||\
...
...
@@ -169,21 +166,20 @@
defined(SOC_STM32F469NE)||\
defined(SOC_STM32F479NI)||\
defined(SOC_STM32F479NG)
#define STM32F4xx_PIN_NUMBERS 216
#define STM32F4xx_PIN_NUMBERS 216
#endif
#if \
defined(SOC_STM32F405RG)||\
defined(SOC_STM32F405VG)||\
defined(SOC_STM32F405ZG)
//#define STM32F405xx
#define STM32_SRAM_SIZE (192-64)
//#define STM32F405xx
#define STM32_SRAM_SIZE (192-64)
#elif \
defined(SOC_STM32F415RG)||\
defined(SOC_STM32F415VG)||\
defined(SOC_STM32F415ZG)
//#define STM32F415xx
#define STM32_SRAM_SIZE (192-64)
//#define STM32F415xx
#define STM32_SRAM_SIZE (192-64)
#elif \
defined(SOC_STM32F407VG)||\
defined(SOC_STM32F407VE)||\
...
...
@@ -191,8 +187,8 @@
defined(SOC_STM32F407ZE)||\
defined(SOC_STM32F407IG)||\
defined(SOC_STM32F407IE)
//#define STM32F407xx
#define STM32_SRAM_SIZE (192-64)
//#define STM32F407xx
#define STM32_SRAM_SIZE (192-64)
#elif \
defined(SOC_STM32F417VG)||\
defined(SOC_STM32F417VE)||\
...
...
@@ -200,8 +196,8 @@
defined(SOC_STM32F417ZE)||\
defined(SOC_STM32F417IG)||\
defined(SOC_STM32F417IE)
//#define STM32F417xx
#define STM32_SRAM_SIZE (192-64)
//#define STM32F417xx
#define STM32_SRAM_SIZE (192-64)
#elif \
defined(SOC_STM32F427VG)||\
defined(SOC_STM32F427VI)||\
...
...
@@ -209,8 +205,8 @@
defined(SOC_STM32F427ZI)||\
defined(SOC_STM32F427IG)||\
defined(SOC_STM32F427II)
//#define STM32F427xx
#define STM32_SRAM_SIZE (256-64)
//#define STM32F427xx
#define STM32_SRAM_SIZE (256-64)
#elif \
defined(SOC_STM32F437VG)||\
defined(SOC_STM32F437VI)||\
...
...
@@ -218,8 +214,8 @@
defined(SOC_STM32F437ZI)||\
defined(SOC_STM32F437IG)||\
defined(SOC_STM32F437II)
//#define STM32F437xx
#define STM32_SRAM_SIZE (256-64)
//#define STM32F437xx
#define STM32_SRAM_SIZE (256-64)
#elif \
defined(SOC_STM32F429VG)||\
defined(SOC_STM32F429VI)||\
...
...
@@ -231,8 +227,8 @@
defined(SOC_STM32F429NI)||\
defined(SOC_STM32F429IG)||\
defined(SOC_STM32F429II)
//#define STM32F429xx
#define STM32_SRAM_SIZE (256-64)
//#define STM32F429xx
#define STM32_SRAM_SIZE (256-64)
#elif \
defined(SOC_STM32F439VG)||\
defined(SOC_STM32F439VI)||\
...
...
@@ -244,8 +240,8 @@
defined(SOC_STM32F439NI)||\
defined(SOC_STM32F439IG)||\
defined(SOC_STM32F439II)
//#define STM32F439xx
#define STM32_SRAM_SIZE (256-64)
//#define STM32F439xx
#define STM32_SRAM_SIZE (256-64)
#elif \
defined(SOC_STM32F401CB)||\
defined(SOC_STM32F401CC)||\
...
...
@@ -253,8 +249,8 @@
defined(SOC_STM32F401RC)||\
defined(SOC_STM32F401VB)||\
defined(SOC_STM32F401VC)
//#define STM32F401xC
#define STM32_SRAM_SIZE 64
//#define STM32F401xC
#define STM32_SRAM_SIZE 64
#elif \
defined(SOC_STM32F401CD)||\
defined(SOC_STM32F401RD)||\
...
...
@@ -262,23 +258,23 @@
defined(SOC_STM32F401CE)||\
defined(SOC_STM32F401RE)||\
defined(SOC_STM32F401VE)
//#define STM32F401xE
#define STM32_SRAM_SIZE 96
//#define STM32F401xE
#define STM32_SRAM_SIZE 96
#elif \
defined(SOC_STM32F410T8)||\
defined(SOC_STM32F410TB)
//#define STM32F410Tx
#define STM32_SRAM_SIZE 32
//#define STM32F410Tx
#define STM32_SRAM_SIZE 32
#elif \
defined(SOC_STM32F410C8)||\
defined(SOC_STM32F410CB)
//#define STM32F410Cx
#define STM32_SRAM_SIZE 32
//#define STM32F410Cx
#define STM32_SRAM_SIZE 32
#elif \
defined(SOC_STM32F410R8)||\
defined(SOC_STM32F410RB)
//#define STM32F410Rx
#define STM32_SRAM_SIZE 32
//#define STM32F410Rx
#define STM32_SRAM_SIZE 32
#elif \
defined(SOC_STM32F411CC)||\
defined(SOC_STM32F411RC)||\
...
...
@@ -286,8 +282,8 @@
defined(SOC_STM32F411CE)||\
defined(SOC_STM32F411RE)||\
defined(SOC_STM32F411VE)
//#define STM32F411xE
#define STM32_SRAM_SIZE 128
//#define STM32F411xE
#define STM32_SRAM_SIZE 128
#elif \
defined(SOC_STM32F446MC)||\
defined(SOC_STM32F446ME)||\
...
...
@@ -297,8 +293,8 @@
defined(SOC_STM32F446VE)||\
defined(SOC_STM32F446ZC)||\
defined(SOC_STM32F446ZE)
//#define STM32F446xx
#define STM32_SRAM_SIZE 128
//#define STM32F446xx
#define STM32_SRAM_SIZE 128
#elif \
defined(SOC_STM32F469AI)||\
defined(SOC_STM32F469II)||\
...
...
@@ -312,8 +308,8 @@
defined(SOC_STM32F469IE)||\
defined(SOC_STM32F469BE)||\
defined(SOC_STM32F469NE)
//#define STM32F469xx
#define STM32_SRAM_SIZE (384-64)
//#define STM32F469xx
#define STM32_SRAM_SIZE (384-64)
#elif \
defined(SOC_STM32F479AI)||\
defined(SOC_STM32F479II)||\
...
...
@@ -323,33 +319,33 @@
defined(SOC_STM32F479IG)||\
defined(SOC_STM32F479BG)||\
defined(SOC_STM32F479NG)
//#define STM32F479xx
#define STM32_SRAM_SIZE (384-64)
//#define STM32F479xx
#define STM32_SRAM_SIZE (384-64)
#elif \
defined(SOC_STM32F412CEU)||\
defined(SOC_STM32F412CGU)
//#define STM32F412Cx
//#define STM32F412Cx
#elif \
defined(SOC_STM32F412ZET)||\
defined(SOC_STM32F412ZGT)||\
defined(SOC_STM32F412ZEJ)||\
defined(SOC_STM32F412ZGJ)
//#define STM32F412Zx
#define STM32_SRAM_SIZE 256
//#define STM32F412Zx
#define STM32_SRAM_SIZE 256
#elif \
defined(SOC_STM32F412VET)||\
defined(SOC_STM32F412VGT)||\
defined(SOC_STM32F412VEH)||\
defined(SOC_STM32F412VGH)
//#define STM32F412Vx
#define STM32_SRAM_SIZE 256
//#define STM32F412Vx
#define STM32_SRAM_SIZE 256
#elif \
defined(SOC_STM32F412RET)||\
defined(SOC_STM32F412RGT)||\
defined(SOC_STM32F412REY)||\
defined(SOC_STM32F412RGY)
//#define STM32F412Rx
#define STM32_SRAM_SIZE 256
//#define STM32F412Rx
#define STM32_SRAM_SIZE 256
#elif \
defined(SOC_STM32F413CH)||\
defined(SOC_STM32F413MH)||\
...
...
@@ -361,32 +357,31 @@
defined(SOC_STM32F413RG)||\
defined(SOC_STM32F413VG)||\
defined(SOC_STM32F413ZG)
//#define STM32F413xx
#define STM32_SRAM_SIZE 320
//#define STM32F413xx
#define STM32_SRAM_SIZE 320
#elif \
defined(SOC_STM32F423CH)||\
defined(SOC_STM32F423RH)||\
defined(SOC_STM32F423VH)||\
defined(SOC_STM32F423ZH)
//#define STM32F423xx
#define STM32_SRAM_SIZE 320
//#define STM32F423xx
#define STM32_SRAM_SIZE 320
#endif
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#ifdef __CC_ARM
extern
int
Image
$$
RW_IRAM1
$$
ZI
$$
Limit
;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
extern
int
Image
$$
RW_IRAM1
$$
ZI
$$
Limit
;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="HEAP"
#define HEAP_BEGIN (__segment_end("HEAP"))
#pragma section="HEAP"
#define HEAP_BEGIN (__segment_end("HEAP"))
#else
extern
int
__bss_end
;
#define HEAP_BEGIN ((void *)&__bss_end)
extern
int
__bss_end
;
#define HEAP_BEGIN ((void *)&__bss_end)
#endif
#define HEAP_END STM32_SRAM_END
#
endif
#
define HEAP_END STM32_SRAM_END
extern
void
rt_hw_board_init
(
void
);
// <<< Use Configuration Wizard in Context Menu >>>
#endif
bsp/stm32f4xx-HAL/drivers/drv_gpio.c
浏览文件 @
1d48f9ff
...
...
@@ -11,13 +11,10 @@
* Date Author Notes
* 2017-10-20 ZYH the first version
*/
#include <rthw.h>
#include <rtdevice.h>
#include <board.h>
#ifdef RT_USING_PIN
#define __STM32_PIN(index, gpio, gpio_index) {index, GPIO##gpio##_CLK_ENABLE, GPIO##gpio, GPIO_PIN_##gpio_index}
#define __STM32_PIN_DEFAULT {-1, 0, 0, 0}
...
...
@@ -27,76 +24,78 @@ static void GPIOA_CLK_ENABLE(void)
__HAL_RCC_GPIOA_CLK_ENABLE
();
#endif
}
static
void
GPIOB_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOB_CLK_ENABLE
__HAL_RCC_GPIOB_CLK_ENABLE
();
#endif
}
static
void
GPIOC_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOC_CLK_ENABLE
__HAL_RCC_GPIOC_CLK_ENABLE
();
#endif
}
#if (STM32F4xx_PIN_NUMBERS > 48)
static
void
GPIOD_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOD_CLK_ENABLE
__HAL_RCC_GPIOD_CLK_ENABLE
();
#endif
}
#if (STM32F4xx_PIN_NUMBERS > 64)
static
void
GPIOE_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOE_CLK_ENABLE
__HAL_RCC_GPIOE_CLK_ENABLE
();
#endif
}
#if (STM32F4xx_PIN_NUMBERS > 100)
static
void
GPIOF_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOF_CLK_ENABLE
__HAL_RCC_GPIOF_CLK_ENABLE
();
#endif
}
static
void
GPIOG_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOG_CLK_ENABLE
__HAL_RCC_GPIOG_CLK_ENABLE
();
#endif
}
#if (STM32F4xx_PIN_NUMBERS > 144)
static
void
GPIOH_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOH_CLK_ENABLE
__HAL_RCC_GPIOH_CLK_ENABLE
();
#endif
}
static
void
GPIOI_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOI_CLK_ENABLE
__HAL_RCC_GPIOI_CLK_ENABLE
();
#endif
}
#if (STM32F4xx_PIN_NUMBERS > 176)
static
void
GPIOJ_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOJ_CLK_ENABLE
__HAL_RCC_GPIOJ_CLK_ENABLE
();
#endif
}
static
void
GPIOK_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOK_CLK_ENABLE
__HAL_RCC_GPIOK_CLK_ENABLE
();
#endif
}
#endif
#endif
#endif
#endif
#if (STM32F4xx_PIN_NUMBERS > 48)
static
void
GPIOD_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOD_CLK_ENABLE
__HAL_RCC_GPIOD_CLK_ENABLE
();
#endif
}
#if (STM32F4xx_PIN_NUMBERS > 64)
static
void
GPIOE_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOE_CLK_ENABLE
__HAL_RCC_GPIOE_CLK_ENABLE
();
#endif
}
#if (STM32F4xx_PIN_NUMBERS > 100)
static
void
GPIOF_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOF_CLK_ENABLE
__HAL_RCC_GPIOF_CLK_ENABLE
();
#endif
}
static
void
GPIOG_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOG_CLK_ENABLE
__HAL_RCC_GPIOG_CLK_ENABLE
();
#endif
}
#if (STM32F4xx_PIN_NUMBERS > 144)
static
void
GPIOH_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOH_CLK_ENABLE
__HAL_RCC_GPIOH_CLK_ENABLE
();
#endif
}
static
void
GPIOI_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOI_CLK_ENABLE
__HAL_RCC_GPIOI_CLK_ENABLE
();
#endif
}
#if (STM32F4xx_PIN_NUMBERS > 176)
static
void
GPIOJ_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOJ_CLK_ENABLE
__HAL_RCC_GPIOJ_CLK_ENABLE
();
#endif
}
static
void
GPIOK_CLK_ENABLE
(
void
)
{
#ifdef __HAL_RCC_GPIOK_CLK_ENABLE
__HAL_RCC_GPIOK_CLK_ENABLE
();
#endif
}
#endif
#endif
#endif
#endif
#endif
/* STM32 GPIO driver */
struct
pin_index
...
...
@@ -106,7 +105,6 @@ struct pin_index
GPIO_TypeDef
*
gpio
;
uint32_t
pin
;
};
static
const
struct
pin_index
pins
[]
=
{
#if (STM32F4xx_PIN_NUMBERS == 36)
...
...
@@ -399,11 +397,11 @@ static const struct pin_index pins[] =
__STM32_PIN
(
45
,
E
,
14
),
__STM32_PIN
(
46
,
E
,
15
),
__STM32_PIN
(
47
,
B
,
10
),
#if defined(STM32F405xx)||defined(STM32F415xx)||defined(STM32F407xx)||defined(STM32F417xx)||defined(STM32F427xx)||defined(STM32F437xx)||defined(STM32F429xx)
__STM32_PIN
(
48
,
B
,
11
),
#else
__STM32_PIN_DEFAULT
,
#endif
#if defined(STM32F405xx)||defined(STM32F415xx)||defined(STM32F407xx)||defined(STM32F417xx)||defined(STM32F427xx)||defined(STM32F437xx)||defined(STM32F429xx)
__STM32_PIN
(
48
,
B
,
11
),
#else
__STM32_PIN_DEFAULT
,
#endif
__STM32_PIN_DEFAULT
,
__STM32_PIN_DEFAULT
,
__STM32_PIN
(
51
,
B
,
12
),
...
...
@@ -1495,6 +1493,7 @@ struct pin_irq_map
rt_uint16_t
pinbit
;
IRQn_Type
irqno
;
};
static
const
struct
pin_irq_map
pin_irq_map
[]
=
{
{
GPIO_PIN_0
,
EXTI0_IRQn
},
...
...
@@ -1514,6 +1513,7 @@ static const struct pin_irq_map pin_irq_map[] =
{
GPIO_PIN_14
,
EXTI15_10_IRQn
},
{
GPIO_PIN_15
,
EXTI15_10_IRQn
},
};
struct
rt_pin_irq_hdr
pin_irq_hdr_tab
[]
=
{
{
-
1
,
0
,
RT_NULL
,
RT_NULL
},
...
...
@@ -1538,31 +1538,27 @@ struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
const
struct
pin_index
*
get_pin
(
uint8_t
pin
)
{
const
struct
pin_index
*
index
;
if
(
pin
<
ITEM_NUM
(
pins
))
{
index
=
&
pins
[
pin
];
if
(
index
->
index
==
-
1
)
index
=
RT_NULL
;
index
=
RT_NULL
;
}
else
{
index
=
RT_NULL
;
}
return
index
;
};
void
stm32_pin_write
(
rt_device_t
dev
,
rt_base_t
pin
,
rt_base_t
value
)
{
const
struct
pin_index
*
index
;
index
=
get_pin
(
pin
);
if
(
index
==
RT_NULL
)
{
return
;
}
HAL_GPIO_WritePin
(
index
->
gpio
,
index
->
pin
,
(
GPIO_PinState
)
value
);
}
...
...
@@ -1570,17 +1566,13 @@ int stm32_pin_read(rt_device_t dev, rt_base_t pin)
{
int
value
;
const
struct
pin_index
*
index
;
value
=
PIN_LOW
;
index
=
get_pin
(
pin
);
if
(
index
==
RT_NULL
)
{
return
value
;
}
value
=
HAL_GPIO_ReadPin
(
index
->
gpio
,
index
->
pin
);
return
value
;
}
...
...
@@ -1588,22 +1580,18 @@ void stm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
{
const
struct
pin_index
*
index
;
GPIO_InitTypeDef
GPIO_InitStruct
;
index
=
get_pin
(
pin
);
if
(
index
==
RT_NULL
)
{
return
;
}
/* GPIO Periph clock enable */
index
->
rcc
();
/* Configure GPIO_InitStructure */
GPIO_InitStruct
.
Pin
=
index
->
pin
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_OUTPUT_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
if
(
mode
==
PIN_MODE_OUTPUT
)
{
/* output setting */
...
...
@@ -1634,9 +1622,9 @@ void stm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
GPIO_InitStruct
.
Mode
=
GPIO_MODE_OUTPUT_OD
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
}
HAL_GPIO_Init
(
index
->
gpio
,
&
GPIO_InitStruct
);
}
rt_inline
rt_int32_t
bit2bitno
(
rt_uint32_t
bit
)
{
int
i
;
...
...
@@ -1649,6 +1637,7 @@ rt_inline rt_int32_t bit2bitno(rt_uint32_t bit)
}
return
-
1
;
}
rt_inline
const
struct
pin_irq_map
*
get_pin_irq_map
(
uint32_t
pinbit
)
{
rt_int32_t
mapindex
=
bit2bitno
(
pinbit
);
...
...
@@ -1658,13 +1647,13 @@ rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit)
}
return
&
pin_irq_map
[
mapindex
];
};
rt_err_t
stm32_pin_attach_irq
(
struct
rt_device
*
device
,
rt_int32_t
pin
,
rt_uint32_t
mode
,
void
(
*
hdr
)(
void
*
args
),
void
*
args
)
{
const
struct
pin_index
*
index
;
rt_base_t
level
;
rt_int32_t
irqindex
=
-
1
;
index
=
get_pin
(
pin
);
if
(
index
==
RT_NULL
)
{
...
...
@@ -1675,12 +1664,11 @@ rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
{
return
RT_ENOSYS
;
}
level
=
rt_hw_interrupt_disable
();
if
(
pin_irq_hdr_tab
[
irqindex
].
pin
==
pin
&&
pin_irq_hdr_tab
[
irqindex
].
hdr
==
hdr
&&
pin_irq_hdr_tab
[
irqindex
].
mode
==
mode
&&
pin_irq_hdr_tab
[
irqindex
].
args
==
args
)
pin_irq_hdr_tab
[
irqindex
].
hdr
==
hdr
&&
pin_irq_hdr_tab
[
irqindex
].
mode
==
mode
&&
pin_irq_hdr_tab
[
irqindex
].
args
==
args
)
{
rt_hw_interrupt_enable
(
level
);
return
RT_EOK
;
...
...
@@ -1695,15 +1683,14 @@ rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
pin_irq_hdr_tab
[
irqindex
].
mode
=
mode
;
pin_irq_hdr_tab
[
irqindex
].
args
=
args
;
rt_hw_interrupt_enable
(
level
);
return
RT_EOK
;
}
rt_err_t
stm32_pin_dettach_irq
(
struct
rt_device
*
device
,
rt_int32_t
pin
)
{
const
struct
pin_index
*
index
;
rt_base_t
level
;
rt_int32_t
irqindex
=
-
1
;
index
=
get_pin
(
pin
);
if
(
index
==
RT_NULL
)
{
...
...
@@ -1714,7 +1701,6 @@ rt_err_t stm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
{
return
RT_ENOSYS
;
}
level
=
rt_hw_interrupt_disable
();
if
(
pin_irq_hdr_tab
[
irqindex
].
pin
==
-
1
)
{
...
...
@@ -1726,9 +1712,9 @@ rt_err_t stm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
pin_irq_hdr_tab
[
irqindex
].
mode
=
0
;
pin_irq_hdr_tab
[
irqindex
].
args
=
RT_NULL
;
rt_hw_interrupt_enable
(
level
);
return
RT_EOK
;
}
rt_err_t
stm32_pin_irq_enable
(
struct
rt_device
*
device
,
rt_base_t
pin
,
rt_uint32_t
enabled
)
{
...
...
@@ -1737,7 +1723,6 @@ rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
rt_base_t
level
;
rt_int32_t
irqindex
=
-
1
;
GPIO_InitTypeDef
GPIO_InitStruct
;
index
=
get_pin
(
pin
);
if
(
index
==
RT_NULL
)
{
...
...
@@ -1793,23 +1778,22 @@ rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
{
return
RT_ENOSYS
;
}
return
RT_EOK
;
}
const
static
struct
rt_pin_ops
_stm32_pin_ops
=
{
stm32_pin_mode
,
stm32_pin_write
,
stm32_pin_read
,
stm32_pin_attach_irq
,
stm32_pin_dettach_irq
,
stm32_pin_irq_enable
,
{
stm32_pin_mode
,
stm32_pin_write
,
stm32_pin_read
,
stm32_pin_attach_irq
,
stm32_pin_dettach_irq
,
stm32_pin_irq_enable
,
};
int
rt_hw_pin_init
(
void
)
{
int
result
;
result
=
rt_device_pin_register
(
"pin"
,
&
_stm32_pin_ops
,
RT_NULL
);
return
result
;
}
...
...
@@ -1827,36 +1811,42 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
{
pin_irq_hdr
(
bit2bitno
(
GPIO_Pin
));
}
void
EXTI0_IRQHandler
(
void
)
{
rt_interrupt_enter
();
HAL_GPIO_EXTI_IRQHandler
(
GPIO_PIN_0
);
rt_interrupt_leave
();
}
void
EXTI1_IRQHandler
(
void
)
{
rt_interrupt_enter
();
HAL_GPIO_EXTI_IRQHandler
(
GPIO_PIN_1
);
rt_interrupt_leave
();
}
void
EXTI2_IRQHandler
(
void
)
{
rt_interrupt_enter
();
HAL_GPIO_EXTI_IRQHandler
(
GPIO_PIN_2
);
rt_interrupt_leave
();
}
void
EXTI3_IRQHandler
(
void
)
{
rt_interrupt_enter
();
HAL_GPIO_EXTI_IRQHandler
(
GPIO_PIN_3
);
rt_interrupt_leave
();
}
void
EXTI4_IRQHandler
(
void
)
{
rt_interrupt_enter
();
HAL_GPIO_EXTI_IRQHandler
(
GPIO_PIN_4
);
rt_interrupt_leave
();
}
void
EXTI9_5_IRQHandler
(
void
)
{
rt_interrupt_enter
();
...
...
@@ -1867,6 +1857,7 @@ void EXTI9_5_IRQHandler(void)
HAL_GPIO_EXTI_IRQHandler
(
GPIO_PIN_9
);
rt_interrupt_leave
();
}
void
EXTI15_10_IRQHandler
(
void
)
{
rt_interrupt_enter
();
...
...
@@ -1878,5 +1869,4 @@ void EXTI15_10_IRQHandler(void)
HAL_GPIO_EXTI_IRQHandler
(
GPIO_PIN_15
);
rt_interrupt_leave
();
}
#endif
bsp/stm32f4xx-HAL/drivers/drv_gpio.h
浏览文件 @
1d48f9ff
...
...
@@ -13,18 +13,12 @@
*/
#ifndef GPIO_H__
#define GPIO_H__
struct
stm32_hw_pin_userdata
{
int
pin
;
uint32_t
mode
;
};
#define PIN_USERDATA_END {-1,0}
extern
struct
stm32_hw_pin_userdata
stm32_pins
[];
int
rt_hw_pin_init
(
void
);
#endif
bsp/stm32f4xx-HAL/drivers/drv_i2c.c
浏览文件 @
1d48f9ff
...
...
@@ -22,17 +22,13 @@
* 2017-06-05 tanek first implementation.
* 2018-03-08 ZYH Porting for stm32f4xx
*/
#include <rthw.h>
#include <rtthread.h>
#include <rtdevice.h>
#include "drv_i2c.h"
#include <board.h>
/*user can change this*/
#define I2C_BUS_NAME "i2c2"
/*user should change this to adapt specific board*/
#define I2C_SCL_PIN GPIO_PIN_6
#define I2C_SCL_PORT GPIOB
...
...
@@ -41,26 +37,21 @@
#define I2C_SDA_PORT GPIOB
#define I2C_SDA_PORT_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE
static
void
drv_i2c_gpio_init
()
{
GPIO_InitTypeDef
GPIO_Initure
;
I2C_SCL_PORT_CLK_ENABLE
();
I2C_SDA_PORT_CLK_ENABLE
();
GPIO_Initure
.
Pin
=
I2C_SCL_PIN
;
GPIO_Initure
.
Mode
=
GPIO_MODE_OUTPUT_OD
;
GPIO_Initure
.
Pull
=
GPIO_PULLUP
;
GPIO_Initure
.
Speed
=
GPIO_SPEED_HIGH
;
HAL_GPIO_Init
(
I2C_SCL_PORT
,
&
GPIO_Initure
);
GPIO_Initure
.
Pin
=
I2C_SDA_PIN
;
GPIO_Initure
.
Mode
=
GPIO_MODE_OUTPUT_OD
;
GPIO_Initure
.
Pull
=
GPIO_PULLUP
;
GPIO_Initure
.
Speed
=
GPIO_SPEED_HIGH
;
HAL_GPIO_Init
(
I2C_SDA_PORT
,
&
GPIO_Initure
);
HAL_GPIO_WritePin
(
I2C_SCL_PORT
,
I2C_SCL_PIN
,
GPIO_PIN_SET
);
HAL_GPIO_WritePin
(
I2C_SDA_PORT
,
I2C_SDA_PIN
,
GPIO_PIN_SET
);
}
...
...
@@ -85,11 +76,10 @@ static rt_int32_t drv_get_scl(void *data)
return
HAL_GPIO_ReadPin
(
I2C_SCL_PORT
,
I2C_SCL_PIN
)
?
1
:
0
;
}
static
void
drv_udelay
(
rt_uint32_t
us
)
{
int
i
=
(
HAL_RCC_GetHCLKFreq
()
/
4000000
*
us
);
while
(
i
)
int
i
=
(
HAL_RCC_GetHCLKFreq
()
/
4000000
*
us
);
while
(
i
)
{
i
--
;
}
...
...
@@ -110,15 +100,10 @@ static const struct rt_i2c_bit_ops drv_bit_ops =
int
drv_i2c_init
(
void
)
{
static
struct
rt_i2c_bus_device
i2c2_bus
;
drv_i2c_gpio_init
();
rt_memset
((
void
*
)
&
i2c2_bus
,
0
,
sizeof
(
struct
rt_i2c_bus_device
));
i2c2_bus
.
priv
=
(
void
*
)
&
drv_bit_ops
;
rt_i2c_bit_add_bus
(
&
i2c2_bus
,
I2C_BUS_NAME
);
return
RT_EOK
;
}
INIT_DEVICE_EXPORT
(
drv_i2c_init
);
...
...
bsp/stm32f4xx-HAL/drivers/drv_i2c.h
浏览文件 @
1d48f9ff
...
...
@@ -21,10 +21,7 @@
* Date Author Notes
* 2017-06-05 tanek first implementation.
*/
#ifndef __DRV_I2C__
#define __DRV_I2C__
int
hw_i2c_init
(
void
);
#endif
bsp/stm32f4xx-HAL/drivers/drv_iwg.c
浏览文件 @
1d48f9ff
...
...
@@ -28,8 +28,9 @@ static rt_err_t drv_init(rt_watchdog_t *wdt)
{
}
}
return
RT_EOK
;
return
RT_EOK
;
}
static
rt_err_t
drv_control
(
rt_watchdog_t
*
wdt
,
int
cmd
,
void
*
arg
)
{
switch
(
cmd
)
...
...
@@ -49,28 +50,21 @@ static rt_err_t drv_control(rt_watchdog_t *wdt, int cmd, void *arg)
}
return
RT_EOK
;
}
static
struct
rt_watchdog_ops
_ops
=
{
drv_init
,
drv_control
};
static
rt_watchdog_t
_iwg
=
{
.
ops
=
&
_ops
};
int
rt_iwg_init
(
void
)
{
return
rt_hw_watchdog_register
(
&
_iwg
,
"iwg"
,
RT_DEVICE_FLAG_DEACTIVATE
,
RT_NULL
);
}
INIT_BOARD_EXPORT
(
rt_iwg_init
);
#endif
bsp/stm32f4xx-HAL/drivers/drv_iwg.h
浏览文件 @
1d48f9ff
...
...
@@ -14,15 +14,4 @@
#ifndef __DRV_IWG_H__
#define __DRV_IWG_H__
extern
int
rt_iwg_init
(
void
);
#endif
bsp/stm32f4xx-HAL/drivers/drv_rtc.c
浏览文件 @
1d48f9ff
...
...
@@ -27,13 +27,11 @@
#include <string.h>
#include <time.h>
RTC_HandleTypeDef
hrtc
;
/* RTC init function */
void
MX_RTC_Init
(
void
)
{
RTC_TimeTypeDef
sTime
;
RTC_DateTypeDef
sDate
;
/**Initialize RTC Only
*/
hrtc
.
Instance
=
RTC
;
...
...
@@ -54,61 +52,51 @@ void MX_RTC_Init(void)
sTime
.
DayLightSaving
=
RTC_DAYLIGHTSAVING_NONE
;
sTime
.
StoreOperation
=
RTC_STOREOPERATION_RESET
;
RT_ASSERT
(
HAL_RTC_SetTime
(
&
hrtc
,
&
sTime
,
RTC_FORMAT_BIN
)
==
HAL_OK
);
sDate
.
WeekDay
=
RTC_WEEKDAY_THURSDAY
;
sDate
.
Month
=
RTC_MONTH_OCTOBER
;
sDate
.
Date
=
26
;
sDate
.
Year
=
17
;
RT_ASSERT
(
HAL_RTC_SetDate
(
&
hrtc
,
&
sDate
,
RTC_FORMAT_BIN
)
==
HAL_OK
);
}
HAL_RTCEx_BKUPWrite
(
&
hrtc
,
RTC_BKP_DR0
,
0x32F2
);
}
void
HAL_RTC_MspInit
(
RTC_HandleTypeDef
*
rtcHandle
)
{
if
(
rtcHandle
->
Instance
==
RTC
)
{
/* USER CODE BEGIN RTC_MspInit 0 */
/* USER CODE END RTC_MspInit 0 */
/* RTC clock enable */
__HAL_RCC_RTC_ENABLE
();
/* USER CODE BEGIN RTC_MspInit 1 */
/* USER CODE END RTC_MspInit 1 */
}
}
void
HAL_RTC_MspDeInit
(
RTC_HandleTypeDef
*
rtcHandle
)
{
if
(
rtcHandle
->
Instance
==
RTC
)
{
/* USER CODE BEGIN RTC_MspDeInit 0 */
/* USER CODE END RTC_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_RTC_DISABLE
();
/* USER CODE BEGIN RTC_MspDeInit 1 */
/* USER CODE END RTC_MspDeInit 1 */
}
}
static
rt_err_t
stm32_rtc_control
(
struct
rt_device
*
dev
,
int
cmd
,
void
*
args
)
{
struct
tm
*
tm_now
;
struct
tm
now
;
struct
tm
now
;
RTC_TimeTypeDef
sTime
;
RTC_DateTypeDef
sDate
;
rt_enter_critical
();
rt_enter_critical
();
/* converts calendar time time into local time. */
tm_now
=
localtime
((
const
time_t
*
)
args
);
/* copy the statically located variable */
...
...
@@ -141,25 +129,29 @@ static rt_err_t stm32_rtc_control(struct rt_device *dev,
}
return
RT_EOK
;
}
static
rt_err_t
stm32_rtc_init
(
struct
rt_device
*
dev
)
{
return
RT_EOK
;
return
RT_EOK
;
}
static
rt_err_t
stm32_rtc_open
(
struct
rt_device
*
dev
,
rt_uint16_t
oflag
)
{
return
RT_EOK
;
return
RT_EOK
;
}
static
rt_err_t
stm32_rtc_close
(
struct
rt_device
*
dev
)
{
return
RT_EOK
;
return
RT_EOK
;
}
static
rt_size_t
stm32_rtc_read
(
struct
rt_device
*
dev
,
rt_off_t
pos
,
void
*
buffer
,
rt_size_t
size
)
{
stm32_rtc_control
(
dev
,
RT_DEVICE_CTRL_RTC_GET_TIME
,
buffer
);
return
size
;
stm32_rtc_control
(
dev
,
RT_DEVICE_CTRL_RTC_GET_TIME
,
buffer
);
return
size
;
}
static
rt_size_t
stm32_rtc_write
(
struct
rt_device
*
dev
,
...
...
@@ -167,19 +159,17 @@ static rt_size_t stm32_rtc_write(struct rt_device *dev,
const
void
*
buffer
,
rt_size_t
size
)
{
stm32_rtc_control
(
dev
,
RT_DEVICE_CTRL_RTC_SET_TIME
,
(
void
*
)
buffer
);
return
size
;
stm32_rtc_control
(
dev
,
RT_DEVICE_CTRL_RTC_SET_TIME
,
(
void
*
)
buffer
);
return
size
;
}
struct
rt_device
rtc_device
;
struct
rt_device
rtc_device
;
int
rt_hw_rtc_init
(
void
)
{
MX_RTC_Init
();
rtc_device
.
type
=
RT_Device_Class_RTC
;
rtc_device
.
rx_indicate
=
RT_NULL
;
rtc_device
.
tx_complete
=
RT_NULL
;
rtc_device
.
init
=
stm32_rtc_init
;
rtc_device
.
open
=
stm32_rtc_open
;
rtc_device
.
close
=
stm32_rtc_close
;
...
...
@@ -187,20 +177,7 @@ int rt_hw_rtc_init(void)
rtc_device
.
write
=
stm32_rtc_write
;
rtc_device
.
control
=
stm32_rtc_control
;
rtc_device
.
user_data
=
RT_NULL
;
/* register a character device */
return
rt_device_register
(
&
rtc_device
,
"rtc"
,
RT_DEVICE_FLAG_DEACTIVATE
);
}
INIT_BOARD_EXPORT
(
rt_hw_rtc_init
);
bsp/stm32f4xx-HAL/drivers/drv_spi.c
浏览文件 @
1d48f9ff
...
...
@@ -11,37 +11,30 @@
* Date Author Notes
* 2017-11-08 ZYH the first version
*/
#include "board.h"
#include <rtthread.h>
#include <rtdevice.h>
#include <rthw.h>
#ifdef RT_USING_SPI
#define SPIRXEVENT 0x01
#define SPITXEVENT 0x02
#define SPITIMEOUT 2
#define SPICRCEN 0
struct
stm32_hw_spi_cs
{
rt_uint32_t
pin
;
};
struct
stm32_spi
{
SPI_TypeDef
*
Instance
;
struct
rt_spi_configuration
*
cfg
;
};
static
rt_err_t
stm32_spi_init
(
SPI_TypeDef
*
spix
,
struct
rt_spi_configuration
*
cfg
)
{
SPI_HandleTypeDef
hspi
;
hspi
.
Instance
=
spix
;
if
(
cfg
->
mode
&
RT_SPI_SLAVE
)
{
hspi
.
Init
.
Mode
=
SPI_MODE_SLAVE
;
...
...
@@ -95,31 +88,31 @@ static rt_err_t stm32_spi_init(SPI_TypeDef *spix, struct rt_spi_configuration *c
hspi
.
Init
.
NSS
=
SPI_NSS_SOFT
;
// hspi.Init.NSS = SPI_NSS_HARD_OUTPUT;
}
if
(
cfg
->
max_hz
>=
HAL_RCC_GetPCLK2Freq
()
/
2
)
if
(
cfg
->
max_hz
>=
HAL_RCC_GetPCLK2Freq
()
/
2
)
{
hspi
.
Init
.
BaudRatePrescaler
=
SPI_BAUDRATEPRESCALER_2
;
}
else
if
(
cfg
->
max_hz
>=
HAL_RCC_GetPCLK2Freq
()
/
4
)
else
if
(
cfg
->
max_hz
>=
HAL_RCC_GetPCLK2Freq
()
/
4
)
{
hspi
.
Init
.
BaudRatePrescaler
=
SPI_BAUDRATEPRESCALER_4
;
}
else
if
(
cfg
->
max_hz
>=
HAL_RCC_GetPCLK2Freq
()
/
8
)
else
if
(
cfg
->
max_hz
>=
HAL_RCC_GetPCLK2Freq
()
/
8
)
{
hspi
.
Init
.
BaudRatePrescaler
=
SPI_BAUDRATEPRESCALER_8
;
}
else
if
(
cfg
->
max_hz
>=
HAL_RCC_GetPCLK2Freq
()
/
16
)
else
if
(
cfg
->
max_hz
>=
HAL_RCC_GetPCLK2Freq
()
/
16
)
{
hspi
.
Init
.
BaudRatePrescaler
=
SPI_BAUDRATEPRESCALER_16
;
}
else
if
(
cfg
->
max_hz
>=
HAL_RCC_GetPCLK2Freq
()
/
32
)
else
if
(
cfg
->
max_hz
>=
HAL_RCC_GetPCLK2Freq
()
/
32
)
{
hspi
.
Init
.
BaudRatePrescaler
=
SPI_BAUDRATEPRESCALER_32
;
}
else
if
(
cfg
->
max_hz
>=
HAL_RCC_GetPCLK2Freq
()
/
64
)
else
if
(
cfg
->
max_hz
>=
HAL_RCC_GetPCLK2Freq
()
/
64
)
{
hspi
.
Init
.
BaudRatePrescaler
=
SPI_BAUDRATEPRESCALER_64
;
}
else
if
(
cfg
->
max_hz
>=
HAL_RCC_GetPCLK2Freq
()
/
128
)
else
if
(
cfg
->
max_hz
>=
HAL_RCC_GetPCLK2Freq
()
/
128
)
{
hspi
.
Init
.
BaudRatePrescaler
=
SPI_BAUDRATEPRESCALER_128
;
}
...
...
@@ -147,6 +140,7 @@ static rt_err_t stm32_spi_init(SPI_TypeDef *spix, struct rt_spi_configuration *c
__HAL_SPI_ENABLE
(
&
hspi
);
return
RT_EOK
;
}
#define SPISTEP(datalen) (((datalen) == 8) ? 1 : 2)
#define SPISEND_1(reg, ptr, datalen) \
do \
...
...
@@ -197,15 +191,15 @@ static rt_err_t spitxrx1b(struct stm32_spi *hspi, void *rcvb, const void *sndb)
SPIRECV_1
(
hspi
->
Instance
->
DR
,
rcvb
,
hspi
->
cfg
->
data_width
);
return
RT_EOK
;
}
static
rt_uint32_t
spixfer
(
struct
rt_spi_device
*
device
,
struct
rt_spi_message
*
message
)
{
rt_err_t
res
;
RT_ASSERT
(
device
!=
RT_NULL
);
RT_ASSERT
(
device
->
bus
!=
RT_NULL
);
RT_ASSERT
(
device
->
bus
->
parent
.
user_data
!=
RT_NULL
);
struct
stm32_spi
*
hspi
=
(
struct
stm32_spi
*
)
device
->
bus
->
parent
.
user_data
;
struct
stm32_spi
*
hspi
=
(
struct
stm32_spi
*
)
device
->
bus
->
parent
.
user_data
;
struct
stm32_hw_spi_cs
*
cs
=
device
->
parent
.
user_data
;
if
(
message
->
cs_take
)
{
rt_pin_write
(
cs
->
pin
,
0
);
...
...
@@ -240,40 +234,41 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *
return
message
->
length
-
length
;
}
rt_err_t
spi_configure
(
struct
rt_spi_device
*
device
,
struct
rt_spi_configuration
*
configuration
)
struct
rt_spi_configuration
*
configuration
)
{
struct
stm32_spi
*
hspi
=
(
struct
stm32_spi
*
)
device
->
bus
->
parent
.
user_data
;
struct
stm32_spi
*
hspi
=
(
struct
stm32_spi
*
)
device
->
bus
->
parent
.
user_data
;
hspi
->
cfg
=
configuration
;
return
stm32_spi_init
(
hspi
->
Instance
,
configuration
);
}
const
struct
rt_spi_ops
stm_spi_ops
=
{
.
configure
=
spi_configure
,
.
xfer
=
spixfer
,
};
struct
rt_spi_bus
_spi_bus1
,
_spi_bus2
,
_spi_bus3
;
struct
stm32_spi
_spi1
,
_spi2
,
_spi3
;
int
stm32_spi_register_bus
(
SPI_TypeDef
*
SPIx
,
const
char
*
name
)
struct
rt_spi_bus
_spi_bus1
,
_spi_bus2
,
_spi_bus3
;
struct
stm32_spi
_spi1
,
_spi2
,
_spi3
;
int
stm32_spi_register_bus
(
SPI_TypeDef
*
SPIx
,
const
char
*
name
)
{
struct
rt_spi_bus
*
spi_bus
;
struct
stm32_spi
*
spi
;
if
(
SPIx
==
SPI1
)
struct
rt_spi_bus
*
spi_bus
;
struct
stm32_spi
*
spi
;
if
(
SPIx
==
SPI1
)
{
spi_bus
=
&
_spi_bus1
;
spi
=
&
_spi1
;
}
else
if
(
SPIx
==
SPI2
)
}
else
if
(
SPIx
==
SPI2
)
{
spi_bus
=
&
_spi_bus2
;
spi
=
&
_spi2
;
}
else
if
(
SPIx
==
SPI3
){
else
if
(
SPIx
==
SPI3
)
{
spi_bus
=
&
_spi_bus3
;
spi
=
&
_spi3
;
}
else
}
else
{
return
-
1
;
}
...
...
@@ -281,15 +276,16 @@ int stm32_spi_register_bus(SPI_TypeDef * SPIx,const char * name)
spi_bus
->
parent
.
user_data
=
spi
;
return
rt_spi_bus_register
(
spi_bus
,
name
,
&
stm_spi_ops
);
}
//cannot be used before completion init
rt_err_t
stm32_spi_bus_attach_device
(
rt_uint32_t
pin
,
const
char
*
bus_name
,
const
char
*
device_name
)
rt_err_t
stm32_spi_bus_attach_device
(
rt_uint32_t
pin
,
const
char
*
bus_name
,
const
char
*
device_name
)
{
struct
rt_spi_device
*
spi_device
=
(
struct
rt_spi_device
*
)
rt_malloc
(
sizeof
(
struct
rt_spi_device
));
struct
rt_spi_device
*
spi_device
=
(
struct
rt_spi_device
*
)
rt_malloc
(
sizeof
(
struct
rt_spi_device
));
RT_ASSERT
(
spi_device
!=
RT_NULL
);
struct
stm32_hw_spi_cs
*
cs_pin
=
(
struct
stm32_hw_spi_cs
*
)
rt_malloc
(
sizeof
(
struct
stm32_hw_spi_cs
));
struct
stm32_hw_spi_cs
*
cs_pin
=
(
struct
stm32_hw_spi_cs
*
)
rt_malloc
(
sizeof
(
struct
stm32_hw_spi_cs
));
RT_ASSERT
(
cs_pin
!=
RT_NULL
);
cs_pin
->
pin
=
pin
;
rt_pin_mode
(
pin
,
PIN_MODE_OUTPUT
);
rt_pin_mode
(
pin
,
PIN_MODE_OUTPUT
);
rt_pin_write
(
pin
,
1
);
return
rt_spi_bus_attach_device
(
spi_device
,
device_name
,
bus_name
,
(
void
*
)
cs_pin
);
}
...
...
@@ -298,67 +294,66 @@ int stm32_hw_spi_init(void)
{
int
result
=
0
;
#ifdef RT_USING_SPI1
result
=
stm32_spi_register_bus
(
SPI1
,
"spi1"
);
result
=
stm32_spi_register_bus
(
SPI1
,
"spi1"
);
#endif
#ifdef RT_USING_SPI2
result
=
stm32_spi_register_bus
(
SPI2
,
"spi2"
);
result
=
stm32_spi_register_bus
(
SPI2
,
"spi2"
);
#endif
#ifdef RT_USING_SPI3
result
=
stm32_spi_register_bus
(
SPI3
,
"spi3"
);
result
=
stm32_spi_register_bus
(
SPI3
,
"spi3"
);
#endif
return
result
;
}
INIT_BOARD_EXPORT
(
stm32_hw_spi_init
);
void
HAL_SPI_MspInit
(
SPI_HandleTypeDef
*
spiHandle
)
void
HAL_SPI_MspInit
(
SPI_HandleTypeDef
*
spiHandle
)
{
GPIO_InitTypeDef
GPIO_InitStruct
;
if
(
spiHandle
->
Instance
==
SPI1
)
if
(
spiHandle
->
Instance
==
SPI1
)
{
/* SPI1 clock enable */
__HAL_RCC_SPI1_CLK_ENABLE
();
__HAL_RCC_GPIOA_CLK_ENABLE
();
/**SPI1 GPIO Configuration
/**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
PA7 ------> SPI1_MOSI
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_5
|
GPIO_PIN_6
|
GPIO_PIN_7
;
GPIO_InitStruct
.
Pin
=
GPIO_PIN_5
|
GPIO_PIN_6
|
GPIO_PIN_7
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF5_SPI1
;
HAL_GPIO_Init
(
GPIOA
,
&
GPIO_InitStruct
);
}
else
if
(
spiHandle
->
Instance
==
SPI2
)
else
if
(
spiHandle
->
Instance
==
SPI2
)
{
/* SPI2 clock enable */
__HAL_RCC_SPI2_CLK_ENABLE
();
__HAL_RCC_GPIOB_CLK_ENABLE
();
/**SPI2 GPIO Configuration
/**SPI2 GPIO Configuration
PB13 ------> SPI2_SCK
PB14 ------> SPI2_MISO
PB15 ------> SPI2_MOSI
PB15 ------> SPI2_MOSI
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_13
|
GPIO_PIN_14
|
GPIO_PIN_15
;
GPIO_InitStruct
.
Pin
=
GPIO_PIN_13
|
GPIO_PIN_14
|
GPIO_PIN_15
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF5_SPI2
;
HAL_GPIO_Init
(
GPIOB
,
&
GPIO_InitStruct
);
}
else
if
(
spiHandle
->
Instance
==
SPI3
)
else
if
(
spiHandle
->
Instance
==
SPI3
)
{
/* SPI3 clock enable */
__HAL_RCC_SPI3_CLK_ENABLE
();
__HAL_RCC_GPIOC_CLK_ENABLE
();
/**SPI3 GPIO Configuration
/**SPI3 GPIO Configuration
PC10 ------> SPI3_SCK
PC11 ------> SPI3_MISO
PC12 ------> SPI3_MOSI
PC12 ------> SPI3_MOSI
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_10
|
GPIO_PIN_11
|
GPIO_PIN_12
;
GPIO_InitStruct
.
Pin
=
GPIO_PIN_10
|
GPIO_PIN_11
|
GPIO_PIN_12
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
...
...
@@ -367,75 +362,40 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
}
}
void
HAL_SPI_MspDeInit
(
SPI_HandleTypeDef
*
spiHandle
)
void
HAL_SPI_MspDeInit
(
SPI_HandleTypeDef
*
spiHandle
)
{
if
(
spiHandle
->
Instance
==
SPI1
)
if
(
spiHandle
->
Instance
==
SPI1
)
{
/* Peripheral clock disable */
__HAL_RCC_SPI1_CLK_DISABLE
();
/**SPI1 GPIO Configuration
/**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
PA7 ------> SPI1_MOSI
*/
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_5
|
GPIO_PIN_6
|
GPIO_PIN_7
);
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_5
|
GPIO_PIN_6
|
GPIO_PIN_7
);
}
else
if
(
spiHandle
->
Instance
==
SPI2
)
else
if
(
spiHandle
->
Instance
==
SPI2
)
{
/* Peripheral clock disable */
__HAL_RCC_SPI2_CLK_DISABLE
();
/**SPI2 GPIO Configuration
/**SPI2 GPIO Configuration
PB13 ------> SPI2_SCK
PB14 ------> SPI2_MISO
PB15 ------> SPI2_MOSI
PB15 ------> SPI2_MOSI
*/
HAL_GPIO_DeInit
(
GPIOB
,
GPIO_PIN_13
|
GPIO_PIN_14
|
GPIO_PIN_15
);
HAL_GPIO_DeInit
(
GPIOB
,
GPIO_PIN_13
|
GPIO_PIN_14
|
GPIO_PIN_15
);
}
else
if
(
spiHandle
->
Instance
==
SPI3
)
else
if
(
spiHandle
->
Instance
==
SPI3
)
{
/* Peripheral clock disable */
__HAL_RCC_SPI3_CLK_DISABLE
();
/**SPI3 GPIO Configuration
/**SPI3 GPIO Configuration
PC10 ------> SPI3_SCK
PC11 ------> SPI3_MISO
PC12 ------> SPI3_MOSI
PC12 ------> SPI3_MOSI
*/
HAL_GPIO_DeInit
(
GPIOC
,
GPIO_PIN_10
|
GPIO_PIN_11
|
GPIO_PIN_12
);
HAL_GPIO_DeInit
(
GPIOC
,
GPIO_PIN_10
|
GPIO_PIN_11
|
GPIO_PIN_12
);
}
}
}
#endif
/*RT_USING_SPI*/
bsp/stm32f4xx-HAL/drivers/drv_spi.h
浏览文件 @
1d48f9ff
...
...
@@ -11,27 +11,12 @@
* Date Author Notes
* 2017-10-20 ZYH the first version
*/
#ifndef __STM32_SPI_H_
#define __STM32_SPI_H_
#include <rtthread.h>
#include <rthw.h>
#include <rtdevice.h>
//cannot be used before completion init
extern
rt_err_t
stm32_spi_bus_attach_device
(
rt_uint32_t
pin
,
const
char
*
bus_name
,
const
char
*
device_name
);
extern
rt_err_t
stm32_spi_bus_attach_device
(
rt_uint32_t
pin
,
const
char
*
bus_name
,
const
char
*
device_name
);
extern
int
stm32_hw_spi_init
(
void
);
#endif
bsp/stm32f4xx-HAL/drivers/drv_spiflash.c
浏览文件 @
1d48f9ff
...
...
@@ -17,17 +17,8 @@
#include "spi_flash_w25qxx.h"
int
rt_w25qxx_init
(
void
)
{
stm32_spi_bus_attach_device
(
RT_W25QXX_CS_PIN
,
RT_W25QXX_SPI_BUS_NAME
,
"w25qxx"
);
return
w25qxx_init
(
"flash0"
,
"w25qxx"
);
stm32_spi_bus_attach_device
(
RT_W25QXX_CS_PIN
,
RT_W25QXX_SPI_BUS_NAME
,
"w25qxx"
);
return
w25qxx_init
(
"flash0"
,
"w25qxx"
);
}
INIT_DEVICE_EXPORT
(
rt_w25qxx_init
);
#endif
bsp/stm32f4xx-HAL/drivers/drv_spiflash.h
浏览文件 @
1d48f9ff
...
...
@@ -15,14 +15,3 @@
#define __STM32_SPI_FLASH_H_
extern
int
rt_w25qxx_init
(
void
);
#endif
bsp/stm32f4xx-HAL/drivers/drv_usart.c
浏览文件 @
1d48f9ff
...
...
@@ -24,13 +24,11 @@
* 2016-01-15 ArdaFu the first version for stm32f4xx with STM32 HAL
* 2016-01-15 zyh the first version for stm32f401rc with STM32 HAL
*/
#include "drv_usart.h"
#include "board.h"
#include <rtdevice.h>
#include <rthw.h>
#include <rtthread.h>
/* STM32 uart driver */
struct
drv_uart
{
...
...
@@ -39,20 +37,16 @@ struct drv_uart
};
static
rt_err_t
drv_configure
(
struct
rt_serial_device
*
serial
,
struct
serial_configure
*
cfg
)
struct
serial_configure
*
cfg
)
{
struct
drv_uart
*
uart
;
RT_ASSERT
(
serial
!=
RT_NULL
);
RT_ASSERT
(
cfg
!=
RT_NULL
);
uart
=
(
struct
drv_uart
*
)
serial
->
parent
.
user_data
;
uart
->
UartHandle
.
Init
.
BaudRate
=
cfg
->
baud_rate
;
uart
->
UartHandle
.
Init
.
HwFlowCtl
=
UART_HWCONTROL_NONE
;
uart
->
UartHandle
.
Init
.
Mode
=
UART_MODE_TX_RX
;
uart
->
UartHandle
.
Init
.
OverSampling
=
UART_OVERSAMPLING_16
;
switch
(
cfg
->
data_bits
)
{
case
DATA_BITS_8
:
...
...
@@ -92,23 +86,19 @@ struct serial_configure *cfg)
uart
->
UartHandle
.
Init
.
Parity
=
UART_PARITY_NONE
;
break
;
}
if
(
HAL_UART_Init
(
&
uart
->
UartHandle
)
!=
HAL_OK
)
{
return
RT_ERROR
;
}
return
RT_EOK
;
}
static
rt_err_t
drv_control
(
struct
rt_serial_device
*
serial
,
int
cmd
,
void
*
arg
)
int
cmd
,
void
*
arg
)
{
struct
drv_uart
*
uart
;
RT_ASSERT
(
serial
!=
RT_NULL
);
uart
=
(
struct
drv_uart
*
)
serial
->
parent
.
user_data
;
switch
(
cmd
)
{
case
RT_DEVICE_CTRL_CLR_INT
:
...
...
@@ -124,18 +114,15 @@ int cmd, void *arg)
__HAL_UART_ENABLE_IT
(
&
uart
->
UartHandle
,
UART_IT_RXNE
);
break
;
}
return
RT_EOK
;
}
static
int
drv_putc
(
struct
rt_serial_device
*
serial
,
char
c
)
{
struct
drv_uart
*
uart
;
RT_ASSERT
(
serial
!=
RT_NULL
);
uart
=
(
struct
drv_uart
*
)
serial
->
parent
.
user_data
;
while
((
__HAL_UART_GET_FLAG
(
&
uart
->
UartHandle
,
UART_FLAG_TXE
)
==
RESET
));
while
((
__HAL_UART_GET_FLAG
(
&
uart
->
UartHandle
,
UART_FLAG_TXE
)
==
RESET
));
uart
->
UartHandle
.
Instance
->
DR
=
c
;
return
1
;
}
...
...
@@ -144,12 +131,10 @@ static int drv_getc(struct rt_serial_device *serial)
{
int
ch
;
struct
drv_uart
*
uart
;
RT_ASSERT
(
serial
!=
RT_NULL
);
uart
=
(
struct
drv_uart
*
)
serial
->
parent
.
user_data
;
ch
=
-
1
;
if
(
__HAL_UART_GET_FLAG
(
&
uart
->
UartHandle
,
UART_FLAG_RXNE
)
!=
RESET
)
if
(
__HAL_UART_GET_FLAG
(
&
uart
->
UartHandle
,
UART_FLAG_RXNE
)
!=
RESET
)
ch
=
uart
->
UartHandle
.
Instance
->
DR
&
0xff
;
return
ch
;
}
...
...
@@ -161,19 +146,17 @@ static const struct rt_uart_ops drv_uart_ops =
drv_putc
,
drv_getc
,
};
#if defined(RT_USING_UART1)
/* UART1 device driver structure */
static
struct
drv_uart
uart1
;
struct
rt_serial_device
serial1
;
void
USART1_IRQHandler
(
void
)
{
struct
drv_uart
*
uart
;
uart
=
&
uart1
;
/* enter interrupt */
rt_interrupt_enter
();
/* UART in mode Receiver -------------------------------------------------*/
if
((
__HAL_UART_GET_FLAG
(
&
uart
->
UartHandle
,
UART_FLAG_RXNE
)
!=
RESET
)
&&
(
__HAL_UART_GET_IT_SOURCE
(
&
uart
->
UartHandle
,
UART_IT_RXNE
)
!=
RESET
))
...
...
@@ -185,22 +168,18 @@ void USART1_IRQHandler(void)
/* leave interrupt */
rt_interrupt_leave
();
}
#endif
/* RT_USING_UART1 */
#if defined(RT_USING_UART2)
/* UART2 device driver structure */
static
struct
drv_uart
uart2
;
struct
rt_serial_device
serial2
;
void
USART2_IRQHandler
(
void
)
{
struct
drv_uart
*
uart
;
uart
=
&
uart2
;
/* enter interrupt */
rt_interrupt_enter
();
/* UART in mode Receiver -------------------------------------------------*/
if
((
__HAL_UART_GET_FLAG
(
&
uart
->
UartHandle
,
UART_FLAG_RXNE
)
!=
RESET
)
&&
(
__HAL_UART_GET_IT_SOURCE
(
&
uart
->
UartHandle
,
UART_IT_RXNE
)
!=
RESET
))
...
...
@@ -212,23 +191,18 @@ void USART2_IRQHandler(void)
/* leave interrupt */
rt_interrupt_leave
();
}
#endif
/* RT_USING_UART2 */
#if defined(RT_USING_UART6)
/* UART2 device driver structure */
static
struct
drv_uart
uart6
;
struct
rt_serial_device
serial6
;
void
USART6_IRQHandler
(
void
)
{
struct
drv_uart
*
uart
;
uart
=
&
uart6
;
/* enter interrupt */
rt_interrupt_enter
();
/* UART in mode Receiver -------------------------------------------------*/
if
((
__HAL_UART_GET_FLAG
(
&
uart
->
UartHandle
,
UART_FLAG_RXNE
)
!=
RESET
)
&&
(
__HAL_UART_GET_IT_SOURCE
(
&
uart
->
UartHandle
,
UART_IT_RXNE
)
!=
RESET
))
...
...
@@ -240,7 +214,6 @@ void USART6_IRQHandler(void)
/* leave interrupt */
rt_interrupt_leave
();
}
#endif
/* RT_USING_UART3 */
/**
...
...
@@ -252,97 +225,92 @@ void USART6_IRQHandler(void)
* @param huart: UART handle pointer
* @retval None
*/
void
HAL_UART_MspInit
(
UART_HandleTypeDef
*
uartHandle
)
void
HAL_UART_MspInit
(
UART_HandleTypeDef
*
uartHandle
)
{
GPIO_InitTypeDef
GPIO_InitStruct
;
if
(
uartHandle
->
Instance
==
USART1
)
{
/* USART1 clock enable */
__HAL_RCC_USART1_CLK_ENABLE
();
__HAL_RCC_GPIOA_CLK_ENABLE
();
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_9
|
GPIO_PIN_10
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_PULLUP
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF7_USART1
;
HAL_GPIO_Init
(
GPIOA
,
&
GPIO_InitStruct
);
}
else
if
(
uartHandle
->
Instance
==
USART2
)
{
/* USART2 clock enable */
__HAL_RCC_USART2_CLK_ENABLE
();
__HAL_RCC_GPIOA_CLK_ENABLE
();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_2
|
GPIO_PIN_3
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_PULLUP
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF7_USART2
;
HAL_GPIO_Init
(
GPIOA
,
&
GPIO_InitStruct
);
}
else
if
(
uartHandle
->
Instance
==
USART6
)
{
/* USART6 clock enable */
__HAL_RCC_USART6_CLK_ENABLE
();
__HAL_RCC_GPIOC_CLK_ENABLE
();
/**USART6 GPIO Configuration
PC6 ------> USART6_TX
PC7 ------> USART6_RX
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_6
|
GPIO_PIN_7
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_PULLUP
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF8_USART6
;
HAL_GPIO_Init
(
GPIOC
,
&
GPIO_InitStruct
);
}
GPIO_InitTypeDef
GPIO_InitStruct
;
if
(
uartHandle
->
Instance
==
USART1
)
{
/* USART1 clock enable */
__HAL_RCC_USART1_CLK_ENABLE
();
__HAL_RCC_GPIOA_CLK_ENABLE
();
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_9
|
GPIO_PIN_10
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_PULLUP
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF7_USART1
;
HAL_GPIO_Init
(
GPIOA
,
&
GPIO_InitStruct
);
}
else
if
(
uartHandle
->
Instance
==
USART2
)
{
/* USART2 clock enable */
__HAL_RCC_USART2_CLK_ENABLE
();
__HAL_RCC_GPIOA_CLK_ENABLE
();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_2
|
GPIO_PIN_3
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_PULLUP
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF7_USART2
;
HAL_GPIO_Init
(
GPIOA
,
&
GPIO_InitStruct
);
}
else
if
(
uartHandle
->
Instance
==
USART6
)
{
/* USART6 clock enable */
__HAL_RCC_USART6_CLK_ENABLE
();
__HAL_RCC_GPIOC_CLK_ENABLE
();
/**USART6 GPIO Configuration
PC6 ------> USART6_TX
PC7 ------> USART6_RX
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_6
|
GPIO_PIN_7
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_PULLUP
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF8_USART6
;
HAL_GPIO_Init
(
GPIOC
,
&
GPIO_InitStruct
);
}
}
void
HAL_UART_MspDeInit
(
UART_HandleTypeDef
*
uartHandle
)
void
HAL_UART_MspDeInit
(
UART_HandleTypeDef
*
uartHandle
)
{
if
(
uartHandle
->
Instance
==
USART1
)
{
/* Peripheral clock disable */
__HAL_RCC_USART1_CLK_DISABLE
();
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_9
|
GPIO_PIN_10
);
}
else
if
(
uartHandle
->
Instance
==
USART2
)
{
/* Peripheral clock disable */
__HAL_RCC_USART2_CLK_DISABLE
();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_2
|
GPIO_PIN_3
);
}
else
if
(
uartHandle
->
Instance
==
USART6
)
{
/* Peripheral clock disable */
__HAL_RCC_USART6_CLK_DISABLE
();
/**USART6 GPIO Configuration
PC6 ------> USART6_TX
PC7 ------> USART6_RX
*/
HAL_GPIO_DeInit
(
GPIOC
,
GPIO_PIN_6
|
GPIO_PIN_7
);
}
}
if
(
uartHandle
->
Instance
==
USART1
)
{
/* Peripheral clock disable */
__HAL_RCC_USART1_CLK_DISABLE
();
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_9
|
GPIO_PIN_10
);
}
else
if
(
uartHandle
->
Instance
==
USART2
)
{
/* Peripheral clock disable */
__HAL_RCC_USART2_CLK_DISABLE
();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_2
|
GPIO_PIN_3
);
}
else
if
(
uartHandle
->
Instance
==
USART6
)
{
/* Peripheral clock disable */
__HAL_RCC_USART6_CLK_DISABLE
();
/**USART6 GPIO Configuration
PC6 ------> USART6_TX
PC7 ------> USART6_RX
*/
HAL_GPIO_DeInit
(
GPIOC
,
GPIO_PIN_6
|
GPIO_PIN_7
);
}
}
int
hw_usart_init
(
void
)
{
...
...
@@ -351,40 +319,36 @@ int hw_usart_init(void)
#ifdef RT_USING_UART1
uart
=
&
uart1
;
uart
->
UartHandle
.
Instance
=
USART1
;
uart
->
irq
=
USART1_IRQn
;
uart
->
irq
=
USART1_IRQn
;
serial1
.
ops
=
&
drv_uart_ops
;
serial1
.
config
=
config
;
/* register UART1 device */
rt_hw_serial_register
(
&
serial1
,
"uart1"
,
RT_DEVICE_FLAG_RDWR
|
RT_DEVICE_FLAG_INT_RX
,
uart
);
RT_DEVICE_FLAG_RDWR
|
RT_DEVICE_FLAG_INT_RX
,
uart
);
#endif
/* RT_USING_UART1 */
#ifdef RT_USING_UART2
uart
=
&
uart2
;
uart
->
UartHandle
.
Instance
=
USART2
;
uart
->
irq
=
USART2_IRQn
;
uart
->
irq
=
USART2_IRQn
;
serial2
.
ops
=
&
drv_uart_ops
;
serial2
.
config
=
config
;
/* register UART2 device */
rt_hw_serial_register
(
&
serial2
,
"uart2"
,
RT_DEVICE_FLAG_RDWR
|
RT_DEVICE_FLAG_INT_RX
,
uart
);
RT_DEVICE_FLAG_RDWR
|
RT_DEVICE_FLAG_INT_RX
,
uart
);
#endif
/* RT_USING_UART2 */
#ifdef RT_USING_UART6
uart
=
&
uart6
;
uart
->
UartHandle
.
Instance
=
USART6
;
uart
->
irq
=
USART6_IRQn
;
uart
->
irq
=
USART6_IRQn
;
serial6
.
ops
=
&
drv_uart_ops
;
serial6
.
config
=
config
;
/* register UART2 device */
rt_hw_serial_register
(
&
serial6
,
"uart6"
,
RT_DEVICE_FLAG_RDWR
|
RT_DEVICE_FLAG_INT_RX
,
uart
);
RT_DEVICE_FLAG_RDWR
|
RT_DEVICE_FLAG_INT_RX
,
uart
);
#endif
/* RT_USING_UART2 */
return
0
;
}
INIT_BOARD_EXPORT
(
hw_usart_init
);
bsp/stm32f4xx-HAL/drivers/drv_usart.h
浏览文件 @
1d48f9ff
...
...
@@ -13,9 +13,7 @@
* 2015-08-01 xiaonong the first version for stm32f7xx
* 2016-01-15 ArdaFu the first version for stm32f4xx with STM32 HAL
*/
#ifndef __USART_H__
#define __USART_H__
extern
int
hw_usart_init
(
void
);
#endif
bsp/stm32f4xx-HAL/drivers/drv_usbd.c
浏览文件 @
1d48f9ff
...
...
@@ -15,9 +15,7 @@
#include <rtthread.h>
#include <rtdevice.h>
#include "board.h"
//#define USB_DISCONNECT_PIN 30 //PA9
//#define USB_DISCONNECT_PIN 30 //PA9
static
PCD_HandleTypeDef
_stm_pcd
;
static
struct
udcd
_stm_udc
;
static
struct
ep_id
_ep_pool
[]
=
...
...
@@ -35,12 +33,10 @@ static struct ep_id _ep_pool[] =
void
OTG_FS_IRQHandler
(
void
)
{
rt_interrupt_enter
();
HAL_PCD_IRQHandler
(
&
_stm_pcd
);
/* leave interrupt */
rt_interrupt_leave
();
}
void
HAL_PCD_ResetCallback
(
PCD_HandleTypeDef
*
pcd
)
...
...
@@ -53,10 +49,9 @@ void HAL_PCD_ResetCallback(PCD_HandleTypeDef *pcd)
void
HAL_PCD_SetupStageCallback
(
PCD_HandleTypeDef
*
hpcd
)
{
rt_usbd_ep0_setup_handler
(
&
_stm_udc
,
(
struct
urequest
*
)
hpcd
->
Setup
);
rt_usbd_ep0_setup_handler
(
&
_stm_udc
,
(
struct
urequest
*
)
hpcd
->
Setup
);
}
void
HAL_PCD_DataInStageCallback
(
PCD_HandleTypeDef
*
hpcd
,
uint8_t
epnum
)
{
if
(
epnum
==
0
)
...
...
@@ -65,7 +60,7 @@ void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
}
else
{
rt_usbd_ep_in_handler
(
&
_stm_udc
,
0x80
|
epnum
,
hpcd
->
IN_ep
[
epnum
].
xfer_count
);
rt_usbd_ep_in_handler
(
&
_stm_udc
,
0x80
|
epnum
,
hpcd
->
IN_ep
[
epnum
].
xfer_count
);
}
}
...
...
@@ -92,58 +87,52 @@ void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
}
else
{
rt_usbd_ep0_out_handler
(
&
_stm_udc
,
hpcd
->
OUT_ep
[
0
].
xfer_count
);
rt_usbd_ep0_out_handler
(
&
_stm_udc
,
hpcd
->
OUT_ep
[
0
].
xfer_count
);
}
}
void
HAL_PCDEx_SetConnectionState
(
PCD_HandleTypeDef
*
hpcd
,
uint8_t
state
)
{
if
(
state
==
1
)
if
(
state
==
1
)
{
}
else
{
}
}
}
void
HAL_PCD_MspInit
(
PCD_HandleTypeDef
*
pcdHandle
)
void
HAL_PCD_MspInit
(
PCD_HandleTypeDef
*
pcdHandle
)
{
GPIO_InitTypeDef
GPIO_InitStruct
;
if
(
pcdHandle
->
Instance
==
USB_OTG_FS
)
if
(
pcdHandle
->
Instance
==
USB_OTG_FS
)
{
/* USER CODE BEGIN USB_MspInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE
();
GPIO_InitStruct
.
Pin
=
GPIO_PIN_11
|
GPIO_PIN_12
;
GPIO_InitStruct
.
Pin
=
GPIO_PIN_11
|
GPIO_PIN_12
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF10_OTG_FS
;
HAL_GPIO_Init
(
GPIOA
,
&
GPIO_InitStruct
);
/* Peripheral clock enable */
__HAL_RCC_USB_OTG_FS_CLK_ENABLE
();
/* Peripheral interrupt init */
HAL_NVIC_SetPriority
(
OTG_FS_IRQn
,
5
,
0
);
HAL_NVIC_EnableIRQ
(
OTG_FS_IRQn
);
}
}
void
HAL_PCD_MspDeInit
(
PCD_HandleTypeDef
*
pcdHandle
)
void
HAL_PCD_MspDeInit
(
PCD_HandleTypeDef
*
pcdHandle
)
{
if
(
pcdHandle
->
Instance
==
USB_OTG_FS
)
if
(
pcdHandle
->
Instance
==
USB_OTG_FS
)
{
/* Peripheral clock disable */
__HAL_RCC_USB_OTG_FS_CLK_DISABLE
();
/**USB_OTG_FS GPIO Configuration
/**USB_OTG_FS GPIO Configuration
PA11 ------> USB_OTG_FS_DM
PA12 ------> USB_OTG_FS_DP
PA12 ------> USB_OTG_FS_DP
*/
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_11
|
GPIO_PIN_12
);
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_11
|
GPIO_PIN_12
);
/* Peripheral interrupt Deinit*/
HAL_NVIC_DisableIRQ
(
OTG_FS_IRQn
);
}
...
...
@@ -157,7 +146,7 @@ static rt_err_t _ep_set_stall(rt_uint8_t address)
static
rt_err_t
_ep_clear_stall
(
rt_uint8_t
address
)
{
HAL_PCD_EP_ClrStall
(
&
_stm_pcd
,
address
);
HAL_PCD_EP_ClrStall
(
&
_stm_pcd
,
address
);
return
RT_EOK
;
}
...
...
@@ -178,7 +167,6 @@ static rt_err_t _ep_enable(uep_t ep)
RT_ASSERT
(
ep
->
ep_desc
!=
RT_NULL
);
HAL_PCD_EP_Open
(
&
_stm_pcd
,
ep
->
ep_desc
->
bEndpointAddress
,
ep
->
ep_desc
->
wMaxPacketSize
,
ep
->
ep_desc
->
bmAttributes
);
return
RT_EOK
;
}
...
...
@@ -193,9 +181,7 @@ static rt_err_t _ep_disable(uep_t ep)
static
rt_size_t
_ep_read
(
rt_uint8_t
address
,
void
*
buffer
)
{
rt_size_t
size
=
0
;
RT_ASSERT
(
buffer
!=
RT_NULL
);
return
size
;
}
...
...
@@ -212,7 +198,7 @@ static rt_size_t _ep_write(rt_uint8_t address, void *buffer, rt_size_t size)
}
static
rt_err_t
_ep0_send_status
(
void
)
{
{
HAL_PCD_EP_Transmit
(
&
_stm_pcd
,
0x00
,
NULL
,
0
);
return
RT_EOK
;
}
...
...
@@ -230,10 +216,8 @@ static rt_err_t _wakeup(void)
static
rt_err_t
_init
(
rt_device_t
device
)
{
PCD_HandleTypeDef
*
pcd
;
/* Set LL Driver parameters */
pcd
=
(
PCD_HandleTypeDef
*
)
device
->
user_data
;
pcd
=
(
PCD_HandleTypeDef
*
)
device
->
user_data
;
pcd
->
Instance
=
USB_OTG_FS
;
pcd
->
Init
.
dev_endpoints
=
4
;
pcd
->
Init
.
speed
=
PCD_SPEED_FULL
;
...
...
@@ -245,17 +229,14 @@ static rt_err_t _init(rt_device_t device)
pcd
->
Init
.
lpm_enable
=
DISABLE
;
pcd
->
Init
.
vbus_sensing_enable
=
DISABLE
;
pcd
->
Init
.
use_dedicated_ep1
=
DISABLE
;
/* Initialize LL Driver */
HAL_PCD_Init
(
pcd
);
HAL_PCDEx_SetRxFiFo
(
pcd
,
0x80
);
HAL_PCDEx_SetTxFiFo
(
pcd
,
0
,
0x40
);
HAL_PCDEx_SetTxFiFo
(
pcd
,
1
,
0x40
);
HAL_PCDEx_SetTxFiFo
(
pcd
,
2
,
0x40
);
HAL_PCDEx_SetTxFiFo
(
pcd
,
3
,
0x40
);
HAL_PCD_Start
(
pcd
);
return
RT_EOK
;
}
...
...
@@ -275,11 +256,9 @@ const static struct udcd_ops _udc_ops =
_wakeup
,
};
int
stm_usbd_register
(
void
)
{
rt_memset
((
void
*
)
&
_stm_udc
,
0
,
sizeof
(
struct
udcd
));
_stm_udc
.
parent
.
type
=
RT_Device_Class_USBDevice
;
_stm_udc
.
parent
.
init
=
_init
;
_stm_udc
.
parent
.
user_data
=
&
_stm_pcd
;
...
...
@@ -287,10 +266,8 @@ int stm_usbd_register(void)
/* Register endpoint infomation */
_stm_udc
.
ep_pool
=
_ep_pool
;
_stm_udc
.
ep0
.
id
=
&
_ep_pool
[
0
];
rt_device_register
((
rt_device_t
)
&
_stm_udc
,
"usbd"
,
0
);
rt_usb_device_init
();
return
RT_EOK
;
}
INIT_DEVICE_EXPORT
(
stm_usbd_register
);
bsp/stm32f4xx-HAL/drivers/drv_usbd.h
浏览文件 @
1d48f9ff
...
...
@@ -14,7 +14,5 @@
#ifndef __STM32_USBD_H__
#define __STM32_USBD_H__
#include <rtthread.h>
int
stm_usbd_register
(
void
);
#endif
bsp/stm32f4xx-HAL/drivers/drv_usbh.c
浏览文件 @
1d48f9ff
...
...
@@ -42,10 +42,8 @@ void HAL_HCD_MspInit(HCD_HandleTypeDef *hcdHandle)
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_LOW
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF10_OTG_FS
;
HAL_GPIO_Init
(
GPIOA
,
&
GPIO_InitStruct
);
/* Peripheral clock enable */
__HAL_RCC_USB_OTG_FS_CLK_ENABLE
();
/* Peripheral interrupt init */
HAL_NVIC_SetPriority
(
OTG_FS_IRQn
,
5
,
0
);
HAL_NVIC_EnableIRQ
(
OTG_FS_IRQn
);
...
...
@@ -58,7 +56,6 @@ void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hcdHandle)
{
/* Peripheral clock disable */
__HAL_RCC_USB_OTG_FS_CLK_DISABLE
();
/**USB_OTG_FS GPIO Configuration
PA9 ------> USB_OTG_FS_VBUS
PA10 ------> USB_OTG_FS_ID
...
...
@@ -69,21 +66,23 @@ void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hcdHandle)
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_9
);
#endif
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_12
|
GPIO_PIN_11
);
/* Peripheral interrupt Deinit*/
HAL_NVIC_DisableIRQ
(
OTG_FS_IRQn
);
}
}
void
OTG_FS_IRQHandler
(
void
)
{
rt_interrupt_enter
();
HAL_HCD_IRQHandler
(
&
_stm_hhcd_fs
);
rt_interrupt_leave
();
}
void
HAL_HCD_SOF_Callback
(
HCD_HandleTypeDef
*
hhcd
)
//提供定时器
{
//rt_kprintf("sof callback\n");
}
static
__IO
rt_bool_t
connect_status
=
RT_FALSE
;
void
HAL_HCD_Connect_Callback
(
HCD_HandleTypeDef
*
hhcd
)
{
...
...
@@ -95,6 +94,7 @@ void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd)
rt_usbh_root_hub_connect_handler
(
hcd
,
OTG_FS_PORT
,
RT_FALSE
);
}
}
void
HAL_HCD_Disconnect_Callback
(
HCD_HandleTypeDef
*
hhcd
)
{
uhcd_t
hcd
=
(
uhcd_t
)
hhcd
->
pData
;
...
...
@@ -105,11 +105,13 @@ void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd)
rt_usbh_root_hub_disconnect_handler
(
hcd
,
OTG_FS_PORT
);
}
}
void
HAL_HCD_HC_NotifyURBChange_Callback
(
HCD_HandleTypeDef
*
hhcd
,
uint8_t
chnum
,
HCD_URBStateTypeDef
urb_state
)
{
//rt_kprintf("NotifyURBChange_Callback\n");
rt_completion_done
(
&
urb_completion
);
}
static
rt_err_t
drv_reset_port
(
rt_uint8_t
port
)
{
RT_DEBUG_LOG
(
RT_DEBUG_USB
,
(
"reset port
\n
"
));
...
...
@@ -121,7 +123,7 @@ static int drv_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbyte
{
while
(
1
)
{
if
(
!
connect_status
)
if
(
!
connect_status
)
{
return
-
1
;
}
...
...
@@ -144,15 +146,15 @@ static int drv_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbyte
}
HAL_HCD_HC_Halt
(
&
_stm_hhcd_fs
,
pipe
->
pipe_index
);
HAL_HCD_HC_Init
(
&
_stm_hhcd_fs
,
pipe
->
pipe_index
,
pipe
->
ep
.
bEndpointAddress
,
pipe
->
inst
->
address
,
USB_OTG_SPEED_FULL
,
pipe
->
ep
.
bmAttributes
,
pipe
->
ep
.
wMaxPacketSize
);
pipe
->
pipe_index
,
pipe
->
ep
.
bEndpointAddress
,
pipe
->
inst
->
address
,
USB_OTG_SPEED_FULL
,
pipe
->
ep
.
bmAttributes
,
pipe
->
ep
.
wMaxPacketSize
);
continue
;
}
else
if
(
HAL_HCD_HC_GetState
(
&
_stm_hhcd_fs
,
pipe
->
pipe_index
)
==
HC_STALL
)
else
if
(
HAL_HCD_HC_GetState
(
&
_stm_hhcd_fs
,
pipe
->
pipe_index
)
==
HC_STALL
)
{
RT_DEBUG_LOG
(
RT_DEBUG_USB
,
(
"stall
\n
"
));
pipe
->
status
=
UPIPE_STATUS_STALL
;
...
...
@@ -162,7 +164,7 @@ static int drv_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbyte
}
return
-
1
;
}
else
if
(
HAL_HCD_HC_GetState
(
&
_stm_hhcd_fs
,
pipe
->
pipe_index
)
==
URB_ERROR
)
else
if
(
HAL_HCD_HC_GetState
(
&
_stm_hhcd_fs
,
pipe
->
pipe_index
)
==
URB_ERROR
)
{
RT_DEBUG_LOG
(
RT_DEBUG_USB
,
(
"error
\n
"
));
pipe
->
status
=
UPIPE_STATUS_ERROR
;
...
...
@@ -172,8 +174,8 @@ static int drv_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbyte
}
return
-
1
;
}
else
if
(
HAL_HCD_HC_GetURBState
(
&
_stm_hhcd_fs
,
pipe
->
pipe_index
)
!=
URB_NOTREADY
&&
HAL_HCD_HC_GetURBState
(
&
_stm_hhcd_fs
,
pipe
->
pipe_index
)
!=
URB_NYET
)
else
if
(
HAL_HCD_HC_GetURBState
(
&
_stm_hhcd_fs
,
pipe
->
pipe_index
)
!=
URB_NOTREADY
&&
HAL_HCD_HC_GetURBState
(
&
_stm_hhcd_fs
,
pipe
->
pipe_index
)
!=
URB_NYET
)
{
RT_DEBUG_LOG
(
RT_DEBUG_USB
,
(
"ok
\n
"
));
pipe
->
status
=
UPIPE_STATUS_OK
;
...
...
@@ -186,6 +188,7 @@ static int drv_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbyte
return
-
1
;
}
}
static
rt_uint16_t
pipe_index
=
0
;
static
rt_uint8_t
drv_get_free_pipe_index
()
{
...
...
@@ -200,14 +203,15 @@ static rt_uint8_t drv_get_free_pipe_index()
}
return
0xff
;
}
static
void
drv_free_pipe_index
(
rt_uint8_t
index
)
{
pipe_index
&=
~
(
0x01
<<
index
);
}
static
rt_err_t
drv_open_pipe
(
upipe_t
pipe
)
{
pipe
->
pipe_index
=
drv_get_free_pipe_index
();
HAL_HCD_HC_Init
(
&
_stm_hhcd_fs
,
pipe
->
pipe_index
,
pipe
->
ep
.
bEndpointAddress
,
...
...
@@ -216,7 +220,7 @@ static rt_err_t drv_open_pipe(upipe_t pipe)
pipe
->
ep
.
bmAttributes
,
pipe
->
ep
.
wMaxPacketSize
);
/* Set DATA0 PID token*/
if
(
_stm_hhcd_fs
.
hc
[
pipe
->
pipe_index
].
ep_is_in
)
if
(
_stm_hhcd_fs
.
hc
[
pipe
->
pipe_index
].
ep_is_in
)
{
_stm_hhcd_fs
.
hc
[
pipe
->
pipe_index
].
toggle_in
=
0
;
}
...
...
@@ -226,6 +230,7 @@ static rt_err_t drv_open_pipe(upipe_t pipe)
}
return
RT_EOK
;
}
static
rt_err_t
drv_close_pipe
(
upipe_t
pipe
)
{
HAL_HCD_HC_Halt
(
&
_stm_hhcd_fs
,
pipe
->
pipe_index
);
...
...
@@ -254,24 +259,22 @@ static rt_err_t _init(rt_device_t device)
HAL_HCD_Start
(
hhcd
);
#ifdef USBH_USING_CONTROLLABLE_POWER
rt_pin_mode
(
USBH_POWER_PIN
,
PIN_MODE_OUTPUT
);
rt_pin_write
(
USBH_POWER_PIN
,
PIN_LOW
);
#endif
return
RT_EOK
;
}
int
stm_usbh_register
(
void
)
{
uhcd_t
uhcd
=
(
uhcd_t
)
rt_malloc
(
sizeof
(
struct
uhcd
));
RT_ASSERT
(
uhcd
!=
RT_NULL
);
rt_memset
((
void
*
)
uhcd
,
0
,
sizeof
(
struct
uhcd
));
uhcd
->
parent
.
type
=
RT_Device_Class_USBHost
;
uhcd
->
parent
.
init
=
_init
;
uhcd
->
parent
.
user_data
=
&
_stm_hhcd_fs
;
uhcd
->
ops
=
&
_uhcd_ops
;
uhcd
->
num_ports
=
1
;
_stm_hhcd_fs
.
pData
=
uhcd
;
rt_device_register
((
rt_device_t
)
uhcd
,
"usbh"
,
0
);
rt_usb_host_init
();
return
RT_EOK
;
...
...
bsp/stm32f4xx-HAL/drivers/drv_usbh.h
浏览文件 @
1d48f9ff
...
...
@@ -14,7 +14,5 @@
#ifndef __STM32_USBH_H__
#define __STM32_USBH_H__
#include <rtthread.h>
int
stm_usbh_register
(
void
);
#endif
bsp/stm32f4xx-HAL/drivers/stm32f4xx_hal_conf.h
浏览文件 @
1d48f9ff
...
...
@@ -33,14 +33,14 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4xx_HAL_CONF_H
#define __STM32F4xx_HAL_CONF_H
#ifdef __cplusplus
extern
"C"
{
extern
"C"
{
#endif
#include <rtthread.h>
/* Exported types ------------------------------------------------------------*/
...
...
@@ -48,17 +48,17 @@
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
#define HAL_MODULE_ENABLED
/* #define HAL_ADC_MODULE_ENABLED */
/* #define HAL_CAN_MODULE_ENABLED */
/* #define HAL_CRC_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_DAC_MODULE_ENABLED */
/* #define HAL_DCMI_MODULE_ENABLED */
#define HAL_DMA_MODULE_ENABLED
/* #define HAL_DMA2D_MODULE_ENABLED */
/* #define HAL_CRC_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_DAC_MODULE_ENABLED */
/* #define HAL_DCMI_MODULE_ENABLED */
#define HAL_DMA_MODULE_ENABLED
/* #define HAL_DMA2D_MODULE_ENABLED */
/* #define HAL_ETH_MODULE_ENABLED */
#define HAL_FLASH_MODULE_ENABLED
/* #define HAL_NAND_MODULE_ENABLED */
...
...
@@ -66,32 +66,32 @@
/* #define HAL_PCCARD_MODULE_ENABLED */
/* #define HAL_SRAM_MODULE_ENABLED */
/* #define HAL_SDRAM_MODULE_ENABLED */
/* #define HAL_HASH_MODULE_ENABLED */
/* #define HAL_HASH_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
/* #define HAL_I2C_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED
#define HAL_IWDG_MODULE_ENABLED
/* #define HAL_LTDC_MODULE_ENABLED */
#define HAL_PWR_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
/* #define HAL_RNG_MODULE_ENABLED */
/* #define HAL_RNG_MODULE_ENABLED */
#ifdef RT_USING_RTC
#define HAL_RTC_MODULE_ENABLED
#define HAL_RTC_MODULE_ENABLED
#endif
/* #define HAL_SAI_MODULE_ENABLED */
/* #define HAL_SAI_MODULE_ENABLED */
/* #define HAL_SD_MODULE_ENABLED */
#ifdef RT_USING_SPI
#define HAL_SPI_MODULE_ENABLED
#define HAL_SPI_MODULE_ENABLED
#endif
#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
#define HAL_USART_MODULE_ENABLED
#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
#define HAL_USART_MODULE_ENABLED
/* #define HAL_IRDA_MODULE_ENABLED */
/* #define HAL_SMARTCARD_MODULE_ENABLED*/
/* #define HAL_WWDG_MODULE_ENABLED */
#define HAL_CORTEX_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
#if defined(RT_USING_USB_DEVICE)||defined(RT_USING_USB_HOST)
#define HAL_PCD_MODULE_ENABLED
#define HAL_PCD_MODULE_ENABLED
#endif
/* #define HAL_HCD_MODULE_ENABLED */
...
...
@@ -100,55 +100,55 @@
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (RT_USING_HSI)
#define HSE_VALUE ((unsigned long)RT_HSE_VALUE)
#define HSE_VALUE ((unsigned long)RT_HSE_VALUE)
#endif
#define HCLK_VALUE ((unsigned long)RT_HSE_HCLK)
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000U)
/*!< Value of the External oscillator in Hz */
#define HCLK_VALUE ((unsigned long)RT_HSE_HCLK)
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000U)
/*!< Value of the External oscillator in Hz */
#endif
/* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)100U)
/*!< Time out for HSE start up, in ms */
#define HSE_STARTUP_TIMEOUT ((uint32_t)100U)
/*!< Time out for HSE start up, in ms */
#endif
/* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000U)
/*!< Value of the Internal oscillator in Hz*/
#define HSI_VALUE ((uint32_t)16000000U)
/*!< Value of the Internal oscillator in Hz*/
#endif
/* HSI_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE ((uint32_t)32000U)
/*!< LSI Typical Value in Hz*/
#if !defined (LSI_VALUE)
#define LSI_VALUE ((uint32_t)32000U)
/*!< LSI Typical Value in Hz*/
#endif
/* LSI_VALUE */
/*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature.*/
The real value may vary depending on the variations
in voltage and temperature.*/
/**
* @brief External Low Speed oscillator (LSE) value.
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768U)
/*!< Value of the External Low Speed oscillator in Hz */
#define LSE_VALUE ((uint32_t)32768U)
/*!< Value of the External Low Speed oscillator in Hz */
#endif
/* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U)
/*!< Time out for LSE start up, in ms */
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U)
/*!< Time out for LSE start up, in ms */
#endif
/* LSE_STARTUP_TIMEOUT */
/**
* @brief External clock source for I2S peripheral
* This value is used by the I2S HAL module to compute the I2S clock source
* frequency, this source is inserted directly through I2S_CKIN pad.
* This value is used by the I2S HAL module to compute the I2S clock source
* frequency, this source is inserted directly through I2S_CKIN pad.
*/
#if !defined (EXTERNAL_CLOCK_VALUE)
#define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U)
/*!< Value of the External audio frequency in Hz*/
#define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U)
/*!< Value of the External audio frequency in Hz*/
#endif
/* EXTERNAL_CLOCK_VALUE */
/* Tip: To avoid modifying this file each time you need to use different HSE,
...
...
@@ -158,16 +158,16 @@
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE
((uint32_t)3300U)
/*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)15U)
/*!< tick interrupt priority */
#define USE_RTOS 0U
#define VDD_VALUE
((uint32_t)3300U)
/*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)15U)
/*!< tick interrupt priority */
#define USE_RTOS 0U
#define PREFETCH_ENABLE 1U
#define INSTRUCTION_CACHE_ENABLE 1U
#define DATA_CACHE_ENABLE 1U
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1U */
...
...
@@ -184,7 +184,7 @@
#define MAC_ADDR4 0U
#define MAC_ADDR5 0U
/* Definition of the Ethernet driver buffers size and count */
/* Definition of the Ethernet driver buffers size and count */
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE
/* buffer size for receive */
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE
/* buffer size for transmit */
#define ETH_RXBUFNB ((uint32_t)4U)
/* 4 Rx buffers of size ETH_RX_BUF_SIZE */
...
...
@@ -192,9 +192,9 @@
/* Section 2: PHY configuration section */
/* DP83848_PHY_ADDRESS Address*/
/* DP83848_PHY_ADDRESS Address*/
#define DP83848_PHY_ADDRESS 0x01U
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
#define PHY_RESET_DELAY ((uint32_t)0x000000FFU)
/* PHY Configuration delay */
#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU)
...
...
@@ -206,7 +206,7 @@
#define PHY_BCR ((uint16_t)0x0000U)
/*!< Transceiver Basic Control Register */
#define PHY_BSR ((uint16_t)0x0001U)
/*!< Transceiver Basic Status Register */
#define PHY_RESET ((uint16_t)0x8000U)
/*!< PHY Reset */
#define PHY_LOOPBACK ((uint16_t)0x4000U)
/*!< Select loop-back mode */
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U)
/*!< Set the full-duplex mode at 100 Mb/s */
...
...
@@ -221,7 +221,7 @@
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U)
/*!< Auto-Negotiation process completed */
#define PHY_LINKED_STATUS ((uint16_t)0x0004U)
/*!< Valid link established */
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U)
/*!< Jabber condition detected */
/* Section 4: Extended PHY Registers */
#define PHY_SR ((uint16_t)0x10U)
/*!< PHY status register Offset */
...
...
@@ -239,211 +239,211 @@
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32f4xx_hal_rcc.h"
#include "stm32f4xx_hal_rcc.h"
#endif
/* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32f4xx_hal_gpio.h"
#include "stm32f4xx_hal_gpio.h"
#endif
/* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32f4xx_hal_dma.h"
#include "stm32f4xx_hal_dma.h"
#endif
/* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32f4xx_hal_cortex.h"
#include "stm32f4xx_hal_cortex.h"
#endif
/* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32f4xx_hal_adc.h"
#include "stm32f4xx_hal_adc.h"
#endif
/* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_CAN_MODULE_ENABLED
#include "stm32f4xx_hal_can.h"
#include "stm32f4xx_hal_can.h"
#endif
/* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32f4xx_hal_crc.h"
#include "stm32f4xx_hal_crc.h"
#endif
/* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32f4xx_hal_cryp.h"
#include "stm32f4xx_hal_cryp.h"
#endif
/* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_DMA2D_MODULE_ENABLED
#include "stm32f4xx_hal_dma2d.h"
#include "stm32f4xx_hal_dma2d.h"
#endif
/* HAL_DMA2D_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32f4xx_hal_dac.h"
#include "stm32f4xx_hal_dac.h"
#endif
/* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_DCMI_MODULE_ENABLED
#include "stm32f4xx_hal_dcmi.h"
#include "stm32f4xx_hal_dcmi.h"
#endif
/* HAL_DCMI_MODULE_ENABLED */
#ifdef HAL_ETH_MODULE_ENABLED
#include "stm32f4xx_hal_eth.h"
#include "stm32f4xx_hal_eth.h"
#endif
/* HAL_ETH_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32f4xx_hal_flash.h"
#include "stm32f4xx_hal_flash.h"
#endif
/* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32f4xx_hal_sram.h"
#include "stm32f4xx_hal_sram.h"
#endif
/* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32f4xx_hal_nor.h"
#include "stm32f4xx_hal_nor.h"
#endif
/* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED
#include "stm32f4xx_hal_nand.h"
#include "stm32f4xx_hal_nand.h"
#endif
/* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_PCCARD_MODULE_ENABLED
#include "stm32f4xx_hal_pccard.h"
#endif
/* HAL_PCCARD_MODULE_ENABLED */
#include "stm32f4xx_hal_pccard.h"
#endif
/* HAL_PCCARD_MODULE_ENABLED */
#ifdef HAL_SDRAM_MODULE_ENABLED
#include "stm32f4xx_hal_sdram.h"
#endif
/* HAL_SDRAM_MODULE_ENABLED */
#include "stm32f4xx_hal_sdram.h"
#endif
/* HAL_SDRAM_MODULE_ENABLED */
#ifdef HAL_HASH_MODULE_ENABLED
#include "stm32f4xx_hal_hash.h"
#include "stm32f4xx_hal_hash.h"
#endif
/* HAL_HASH_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32f4xx_hal_i2c.h"
#include "stm32f4xx_hal_i2c.h"
#endif
/* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32f4xx_hal_i2s.h"
#include "stm32f4xx_hal_i2s.h"
#endif
/* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32f4xx_hal_iwdg.h"
#include "stm32f4xx_hal_iwdg.h"
#endif
/* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_LTDC_MODULE_ENABLED
#include "stm32f4xx_hal_ltdc.h"
#include "stm32f4xx_hal_ltdc.h"
#endif
/* HAL_LTDC_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32f4xx_hal_pwr.h"
#include "stm32f4xx_hal_pwr.h"
#endif
/* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RNG_MODULE_ENABLED
#include "stm32f4xx_hal_rng.h"
#include "stm32f4xx_hal_rng.h"
#endif
/* HAL_RNG_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32f4xx_hal_rtc.h"
#include "stm32f4xx_hal_rtc.h"
#endif
/* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SAI_MODULE_ENABLED
#include "stm32f4xx_hal_sai.h"
#include "stm32f4xx_hal_sai.h"
#endif
/* HAL_SAI_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED
#include "stm32f4xx_hal_sd.h"
#include "stm32f4xx_hal_sd.h"
#endif
/* HAL_SD_MODULE_ENABLED */
#ifdef HAL_MMC_MODULE_ENABLED
#include "stm32f4xx_hal_mmc.h"
#include "stm32f4xx_hal_mmc.h"
#endif
/* HAL_MMC_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32f4xx_hal_spi.h"
#include "stm32f4xx_hal_spi.h"
#endif
/* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32f4xx_hal_tim.h"
#include "stm32f4xx_hal_tim.h"
#endif
/* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32f4xx_hal_uart.h"
#include "stm32f4xx_hal_uart.h"
#endif
/* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32f4xx_hal_usart.h"
#include "stm32f4xx_hal_usart.h"
#endif
/* HAL_USART_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32f4xx_hal_irda.h"
#include "stm32f4xx_hal_irda.h"
#endif
/* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32f4xx_hal_smartcard.h"
#include "stm32f4xx_hal_smartcard.h"
#endif
/* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32f4xx_hal_wwdg.h"
#include "stm32f4xx_hal_wwdg.h"
#endif
/* HAL_WWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32f4xx_hal_pcd.h"
#include "stm32f4xx_hal_pcd.h"
#endif
/* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_HCD_MODULE_ENABLED
#include "stm32f4xx_hal_hcd.h"
#include "stm32f4xx_hal_hcd.h"
#endif
/* HAL_HCD_MODULE_ENABLED */
#ifdef HAL_DSI_MODULE_ENABLED
#include "stm32f4xx_hal_dsi.h"
#include "stm32f4xx_hal_dsi.h"
#endif
/* HAL_DSI_MODULE_ENABLED */
#ifdef HAL_QSPI_MODULE_ENABLED
#include "stm32f4xx_hal_qspi.h"
#include "stm32f4xx_hal_qspi.h"
#endif
/* HAL_QSPI_MODULE_ENABLED */
#ifdef HAL_CEC_MODULE_ENABLED
#include "stm32f4xx_hal_cec.h"
#include "stm32f4xx_hal_cec.h"
#endif
/* HAL_CEC_MODULE_ENABLED */
#ifdef HAL_FMPI2C_MODULE_ENABLED
#include "stm32f4xx_hal_fmpi2c.h"
#include "stm32f4xx_hal_fmpi2c.h"
#endif
/* HAL_FMPI2C_MODULE_ENABLED */
#ifdef HAL_SPDIFRX_MODULE_ENABLED
#include "stm32f4xx_hal_spdifrx.h"
#include "stm32f4xx_hal_spdifrx.h"
#endif
/* HAL_SPDIFRX_MODULE_ENABLED */
#ifdef HAL_DFSDM_MODULE_ENABLED
#include "stm32f4xx_hal_dfsdm.h"
#include "stm32f4xx_hal_dfsdm.h"
#endif
/* HAL_DFSDM_MODULE_ENABLED */
#ifdef HAL_LPTIM_MODULE_ENABLED
#include "stm32f4xx_hal_lptim.h"
#include "stm32f4xx_hal_lptim.h"
#endif
/* HAL_LPTIM_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void
assert_failed
(
uint8_t
*
file
,
uint32_t
line
);
void
assert_failed
(
uint8_t
*
file
,
uint32_t
line
);
#else
#define assert_param(expr) ((void)0U)
#endif
/* USE_FULL_ASSERT */
#define assert_param(expr) ((void)0U)
#endif
/* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif
/* __STM32F4xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32f4xx-HAL/drivers/stm32f4xx_it.c
浏览文件 @
1d48f9ff
...
...
@@ -61,10 +61,10 @@ void NMI_Handler(void)
*/
void
MemManage_Handler
(
void
)
{
/* Go to infinite loop when Memory Manage exception occurs */
while
(
1
)
{
}
/* Go to infinite loop when Memory Manage exception occurs */
while
(
1
)
{
}
}
/**
...
...
@@ -74,10 +74,10 @@ void MemManage_Handler(void)
*/
void
BusFault_Handler
(
void
)
{
/* Go to infinite loop when Bus Fault exception occurs */
while
(
1
)
{
}
/* Go to infinite loop when Bus Fault exception occurs */
while
(
1
)
{
}
}
/**
...
...
@@ -87,10 +87,10 @@ void BusFault_Handler(void)
*/
void
UsageFault_Handler
(
void
)
{
/* Go to infinite loop when Usage Fault exception occurs */
while
(
1
)
{
}
/* Go to infinite loop when Usage Fault exception occurs */
while
(
1
)
{
}
}
/**
...
...
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