Cherry Pick : 16837 Support ShuffleNet and MobileNet-v2

Support ShuffleNet and MobileNet-v2, test=release/1.4

paddle/fluid/inference/anakin/convert/activation.cc

@@ -43,47 +43,22 @@ void ActivationOpConverter<TargetT, PrecisionT>::operator()(
   auto output_name = op_desc.Output("Out").front();
   this->engine_->AddOp(op_name, "Activation", {input_name}, {output_name});
   this->engine_->AddOpAttr(op_name, "type", anakin_op_type_);
+
+  if (op_type_ == "swish") {
+    float beta = boost::get<float>(op_desc.GetAttr("beta"));
+    this->engine_->AddOpAttr(op_name, "clip_relu_num", beta);
+  }
+  if (op_type_ == "relu6") {
+    float threshold = boost::get<float>(op_desc.GetAttr("threshold"));
+    this->engine_->AddOpAttr(op_name, "clip_relu_num", threshold);
+  }
 }
 
 }  // namespace anakin
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using sigmoid_nv_fp32 =
-    ::paddle::inference::anakin::SigmoidOpConverter<::anakin::saber::NV,
-                                                    ::anakin::Precision::FP32>;
-using sigmoid_nv_int8 =
-    ::paddle::inference::anakin::SigmoidOpConverter<::anakin::saber::NV,
-                                                    ::anakin::Precision::INT8>;
-using tanh_nv_fp32 =
-    ::paddle::inference::anakin::TanhOpConverter<::anakin::saber::NV,
-                                                 ::anakin::Precision::FP32>;
-using tanh_nv_int8 =
-    ::paddle::inference::anakin::TanhOpConverter<::anakin::saber::NV,
-                                                 ::anakin::Precision::INT8>;
-
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(sigmoid, sigmoid_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(sigmoid, sigmoid_nv_int8);
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(tanh, tanh_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(tanh, tanh_nv_int8);
-#endif
-
-using sigmoid_cpu_fp32 =
-    ::paddle::inference::anakin::SigmoidOpConverter<::anakin::saber::X86,
-                                                    ::anakin::Precision::FP32>;
-using sigmoid_cpu_int8 =
-    ::paddle::inference::anakin::SigmoidOpConverter<::anakin::saber::X86,
-                                                    ::anakin::Precision::INT8>;
-using tanh_cpu_fp32 =
-    ::paddle::inference::anakin::TanhOpConverter<::anakin::saber::X86,
-                                                 ::anakin::Precision::FP32>;
-using tanh_cpu_int8 =
-    ::paddle::inference::anakin::TanhOpConverter<::anakin::saber::X86,
-                                                 ::anakin::Precision::INT8>;
-
-REGISTER_CPU_ANAKIN_OP_CONVERTER(sigmoid, sigmoid_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(sigmoid, sigmoid_cpu_int8);
-
-REGISTER_CPU_ANAKIN_OP_CONVERTER(tanh, tanh_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(tanh, tanh_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(sigmoid, SigmoidOpConverter);
+REGISTER_ANAKIN_OP_CONVERTER(tanh, TanhOpConverter);
+REGISTER_ANAKIN_OP_CONVERTER(swish, SwishOpConverter);
+REGISTER_ANAKIN_OP_CONVERTER(relu6, Relu6OpConverter);

paddle/fluid/inference/anakin/convert/activation.h

@@ -37,7 +37,9 @@ class ActivationOpConverter : public AnakinOpConverter<TargetT, PrecisionT> {
   std::string op_type_;
   std::string anakin_op_type_;
   std::map<std::string, std::string> anakin_op_types_{{"tanh", "TanH"},
-                                                      {"sigmoid", "Sigmoid"}};
+                                                      {"sigmoid", "Sigmoid"},
+                                                      {"relu6", "ClippedRelu"},
+                                                      {"swish", "Swish"}};
 };
 
 template <typename TargetT, ::anakin::Precision PrecisionT>
@@ -52,6 +54,19 @@ class SigmoidOpConverter : public ActivationOpConverter<TargetT, PrecisionT> {
   SigmoidOpConverter()
       : ActivationOpConverter<TargetT, PrecisionT>("sigmoid") {}
 };
+
+template <typename TargetT, ::anakin::Precision PrecisionT>
+class Relu6OpConverter : public ActivationOpConverter<TargetT, PrecisionT> {
+ public:
+  Relu6OpConverter() : ActivationOpConverter<TargetT, PrecisionT>("relu6") {}
+};
+
+template <typename TargetT, ::anakin::Precision PrecisionT>
+class SwishOpConverter : public ActivationOpConverter<TargetT, PrecisionT> {
+ public:
+  SwishOpConverter() : ActivationOpConverter<TargetT, PrecisionT>("swish") {}
+};
+
 }  // namespace anakin
 }  // namespace inference
 }  // namespace paddle

paddle/fluid/inference/anakin/convert/affine_channel.cc

@@ -52,22 +52,4 @@ void AffineChannelOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using affine_channel_nv_fp32 =
-    ::paddle::inference::anakin::AffineChannelOpConverter<
-        ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using affine_channel_nv_int8 =
-    ::paddle::inference::anakin::AffineChannelOpConverter<
-        ::anakin::saber::NV, ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(affine_channel, affine_channel_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(affine_channel, affine_channel_nv_int8);
-#endif
-
-using affine_channel_cpu_fp32 =
-    ::paddle::inference::anakin::AffineChannelOpConverter<
-        ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using affine_channel_cpu_int8 =
-    ::paddle::inference::anakin::AffineChannelOpConverter<
-        ::anakin::saber::X86, ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(affine_channel, affine_channel_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(affine_channel, affine_channel_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(affine_channel, AffineChannelOpConverter);

paddle/fluid/inference/anakin/convert/batch_norm.cc

@@ -82,18 +82,4 @@ void BatchNormOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using bn_nv_fp32 = ::paddle::inference::anakin::BatchNormOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using bn_nv_int8 = ::paddle::inference::anakin::BatchNormOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(batch_norm, bn_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(batch_norm, bn_nv_int8);
-#endif
-
-using bn_cpu_fp32 = ::paddle::inference::anakin::BatchNormOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using bn_cpu_int8 = ::paddle::inference::anakin::BatchNormOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(batch_norm, bn_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(batch_norm, bn_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(batch_norm, BatchNormOpConverter);

paddle/fluid/inference/anakin/convert/concat.cc

@@ -38,22 +38,4 @@ void ConcatOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using concat_nv_fp32 =
-    ::paddle::inference::anakin::ConcatOpConverter<::anakin::saber::NV,
-                                                   ::anakin::Precision::FP32>;
-using concat_nv_int8 =
-    ::paddle::inference::anakin::ConcatOpConverter<::anakin::saber::NV,
-                                                   ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(concat, concat_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(concat, concat_nv_int8);
-
-#endif
-using concat_cpu_fp32 =
-    ::paddle::inference::anakin::ConcatOpConverter<::anakin::saber::X86,
-                                                   ::anakin::Precision::FP32>;
-using concat_cpu_int8 =
-    ::paddle::inference::anakin::ConcatOpConverter<::anakin::saber::X86,
-                                                   ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(concat, concat_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(concat, concat_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(concat, ConcatOpConverter);

paddle/fluid/inference/anakin/convert/conv2d.cc

@@ -105,22 +105,4 @@ void Conv2dOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using conv2d_nv_fp32 =
-    ::paddle::inference::anakin::Conv2dOpConverter<::anakin::saber::NV,
-                                                   ::anakin::Precision::FP32>;
-using conv2d_nv_int8 =
-    ::paddle::inference::anakin::Conv2dOpConverter<::anakin::saber::NV,
-                                                   ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(conv2d, conv2d_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(conv2d, conv2d_nv_int8);
-#endif
-
-using conv2d_cpu_fp32 =
-    ::paddle::inference::anakin::Conv2dOpConverter<::anakin::saber::X86,
-                                                   ::anakin::Precision::FP32>;
-using conv2d_cpu_int8 =
-    ::paddle::inference::anakin::Conv2dOpConverter<::anakin::saber::X86,
-                                                   ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(conv2d, conv2d_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(conv2d, conv2d_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(conv2d, Conv2dOpConverter);

paddle/fluid/inference/anakin/convert/conv2d_fusion.cc

@@ -111,22 +111,4 @@ void Conv2dFusionOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using conv2d_fusion_nv_fp32 =
-    ::paddle::inference::anakin::Conv2dFusionOpConverter<
-        ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using conv2d_fusion_nv_int8 =
-    ::paddle::inference::anakin::Conv2dFusionOpConverter<
-        ::anakin::saber::NV, ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(conv2d_fusion, conv2d_fusion_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(conv2d_fusion, conv2d_fusion_nv_int8);
-#endif
-using conv2d_fusion_cpu_fp32 =
-    ::paddle::inference::anakin::Conv2dFusionOpConverter<
-        ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using conv2d_fusion_cpu_int8 =
-    ::paddle::inference::anakin::Conv2dFusionOpConverter<
-        ::anakin::saber::X86, ::anakin::Precision::INT8>;
-
-REGISTER_CPU_ANAKIN_OP_CONVERTER(conv2d_fusion, conv2d_fusion_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(conv2d_fusion, conv2d_fusion_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(conv2d_fusion, Conv2dFusionOpConverter);

paddle/fluid/inference/anakin/convert/density_prior_box.cc

@@ -108,25 +108,5 @@ void DensityPriorBoxOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using ds_pr_nv_fp32 = ::paddle::inference::anakin::DensityPriorBoxOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using ds_pr_nv_int8 = ::paddle::inference::anakin::DensityPriorBoxOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::INT8>;
-
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(density_prior_box, ds_pr_nv_fp32);
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(prior_box, ds_pr_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(density_prior_box, ds_pr_nv_int8);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(prior_box, ds_pr_nv_int8);
-#endif
-
-using ds_pr_cpu_fp32 = ::paddle::inference::anakin::DensityPriorBoxOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using ds_pr_cpu_int8 = ::paddle::inference::anakin::DensityPriorBoxOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::INT8>;
-
-REGISTER_CPU_ANAKIN_OP_CONVERTER(density_prior_box, ds_pr_cpu_fp32);
-REGISTER_CPU_ANAKIN_OP_CONVERTER(prior_box, ds_pr_cpu_fp32);
-
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(density_prior_box, ds_pr_cpu_int8);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(prior_box, ds_pr_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(density_prior_box, DensityPriorBoxOpConverter);
+REGISTER_ANAKIN_OP_CONVERTER(prior_box, DensityPriorBoxOpConverter);

paddle/fluid/inference/anakin/convert/detection_out.cc

@@ -66,22 +66,4 @@ void DetectionOutOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using detection_out_nv_fp32 =
-    ::paddle::inference::anakin::DetectionOutOpConverter<
-        ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using detection_out_nv_int8 =
-    ::paddle::inference::anakin::DetectionOutOpConverter<
-        ::anakin::saber::NV, ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(detection_out, detection_out_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(detection_out, detection_out_nv_int8);
-#endif
-
-using detection_out_cpu_fp32 =
-    ::paddle::inference::anakin::DetectionOutOpConverter<
-        ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using detection_out_cpu_int8 =
-    ::paddle::inference::anakin::DetectionOutOpConverter<
-        ::anakin::saber::X86, ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(detection_out, detection_out_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(detection_out, detection_out_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(detection_out, DetectionOutOpConverter);

paddle/fluid/inference/anakin/convert/dropout.cc

@@ -52,22 +52,4 @@ void DropoutOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using dropout_nv_fp32 =
-    ::paddle::inference::anakin::DropoutOpConverter<::anakin::saber::NV,
-                                                    ::anakin::Precision::FP32>;
-using dropout_nv_int8 =
-    ::paddle::inference::anakin::DropoutOpConverter<::anakin::saber::NV,
-                                                    ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(dropout, dropout_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(dropout, dropout_nv_int8);
-#endif
-
-using dropout_cpu_fp32 =
-    ::paddle::inference::anakin::DropoutOpConverter<::anakin::saber::X86,
-                                                    ::anakin::Precision::FP32>;
-using dropout_cpu_int8 =
-    ::paddle::inference::anakin::DropoutOpConverter<::anakin::saber::X86,
-                                                    ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(dropout, dropout_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(dropout, dropout_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(dropout, DropoutOpConverter);

paddle/fluid/inference/anakin/convert/elementwise.cc

@@ -71,32 +71,5 @@ void ElementwiseMulOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using elet_nv_fp32 = ::paddle::inference::anakin::ElementwiseAddOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using elet_nv_int8 = ::paddle::inference::anakin::ElementwiseAddOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::INT8>;
-using eletmul_nv_fp32 = ::paddle::inference::anakin::ElementwiseMulOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using eletmul_nv_int8 = ::paddle::inference::anakin::ElementwiseMulOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::INT8>;
-
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(elementwise_add, elet_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(elementwise_add, elet_nv_int8);
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(elementwise_mul, eletmul_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(elementwise_mul, eletmul_nv_int8);
-
-#endif
-using elet_cpu_fp32 = ::paddle::inference::anakin::ElementwiseAddOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using elet_cpu_int8 = ::paddle::inference::anakin::ElementwiseAddOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::INT8>;
-using eletmul_cpu_fp32 = ::paddle::inference::anakin::ElementwiseMulOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using eletmul_cpu_int8 = ::paddle::inference::anakin::ElementwiseMulOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::INT8>;
-
-REGISTER_CPU_ANAKIN_OP_CONVERTER(elementwise_add, elet_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(elementwise_add, elet_cpu_int8);
-REGISTER_CPU_ANAKIN_OP_CONVERTER(elementwise_mul, eletmul_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(elementwise_mul, eletmul_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(elementwise_add, ElementwiseAddOpConverter);
+REGISTER_ANAKIN_OP_CONVERTER(elementwise_mul, ElementwiseMulOpConverter);

paddle/fluid/inference/anakin/convert/fc.cc

@@ -117,40 +117,5 @@ void FcBaseOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using mul_nv_fp32 =
-    ::paddle::inference::anakin::MulOpConverter<::anakin::saber::NV,
-                                                ::anakin::Precision::FP32>;
-using fc_nv_fp32 =
-    ::paddle::inference::anakin::FcOpConverter<::anakin::saber::NV,
-                                               ::anakin::Precision::FP32>;
-using mul_nv_int8 =
-    ::paddle::inference::anakin::MulOpConverter<::anakin::saber::NV,
-                                                ::anakin::Precision::INT8>;
-using fc_nv_int8 =
-    ::paddle::inference::anakin::FcOpConverter<::anakin::saber::NV,
-                                               ::anakin::Precision::INT8>;
-
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(mul, mul_nv_fp32);
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(fc, fc_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(mul, mul_nv_int8);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(fc, fc_nv_int8);
-#endif
-
-using mul_cpu_fp32 =
-    ::paddle::inference::anakin::MulOpConverter<::anakin::saber::X86,
-                                                ::anakin::Precision::FP32>;
-using fc_cpu_fp32 =
-    ::paddle::inference::anakin::FcOpConverter<::anakin::saber::X86,
-                                               ::anakin::Precision::FP32>;
-using mul_cpu_int8 =
-    ::paddle::inference::anakin::MulOpConverter<::anakin::saber::X86,
-                                                ::anakin::Precision::INT8>;
-using fc_cpu_int8 =
-    ::paddle::inference::anakin::FcOpConverter<::anakin::saber::X86,
-                                               ::anakin::Precision::INT8>;
-
-REGISTER_CPU_ANAKIN_OP_CONVERTER(mul, mul_cpu_fp32);
-REGISTER_CPU_ANAKIN_OP_CONVERTER(fc, fc_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(mul, mul_cpu_int8);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(fc, fc_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(mul, MulOpConverter);
+REGISTER_ANAKIN_OP_CONVERTER(fc, FcOpConverter);

paddle/fluid/inference/anakin/convert/flatten.cc

@@ -45,22 +45,4 @@ void FlattenOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using flatten_nv_fp32 =
-    ::paddle::inference::anakin::FlattenOpConverter<::anakin::saber::NV,
-                                                    ::anakin::Precision::FP32>;
-using flatten_nv_int8 =
-    ::paddle::inference::anakin::FlattenOpConverter<::anakin::saber::NV,
-                                                    ::anakin::Precision::INT8>;
-
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(flatten, flatten_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(flatten, flatten_nv_int8);
-#endif
-using flatten_cpu_fp32 =
-    ::paddle::inference::anakin::FlattenOpConverter<::anakin::saber::X86,
-                                                    ::anakin::Precision::FP32>;
-using flatten_cpu_int8 =
-    ::paddle::inference::anakin::FlattenOpConverter<::anakin::saber::X86,
-                                                    ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(flatten, flatten_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(flatten, flatten_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(flatten, FlattenOpConverter);

paddle/fluid/inference/anakin/convert/im2sequence.cc

@@ -55,18 +55,4 @@ void Im2SequenceConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using im2sequence_nv_fp32 = ::paddle::inference::anakin::Im2SequenceConverter<
-    ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using im2sequence_nv_int8 = ::paddle::inference::anakin::Im2SequenceConverter<
-    ::anakin::saber::NV, ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(im2sequence, im2sequence_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(im2sequence, im2sequence_nv_int8);
-#endif
-
-using im2sequence_cpu_fp32 = ::paddle::inference::anakin::Im2SequenceConverter<
-    ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using im2sequence_cpu_int8 = ::paddle::inference::anakin::Im2SequenceConverter<
-    ::anakin::saber::X86, ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(im2sequence, im2sequence_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(im2sequence, im2sequence_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(im2sequence, Im2SequenceConverter);

paddle/fluid/inference/anakin/convert/op_converter.h

@@ -183,25 +183,37 @@ template class AnakinOpConverter<::anakin::saber::X86,
     return 0;                                                                  \
   }
 
-#define REGISTER_CUDA_ANAKIN_OP_CONVERTER(op_type__, Converter__) \
-  REGISTER_ANAKIN_OP_CONVERTER_BASE(op_type__, Converter__, CUDA, \
-                                    ::anakin::saber::NV, FP32,    \
-                                    ::anakin::Precision::FP32)
-
-#define REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(op_type__, Converter__) \
-  REGISTER_ANAKIN_OP_CONVERTER_BASE(op_type__, Converter__, CUDA,      \
-                                    ::anakin::saber::NV, INT8,         \
-                                    ::anakin::Precision::INT8)
-
-#define REGISTER_CPU_ANAKIN_OP_CONVERTER(op_type__, Converter__) \
-  REGISTER_ANAKIN_OP_CONVERTER_BASE(op_type__, Converter__, CPU, \
-                                    ::anakin::saber::X86, FP32,  \
-                                    ::anakin::Precision::FP32)
-
-#define REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(op_type__, Converter__) \
-  REGISTER_ANAKIN_OP_CONVERTER_BASE(op_type__, Converter__, CPU,      \
-                                    ::anakin::saber::X86, INT8,       \
-                                    ::anakin::Precision::INT8)
+#define WRAP(...) __VA_ARGS__
+
+#define REGISTER_CUDA_ANAKIN_OP_CONVERTER(op_type__, Converter__,       \
+                                          precision_type__)             \
+  REGISTER_ANAKIN_OP_CONVERTER_BASE(                                    \
+      op_type__,                                                        \
+      ::paddle::inference::anakin::Converter__<WRAP(                    \
+          ::anakin::saber::NV, ::anakin::Precision::precision_type__)>, \
+      CUDA, ::anakin::saber::NV, precision_type__,                      \
+      ::anakin::Precision::precision_type__)
+
+#define REGISTER_CPU_ANAKIN_OP_CONVERTER(op_type__, Converter__,         \
+                                         precision_type__)               \
+  REGISTER_ANAKIN_OP_CONVERTER_BASE(                                     \
+      op_type__,                                                         \
+      ::paddle::inference::anakin::Converter__<WRAP(                     \
+          ::anakin::saber::X86, ::anakin::Precision::precision_type__)>, \
+      CPU, ::anakin::saber::X86, precision_type__,                       \
+      ::anakin::Precision::precision_type__)
+
+#ifdef PADDLE_WITH_CUDA
+#define REGISTER_ANAKIN_OP_CONVERTER(op_type__, Converter__)       \
+  REGISTER_CUDA_ANAKIN_OP_CONVERTER(op_type__, Converter__, FP32); \
+  REGISTER_CUDA_ANAKIN_OP_CONVERTER(op_type__, Converter__, INT8); \
+  REGISTER_CPU_ANAKIN_OP_CONVERTER(op_type__, Converter__, FP32);  \
+  REGISTER_CPU_ANAKIN_OP_CONVERTER(op_type__, Converter__, INT8)
+#else
+#define REGISTER_ANAKIN_OP_CONVERTER(op_type__, Converter__)      \
+  REGISTER_CPU_ANAKIN_OP_CONVERTER(op_type__, Converter__, FP32); \
+  REGISTER_CPU_ANAKIN_OP_CONVERTER(op_type__, Converter__, INT8)
+#endif
 
 #define USE_ANAKIN_CONVERTER_BASE(op_type__, place_type__, precision_type__)   \
   extern int Touch_anakin_##op_type__##_##place_type__##_##precision_type__(); \

paddle/fluid/inference/anakin/convert/pool2d.cc

@@ -71,22 +71,4 @@ void Pool2dOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using pool2d_nv_float32 =
-    ::paddle::inference::anakin::Pool2dOpConverter<::anakin::saber::NV,
-                                                   ::anakin::Precision::FP32>;
-using pool2d_nv_int8 =
-    ::paddle::inference::anakin::Pool2dOpConverter<::anakin::saber::NV,
-                                                   ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(pool2d, pool2d_nv_float32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(pool2d, pool2d_nv_int8);
-#endif
-
-using pool2d_cpu_float32 =
-    ::paddle::inference::anakin::Pool2dOpConverter<::anakin::saber::X86,
-                                                   ::anakin::Precision::FP32>;
-using pool2d_cpu_int8 =
-    ::paddle::inference::anakin::Pool2dOpConverter<::anakin::saber::X86,
-                                                   ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(pool2d, pool2d_cpu_float32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(pool2d, pool2d_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(pool2d, Pool2dOpConverter);

paddle/fluid/inference/anakin/convert/relu.cc

@@ -57,36 +57,5 @@ void LeakyReluOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using relu_nv_fp32 =
-    ::paddle::inference::anakin::ReluOpConverter<::anakin::saber::NV,
-                                                 ::anakin::Precision::FP32>;
-using leaky_nv_fp32 = ::paddle::inference::anakin::LeakyReluOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using relu_nv_int8 =
-    ::paddle::inference::anakin::ReluOpConverter<::anakin::saber::NV,
-                                                 ::anakin::Precision::INT8>;
-using leaky_nv_int8 = ::paddle::inference::anakin::LeakyReluOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::INT8>;
-
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(relu, relu_nv_fp32);
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(leaky_relu, leaky_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(relu, relu_nv_int8);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(leaky_relu, leaky_nv_int8);
-
-#endif
-
-using relu_cpu_fp32 =
-    ::paddle::inference::anakin::ReluOpConverter<::anakin::saber::X86,
-                                                 ::anakin::Precision::FP32>;
-using leaky_cpu_fp32 = ::paddle::inference::anakin::LeakyReluOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using relu_cpu_int8 =
-    ::paddle::inference::anakin::ReluOpConverter<::anakin::saber::X86,
-                                                 ::anakin::Precision::INT8>;
-using leaky_cpu_int8 = ::paddle::inference::anakin::LeakyReluOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(relu, relu_cpu_fp32);
-REGISTER_CPU_ANAKIN_OP_CONVERTER(leaky_relu, leaky_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(relu, relu_cpu_int8);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(leaky_relu, leaky_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(relu, ReluOpConverter);
+REGISTER_ANAKIN_OP_CONVERTER(leaky_relu, LeakyReluOpConverter);

paddle/fluid/inference/anakin/convert/reshape.cc

@@ -46,22 +46,4 @@ void ReshapeOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using reshape_nv_fp32 =
-    ::paddle::inference::anakin::ReshapeOpConverter<::anakin::saber::NV,
-                                                    ::anakin::Precision::FP32>;
-using reshape_nv_int8 =
-    ::paddle::inference::anakin::ReshapeOpConverter<::anakin::saber::NV,
-                                                    ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(reshape, reshape_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(reshape, reshape_nv_int8);
-#endif
-
-using reshape_cpu_fp32 =
-    ::paddle::inference::anakin::ReshapeOpConverter<::anakin::saber::X86,
-                                                    ::anakin::Precision::FP32>;
-using reshape_cpu_int8 =
-    ::paddle::inference::anakin::ReshapeOpConverter<::anakin::saber::X86,
-                                                    ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(reshape, reshape_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(reshape, reshape_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(reshape, ReshapeOpConverter);

paddle/fluid/inference/anakin/convert/roi_align.cc

@@ -51,22 +51,4 @@ void RoiAlignOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using roi_align_nv_fp32 =
-    ::paddle::inference::anakin::RoiAlignOpConverter<::anakin::saber::NV,
-                                                     ::anakin::Precision::FP32>;
-using roi_align_nv_int8 =
-    ::paddle::inference::anakin::RoiAlignOpConverter<::anakin::saber::NV,
-                                                     ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(roi_align, roi_align_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(roi_align, roi_align_nv_int8);
-#endif
-
-using roi_align_cpu_fp32 =
-    ::paddle::inference::anakin::RoiAlignOpConverter<::anakin::saber::X86,
-                                                     ::anakin::Precision::FP32>;
-using roi_align_cpu_int8 =
-    ::paddle::inference::anakin::RoiAlignOpConverter<::anakin::saber::X86,
-                                                     ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(roi_align, roi_align_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(roi_align, roi_align_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(roi_align, RoiAlignOpConverter);

paddle/fluid/inference/anakin/convert/scale.cc

@@ -49,22 +49,4 @@ void ScaleOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using scale_nv_fp32 =
-    ::paddle::inference::anakin::ScaleOpConverter<::anakin::saber::NV,
-                                                  ::anakin::Precision::FP32>;
-using scale_nv_int8 =
-    ::paddle::inference::anakin::ScaleOpConverter<::anakin::saber::NV,
-                                                  ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(scale, scale_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(scale, scale_nv_int8);
-#endif
-
-using scale_cpu_fp32 =
-    ::paddle::inference::anakin::ScaleOpConverter<::anakin::saber::X86,
-                                                  ::anakin::Precision::FP32>;
-using scale_cpu_int8 =
-    ::paddle::inference::anakin::ScaleOpConverter<::anakin::saber::X86,
-                                                  ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(scale, scale_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(scale, scale_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(scale, ScaleOpConverter);

paddle/fluid/inference/anakin/convert/softmax.cc

@@ -44,23 +44,4 @@ void SoftMaxOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using sm_nv_fp32 =
-    ::paddle::inference::anakin::SoftMaxOpConverter<::anakin::saber::NV,
-                                                    ::anakin::Precision::FP32>;
-using sm_nv_int8 =
-    ::paddle::inference::anakin::SoftMaxOpConverter<::anakin::saber::NV,
-                                                    ::anakin::Precision::INT8>;
-
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(softmax, sm_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(softmax, sm_nv_int8);
-#endif
-
-using sm_cpu_fp32 =
-    ::paddle::inference::anakin::SoftMaxOpConverter<::anakin::saber::X86,
-                                                    ::anakin::Precision::FP32>;
-using sm_cpu_int8 =
-    ::paddle::inference::anakin::SoftMaxOpConverter<::anakin::saber::X86,
-                                                    ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(softmax, sm_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(softmax, sm_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(softmax, SoftMaxOpConverter);

paddle/fluid/inference/anakin/convert/split.cc

@@ -55,23 +55,5 @@ void SplitOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace anakin
 }  // namespace inference
 }  // namespace paddle
-#ifdef PADDLE_WITH_CUDA
-using split_nv_fp32 =
-    ::paddle::inference::anakin::SplitOpConverter<::anakin::saber::NV,
-                                                  ::anakin::Precision::FP32>;
-using split_nv_int8 =
-    ::paddle::inference::anakin::SplitOpConverter<::anakin::saber::NV,
-                                                  ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(split, split_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(split, split_nv_int8);
-#endif
 
-using split_cpu_fp32 =
-    ::paddle::inference::anakin::SplitOpConverter<::anakin::saber::X86,
-                                                  ::anakin::Precision::FP32>;
-using split_cpu_int8 =
-    ::paddle::inference::anakin::SplitOpConverter<::anakin::saber::X86,
-                                                  ::anakin::Precision::INT8>;
-
-REGISTER_CPU_ANAKIN_OP_CONVERTER(split, split_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(split, split_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(split, SplitOpConverter);

paddle/fluid/inference/anakin/convert/sum.cc

@@ -47,22 +47,4 @@ void SumOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using sum_nv_fp32 =
-    ::paddle::inference::anakin::SumOpConverter<::anakin::saber::NV,
-                                                ::anakin::Precision::FP32>;
-using sum_nv_int8 =
-    ::paddle::inference::anakin::SumOpConverter<::anakin::saber::NV,
-                                                ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(sum, sum_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(sum, sum_nv_int8);
-#endif
-
-using sum_cpu_fp32 =
-    ::paddle::inference::anakin::SumOpConverter<::anakin::saber::X86,
-                                                ::anakin::Precision::FP32>;
-using sum_cpu_int8 =
-    ::paddle::inference::anakin::SumOpConverter<::anakin::saber::X86,
-                                                ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(sum, sum_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(sum, sum_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(sum, SumOpConverter);

paddle/fluid/inference/anakin/convert/test_activation_op.cc

@@ -36,6 +36,14 @@ static void test_activation_op(const std::string& op_type,
   desc.SetInput("X", {"act-X"});
   desc.SetOutput("Out", {"act-Out"});
 
+  if (op_type == "swish") {
+    desc.SetAttr("beta", 1.0f);
+  }
+
+  if (op_type == "relu6") {
+    desc.SetAttr("threshold", 6.0f);
+  }
+
   LOG(INFO) << "set OP";
   validator.SetOp(*desc.Proto());
   LOG(INFO) << "execute";
@@ -55,6 +63,18 @@ TEST(tanh_op, gpu) {
   platform::CUDADeviceContext ctx(gpu_place);
   test_activation_op<::anakin::saber::NV>("tanh", ctx, true);
 }
+
+TEST(relu6_op, gpu) {
+  platform::CUDAPlace gpu_place(0);
+  platform::CUDADeviceContext ctx(gpu_place);
+  test_activation_op<::anakin::saber::NV>("relu6", ctx, true);
+}
+
+TEST(swish_op, gpu) {
+  platform::CUDAPlace gpu_place(0);
+  platform::CUDADeviceContext ctx(gpu_place);
+  test_activation_op<::anakin::saber::NV>("swish", ctx, true);
+}
 #endif
 
 /*
@@ -69,6 +89,18 @@ TEST(tanh_op, cpu) {
   platform::CPUDeviceContext ctx(cpu_place);
   test_activation_op<::anakin::saber::X86>("tanh", ctx, false);
 }
+
+TEST(relu6_op, cpu) {
+  platform::CPUPlace cpu_place;
+  platform::CPUDeviceContext ctx(cpu_place);
+  test_activation_op<::anakin::saber::X86>("relu6", ctx, false);
+}
+
+TEST(swish_op, cpu) {
+  platform::CPUPlace cpu_place;
+  platform::CPUDeviceContext ctx(cpu_place);
+  test_activation_op<::anakin::saber::X86>("swish", ctx, false);
+}
 */
 
 }  // namespace anakin
@@ -77,10 +109,16 @@ TEST(tanh_op, cpu) {
 
 USE_OP(sigmoid);
 USE_OP(tanh);
+USE_OP(relu6);
+USE_OP(swish);
 
 USE_CPU_ANAKIN_CONVERTER(sigmoid);
 USE_CPU_ANAKIN_CONVERTER(tanh);
+USE_CPU_ANAKIN_CONVERTER(relu6);
+USE_CPU_ANAKIN_CONVERTER(swish);
 #ifdef PADDLE_WITH_CUDA
 USE_ANAKIN_CONVERTER(sigmoid);
 USE_ANAKIN_CONVERTER(tanh);
+USE_ANAKIN_CONVERTER(relu6);
+USE_ANAKIN_CONVERTER(swish);
 #endif

paddle/fluid/inference/anakin/convert/transpose.cc

@@ -49,18 +49,4 @@ void TransposeOpConverter<TargetT, PrecisionT>::operator()(
 }  // namespace inference
 }  // namespace paddle
 
-#ifdef PADDLE_WITH_CUDA
-using transpose_nv_fp32 = ::paddle::inference::anakin::TransposeOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::FP32>;
-using transpose_nv_int8 = ::paddle::inference::anakin::TransposeOpConverter<
-    ::anakin::saber::NV, ::anakin::Precision::INT8>;
-REGISTER_CUDA_ANAKIN_OP_CONVERTER(transpose, transpose_nv_fp32);
-REGISTER_CUDA_INT8_ANAKIN_OP_CONVERTER(transpose, transpose_nv_int8);
-#endif
-
-using transpose_cpu_fp32 = ::paddle::inference::anakin::TransposeOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::FP32>;
-using transpose_cpu_int8 = ::paddle::inference::anakin::TransposeOpConverter<
-    ::anakin::saber::X86, ::anakin::Precision::INT8>;
-REGISTER_CPU_ANAKIN_OP_CONVERTER(transpose, transpose_cpu_fp32);
-REGISTER_CPU_INT8_ANAKIN_OP_CONVERTER(transpose, transpose_cpu_int8);
+REGISTER_ANAKIN_OP_CONVERTER(transpose, TransposeOpConverter);

paddle/fluid/inference/anakin/op_teller.cc

@@ -46,6 +46,8 @@ struct SimpleOpTypeSetTeller : public Teller {
     teller_set.insert("prior_box");
     teller_set.insert("leaky_relu");
     teller_set.insert("affine_channel");
+    teller_set.insert("relu6");
+    teller_set.insert("swish");
   }
 
   bool operator()(const std::string& op_type,

paddle/fluid/inference/api/analysis_predictor.cc

@@ -893,4 +893,6 @@ USE_ANAKIN_CONVERTER(sum);
 USE_ANAKIN_CONVERTER(prior_box);
 USE_ANAKIN_CONVERTER(leaky_relu);
 USE_ANAKIN_CONVERTER(affine_channel);
+USE_ANAKIN_CONVERTER(relu6);
+USE_ANAKIN_CONVERTER(swish);
 #endif