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6be3ee26
编写于
6月 16, 2022
作者:
Z
zhangyikun02
提交者:
GitHub
6月 16, 2022
浏览文件
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浏览文件
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电子邮件补丁
差异文件
remove fp16 support of depthwise_conv2d and add unittest for depthwise_conv2d, test=kunlun (#43483)
上级
4002f320
变更
3
隐藏空白更改
内联
并排
Showing
3 changed file
with
230 addition
and
10 deletion
+230
-10
paddle/fluid/operators/conv_op_xpu.cc
paddle/fluid/operators/conv_op_xpu.cc
+2
-6
paddle/fluid/platform/device/xpu/xpu2_op_list.h
paddle/fluid/platform/device/xpu/xpu2_op_list.h
+2
-4
python/paddle/fluid/tests/unittests/xpu/test_depthwise_conv2d_op_xpu.py
...fluid/tests/unittests/xpu/test_depthwise_conv2d_op_xpu.py
+226
-0
未找到文件。
paddle/fluid/operators/conv_op_xpu.cc
浏览文件 @
6be3ee26
...
@@ -173,12 +173,8 @@ REGISTER_OP_XPU_KERNEL(
...
@@ -173,12 +173,8 @@ REGISTER_OP_XPU_KERNEL(
paddle
::
platform
::
float16
>
);
paddle
::
platform
::
float16
>
);
REGISTER_OP_XPU_KERNEL
(
REGISTER_OP_XPU_KERNEL
(
depthwise_conv2d
,
depthwise_conv2d
,
ops
::
GemmConvXPUKernel
<
paddle
::
platform
::
XPUDeviceContext
,
float
>
,
ops
::
GemmConvXPUKernel
<
paddle
::
platform
::
XPUDeviceContext
,
float
>
);
ops
::
GemmConvXPUKernel
<
paddle
::
platform
::
XPUDeviceContext
,
paddle
::
platform
::
float16
>
);
REGISTER_OP_XPU_KERNEL
(
REGISTER_OP_XPU_KERNEL
(
depthwise_conv2d_grad
,
depthwise_conv2d_grad
,
ops
::
GemmConvGradXPUKernel
<
paddle
::
platform
::
XPUDeviceContext
,
float
>
,
ops
::
GemmConvGradXPUKernel
<
paddle
::
platform
::
XPUDeviceContext
,
float
>
);
ops
::
GemmConvGradXPUKernel
<
paddle
::
platform
::
XPUDeviceContext
,
paddle
::
platform
::
float16
>
);
#endif
#endif
paddle/fluid/platform/device/xpu/xpu2_op_list.h
浏览文件 @
6be3ee26
...
@@ -79,11 +79,9 @@ XPUOpMap& get_kl2_ops() {
...
@@ -79,11 +79,9 @@ XPUOpMap& get_kl2_ops() {
{
"conv2d_transpose"
,
{
"conv2d_transpose"
,
XPUKernelSet
({
pOpKernelType
(
vartype
::
FP32
,
XPUPlace
())})},
XPUKernelSet
({
pOpKernelType
(
vartype
::
FP32
,
XPUPlace
())})},
{
"depthwise_conv2d_grad"
,
{
"depthwise_conv2d_grad"
,
XPUKernelSet
({
pOpKernelType
(
vartype
::
FP32
,
XPUPlace
()),
XPUKernelSet
({
pOpKernelType
(
vartype
::
FP32
,
XPUPlace
())})},
pOpKernelType
(
vartype
::
FP16
,
XPUPlace
())})},
{
"depthwise_conv2d"
,
{
"depthwise_conv2d"
,
XPUKernelSet
({
pOpKernelType
(
vartype
::
FP32
,
XPUPlace
()),
XPUKernelSet
({
pOpKernelType
(
vartype
::
FP32
,
XPUPlace
())})},
pOpKernelType
(
vartype
::
FP16
,
XPUPlace
())})},
{
"dropout_grad"
,
{
"dropout_grad"
,
XPUKernelSet
({
pOpKernelType
(
vartype
::
FP32
,
XPUPlace
()),
XPUKernelSet
({
pOpKernelType
(
vartype
::
FP32
,
XPUPlace
()),
pOpKernelType
(
vartype
::
FP16
,
XPUPlace
())})},
pOpKernelType
(
vartype
::
FP16
,
XPUPlace
())})},
...
...
python/paddle/fluid/tests/unittests/xpu/test_depthwise_conv2d_op_xpu.py
0 → 100644
浏览文件 @
6be3ee26
# Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
from
__future__
import
print_function
import
sys
sys
.
path
.
append
(
".."
)
import
unittest
import
numpy
as
np
import
paddle
paddle
.
enable_static
()
import
paddle.fluid.core
as
core
import
paddle.fluid
as
fluid
from
op_test_xpu
import
XPUOpTest
from
paddle.fluid
import
Program
,
program_guard
from
test_conv2d_op_xpu
import
XPUTestConv2DOp
,
XPUTestConv2DOp_v2
from
xpu.get_test_cover_info
import
create_test_class
,
get_xpu_op_support_types
,
XPUOpTestWrapper
class
XPUTestDepthwiseConv2DOp
(
XPUOpTestWrapper
):
def
__init__
(
self
):
self
.
op_name
=
'depthwise_conv2d'
self
.
use_dynamic_create_class
=
False
class
TestDepthwiseConv
(
XPUTestConv2DOp
.
TestConv2DOp
):
def
init_test_case
(
self
):
self
.
use_cuda
=
False
self
.
pad
=
[
1
,
1
]
self
.
stride
=
[
2
,
2
]
self
.
input_size
=
[
2
,
12
,
5
,
5
]
# NCHW
self
.
groups
=
12
assert
np
.
mod
(
self
.
input_size
[
1
],
self
.
groups
)
==
0
f_c
=
self
.
input_size
[
1
]
//
self
.
groups
self
.
filter_size
=
[
12
,
f_c
,
3
,
3
]
self
.
op_type
=
"depthwise_conv2d"
class
TestDepthwiseConv2
(
XPUTestConv2DOp
.
TestConv2DOp
):
def
init_test_case
(
self
):
self
.
use_cuda
=
False
self
.
pad
=
[
1
,
1
]
self
.
stride
=
[
1
,
1
]
self
.
input_size
=
[
2
,
12
,
5
,
5
]
# NCHW
self
.
groups
=
12
assert
np
.
mod
(
self
.
input_size
[
1
],
self
.
groups
)
==
0
f_c
=
self
.
input_size
[
1
]
//
self
.
groups
self
.
filter_size
=
[
12
,
f_c
,
3
,
3
]
self
.
op_type
=
"depthwise_conv2d"
class
TestDepthwiseConv3
(
XPUTestConv2DOp
.
TestConv2DOp
):
def
init_test_case
(
self
):
self
.
use_cuda
=
False
self
.
pad
=
[
1
,
1
]
self
.
stride
=
[
1
,
1
]
self
.
input_size
=
[
2
,
24
,
5
,
5
]
# NCHW
self
.
groups
=
24
assert
np
.
mod
(
self
.
input_size
[
1
],
self
.
groups
)
==
0
f_c
=
self
.
input_size
[
1
]
//
self
.
groups
self
.
filter_size
=
[
24
,
f_c
,
3
,
3
]
self
.
op_type
=
"depthwise_conv2d"
class
TestDepthwiseConvWithDilation
(
XPUTestConv2DOp
.
TestConv2DOp
):
def
init_test_case
(
self
):
self
.
use_cuda
=
False
self
.
pad
=
[
1
,
1
]
self
.
stride
=
[
2
,
2
]
self
.
input_size
=
[
2
,
24
,
5
,
5
]
# NCHW
self
.
groups
=
24
self
.
dilations
=
[
2
,
2
]
assert
np
.
mod
(
self
.
input_size
[
1
],
self
.
groups
)
==
0
f_c
=
self
.
input_size
[
1
]
//
self
.
groups
self
.
filter_size
=
[
24
,
f_c
,
3
,
3
]
self
.
op_type
=
"depthwise_conv2d"
class
TestDepthwiseConvWithDilation2
(
XPUTestConv2DOp
.
TestConv2DOp
):
def
init_test_case
(
self
):
self
.
use_cuda
=
False
self
.
pad
=
[
1
,
1
]
self
.
stride
=
[
1
,
1
]
self
.
input_size
=
[
2
,
24
,
5
,
5
]
# NCHW
self
.
groups
=
24
self
.
dilations
=
[
2
,
2
]
assert
np
.
mod
(
self
.
input_size
[
1
],
self
.
groups
)
==
0
f_c
=
self
.
input_size
[
1
]
//
self
.
groups
self
.
filter_size
=
[
24
,
f_c
,
3
,
3
]
self
.
op_type
=
"depthwise_conv2d"
class
XPUTestDepthwiseConv2DOp_v2
(
XPUOpTestWrapper
):
def
__init__
(
self
):
self
.
op_name
=
'depthwise_conv2d'
self
.
use_dynamic_create_class
=
False
class
TestDepthwiseConv_AsyPadding
(
XPUTestConv2DOp_v2
.
TestConv2DOp_v2
):
def
init_test_case
(
self
):
self
.
use_cuda
=
False
self
.
stride
=
[
2
,
2
]
self
.
input_size
=
[
2
,
12
,
5
,
5
]
# NCHW
self
.
groups
=
12
assert
np
.
mod
(
self
.
input_size
[
1
],
self
.
groups
)
==
0
f_c
=
self
.
input_size
[
1
]
//
self
.
groups
self
.
filter_size
=
[
12
,
f_c
,
3
,
3
]
self
.
op_type
=
"depthwise_conv2d"
def
init_paddings
(
self
):
self
.
pad
=
[
1
,
1
,
0
,
1
]
self
.
padding_algorithm
=
"EXPLICIT"
class
TestDepthwiseConv2_AsyPadding
(
XPUTestConv2DOp_v2
.
TestConv2DOp_v2
):
def
init_test_case
(
self
):
self
.
use_cuda
=
False
self
.
stride
=
[
1
,
1
]
self
.
input_size
=
[
2
,
12
,
5
,
5
]
# NCHW
self
.
groups
=
12
assert
np
.
mod
(
self
.
input_size
[
1
],
self
.
groups
)
==
0
f_c
=
self
.
input_size
[
1
]
//
self
.
groups
self
.
filter_size
=
[
12
,
f_c
,
3
,
3
]
self
.
op_type
=
"depthwise_conv2d"
def
init_paddings
(
self
):
self
.
pad
=
[
0
,
1
,
0
,
2
]
self
.
padding_algorithm
=
"EXPLICIT"
class
TestDepthwiseConv3_AsyPadding
(
XPUTestConv2DOp_v2
.
TestConv2DOp_v2
):
def
init_test_case
(
self
):
self
.
use_cuda
=
False
self
.
stride
=
[
1
,
1
]
self
.
input_size
=
[
2
,
24
,
5
,
5
]
# NCHW
self
.
groups
=
24
assert
np
.
mod
(
self
.
input_size
[
1
],
self
.
groups
)
==
0
f_c
=
self
.
input_size
[
1
]
//
self
.
groups
self
.
filter_size
=
[
24
,
f_c
,
3
,
3
]
self
.
op_type
=
"depthwise_conv2d"
def
init_paddings
(
self
):
self
.
pad
=
[
1
,
1
,
0
,
0
]
self
.
padding_algorithm
=
"EXPLICIT"
class
TestDepthwiseConvWithDilation_AsyPadding
(
XPUTestConv2DOp_v2
.
TestConv2DOp_v2
):
def
init_test_case
(
self
):
self
.
use_cuda
=
False
self
.
pad
=
[
1
,
1
]
self
.
stride
=
[
2
,
2
]
self
.
input_size
=
[
2
,
24
,
5
,
5
]
# NCHW
self
.
groups
=
24
self
.
dilations
=
[
2
,
2
]
assert
np
.
mod
(
self
.
input_size
[
1
],
self
.
groups
)
==
0
f_c
=
self
.
input_size
[
1
]
//
self
.
groups
self
.
filter_size
=
[
24
,
f_c
,
3
,
3
]
self
.
op_type
=
"depthwise_conv2d"
def
init_paddings
(
self
):
self
.
pad
=
[
1
,
1
,
2
,
1
]
self
.
padding_algorithm
=
"EXPLICIT"
class
TestDepthwiseConvWithDilation2_AsyPadding
(
XPUTestConv2DOp_v2
.
TestConv2DOp_v2
):
def
init_test_case
(
self
):
self
.
use_cuda
=
True
self
.
pad
=
[
1
,
1
]
self
.
stride
=
[
1
,
1
]
self
.
input_size
=
[
2
,
24
,
5
,
5
]
# NCHW
self
.
groups
=
24
self
.
dilations
=
[
2
,
2
]
assert
np
.
mod
(
self
.
input_size
[
1
],
self
.
groups
)
==
0
f_c
=
self
.
input_size
[
1
]
//
self
.
groups
self
.
filter_size
=
[
24
,
f_c
,
3
,
3
]
self
.
op_type
=
"depthwise_conv2d"
def
init_paddings
(
self
):
self
.
pad
=
[
0
,
1
,
1
,
0
]
self
.
padding_algorithm
=
"EXPLICIT"
support_types
=
get_xpu_op_support_types
(
'depthwise_conv2d'
)
for
stype
in
support_types
:
create_test_class
(
globals
(),
XPUTestDepthwiseConv2DOp
,
stype
)
create_test_class
(
globals
(),
XPUTestDepthwiseConv2DOp_v2
,
stype
)
#### depthwise conv2d
# create_test_padding_SAME_class(TestDepthwiseConv_AsyPadding)
# create_test_padding_SAME_class(TestDepthwiseConvWithDilation_AsyPadding)
# create_test_padding_SAME_class(TestDepthwiseConvandFuse_AsyPadding)
# create_test_padding_SAME_class(TestDepthwiseConvWithDilationandFuse_AsyPadding)
# create_test_padding_VALID_class(TestDepthwiseConv_AsyPadding)
# create_test_padding_VALID_class(TestDepthwiseConvWithDilation_AsyPadding)
# create_test_padding_VALID_class(TestDepthwiseConvandFuse_AsyPadding)
# create_test_padding_VALID_class(TestDepthwiseConvWithDilationandFuse_AsyPadding)
#### channel last
# create_test_channel_last_class(TestDepthwiseConv_AsyPadding)
# create_test_channel_last_class(TestDepthwiseConvWithDilation2_AsyPadding)
# create_test_channel_last_class(TestDepthwiseConvandFuse_AsyPadding)
# create_test_channel_last_class(TestDepthwiseConvWithDilationandFuse_AsyPadding)
if
__name__
==
'__main__'
:
unittest
.
main
()
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