- 05 1月, 2023 1 次提交
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由 Yaochenger 提交于
* [libcpu][riscv]移除ch32中的冗余文件,使用common下的文件 * 修正cpuport.h宏定义 * 规范宏定义格式
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- 03 1月, 2023 1 次提交
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由 嵌入式浪子 提交于
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- 29 12月, 2022 1 次提交
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由 嵌入式浪子 提交于
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- 28 12月, 2022 1 次提交
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由 Yaochenger 提交于
【1】添加ch32v208-r0 bsp 【2】合并libcpu/riscv 下ch系列mcu的port文件
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- 26 12月, 2022 2 次提交
- 22 12月, 2022 1 次提交
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由 linshire 提交于
* 对接了rt_hw_context_switch_interruptC(rt_ubase_t from, rt_ubase_t to, rt_thread_t from_thread, rt_thread_t to_thread)接口 * Update libcpu/risc-v/ch32v1/cpuport.c Co-authored-by:
Man, Jianting (Meco) <920369182@qq.com>
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- 20 12月, 2022 1 次提交
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由 Shell 提交于
* [smart/aarch64] sync aarch64
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- 16 12月, 2022 1 次提交
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由 guo 提交于
* [dfs] sync cromfs * [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration * [format] fix some format issue.
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- 14 12月, 2022 1 次提交
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由 guozhanxin 提交于
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- 12 12月, 2022 1 次提交
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由 mysterywolf 提交于
* [rtdef] rename RT_WEAK attribute as rt_weak * [rtdef] rename RT_USED attribute as rt_used * [rtdef] rename RT_SECTION attribute as rt_section * [rtdef] rename ALIGN attribute as rt_align * [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support
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- 10 12月, 2022 2 次提交
- 09 12月, 2022 1 次提交
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由 Yaochenger 提交于
* add core-v-mcu bsp * 规范bsp格式 添加readme * 修改readme Co-authored-by: 1516081466@qq.com <ws051000>
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- 03 12月, 2022 1 次提交
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由 guo 提交于
* Synchronize the code of the rt mart branch to the master branch. * TTY device * Add lwP code from rt-smart * Add vnode in DFS, but DFS will be re-write for rt-smart * There are three libcpu for rt-smart: * arm/cortex-a, arm/aarch64 * riscv64 Co-authored-by: NRbb666 <zhangbingru@rt-thread.com> Co-authored-by: Nzhkag <zhkag@foxmail.com>
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- 25 11月, 2022 1 次提交
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由 xiaoguang_ma 提交于
If the application defines dozens of global variables, the speed of clearing the bss segment will be slower. Because icache can be enabled before the mmu enabled. Therefore, in order to speed up the process of clearing the BSS segment, enable icache needs to be put ahead.
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- 20 10月, 2022 1 次提交
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由 Yunjie Gu 提交于
[bsp][c28x] add support to not disable global interrupt in context-switch to enable zero-latency isr for critical interrupts.
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- 11 10月, 2022 2 次提交
- 22 9月, 2022 1 次提交
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由 taiexinleni 提交于
* bsp beaglebone: add IAR template files and fix it's build error ATTENTION: project.* was generated by scons, so I add it to gitignore. rtconfig.py *FLAGS located in "PLATFORM == 'iccarm'" are unverified and maybe wrong. (我只是从STM32里面抄来,然后根据自己的理解改了一下,并没有验证这些参数的正确性, 我也不知道怎么用命令行调用这些参数来编译) * bsp beaglebone: add beaglebone_ram.icf ROM address from uboot_cmd.txt am335x_DDR.icf use 0x82000000, different to uboot_cmd.txt & gcc beaglebone_ram.lds, the difference will easy cause later developer got below error: => go 0x80200000 ## Starting application at 0x80200000 ... undefined instruction pc : [<8200956c>] lr : [<8ff62497>] reloc pc : [<728a956c>] lr : [<80802497>] sp : 8df37358 ip : 00000000 fp : 00000002 r10: 8df4d448 r9 : 8df3feb8 r8 : 8ffd30f8 r7 : 8ff78089 r6 : 00000002 r5 : 80200000 r4 : 8df4d44c r3 : 80200000 r2 : 8df4d44c r1 : 8df4d44c r0 : 00000001 Flags: nzCv IRQs off FIQs on Mode SVC_32 Code: 5dbffcdd bb9bdf7f abf85423 eff1f77f (7ed7daaf) Resetting CPU ... resetting ... * libcpu am335x: context_iar.S rt_hw_context_switch: add thumb mode support IAR new project defualt Processor mode is Thumb, this will cause user easy occur the following error: ... msh />Execption: r00:0x8800aaa8 r01:0x802080c5 r02:0x00000000 r03:0x88009b4c r04:0x00001000 r05:0x00000000 r06:0x00001403 r07:0x00100000 r08:0x00000000 r09:0x00000000 r10:0x0000000a fp :0x0000000a ip :0x65687374 sp :0x00006c6c lr :0x0000008a pc :0x88008be0 cpsr:0x880001bc software interrupt shutdown... (0) assertion failed at function:rt_hw_cpu_shutdown, line number:160 * bsp beaglebone: change IAR template.ewp code use Arm mode Arm mode bin size will bigger than Thumb mode * libcpu am335x: IAR: use rt_hw_cpu_dcache_enable instead of rt_cpu_dcache_enable Reviewer mysterywolf say: 麻烦把rt_cpu_icache_enable 和 rt_cpu_dcache_enable, 统一改成 rt_hw_cpu_icache_enable 和 rt_hw_cpu_dcache_enable rt_hw_cpu_icache_enable 和 rt_hw_cpu_dcache_enable 是其他bsp也是这么命名的 这是个命名统一的函数
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- 16 9月, 2022 1 次提交
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由 mysterywolf 提交于
* bsp beaglebone: rerun menuconfg * bsp beaglebone: add uart0 support * bsp beaglebone: use uart0 as console * bsp beaglebone: add heap init fix rt_application_init() error: (m != RT_NULL) assertion failed at function:rt_smem_alloc, line number:288 * bsp beaglebone: add mmu & interrupt init must init mmu, otherwise no interrupt is generated, cause scheduler can't work. I don't know why need mmu, just seen: bsp/rockchip/rk3568/driver/board.c * libcpu am335x: reset interrupt controller before init vector I think reset before init is more better AM335X_StarterWare_02_00_01_01\system_config\armv7a\am335x\interrupt.c IntAINTCInit() * bsp beaglebone: full gpio driver support * bsp beaglebone: add tftpboot way to uboot_cmd.txt * bsp beaglebone: optimize am33xx_gpio_hdr, check irqstatus is the last one Co-authored-by:
YangZhongQing <vipox@qq.com>
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- 06 9月, 2022 1 次提交
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由 Fan Yang 提交于
* Add CANFD support and correct typos - Added CANFD required fields to can.h - Fixed typos in can.h and can.c - Corrected all the projects affected by the typo - Fixed wrong line-ending in some affected can driver files Signed-off-by: NFan YANG <fan.yang@hpmicro.com> * update * bsp: support boards from hpmicro - Supported HPM6750EVKMINI - Supported HPM6750EVK Signed-off-by: NFan YANG <fan.yang@hpmicro.com> Signed-off-by: NFan YANG <fan.yang@hpmicro.com> Co-authored-by:
Meco Man <920369182@qq.com>
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- 05 9月, 2022 1 次提交
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由 Zhang WenBin 提交于
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- 30 8月, 2022 1 次提交
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由 wannomore 提交于
解决 tms320f28379d bsp 启动的问题。主要改动如下。 修正context.s中汇编代码错误。在旧版的代码中,操作数为32位而汇编命令却使用了针对16位数据的命令MOV,导致程序在某些情况无法正常启动线程。 由于C28x的平台下,SP只支持16bit寻址,所以用于线程空间存放的heap以及ebss段都需要放在低16位的空间,针对这个问题修改了CMD文件。此外还增加基于CMD文件基于RAM的支持,方便调试。 新增rtdef.h中RT_SECTION,RT_USED,ALIGN和RT_WEAK的定义。旧版bsp中这些定义为空,导致INIT_EXPORT注册的函数失效。 修改程序启动代码,在程序入口直接调用原生启动代码 以上改动在LAUNCHXL-F28379D 通过了测试。
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- 23 8月, 2022 2 次提交
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由 liyangyang 提交于
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由 liyangyang 提交于
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- 21 8月, 2022 1 次提交
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由 Yunjie Gu 提交于
* compile_ok Issues fixed: (1) update .config: select FINSH_USING_SYMTAB (2) add rt_size_t in rtconfig_project.h (3) fix finsh problems of using sym table (4) update .project to include ipc source codes. Todo list: (1) automate the build source selection of ccs and reconcile it with scons * change compiler * msh can run now the key step is to swap the order of rt_interrupt_nest -- and RT_OBJECT_HOOK_CALL(rt_interrupt_leave_hook,()) in irq.c. This is an improvised solution and an issue has been raised. * Update 2837x_FLASH_lnk_cpu1.cmd The original one is also fine. Just to make it more rigorous since FSymTab is in data section. * update readme.md Complier selection and maintainer update. Co-authored-by:
YuQi <qiyu_sjtu@163.com>
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- 14 8月, 2022 1 次提交
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由 Martin 提交于
clean_invalid must be set at the same time, and call clean_invalid, or call clean/invalid
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- 11 8月, 2022 1 次提交
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由 tfx2001 提交于
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- 03 8月, 2022 1 次提交
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由 dongly 提交于
* Fix some compilation warning * 补充修正一些数据类型的使用错误 Co-authored-by:
Meco Man <920369182@qq.com>
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- 30 7月, 2022 1 次提交
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由 emuzit 提交于
WCH CH569W-R0-1v0 evt board bsp port, first version dev/test under Ubuntu 20.04 toolchain from MounRiver_Studio_Community_Linux_x64_V120 tested drivers : SysTick, gpio, gpio interrupt, uart1 (RX interrupt, TX polling) libcpu/risc-v/SConscript : group includes rtconfig.CPU only if folder exists libcpu/risc-v/common/cpuport.c/rt_hw_context_switch_interrupt() : make it RT_WEAK for customization
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- 27 7月, 2022 1 次提交
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由 Aligagago 提交于
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- 10 7月, 2022 1 次提交
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由 rewine 提交于
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- 29 6月, 2022 1 次提交
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由 还_没_想_好 提交于
* [cpu][cm33] Support running in secure mode * [bsp][lpc55sxx] Using the cortex cm33
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- 22 6月, 2022 1 次提交
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由 mysterywolf 提交于
* [rtc] use gmtime_r to replace gmtime
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- 15 6月, 2022 1 次提交
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由 JonasWen 提交于
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- 09 6月, 2022 2 次提交
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由 mysterywolf 提交于
因为不确定后续IAR是否会像Keil一样内含有不同的编译工具链 此外,将判断条件改为列表方式,这样更方便后续增加其他可能的IAR编译链
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由 mysterywolf 提交于
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- 13 5月, 2022 1 次提交
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由 FrankTan 提交于
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- 24 4月, 2022 1 次提交
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由 还_没_想_好 提交于
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