提交 d74c785d 编写于 作者: W Wayne Lin

[nuvoton] Update porting drivers and configurations.

上级 9b44e57a
......@@ -72,20 +72,32 @@ static nu_i2c_bus_t nu_i2c1 =
static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
struct rt_i2c_msg msgs[],
rt_uint32_t num);
static rt_err_t nu_i2c_bus_control(struct rt_i2c_bus_device *bus,
rt_uint32_t u32Cmd,
rt_uint32_t u32Value);
static const struct rt_i2c_bus_device_ops nu_i2c_ops =
{
.master_xfer = nu_i2c_mst_xfer,
.slave_xfer = NULL,
.i2c_bus_control = NULL,
.i2c_bus_control = nu_i2c_bus_control
};
static rt_err_t nu_i2c_configure(nu_i2c_bus_t *bus)
static rt_err_t nu_i2c_bus_control(struct rt_i2c_bus_device *bus, rt_uint32_t u32Cmd, rt_uint32_t u32Value)
{
nu_i2c_bus_t *nu_i2c;
RT_ASSERT(bus != RT_NULL);
nu_i2c = (nu_i2c_bus_t *) bus;
bus->parent.ops = &nu_i2c_ops;
I2C_Open(bus->I2C, 100000);
switch (RT_I2C_DEV_CTRL_CLK)
{
case RT_I2C_DEV_CTRL_CLK:
I2C_SetBusClockFreq(nu_i2c->I2C, u32Value);
break;
default:
return -RT_EIO;
}
return RT_EOK;
}
......@@ -290,24 +302,28 @@ static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
int rt_hw_i2c_init(void)
{
rt_err_t ret = RT_ERROR;
#if defined(BSP_USING_I2C0)
SYS_UnlockReg();
SYS_ResetModule(I2C0_RST);
SYS_LockReg();
nu_i2c_configure(&nu_i2c0);
#if defined(BSP_USING_I2C0)
I2C_Close(nu_i2c0.I2C);
I2C_Open(nu_i2c0.I2C, 100000);
nu_i2c0.parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c0.parent, nu_i2c0.device_name);
RT_ASSERT(RT_EOK == ret);
#endif /* BSP_USING_I2C0 */
#if defined(BSP_USING_I2C1)
SYS_UnlockReg();
SYS_ResetModule(I2C1_RST);
SYS_LockReg();
nu_i2c_configure(&nu_i2c1);
I2C_Close(nu_i2c1.I2C);
I2C_Open(nu_i2c1.I2C, 100000);
nu_i2c1.parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c1.parent, nu_i2c1.device_name);
RT_ASSERT(RT_EOK == ret);
#endif /* BSP_USING_I2C1 */
SYS_LockReg();
return ret;
}
......
......@@ -1144,6 +1144,9 @@ void USBH_IRQHandler(void)
TD_T *td, *td_prev, *td_next;
uint32_t int_sts;
/* enter interrupt */
rt_interrupt_enter();
int_sts = _ohci->HcInterruptStatus;
//USB_debug("ohci int_sts = 0x%x\n", int_sts);
......@@ -1199,6 +1202,10 @@ void USBH_IRQHandler(void)
}
_ohci->HcInterruptStatus = int_sts;
/* leave interrupt */
rt_interrupt_leave();
}
#ifdef ENABLE_DEBUG_MSG
......
......@@ -81,20 +81,32 @@ static nu_i2c_bus_t nu_i2c2 =
static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
struct rt_i2c_msg msgs[],
rt_uint32_t num);
static rt_err_t nu_i2c_bus_control(struct rt_i2c_bus_device *bus,
rt_uint32_t u32Cmd,
rt_uint32_t u32Value);
static const struct rt_i2c_bus_device_ops nu_i2c_ops =
{
.master_xfer = nu_i2c_mst_xfer,
.slave_xfer = NULL,
.i2c_bus_control = NULL,
.i2c_bus_control = nu_i2c_bus_control
};
static rt_err_t nu_i2c_configure(nu_i2c_bus_t *bus)
static rt_err_t nu_i2c_bus_control(struct rt_i2c_bus_device *bus, rt_uint32_t u32Cmd, rt_uint32_t u32Value)
{
nu_i2c_bus_t *nu_i2c;
RT_ASSERT(bus != RT_NULL);
nu_i2c = (nu_i2c_bus_t *) bus;
bus->parent.ops = &nu_i2c_ops;
I2C_Open(bus->I2C, 100000);
switch (RT_I2C_DEV_CTRL_CLK)
{
case RT_I2C_DEV_CTRL_CLK:
I2C_SetBusClockFreq(nu_i2c->I2C, u32Value);
break;
default:
return -RT_EIO;
}
return RT_EOK;
}
......@@ -354,33 +366,38 @@ static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
int rt_hw_i2c_init(void)
{
rt_err_t ret = RT_ERROR;
#if defined(BSP_USING_I2C0)
SYS_UnlockReg();
SYS_ResetModule(I2C0_RST);
SYS_LockReg();
nu_i2c_configure(&nu_i2c0);
#if defined(BSP_USING_I2C0)
I2C_Close(nu_i2c0.I2C);
I2C_Open(nu_i2c0.I2C, 100000);
nu_i2c0.parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c0.parent, nu_i2c0.device_name);
RT_ASSERT(RT_EOK == ret);
#endif /* BSP_USING_I2C0 */
#if defined(BSP_USING_I2C1)
SYS_UnlockReg();
SYS_ResetModule(I2C1_RST);
SYS_LockReg();
nu_i2c_configure(&nu_i2c1);
I2C_Close(nu_i2c1.I2C);
I2C_Open(nu_i2c1.I2C, 100000);
nu_i2c1.parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c1.parent, nu_i2c1.device_name);
RT_ASSERT(RT_EOK == ret);
#endif /* BSP_USING_I2C1 */
#if defined(BSP_USING_I2C2)
SYS_UnlockReg();
SYS_ResetModule(I2C2_RST);
SYS_LockReg();
nu_i2c_configure(&nu_i2c2);
I2C_Close(nu_i2c2.I2C);
I2C_Open(nu_i2c2.I2C, 100000);
nu_i2c2.parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c2.parent, nu_i2c2.device_name);
RT_ASSERT(RT_EOK == ret);
#endif /* BSP_USING_I2C2 */
SYS_LockReg();
return ret;
}
......
......@@ -1113,6 +1113,9 @@ void EHCI_IRQHandler(void)
{
uint32_t intsts;
/* enter interrupt */
rt_interrupt_enter();
intsts = _ehci->USTSR;
_ehci->USTSR = intsts; /* clear interrupt status */
......@@ -1136,6 +1139,9 @@ void EHCI_IRQHandler(void)
{
iaad_remove_qh();
}
/* leave interrupt */
rt_interrupt_leave();
}
static UDEV_T *ehci_find_device_by_port(int port)
......
......@@ -1154,6 +1154,9 @@ void OHCI_IRQHandler(void)
TD_T *td, *td_prev, *td_next;
uint32_t int_sts;
/* enter interrupt */
rt_interrupt_enter();
int_sts = _ohci->HcInterruptStatus;
//USB_debug("ohci int_sts = 0x%x\n", int_sts);
......@@ -1209,6 +1212,9 @@ void OHCI_IRQHandler(void)
}
_ohci->HcInterruptStatus = int_sts;
/* leave interrupt */
rt_interrupt_leave();
}
#ifdef ENABLE_DEBUG_MSG
......
......@@ -81,20 +81,32 @@ static nu_i2c_bus_t nu_i2c2 =
static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
struct rt_i2c_msg msgs[],
rt_uint32_t num);
static rt_err_t nu_i2c_bus_control(struct rt_i2c_bus_device *bus,
rt_uint32_t u32Cmd,
rt_uint32_t u32Value);
static const struct rt_i2c_bus_device_ops nu_i2c_ops =
{
.master_xfer = nu_i2c_mst_xfer,
.slave_xfer = NULL,
.i2c_bus_control = NULL,
.i2c_bus_control = nu_i2c_bus_control
};
static rt_err_t nu_i2c_configure(nu_i2c_bus_t *bus)
static rt_err_t nu_i2c_bus_control(struct rt_i2c_bus_device *bus, rt_uint32_t u32Cmd, rt_uint32_t u32Value)
{
nu_i2c_bus_t *nu_i2c;
RT_ASSERT(bus != RT_NULL);
nu_i2c = (nu_i2c_bus_t *) bus;
bus->parent.ops = &nu_i2c_ops;
I2C_Open(bus->I2C, 100000);
switch (RT_I2C_DEV_CTRL_CLK)
{
case RT_I2C_DEV_CTRL_CLK:
I2C_SetBusClockFreq(nu_i2c->I2C, u32Value);
break;
default:
return -RT_EIO;
}
return RT_EOK;
}
......@@ -354,36 +366,38 @@ static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
int rt_hw_i2c_init(void)
{
rt_err_t ret = RT_ERROR;
#if defined(BSP_USING_I2C0)
SYS_UnlockReg();
/* Enable I2C0 clock */
SYS_ResetModule(I2C0_RST);
SYS_LockReg();
nu_i2c_configure(&nu_i2c0);
#if defined(BSP_USING_I2C0)
I2C_Close(nu_i2c0.I2C);
I2C_Open(nu_i2c0.I2C, 100000);
nu_i2c0.parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c0.parent, nu_i2c0.device_name);
RT_ASSERT(RT_EOK == ret);
#endif /* BSP_USING_I2C0 */
#if defined(BSP_USING_I2C1)
SYS_UnlockReg();
/* Enable I2C1 clock */
SYS_ResetModule(I2C1_RST);
SYS_LockReg();
nu_i2c_configure(&nu_i2c1);
I2C_Close(nu_i2c1.I2C);
I2C_Open(nu_i2c1.I2C, 100000);
nu_i2c1.parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c1.parent, nu_i2c1.device_name);
RT_ASSERT(RT_EOK == ret);
#endif /* BSP_USING_I2C1 */
#if defined(BSP_USING_I2C2)
SYS_UnlockReg();
/* Enable I2C2 clock */
SYS_ResetModule(I2C2_RST);
SYS_LockReg();
nu_i2c_configure(&nu_i2c2);
I2C_Close(nu_i2c2.I2C);
I2C_Open(nu_i2c2.I2C, 100000);
nu_i2c2.parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c2.parent, nu_i2c2.device_name);
RT_ASSERT(RT_EOK == ret);
#endif /* BSP_USING_I2C2 */
SYS_LockReg();
return ret;
}
......
......@@ -297,6 +297,8 @@ static int ehci_init(void)
_ehci->UCFGR = 0x1; /* enable port routing to EHCI */
_ehci->UIENR = HSUSBH_UIENR_USBIEN_Msk | HSUSBH_UIENR_UERRIEN_Msk | HSUSBH_UIENR_HSERREN_Msk | HSUSBH_UIENR_IAAEN_Msk;
_ehci->UASSTR = 0xfff;
usbh_delay_ms(1); /* delay 1 ms */
_ehci->UPSCR[0] = HSUSBH_UPSCR_PP_Msk; /* enable port 1 port power */
......
......@@ -50,7 +50,7 @@ static uint32_t _MemoryPoolBase, _MemoryPoolEnd;
void USB_InitializeMemoryPool()
{
_MemoryPoolBase = (UINT32)&_USBMemoryPool[0] | NON_CACHE_MASK;
_MemoryPoolBase = (uint32_t)&_USBMemoryPool[0] | NON_CACHE_MASK;
_MemoryPoolEnd = _MemoryPoolBase + USB_MEMORY_POOL_SIZE;
_FreeMemorySize = _MemoryPoolEnd - _MemoryPoolBase;
_AllocatedMemorySize = 0;
......@@ -71,41 +71,30 @@ int USB_allocated_memory()
}
void *USB_malloc(INT wanted_size, INT boundary)
void *USB_malloc(int wanted_size, int boundary)
{
#if 0
void *paddr = rt_malloc_align(wanted_size, 32);
return (void *)((uint32_t)paddr | NON_CACHE_MASK);
#else
USB_MHDR_T *pPrimitivePos = _pCurrent;
USB_MHDR_T *pFound;
INT found_size = -1;
INT i, block_count;
INT wrap = 0;
int disable_ohci_irq, disable_ehci_irq;
int found_size = -1;
int i, block_count;
int wrap = 0;
void *pvBuf = NULL;
rt_base_t level;
if (IS_OHCI_IRQ_ENABLED())
disable_ohci_irq = 1;
else
disable_ohci_irq = 0;
if (IS_EHCI_IRQ_ENABLED())
disable_ehci_irq = 1;
else
disable_ehci_irq = 0;
if (disable_ohci_irq)
DISABLE_OHCI_IRQ();
if (disable_ehci_irq)
DISABLE_EHCI_IRQ();
level = rt_hw_interrupt_disable();
if (wanted_size >= _FreeMemorySize)
{
rt_kprintf("USB_malloc - want=%d, free=%d\n", wanted_size, _FreeMemorySize);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return NULL;
goto exit_USB_malloc;
}
if ((UINT32)_pCurrent >= _MemoryPoolEnd)
if ((uint32_t)_pCurrent >= _MemoryPoolEnd)
_pCurrent = (USB_MHDR_T *)_MemoryPoolBase; /* wrapped */
do
......@@ -114,26 +103,22 @@ void *USB_malloc(INT wanted_size, INT boundary)
{
if (_pCurrent->magic != USB_MEM_ALLOC_MAGIC)
{
rt_kprintf("\nUSB_malloc - incorrect magic number! C:%x F:%x, wanted:%d, Base:0x%x, End:0x%x\n", (UINT32)_pCurrent, _FreeMemorySize, wanted_size, (UINT32)_MemoryPoolBase, (UINT32)_MemoryPoolEnd);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return NULL;
rt_kprintf("\nUSB_malloc - incorrect magic number! C:%x F:%x, wanted:%d, Base:0x%x, End:0x%x\n", (uint32_t)_pCurrent, _FreeMemorySize, wanted_size, (uint32_t)_MemoryPoolBase, (uint32_t)_MemoryPoolEnd);
goto exit_USB_malloc;
}
if (_pCurrent->flag == 0x3)
_pCurrent = (USB_MHDR_T *)((UINT32)_pCurrent + _pCurrent->bcnt * USB_MEM_BLOCK_SIZE);
_pCurrent = (USB_MHDR_T *)((uint32_t)_pCurrent + _pCurrent->bcnt * USB_MEM_BLOCK_SIZE);
else
{
rt_kprintf("USB_malloc warning - not the first block!\n");
_pCurrent = (USB_MHDR_T *)((UINT32)_pCurrent + USB_MEM_BLOCK_SIZE);
_pCurrent = (USB_MHDR_T *)((uint32_t)_pCurrent + USB_MEM_BLOCK_SIZE);
}
if ((UINT32)_pCurrent > _MemoryPoolEnd)
if ((uint32_t)_pCurrent > _MemoryPoolEnd)
rt_kprintf("USB_malloc - behind limit!!\n");
if ((UINT32)_pCurrent == _MemoryPoolEnd)
if ((uint32_t)_pCurrent == _MemoryPoolEnd)
{
//rt_kprintf("USB_alloc - warp!!\n");
wrap = 1;
......@@ -161,8 +146,8 @@ void *USB_malloc(INT wanted_size, INT boundary)
* used as a header only.
*/
if ((boundary > BOUNDARY_WORD) &&
((((UINT32)_pCurrent) + USB_MEM_BLOCK_SIZE >= _MemoryPoolEnd) ||
((((UINT32)_pCurrent) + USB_MEM_BLOCK_SIZE) % boundary != 0)))
((((uint32_t)_pCurrent) + USB_MEM_BLOCK_SIZE >= _MemoryPoolEnd) ||
((((uint32_t)_pCurrent) + USB_MEM_BLOCK_SIZE) % boundary != 0)))
found_size = -1; /* violate boundary, reset the accumlator */
}
else /* not the leading block */
......@@ -181,34 +166,26 @@ void *USB_malloc(INT wanted_size, INT boundary)
for (i = 0; i < block_count; i++)
{
_pCurrent->flag = 1; /* allocate block */
_pCurrent = (USB_MHDR_T *)((UINT32)_pCurrent + USB_MEM_BLOCK_SIZE);
_pCurrent = (USB_MHDR_T *)((uint32_t)_pCurrent + USB_MEM_BLOCK_SIZE);
}
pFound->flag = 0x3;
if (boundary > BOUNDARY_WORD)
{
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
//rt_kprintf("- 0x%x, %d\n", (int)pFound, wanted_size);
return (void *)((UINT32)pFound + USB_MEM_BLOCK_SIZE);
pvBuf = (void *)((uint32_t)pFound + USB_MEM_BLOCK_SIZE);
goto exit_USB_malloc;
}
else
{
//USB_debug("USB_malloc(%d,%d):%x\tsize:%d, C:0x%x, %d\n", wanted_size, boundary, (UINT32)pFound + sizeof(USB_MHDR_T), block_count * USB_MEM_BLOCK_SIZE, _pCurrent, block_count);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
//rt_kprintf("- 0x%x, %d\n", (int)pFound, wanted_size);
return (void *)((UINT32)pFound + sizeof(USB_MHDR_T));
//USB_debug("USB_malloc(%d,%d):%x\tsize:%d, C:0x%x, %d\n", wanted_size, boundary, (uint32_t)pFound + sizeof(USB_MHDR_T), block_count * USB_MEM_BLOCK_SIZE, _pCurrent, block_count);
pvBuf = (void *)((uint32_t)pFound + sizeof(USB_MHDR_T));
goto exit_USB_malloc;
}
}
/* advance to the next block */
_pCurrent = (USB_MHDR_T *)((UINT32)_pCurrent + USB_MEM_BLOCK_SIZE);
if ((UINT32)_pCurrent >= _MemoryPoolEnd)
_pCurrent = (USB_MHDR_T *)((uint32_t)_pCurrent + USB_MEM_BLOCK_SIZE);
if ((uint32_t)_pCurrent >= _MemoryPoolEnd)
{
wrap = 1;
_pCurrent = (USB_MHDR_T *)_MemoryPoolBase; /* wrapped */
......@@ -219,49 +196,40 @@ void *USB_malloc(INT wanted_size, INT boundary)
while ((wrap == 0) || (_pCurrent < pPrimitivePos));
rt_kprintf("USB_malloc - No free memory!\n");
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return NULL;
}
exit_USB_malloc:
rt_hw_interrupt_enable(level);
return pvBuf;
#endif
}
void USB_free(void *alloc_addr)
{
#if 0
rt_free_align((void *)((uint32_t)alloc_addr & ~NON_CACHE_MASK));
#else
USB_MHDR_T *pMblk;
UINT32 addr = (UINT32)alloc_addr;
INT i, count;
int disable_ohci_irq, disable_ehci_irq;
if (IS_OHCI_IRQ_ENABLED())
disable_ohci_irq = 1;
else
disable_ohci_irq = 0;
if (IS_EHCI_IRQ_ENABLED())
disable_ehci_irq = 1;
else
disable_ehci_irq = 0;
uint32_t addr = (uint32_t)alloc_addr;
int i, count;
rt_base_t level;
//rt_kprintf("USB_free: 0x%x\n", (int)alloc_addr);
level = rt_hw_interrupt_disable();
if ((addr < _MemoryPoolBase) || (addr >= _MemoryPoolEnd))
{
if (addr)
{
rt_kprintf("[%s]Wrong!!\n", __func__);
//free(alloc_addr);
}
return;
goto Exit_USB_free;
}
if (disable_ohci_irq)
DISABLE_OHCI_IRQ();
if (disable_ehci_irq)
DISABLE_EHCI_IRQ();
//rt_kprintf("USB_free:%x\n", (INT)addr+USB_MEM_BLOCK_SIZE);
//rt_kprintf("USB_free:%x\n", (int32_t)addr+USB_MEM_BLOCK_SIZE);
/* get the leading block address */
if (addr % USB_MEM_BLOCK_SIZE == 0)
......@@ -271,32 +239,20 @@ void USB_free(void *alloc_addr)
if (addr % USB_MEM_BLOCK_SIZE != 0)
{
rt_kprintf("USB_free fatal error on address: %x!!\n", (UINT32)alloc_addr);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return;
rt_kprintf("USB_free fatal error on address: %x!!\n", (uint32_t)alloc_addr);
goto Exit_USB_free;
}
pMblk = (USB_MHDR_T *)addr;
if (pMblk->flag == 0)
{
rt_kprintf("USB_free(), warning - try to free a free block: %x\n", (UINT32)alloc_addr);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return;
rt_kprintf("USB_free(), warning - try to free a free block: %x\n", (uint32_t)alloc_addr);
goto Exit_USB_free;
}
if (pMblk->magic != USB_MEM_ALLOC_MAGIC)
{
rt_kprintf("USB_free(), warning - try to free an unknow block at address:%x.\n", addr);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return;
goto Exit_USB_free;
}
//_pCurrent = pMblk;
......@@ -307,15 +263,17 @@ void USB_free(void *alloc_addr)
for (i = 0; i < count; i++)
{
pMblk->flag = 0; /* release block */
pMblk = (USB_MHDR_T *)((UINT32)pMblk + USB_MEM_BLOCK_SIZE);
pMblk = (USB_MHDR_T *)((uint32_t)pMblk + USB_MEM_BLOCK_SIZE);
}
_FreeMemorySize += count * USB_MEM_BLOCK_SIZE;
_AllocatedMemorySize -= count * USB_MEM_BLOCK_SIZE;
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
Exit_USB_free:
rt_hw_interrupt_enable(level);
#endif
return;
}
......
......@@ -67,7 +67,7 @@ void usbh_core_init()
#ifdef ENABLE_OHCI
//sysInstallISR(IRQ_LEVEL_1, IRQ_OHCI, (PVOID)OHCI_IRQHandler);
rt_hw_interrupt_install(IRQ_OHCI, nu_ohci_isr, NULL, "ohci");
rt_hw_interrupt_set_priority(IRQ_OHCI, IRQ_LEVEL_1);
//rt_hw_interrupt_set_priority(IRQ_OHCI, IRQ_LEVEL_1);
ohci_driver.init();
ENABLE_OHCI_IRQ();
......@@ -76,7 +76,7 @@ void usbh_core_init()
#ifdef ENABLE_EHCI
//sysInstallISR(IRQ_LEVEL_1, IRQ_EHCI, (PVOID)EHCI_IRQHandler);
rt_hw_interrupt_install(IRQ_EHCI, nu_ehci_isr, NULL, "ehci");
rt_hw_interrupt_set_priority(IRQ_EHCI, IRQ_LEVEL_1);
//rt_hw_interrupt_set_priority(IRQ_EHCI, IRQ_LEVEL_1);
ehci_driver.init();
ENABLE_EHCI_IRQ();
......
......@@ -244,6 +244,11 @@ static rt_err_t nu_i2s_dai_setup(nu_i2s_t psNuI2s, struct rt_audio_configure *pc
i2sIoctl(I2S_SET_I2S_FORMAT, I2S_FORMAT_I2S, 0);
if (psNuI2s->AcodecOps->role == NU_ACODEC_ROLE_MASTER)
{
// Set as slave, source clock is XIN (12MHz)
i2sIoctl(I2S_SET_MODE, I2S_MODE_SLAVE, 0);
}
else
{
if (pconfig->samplerate % 11025)
{
......@@ -284,11 +289,6 @@ static rt_err_t nu_i2s_dai_setup(nu_i2s_t psNuI2s, struct rt_audio_configure *pc
// Set as master
i2sIoctl(I2S_SET_MODE, I2S_MODE_MASTER, 0);
}
else
{
// Set as slave, source clock is XIN (12MHz)
i2sIoctl(I2S_SET_MODE, I2S_MODE_SLAVE, 0);
}
LOG_I("Open I2S.");
......
......@@ -57,9 +57,9 @@ void rt_interrupt_dispatch(rt_uint32_t fiq_irq)
isr_func = irq_desc[_mISNR].handler;
param = irq_desc[_mISNR].param;
#ifdef RT_USING_INTERRUPT_INFO
irq_desc[_mISNR].counter ++;
#endif
#ifdef RT_USING_INTERRUPT_INFO
irq_desc[_mISNR].counter ++;
#endif
/* Turn to interrupt service routine */
isr_func(_mISNR, param);
......
......@@ -30,6 +30,21 @@
#define NU_MAX_USBH_HUB_PORT_DEV USB_HUB_PORT_NUM
#define NU_USBHOST_MUTEX_INIT() { \
s_sUSBHDev.lock = rt_mutex_create("usbhost_lock", RT_IPC_FLAG_PRIO); \
RT_ASSERT(s_sUSBHDev.lock != RT_NULL); \
}
#define NU_USBHOST_LOCK() { \
rt_err_t result = rt_mutex_take(s_sUSBHDev.lock, RT_WAITING_FOREVER); \
RT_ASSERT(result == RT_EOK); \
}
#define NU_USBHOST_UNLOCK() { \
rt_err_t result = rt_mutex_release(s_sUSBHDev.lock); \
RT_ASSERT(result == RT_EOK); \
}
/* Private typedef --------------------------------------------------------------*/
typedef struct nu_port_dev
{
......@@ -59,6 +74,7 @@ struct nu_usbh_dev
E_SYS_IPRST rstidx;
E_SYS_IPCLK clkidx;
rt_thread_t polling_thread;
rt_mutex_t lock;
S_NU_RH_PORT_CTRL asPortCtrl[NU_MAX_USBH_PORT];
};
......@@ -165,12 +181,16 @@ static EP_INFO_T *GetFreePipe(
if (i < NU_MAX_USBH_PIPE)
{
EP_INFO_T *psEPInfo = rt_malloc(sizeof(EP_INFO_T));
EP_INFO_T *psEPInfo = (EP_INFO_T *)rt_malloc_align(sizeof(EP_INFO_T), CACHE_LINE_SIZE);
if (psEPInfo != RT_NULL)
{
#if defined(BSP_USING_MMU)
psPortDev->apsEPInfo[i] = (EP_INFO_T *)((uint32_t)psEPInfo | NON_CACHE_MASK);
#else
psPortDev->apsEPInfo[i] = psEPInfo;
#endif
*pu8PipeIndex = i;
return psEPInfo;
return psPortDev->apsEPInfo[i];
}
}
}
......@@ -186,7 +206,11 @@ static void FreePipe(
(u8PipeIndex < NU_MAX_USBH_PIPE) &&
(psPortDev->apsEPInfo[u8PipeIndex] != RT_NULL))
{
rt_free(psPortDev->apsEPInfo[u8PipeIndex]);
EP_INFO_T *psEPInfo = psPortDev->apsEPInfo[u8PipeIndex];
#if defined(BSP_USING_MMU)
psEPInfo = (EP_INFO_T *)((uint32_t)psEPInfo & ~NON_CACHE_MASK);
#endif
rt_free_align(psEPInfo);
psPortDev->apsEPInfo[u8PipeIndex] = RT_NULL;
}
}
......@@ -298,8 +322,13 @@ static rt_err_t nu_open_pipe(upipe_t pipe)
#if defined(BSP_USING_MMU)
if (!psPortDev->asPipePktBuf[pipe->pipe_index])
{
psPortDev->asPipePktBuf[pipe->pipe_index] = rt_malloc_align(512ul, CACHE_LINE_SIZE);
RT_ASSERT(psPortDev->asPipePktBuf[pipe->pipe_index] != RT_NULL);
void *paddr = rt_malloc_align(512ul, CACHE_LINE_SIZE);
RT_ASSERT(paddr != RT_NULL);
#if defined(BSP_USING_MMU)
psPortDev->asPipePktBuf[pipe->pipe_index] = (void *)((uint32_t)paddr | NON_CACHE_MASK);
#else
psPortDev->asPipePktBuf[pipe->pipe_index] = paddr;
#endif
}
#endif
......@@ -350,7 +379,11 @@ static rt_err_t nu_close_pipe(upipe_t pipe)
#if defined(BSP_USING_MMU)
if (psPortDev->asPipePktBuf[pipe->pipe_index])
{
rt_free_align(psPortDev->asPipePktBuf[pipe->pipe_index]);
void *paddr = psPortDev->asPipePktBuf[pipe->pipe_index];
#if defined(BSP_USING_MMU)
paddr = (void *)((uint32_t)paddr & ~NON_CACHE_MASK);
#endif
rt_free_align(paddr);
psPortDev->asPipePktBuf[pipe->pipe_index] = RT_NULL;
}
#endif
......@@ -398,16 +431,56 @@ static int nu_bulk_xfer(
UTR_T *psUTR,
int timeouts)
{
#define TIMEOUT_RETRY 10
UTR_T *psUTR_tmp = NULL;
int retry = TIMEOUT_RETRY;
int ret;
int new_timeouts = timeouts / TIMEOUT_RETRY;
new_timeouts = (new_timeouts < 200) ? 200 : new_timeouts;
psUTR_tmp = alloc_utr(psPortDev->pUDev);
if (!psUTR_tmp)
{
RT_DEBUG_LOG(RT_DEBUG_USB, ("nu_bulk_xfer ERROR: unable alloc UTR\n"));
return -1;
}
ret = usbh_bulk_xfer(psUTR);
rt_memcpy((void *)psUTR_tmp, psUTR, sizeof(UTR_T));
if (ret < 0)
return ret;
while (retry > 0)
{
ret = usbh_bulk_xfer(psUTR);
if (ret < 0)
{
rt_kprintf("usbh_bulk_xfer %x\n", ret);
return ret;
}
//wait transfer done
rt_completion_wait(&(psPortDev->utr_completion), timeouts);
return 0;
rt_thread_mdelay(1);
//wait transfer done
if (rt_completion_wait(&(psPortDev->utr_completion), new_timeouts) == 0)
{
break;
}
else
{
// Timeout, let's retry.
retry--;
rt_kprintf("[%d/%d]Request Timeout in %d ms!! (bulk_xfer %d)\n", retry, TIMEOUT_RETRY, new_timeouts, psUTR->data_len);
// Unlink
ret = usbh_quit_utr(psUTR);
rt_memcpy(psUTR, (void *)psUTR_tmp, sizeof(UTR_T));
rt_completion_init(&(psPortDev->utr_completion));
}
}
free_utr(psUTR_tmp);
return (retry > 0) ? 0 : -1;
}
static int nu_int_xfer(
......@@ -477,6 +550,8 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
void *buffer_nonch = buffer;
NU_USBHOST_LOCK();
psPortCtrl = GetRHPortControlFromPipe(pipe);
if (psPortCtrl == RT_NULL)
{
......@@ -494,8 +569,10 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
if (buffer_nonch && nbytes)
{
buffer_nonch = psPortDev->asPipePktBuf[pipe->pipe_index];
rt_memcpy(buffer_nonch, buffer, nbytes);
mmu_clean_invalidated_dcache((uint32_t)buffer_nonch, nbytes);
if ((pipe->ep.bEndpointAddress & USB_DIR_MASK) == USB_DIR_OUT)
{
rt_memcpy(buffer_nonch, buffer, nbytes);
}
}
#endif
......@@ -503,6 +580,7 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
if (pipe->ep.bmAttributes == USB_EP_ATTR_CONTROL)
{
int ret;
if (token == USBH_PID_SETUP)
{
struct urequest *psSetup = (struct urequest *)buffer_nonch;
......@@ -517,7 +595,7 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
else
{
/* Write data to USB device. */
//Trigger USBHostLib Ctril_Xfer
//Trigger USBHostLib Ctrl_Xfer
ret = nu_ctrl_xfer(psPortDev, psSetup, NULL, timeouts);
if (ret != psSetup->wLength)
goto exit_nu_pipe_xfer;
......@@ -571,7 +649,7 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
if (nu_bulk_xfer(psPortDev, psUTR, timeouts) < 0)
{
RT_DEBUG_LOG(RT_DEBUG_USB, ("nu_pipe_xfer ERROR: bulk transfer failed\n"));
goto exit_nu_pipe_xfer;
goto failreport_nu_pipe_xfer;
}
}
else if (pipe->ep.bmAttributes == USB_EP_ATTR_INT)
......@@ -588,7 +666,7 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
{
i32XferLen = nbytes;
}
return i32XferLen;
goto exit2_nu_pipe_xfer;
}
else if (pipe->ep.bmAttributes == USB_EP_ATTR_ISOC)
{
......@@ -599,6 +677,8 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
} //else
failreport_nu_pipe_xfer:
if (psUTR->bIsTransferDone == 0)
{
//Timeout
......@@ -628,29 +708,28 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
//Call callback
if (pipe->callback != RT_NULL)
{
struct uhost_msg msg;
msg.type = USB_MSG_CALLBACK;
msg.content.cb.function = pipe->callback;
msg.content.cb.context = pipe->user_data;
rt_usbh_event_signal(&msg);
pipe->callback(pipe);
}
if (pipe->status != UPIPE_STATUS_OK)
goto exit_nu_pipe_xfer;
exit_nu_pipe_xfer:
if (psUTR)
free_utr(psUTR);
exit2_nu_pipe_xfer:
#if defined(BSP_USING_MMU)
if ((nbytes) &&
(buffer_nonch != buffer))
{
mmu_invalidate_dcache((uint32_t)buffer_nonch, nbytes);
rt_memcpy(buffer, buffer_nonch, nbytes);
if ((pipe->ep.bEndpointAddress & USB_DIR_MASK) == USB_DIR_IN)
{
rt_memcpy(buffer, buffer_nonch, nbytes);
}
}
#endif
if (psUTR)
free_utr(psUTR);
NU_USBHOST_UNLOCK();
return i32XferLen;
}
......@@ -660,7 +739,10 @@ static void nu_usbh_rh_thread_entry(void *parameter)
{
while (1)
{
NU_USBHOST_LOCK();
usbh_polling_root_hubs();
NU_USBHOST_UNLOCK();
rt_thread_mdelay(NU_USBHOST_HUB_POLLING_INTERVAL);
}
}
......@@ -771,7 +853,6 @@ static rt_err_t nu_hcd_init(rt_device_t device)
//install connect/disconnect callback
usbh_install_conn_callback(nu_hcd_connect_callback, nu_hcd_disconnect_callback);
usbh_polling_root_hubs();
//create thread for polling usbh port status
/* create usb hub thread */
......@@ -871,6 +952,8 @@ int nu_usbh_register(void)
psUHCD->ops = &nu_uhcd_ops;
psUHCD->num_ports = NU_MAX_USBH_PORT;
NU_USBHOST_MUTEX_INIT();
res = rt_device_register(&psUHCD->parent, "usbh", RT_DEVICE_FLAG_DEACTIVATE);
RT_ASSERT(res == RT_EOK);
......
......@@ -40,7 +40,7 @@ static rt_err_t nau8822_mixer_query(rt_uint32_t ui32Units, rt_uint32_t *ui32Valu
nu_acodec_ops nu_acodec_ops_nau8822 =
{
.name = "NAU8822",
.role = NU_ACODEC_ROLE_SLAVE,
.role = NU_ACODEC_ROLE_MASTER,
.config = { // Default settings.
.samplerate = 16000,
.channels = 2,
......@@ -117,6 +117,20 @@ static int I2C_WriteNAU8822(uint8_t u8addr, uint16_t u16data)
return RT_EOK;
}
static void nau8822_phonejack_set(S_NU_NAU8822_CONFIG *psCodecConfig, int bEnable)
{
rt_pin_mode(psCodecConfig->pin_phonejack_en, PIN_MODE_OUTPUT);
if (bEnable)
{
rt_pin_write(psCodecConfig->pin_phonejack_en, PIN_LOW);
}
else
{
rt_pin_write(psCodecConfig->pin_phonejack_en, PIN_HIGH);
}
}
static rt_err_t nau8822_probe(void)
{
......@@ -180,8 +194,6 @@ static rt_err_t nau8822_dsp_config(rt_uint32_t ui32SamplRate, rt_uint8_t u8ChNum
}
u16AudIf = (u16AudIf & 0x19F) | (u8WLEN << 5);
I2C_WriteNAU8822(4, u16AudIf);
if (ui32SamplRate % 11025)
{
I2C_WriteNAU8822(36, 0x008); //12.288Mhz
......@@ -189,6 +201,10 @@ static rt_err_t nau8822_dsp_config(rt_uint32_t ui32SamplRate, rt_uint8_t u8ChNum
I2C_WriteNAU8822(38, 0x093);
I2C_WriteNAU8822(39, 0x0E9);
/* FIXME */
if (ui32SamplRate > 48000)
ui32SamplRate = 8000;
mClkDiv = (48000 * 256 * u8ChNum) / (ui32SamplRate * 256);
bClkDiv = (ui32SamplRate * 256) / (ui32SamplRate * u8ChNum * u8SamplBit);
}
......@@ -199,6 +215,10 @@ static rt_err_t nau8822_dsp_config(rt_uint32_t ui32SamplRate, rt_uint8_t u8ChNum
I2C_WriteNAU8822(38, 0x161);
I2C_WriteNAU8822(39, 0x026);
/* FIXME */
if (ui32SamplRate > 44100)
ui32SamplRate = 11025;
mClkDiv = (44100 * 256 * u8ChNum) / (ui32SamplRate * 256);
bClkDiv = (ui32SamplRate * 256) / (ui32SamplRate * u8ChNum * u8SamplBit);
}
......@@ -258,11 +278,16 @@ static rt_err_t nau8822_dsp_config(rt_uint32_t ui32SamplRate, rt_uint8_t u8ChNum
return -RT_ERROR;
}
u16ClkCtrl = (1 << 8) | (1 << 0); //Use internal PLL, FS/BCLK
if (nu_acodec_ops_nau8822.role == NU_ACODEC_ROLE_MASTER)
{
u16ClkCtrl = (1 << 8) | (1 << 0); //Use internal PLL, FS/BCLK
}
u16ClkCtrl = (u16ClkCtrl & 0x11F) | (mClkDiv << 5);
u16ClkCtrl = (u16ClkCtrl & 0x1E3) | (bClkDiv << 2);
I2C_WriteNAU8822(4, u16AudIf);
I2C_WriteNAU8822(6, u16ClkCtrl);
return RT_EOK;
......@@ -271,27 +296,35 @@ static rt_err_t nau8822_dsp_config(rt_uint32_t ui32SamplRate, rt_uint8_t u8ChNum
static rt_err_t nau8822_init(void)
{
//input source is MIC
I2C_WriteNAU8822(1, 0x03F);
if (nu_acodec_ops_nau8822.role == NU_ACODEC_ROLE_MASTER)
{
I2C_WriteNAU8822(1, 0x03F); /* PLLEN, MICBIASEN, ABIASEN, IOBUFEN, REFIMP(3kohm) */
}
else
{
I2C_WriteNAU8822(1, 0x01F); /* MICBIASEN, ABIASEN, IOBUFEN, REFIMP(3kohm) */
}
I2C_WriteNAU8822(2, 0x1BF); /* Enable L/R Headphone, ADC Mix/Boost, ADC */
I2C_WriteNAU8822(3, 0x07F); /* Enable L/R main mixer, DAC */
I2C_WriteNAU8822(4, 0x010); /* 16-bit word length, I2S format, Stereo */
I2C_WriteNAU8822(5, 0x000); /* Companding control and loop back mode (all disable) */
nau8822_delay_ms(30);
if (nu_acodec_ops_nau8822.role == NU_ACODEC_ROLE_SLAVE)
{
I2C_WriteNAU8822(6, 0x1AD); /* Divide by 6, 16K */
I2C_WriteNAU8822(7, 0x006); /* 16K for internal filter coefficients */
}
I2C_WriteNAU8822(6, 0x1AD); /* Divide by 6, 16K */
I2C_WriteNAU8822(7, 0x006); /* 16K for internal filter coefficients */
I2C_WriteNAU8822(10, 0x008); /* DAC soft mute is disabled, DAC oversampling rate is 128x */
I2C_WriteNAU8822(14, 0x108); /* ADC HP filter is disabled, ADC oversampling rate is 128x */
I2C_WriteNAU8822(15, 0x1EF); /* ADC left digital volume control */
I2C_WriteNAU8822(16, 0x1EF); /* ADC right digital volume control */
I2C_WriteNAU8822(44, 0x033); /* LMICN/LMICP is connected to PGA */
I2C_WriteNAU8822(49, 0x042);
I2C_WriteNAU8822(47, 0x100); /* Gain value */
I2C_WriteNAU8822(48, 0x100); /* Gain value */
I2C_WriteNAU8822(50, 0x001); /* Left DAC connected to LMIX */
I2C_WriteNAU8822(51, 0x001); /* Right DAC connected to RMIX */
I2C_WriteNAU8822(0x34, 0x13F);
I2C_WriteNAU8822(0x35, 0x13F);
nu_acodec_ops_nau8822.config.samplerate = 16000;
nu_acodec_ops_nau8822.config.channels = 2;
......@@ -326,10 +359,12 @@ static rt_err_t nau8822_mixer_control(rt_uint32_t ui32Units, rt_uint32_t ui32Val
if (ui32Value)
{
I2C_WriteNAU8822(10, u16Data | (1 << 6));
nau8822_phonejack_set(g_psCodecConfig, 0);
}
else
{
I2C_WriteNAU8822(10, u16Data & ~(1 << 6));
nau8822_phonejack_set(g_psCodecConfig, 1);
}
}
break;
......
......@@ -14,6 +14,7 @@
#if defined(NU_PKG_USING_BMX055)
#include <sys/time.h>
#include <string.h>
#include "sensor_bmx055.h"
......
......@@ -29,6 +29,11 @@ menu "Nuvoton Packages Config"
select BSP_USING_I2C
default n
config NU_PKG_USING_DA9062
bool "DA9062 PMIC."
select BSP_USING_I2C
default n
config NU_PKG_USING_ILI9341
bool "ILI9341 LCD Panel"
select BSP_USING_GPIO
......
......@@ -14,6 +14,7 @@
#if defined(NU_PKG_USING_MAX31875)
#include <sys/time.h>
#include "sensor.h"
#include "max31875_c.h"
......
......@@ -498,7 +498,8 @@ rt_err_t rt_hw_mtd_spinand_init(void)
RT_ASSERT(result == RT_EOK);
result = spinand_flash_init(SPINAND_FLASH_QSPI);
RT_ASSERT(result == RT_EOK);
if (result != RT_EOK)
return -RT_ERROR;
for (i = 0; i < MTD_SPINAND_PARTITION_NUM; i++)
{
......
......@@ -26,7 +26,48 @@
const struct nu_spinand_info g_spinandflash_list[] =
{
/* Winbond */
{ 0xEFAA21, 2048, 64, 0x6b, 0xff, 0xff, 0xff, 0x1, 1024, 64, 0, "Winbond 128MB: 2048+64@64@1024" }, /* Only tested */
/* Only tested */
{
0xEFAA21, 2048, 64, 0x6b, 0xff, 0xff, 0xff, 0x1, 1024, 64, 0, "Winbond 128MB: 2048+64@64@1024",
#if defined(RT_USING_DFS_UFFS)
{
/* For storing Seal-byte at 0x37. Need 15-Bytes */
0x04, 0x04, 0x14, 0x04, 0x24, 0x04, 0x34, 0x03, 0xFF, 0x00
},
{
/* For storing Seal-byte at 0x37 and not report latest ECC part in Spare-3 */
0x08, 0x08, 0x18, 0x08, 0x28, 0x08, /*0x38, 0x08,*/ 0xFF, 0x00
}
#else
{
0x04, 0x04, 0x14, 0x04, 0x24, 0x04, 0x34, 0x04, 0xFF, 0x00
},
{
0x08, 0x08, 0x18, 0x08, 0x28, 0x08, 0x38, 0x08, 0xFF, 0x00
}
#endif
},
{
0xEFBF22, 2048, 64, 0x6b, 0xff, 0xff, 0xff, 0x1, 2048, 64, 0, "Winbond 256MB: 2048+64@64@2048",
#if defined(RT_USING_DFS_UFFS)
{
/* For storing Seal-byte at 0x39. Need 15-Bytes */
0x08, 0x04, 0x18, 0x04, 0x28, 0x04, 0x38, 0x03, 0xFF, 0x00
},
{
/* For storing Seal-byte at 0x39 and not report latest ECC part in Spare-3 */
0x0C, 0x04, 0x1C, 0x04, 0x2C, 0x04, /*0x3C, 0x04,*/ 0xFF, 0x00
}
#else
{
0x08, 0x04, 0x18, 0x04, 0x28, 0x04, 0x38, 0x04, 0xFF, 0x00
},
{
0x0C, 0x04, 0x1C, 0x04, 0x2C, 0x04, 0x3C, 0x04, 0xFF, 0x00
}
#endif
},
#if 0
{ 0xEFAA22, 2048, 64, 0x6b, 0xff, 0xff, 0xff, 0x1, 2048, 64, 0, "Winbond 256MB: 2048+64@64@1024" },
......@@ -61,6 +102,7 @@ const struct nu_spinand_info g_spinandflash_list[] =
/*
========================================================
For 0xEFAA21 description:
Data Area(2048-Byte)
......@@ -112,27 +154,66 @@ ECC Spare: ECC for spare 4-D.
| 0 1 2 3 | 4 5 6 7 | 8 9 A B C D | E F |
-----------------------------------------------
| NO ECC | ECC PROTECTED | ECC 34-3D |
*/
rt_uint8_t spinand_flash_data_layout[SPINAND_SPARE_LAYOUT_SIZE] =
{
#if defined(RT_USING_DFS_UFFS)
/* For storing Seal-byte at 0x37. */
0x04, 0x04, 0x14, 0x04, 0x24, 0x04, 0x34, 0x03, 0xFF, 0x00
#else
0x04, 0x04, 0x14, 0x04, 0x24, 0x04, 0x34, 0x04, 0xFF, 0x00
#endif
};
========================================================
rt_uint8_t spinand_flash_ecc_layout[SPINAND_SPARE_LAYOUT_SIZE] =
{
#if defined(RT_USING_DFS_UFFS)
/* For storing Seal-byte at 0x37 and not report latest ECC part in Spare-3 */
0x08, 0x08, 0x18, 0x08, 0x28, 0x08, /*0x38, 0x08,*/ 0xFF, 0x00
#else
0x08, 0x08, 0x18, 0x08, 0x28, 0x08, 0x38, 0x08, 0xFF, 0x00
#endif
};
========================================================
For 0xEFBF22 description:
Data Area(2048-Byte)
-----------------------------
|Sect-0|Sect-1|Sect-2|Sect-3|
|(512B)|(512B)|(512B)|(512B)|
-----------------------------
Spare Area(64-Byte)
---------------------------------
|Spare-0|Spare-1|Spare-2|Spare-3|
| (16B) | (16B) | (16B) | (16B) |
---------------------------------
----------------- Spare-0 -------------------
/ \
-----------------------------------------
| BBM | UD2 | UD1 | ECC UD1 |
| 0 1 | 2 3 4 5 6 7 | 8 9 A B | C D E F |
-----------------------------------------
| NO ECC | ECC PROTECTED |
BBM: Bad block marker.
UD1: User Data 1.
UD2: User Data 2.
ECC UD1: ECC for UD1.
---------------- Spare-1 -------------------
/ \
---------------------------------------
| UD2 | UD1 | ECC UD1 |
| 0 1 2 3 4 5 6 7 | 8 9 A B | C D E F |
---------------------------------------
| NO ECC | ECC PROTECTED |
---------------- Spare-2 -------------------
/ \
---------------------------------------
| UD2 | UD1 | ECC UD1 |
| 0 1 2 3 4 5 6 7 | 8 9 A B | C D E F |
---------------------------------------
| NO ECC | ECC PROTECTED |
---------------- Spare-3 -------------------
/ \
---------------------------------------
| UD2 | UD1 | ECC UD1 |
| 0 1 2 3 4 5 6 7 | 8 9 A B | C D E F |
---------------------------------------
| NO ECC | ECC PROTECTED |
========================================================
*/
rt_uint8_t spinand_flash_data_layout[SPINAND_SPARE_LAYOUT_SIZE];
rt_uint8_t spinand_flash_ecc_layout[SPINAND_SPARE_LAYOUT_SIZE];
static rt_err_t spinand_info_read(struct rt_qspi_device *qspi);
......@@ -186,7 +267,6 @@ static rt_err_t spinand_program_dataload(
uint8_t *pu8SpareBuff,
uint32_t u32SpareCount)
{
uint32_t volatile i = 0;
uint8_t u8WECmd = 0x06;
rt_err_t result = RT_EOK;
......@@ -667,6 +747,9 @@ static rt_err_t spinand_info_read(struct rt_qspi_device *qspi)
{
if (u32JedecId == g_spinandflash_list[i].u32JEDECID) /* Match JEDECID? */
{
rt_memcpy((void *)&spinand_flash_data_layout[0], (void *)&g_spinandflash_list[i].au8DataLayout[0], SPINAND_SPARE_LAYOUT_SIZE);
rt_memcpy((void *)&spinand_flash_ecc_layout[0], (void *)&g_spinandflash_list[i].au8EccLayout[0], SPINAND_SPARE_LAYOUT_SIZE);
rt_memcpy(SPINAND_FLASH_INFO, &g_spinandflash_list[i], sizeof(struct nu_spinand_info));
LOG_I("Found: [%08X] %s.", u32JedecId, SPINAND_FLASH_DESCRIPTION);
......
......@@ -19,24 +19,6 @@
#include "drv_spi.h"
#include <board.h>
/* SPI NAND flash information */
struct nu_spinand_info
{
uint32_t u32JEDECID;
uint16_t u16PageSize;
uint16_t u16OOBSize;
uint8_t u8QuadReadCmdId;
uint8_t u8ReadStatusCmdId;
uint8_t u8WriteStatusCmdid;
uint8_t u8StatusValue;
uint8_t u8DummyByte;
uint32_t u32BlockPerFlash;
uint32_t u32PagePerBlock;
uint8_t u8IsDieSelect;
const char *szDescription;
};
typedef struct nu_spinand_info *nu_spinand_info_t;
struct spinand_ops
{
rt_err_t (*block_erase)(struct rt_qspi_device *qspi, uint8_t u8Addr2, uint8_t u8Addr1, uint8_t u8Addr0);
......@@ -53,15 +35,6 @@ struct spinand_ops
};
typedef struct spinand_ops *nu_spinand_ops_t;
struct nu_spinand
{
struct nu_spinand_info info;
struct rt_qspi_device *qspi_device;
nu_spinand_ops_t ops;
struct rt_mutex lock;
};
typedef struct nu_spinand *nu_spinand_t;
#define SPINAND_FLASH_JEDECID g_spinandflash_dev.info.u32JEDECID
#define SPINAND_FLASH_PAGE_SIZE g_spinandflash_dev.info.u16PageSize
#define SPINAND_FLASH_OOB_SIZE g_spinandflash_dev.info.u16OOBSize
......@@ -82,6 +55,36 @@ typedef struct nu_spinand *nu_spinand_t;
#define SPINAND_SPARE_LAYOUT_SIZE 16
/* SPI NAND flash information */
struct nu_spinand_info
{
uint32_t u32JEDECID;
uint16_t u16PageSize;
uint16_t u16OOBSize;
uint8_t u8QuadReadCmdId;
uint8_t u8ReadStatusCmdId;
uint8_t u8WriteStatusCmdid;
uint8_t u8StatusValue;
uint8_t u8DummyByte;
uint32_t u32BlockPerFlash;
uint32_t u32PagePerBlock;
uint8_t u8IsDieSelect;
const char *szDescription;
uint8_t au8DataLayout[SPINAND_SPARE_LAYOUT_SIZE];
uint8_t au8EccLayout[SPINAND_SPARE_LAYOUT_SIZE];
};
typedef struct nu_spinand_info *nu_spinand_info_t;
struct nu_spinand
{
struct nu_spinand_info info;
struct rt_qspi_device *qspi_device;
nu_spinand_ops_t ops;
struct rt_mutex lock;
};
typedef struct nu_spinand *nu_spinand_t;
rt_err_t rt_hw_mtd_spinand_register(const char *device_name);
rt_size_t nu_qspi_transfer_message(struct rt_qspi_device *device, struct rt_qspi_message *message);
rt_err_t nu_qspi_send_then_recv(struct rt_qspi_device *device, const void *send_buf, rt_size_t send_length, void *recv_buf, rt_size_t recv_length);
......
......@@ -30,8 +30,8 @@ extern "C"
*/
#define EMAC_PHY_ADDR 1UL /*!< PHY address, this address is board dependent \hideinitializer */
#define EMAC_RX_DESC_SIZE 64UL /*!< Number of Rx Descriptors, should be 2 at least \hideinitializer */
#define EMAC_TX_DESC_SIZE 32UL /*!< Number of Tx Descriptors, should be 2 at least \hideinitializer */
#define EMAC_RX_DESC_SIZE 128UL /*!< Number of Rx Descriptors, should be 2 at least \hideinitializer */
#define EMAC_TX_DESC_SIZE 64UL /*!< Number of Tx Descriptors, should be 2 at least \hideinitializer */
#define EMAC_CAMENTRY_NB 16UL /*!< Number of CAM \hideinitializer */
#define EMAC_MAX_PKT_SIZE 1536UL /*!< Number of HDR + EXTRA + VLAN_TAG + PAYLOAD + CRC \hideinitializer */
......@@ -53,6 +53,8 @@ typedef struct
uint32_t u32Next; /*!< Pointer to next descriptor */
uint32_t u32Backup1; /*!< For backup descriptor fields over written by time stamp */
uint32_t u32Backup2; /*!< For backup descriptor fields over written by time stamp */
uint32_t u32Reserved1; /*!< For Reserved */
uint32_t u32Reserved2; /*!< For Reserved */
} EMAC_DESCRIPTOR_T;
/** Tx/Rx buffer structure */
......@@ -379,7 +381,8 @@ int32_t EMAC_FillCamEntry(EMAC_T *EMAC, uint8_t pu8MacAddr[]);
uint8_t *EMAC_ClaimFreeTXBuf(EMAC_MEMMGR_T *psMemMgr);
uint32_t EMAC_GetAvailRXBufSize(EMAC_MEMMGR_T *psMemMgr, uint8_t **ppuDataBuf);
uint32_t EMAC_SendPktWoCopy(EMAC_MEMMGR_T *psMemMgr, uint32_t u32Size);
void EMAC_RecvPktDoneWoRxTrigger(EMAC_MEMMGR_T *psMemMgr);
EMAC_DESCRIPTOR_T * EMAC_RecvPktDoneWoRxTrigger(EMAC_MEMMGR_T *psMemMgr);
void EMAC_RxTrigger(EMAC_MEMMGR_T *psMemMgr, EMAC_DESCRIPTOR_T * rx_desc);
/*@}*/ /* end of group EMAC_EXPORTED_FUNCTIONS */
......
......@@ -298,7 +298,7 @@ static void EMAC_RxDescInit(EMAC_MEMMGR_T *psMemMgr)
for (i = 0UL; i < psMemMgr->u32RxDescSize; i++)
{
psMemMgr->psRXDescs[i].u32Status1 = EMAC_DESC_OWN_EMAC;
psMemMgr->psRXDescs[i].u32Data = (uint32_t)&psMemMgr->psRXFrames[i] | BIT31;
psMemMgr->psRXDescs[i].u32Data = (uint32_t)&psMemMgr->psRXFrames[i];
psMemMgr->psRXDescs[i].u32Status2 = 0UL;
psMemMgr->psRXDescs[i].u32Next = (uint32_t)(&psMemMgr->psRXDescs[(i + 1UL) % EMAC_RX_DESC_SIZE]) | BIT31;
psMemMgr->psRXDescs[i].u32Backup1 = psMemMgr->psRXDescs[i].u32Data;
......@@ -1129,25 +1129,37 @@ uint32_t EMAC_GetAvailRXBufSize(EMAC_MEMMGR_T *psMemMgr, uint8_t **ppuDataBuf)
* @note Application can only call this function once every time \ref EMAC_RecvPkt or \ref EMAC_RecvPktTS returns 1
* @note This function is without doing EMAC_TRIGGER_RX.
*/
void EMAC_RecvPktDoneWoRxTrigger(EMAC_MEMMGR_T *psMemMgr)
EMAC_DESCRIPTOR_T * EMAC_RecvPktDoneWoRxTrigger(EMAC_MEMMGR_T *psMemMgr)
{
/* Get Rx Frame Descriptor */
EMAC_DESCRIPTOR_T *desc = (EMAC_DESCRIPTOR_T *)psMemMgr->psCurrentRxDesc;
EMAC_DESCRIPTOR_T *ret = desc;
/* Restore descriptor link list and data pointer they will be overwrite if time stamp enabled */
desc->u32Data = desc->u32Backup1;
desc->u32Next = desc->u32Backup2;
/* Change ownership to DMA for next use */
desc->u32Status1 |= EMAC_DESC_OWN_EMAC;
// desc->u32Status1 |= EMAC_DESC_OWN_EMAC;
/* Get Next Frame Descriptor pointer to process */
desc = (EMAC_DESCRIPTOR_T *)desc->u32Next;
/* Save last processed Rx descriptor */
psMemMgr->psCurrentRxDesc = desc;
return ret;
}
void EMAC_RxTrigger(EMAC_MEMMGR_T *psMemMgr, EMAC_DESCRIPTOR_T * rx_desc)
{
EMAC_T *EMAC = psMemMgr->psEmac;
rx_desc->u32Status1 |= EMAC_DESC_OWN_EMAC;
/* Trigger EMAC to send the packet */
EMAC_TRIGGER_RX(EMAC);
}
/*@}*/ /* end of group EMAC_EXPORTED_FUNCTIONS */
......
......@@ -8,9 +8,6 @@
#include "nuc980.h"
#include "nu_pdma.h"
static uint8_t u32ChSelect[PDMA_CH_MAX];
/** @addtogroup Standard_Driver Standard Driver
@{
*/
......@@ -44,7 +41,6 @@ void PDMA_Open(PDMA_T *pdma, uint32_t u32Mask)
if ((1 << i) & u32Mask)
{
pdma->DSCT[i].CTL = 0UL;
u32ChSelect[i] = PDMA_MEM;
}
}
......@@ -188,54 +184,27 @@ void PDMA_SetTransferAddr(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32SrcAddr, uin
*/
void PDMA_SetTransferMode(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Peripheral, uint32_t u32ScatterEn, uint32_t u32DescAddr)
{
u32ChSelect[u32Ch] = u32Peripheral;
switch (u32Ch)
if (u32Ch < PDMA_CH_MAX)
{
case 0ul:
pdma->REQSEL0_3 = (pdma->REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC0_Msk) | u32Peripheral;
break;
case 1ul:
pdma->REQSEL0_3 = (pdma->REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC1_Msk) | (u32Peripheral << PDMA_REQSEL0_3_REQSRC1_Pos);
break;
case 2ul:
pdma->REQSEL0_3 = (pdma->REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC2_Msk) | (u32Peripheral << PDMA_REQSEL0_3_REQSRC2_Pos);
break;
case 3ul:
pdma->REQSEL0_3 = (pdma->REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC3_Msk) | (u32Peripheral << PDMA_REQSEL0_3_REQSRC3_Pos);
break;
case 4ul:
pdma->REQSEL4_7 = (pdma->REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC4_Msk) | u32Peripheral;
break;
case 5ul:
pdma->REQSEL4_7 = (pdma->REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC5_Msk) | (u32Peripheral << PDMA_REQSEL4_7_REQSRC5_Pos);
break;
case 6ul:
pdma->REQSEL4_7 = (pdma->REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC6_Msk) | (u32Peripheral << PDMA_REQSEL4_7_REQSRC6_Pos);
break;
case 7ul:
pdma->REQSEL4_7 = (pdma->REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC7_Msk) | (u32Peripheral << PDMA_REQSEL4_7_REQSRC7_Pos);
break;
case 8ul:
pdma->REQSEL8_11 = (pdma->REQSEL8_11 & ~PDMA_REQSEL8_11_REQSRC8_Msk) | u32Peripheral;
break;
case 9ul:
pdma->REQSEL8_11 = (pdma->REQSEL8_11 & ~PDMA_REQSEL8_11_REQSRC9_Msk) | (u32Peripheral << PDMA_REQSEL8_11_REQSRC9_Pos);
break;
default:
break;
}
__IO uint32_t *pau32REQSEL = (__IO uint32_t *)&pdma->REQSEL0_3;
uint32_t u32REQSEL_Pos, u32REQSEL_Msk;
if (u32ScatterEn)
{
pdma->DSCT[u32Ch].CTL = (pdma->DSCT[u32Ch].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk) | PDMA_OP_SCATTER;
pdma->DSCT[u32Ch].NEXT = u32DescAddr - (pdma->SCATBA);
}
else
{
pdma->DSCT[u32Ch].CTL = (pdma->DSCT[u32Ch].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk) | PDMA_OP_BASIC;
u32REQSEL_Pos = (u32Ch % 4) * 8 ;
u32REQSEL_Msk = PDMA_REQSEL0_3_REQSRC0_Msk << u32REQSEL_Pos;
pau32REQSEL[u32Ch / 4] = (pau32REQSEL[u32Ch / 4] & ~u32REQSEL_Msk) | (u32Peripheral << u32REQSEL_Pos);
if (u32ScatterEn)
{
pdma->DSCT[u32Ch].CTL = (pdma->DSCT[u32Ch].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk) | PDMA_OP_SCATTER;
pdma->DSCT[u32Ch].NEXT = u32DescAddr - (pdma->SCATBA);
}
else
{
pdma->DSCT[u32Ch].CTL = (pdma->DSCT[u32Ch].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk) | PDMA_OP_BASIC;
}
}
else {}
}
/**
* @brief Set PDMA Burst Type and Size
*
......@@ -310,45 +279,21 @@ void PDMA_DisableTimeout(PDMA_T *pdma, uint32_t u32Mask)
*/
void PDMA_SetTimeOut(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32OnOff, uint32_t u32TimeOutCnt)
{
switch (u32Ch)
if (u32Ch < PDMA_CH_MAX)
{
case 0ul:
pdma->TOC0_1 = (pdma->TOC0_1 & ~PDMA_TOC0_1_TOC0_Msk) | u32TimeOutCnt;
break;
case 1ul:
pdma->TOC0_1 = (pdma->TOC0_1 & ~PDMA_TOC0_1_TOC1_Msk) | (u32TimeOutCnt << PDMA_TOC0_1_TOC1_Pos);
break;
case 2ul:
pdma->TOC2_3 = (pdma->TOC2_3 & ~PDMA_TOC2_3_TOC2_Msk) | u32TimeOutCnt;
break;
case 3ul:
pdma->TOC2_3 = (pdma->TOC2_3 & ~PDMA_TOC2_3_TOC3_Msk) | (u32TimeOutCnt << PDMA_TOC0_1_TOC1_Pos);
break;
case 4ul:
pdma->TOC4_5 = (pdma->TOC4_5 & ~PDMA_TOC4_5_TOC4_Msk) | u32TimeOutCnt;
break;
case 5ul:
pdma->TOC4_5 = (pdma->TOC4_5 & ~PDMA_TOC4_5_TOC5_Msk) | (u32TimeOutCnt << PDMA_TOC4_5_TOC5_Pos);
break;
case 6ul:
pdma->TOC6_7 = (pdma->TOC6_7 & ~PDMA_TOC6_7_TOC6_Msk) | u32TimeOutCnt;
break;
case 7ul:
pdma->TOC6_7 = (pdma->TOC6_7 & ~PDMA_TOC6_7_TOC7_Msk) | (u32TimeOutCnt << PDMA_TOC6_7_TOC7_Pos);
break;
case 8ul:
pdma->TOC8_9 = (pdma->TOC8_9 & ~PDMA_TOC8_9_TOC8_Msk) | u32TimeOutCnt;
break;
case 9ul:
pdma->TOC8_9 = (pdma->TOC8_9 & ~PDMA_TOC8_9_TOC9_Msk) | (u32TimeOutCnt << PDMA_TOC8_9_TOC9_Pos);
break;
default:
break;
__IO uint32_t *pau32TOC = (__IO uint32_t *)&pdma->TOC0_1;
uint32_t u32TOC_Pos, u32TOC_Msk;
u32TOC_Pos = (u32Ch % 2) * 16 ;
u32TOC_Msk = PDMA_TOC0_1_TOC0_Msk << u32TOC_Pos;
pau32TOC[u32Ch / 2] = (pau32TOC[u32Ch / 2] & ~u32TOC_Msk) | (u32TimeOutCnt << u32TOC_Pos);
if (u32OnOff)
pdma->TOUTEN |= (1 << u32Ch);
else
pdma->TOUTEN &= ~(1 << u32Ch);
}
if (u32OnOff)
pdma->TOUTEN |= (1 << u32Ch);
else
pdma->TOUTEN &= ~(1 << u32Ch);
else {}
}
/**
......@@ -363,7 +308,15 @@ void PDMA_SetTimeOut(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32OnOff, uint32_t u
*/
void PDMA_Trigger(PDMA_T *pdma, uint32_t u32Ch)
{
if (u32ChSelect[u32Ch] == PDMA_MEM)
__IO uint32_t *pau32REQSEL = (__IO uint32_t *)&pdma->REQSEL0_3;
uint32_t u32REQSEL_Pos, u32REQSEL_Msk, u32ChReq;
u32REQSEL_Pos = (u32Ch % 4) * 8 ;
u32REQSEL_Msk = PDMA_REQSEL0_3_REQSRC0_Msk << u32REQSEL_Pos;
u32ChReq = (pau32REQSEL[u32Ch / 4] & u32REQSEL_Msk) >> u32REQSEL_Pos;
if (u32ChReq == PDMA_MEM)
{
pdma->SWREQ = (1ul << u32Ch);
}
......
......@@ -33,7 +33,7 @@
#define DISABLE_EHCI_IRQ() rt_hw_interrupt_mask(IRQ_EHCI)
#define IS_EHCI_IRQ_ENABLED() ((inpw(REG_AIC_INTMSK0)>>IRQ_EHCI) & 0x1)
//#define ENABLE_OHCI /* Enable OHCI host controller */
#define ENABLE_OHCI /* Enable OHCI host controller */
#define ENABLE_EHCI /* Enable EHCI host controller */
#define EHCI_PORT_CNT 2 /* Number of EHCI roothub ports */
......@@ -50,7 +50,7 @@
unconditionally reclaim iTD/isTD scheduled
in just elapsed EHCI_ISO_RCLM_RANGE ms. */
#define MAX_DESC_BUFF_SIZE 1024 /* To hold the configuration descriptor, USB
#define MAX_DESC_BUFF_SIZE 4096 /* To hold the configuration descriptor, USB
core will allocate a buffer with this size
for each connected device. USB core does
not release it until device disconnected. */
......
......@@ -50,7 +50,7 @@ static uint32_t _MemoryPoolBase, _MemoryPoolEnd;
void USB_InitializeMemoryPool()
{
_MemoryPoolBase = (UINT32)&_USBMemoryPool[0] | NON_CACHE_MASK;
_MemoryPoolBase = (uint32_t)&_USBMemoryPool[0] | NON_CACHE_MASK;
_MemoryPoolEnd = _MemoryPoolBase + USB_MEMORY_POOL_SIZE;
_FreeMemorySize = _MemoryPoolEnd - _MemoryPoolBase;
_AllocatedMemorySize = 0;
......@@ -71,41 +71,26 @@ int USB_allocated_memory()
}
void *USB_malloc(INT wanted_size, INT boundary)
void *USB_malloc(int wanted_size, int boundary)
{
USB_MHDR_T *pPrimitivePos = _pCurrent;
USB_MHDR_T *pFound;
INT found_size = -1;
INT i, block_count;
INT wrap = 0;
int disable_ohci_irq, disable_ehci_irq;
int found_size = -1;
int i, block_count;
int wrap = 0;
void *pvBuf = NULL;
rt_base_t level;
if (IS_OHCI_IRQ_ENABLED())
disable_ohci_irq = 1;
else
disable_ohci_irq = 0;
if (IS_EHCI_IRQ_ENABLED())
disable_ehci_irq = 1;
else
disable_ehci_irq = 0;
if (disable_ohci_irq)
DISABLE_OHCI_IRQ();
if (disable_ehci_irq)
DISABLE_EHCI_IRQ();
level = rt_hw_interrupt_disable();
if (wanted_size >= _FreeMemorySize)
{
rt_kprintf("USB_malloc - want=%d, free=%d\n", wanted_size, _FreeMemorySize);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return NULL;
goto exit_USB_malloc;
}
if ((UINT32)_pCurrent >= _MemoryPoolEnd)
if ((uint32_t)_pCurrent >= _MemoryPoolEnd)
_pCurrent = (USB_MHDR_T *)_MemoryPoolBase; /* wrapped */
do
......@@ -114,26 +99,22 @@ void *USB_malloc(INT wanted_size, INT boundary)
{
if (_pCurrent->magic != USB_MEM_ALLOC_MAGIC)
{
rt_kprintf("\nUSB_malloc - incorrect magic number! C:%x F:%x, wanted:%d, Base:0x%x, End:0x%x\n", (UINT32)_pCurrent, _FreeMemorySize, wanted_size, (UINT32)_MemoryPoolBase, (UINT32)_MemoryPoolEnd);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return NULL;
rt_kprintf("\nUSB_malloc - incorrect magic number! C:%x F:%x, wanted:%d, Base:0x%x, End:0x%x\n", (uint32_t)_pCurrent, _FreeMemorySize, wanted_size, (uint32_t)_MemoryPoolBase, (uint32_t)_MemoryPoolEnd);
goto exit_USB_malloc;
}
if (_pCurrent->flag == 0x3)
_pCurrent = (USB_MHDR_T *)((UINT32)_pCurrent + _pCurrent->bcnt * USB_MEM_BLOCK_SIZE);
_pCurrent = (USB_MHDR_T *)((uint32_t)_pCurrent + _pCurrent->bcnt * USB_MEM_BLOCK_SIZE);
else
{
rt_kprintf("USB_malloc warning - not the first block!\n");
_pCurrent = (USB_MHDR_T *)((UINT32)_pCurrent + USB_MEM_BLOCK_SIZE);
_pCurrent = (USB_MHDR_T *)((uint32_t)_pCurrent + USB_MEM_BLOCK_SIZE);
}
if ((UINT32)_pCurrent > _MemoryPoolEnd)
if ((uint32_t)_pCurrent > _MemoryPoolEnd)
rt_kprintf("USB_malloc - behind limit!!\n");
if ((UINT32)_pCurrent == _MemoryPoolEnd)
if ((uint32_t)_pCurrent == _MemoryPoolEnd)
{
//rt_kprintf("USB_alloc - warp!!\n");
wrap = 1;
......@@ -161,8 +142,8 @@ void *USB_malloc(INT wanted_size, INT boundary)
* used as a header only.
*/
if ((boundary > BOUNDARY_WORD) &&
((((UINT32)_pCurrent) + USB_MEM_BLOCK_SIZE >= _MemoryPoolEnd) ||
((((UINT32)_pCurrent) + USB_MEM_BLOCK_SIZE) % boundary != 0)))
((((uint32_t)_pCurrent) + USB_MEM_BLOCK_SIZE >= _MemoryPoolEnd) ||
((((uint32_t)_pCurrent) + USB_MEM_BLOCK_SIZE) % boundary != 0)))
found_size = -1; /* violate boundary, reset the accumlator */
}
else /* not the leading block */
......@@ -181,34 +162,26 @@ void *USB_malloc(INT wanted_size, INT boundary)
for (i = 0; i < block_count; i++)
{
_pCurrent->flag = 1; /* allocate block */
_pCurrent = (USB_MHDR_T *)((UINT32)_pCurrent + USB_MEM_BLOCK_SIZE);
_pCurrent = (USB_MHDR_T *)((uint32_t)_pCurrent + USB_MEM_BLOCK_SIZE);
}
pFound->flag = 0x3;
if (boundary > BOUNDARY_WORD)
{
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
//rt_kprintf("- 0x%x, %d\n", (int)pFound, wanted_size);
return (void *)((UINT32)pFound + USB_MEM_BLOCK_SIZE);
pvBuf = (void *)((uint32_t)pFound + USB_MEM_BLOCK_SIZE);
goto exit_USB_malloc;
}
else
{
//USB_debug("USB_malloc(%d,%d):%x\tsize:%d, C:0x%x, %d\n", wanted_size, boundary, (UINT32)pFound + sizeof(USB_MHDR_T), block_count * USB_MEM_BLOCK_SIZE, _pCurrent, block_count);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
//rt_kprintf("- 0x%x, %d\n", (int)pFound, wanted_size);
return (void *)((UINT32)pFound + sizeof(USB_MHDR_T));
//USB_debug("USB_malloc(%d,%d):%x\tsize:%d, C:0x%x, %d\n", wanted_size, boundary, (uint32_t)pFound + sizeof(USB_MHDR_T), block_count * USB_MEM_BLOCK_SIZE, _pCurrent, block_count);
pvBuf = (void *)((uint32_t)pFound + sizeof(USB_MHDR_T));
goto exit_USB_malloc;
}
}
/* advance to the next block */
_pCurrent = (USB_MHDR_T *)((UINT32)_pCurrent + USB_MEM_BLOCK_SIZE);
if ((UINT32)_pCurrent >= _MemoryPoolEnd)
_pCurrent = (USB_MHDR_T *)((uint32_t)_pCurrent + USB_MEM_BLOCK_SIZE);
if ((uint32_t)_pCurrent >= _MemoryPoolEnd)
{
wrap = 1;
_pCurrent = (USB_MHDR_T *)_MemoryPoolBase; /* wrapped */
......@@ -219,49 +192,36 @@ void *USB_malloc(INT wanted_size, INT boundary)
while ((wrap == 0) || (_pCurrent < pPrimitivePos));
rt_kprintf("USB_malloc - No free memory!\n");
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return NULL;
exit_USB_malloc:
rt_hw_interrupt_enable(level);
return pvBuf;
}
void USB_free(void *alloc_addr)
{
USB_MHDR_T *pMblk;
UINT32 addr = (UINT32)alloc_addr;
INT i, count;
int disable_ohci_irq, disable_ehci_irq;
if (IS_OHCI_IRQ_ENABLED())
disable_ohci_irq = 1;
else
disable_ohci_irq = 0;
if (IS_EHCI_IRQ_ENABLED())
disable_ehci_irq = 1;
else
disable_ehci_irq = 0;
uint32_t addr = (uint32_t)alloc_addr;
int i, count;
rt_base_t level;
//rt_kprintf("USB_free: 0x%x\n", (int)alloc_addr);
level = rt_hw_interrupt_disable();
if ((addr < _MemoryPoolBase) || (addr >= _MemoryPoolEnd))
{
if (addr)
{
rt_kprintf("[%s]Wrong!!\n", __func__);
//free(alloc_addr);
}
return;
goto Exit_USB_free;
}
if (disable_ohci_irq)
DISABLE_OHCI_IRQ();
if (disable_ehci_irq)
DISABLE_EHCI_IRQ();
//rt_kprintf("USB_free:%x\n", (INT)addr+USB_MEM_BLOCK_SIZE);
//rt_kprintf("USB_free:%x\n", (int32_t)addr+USB_MEM_BLOCK_SIZE);
/* get the leading block address */
if (addr % USB_MEM_BLOCK_SIZE == 0)
......@@ -271,32 +231,20 @@ void USB_free(void *alloc_addr)
if (addr % USB_MEM_BLOCK_SIZE != 0)
{
rt_kprintf("USB_free fatal error on address: %x!!\n", (UINT32)alloc_addr);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return;
rt_kprintf("USB_free fatal error on address: %x!!\n", (uint32_t)alloc_addr);
goto Exit_USB_free;
}
pMblk = (USB_MHDR_T *)addr;
if (pMblk->flag == 0)
{
rt_kprintf("USB_free(), warning - try to free a free block: %x\n", (UINT32)alloc_addr);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return;
rt_kprintf("USB_free(), warning - try to free a free block: %x\n", (uint32_t)alloc_addr);
goto Exit_USB_free;
}
if (pMblk->magic != USB_MEM_ALLOC_MAGIC)
{
rt_kprintf("USB_free(), warning - try to free an unknow block at address:%x.\n", addr);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return;
goto Exit_USB_free;
}
//_pCurrent = pMblk;
......@@ -307,15 +255,17 @@ void USB_free(void *alloc_addr)
for (i = 0; i < count; i++)
{
pMblk->flag = 0; /* release block */
pMblk = (USB_MHDR_T *)((UINT32)pMblk + USB_MEM_BLOCK_SIZE);
pMblk = (USB_MHDR_T *)((uint32_t)pMblk + USB_MEM_BLOCK_SIZE);
}
_FreeMemorySize += count * USB_MEM_BLOCK_SIZE;
_AllocatedMemorySize -= count * USB_MEM_BLOCK_SIZE;
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
Exit_USB_free:
rt_hw_interrupt_enable(level);
return;
}
......
......@@ -12,27 +12,22 @@
#include <rtconfig.h>
#if defined(BSP_USING_EMAC)
#if defined(RT_USING_LWIP)
#if defined(BSP_USING_EMAC) && defined(RT_USING_LWIP)
#include <rtdevice.h>
#include "NuMicro.h"
#include <netif/ethernetif.h>
#include <netif/etharp.h>
#include <lwip/icmp.h>
#include <lwip/pbuf.h>
#include "lwipopts.h"
#include "drv_sys.h"
#include "drv_pdma.h"
//#include "drv_pdma.h"
/* Private define ---------------------------------------------------------------*/
// RT_DEV_NAME_PREFIX e
#if !defined(NU_EMAC_PDMA_MEMCOPY_THRESHOLD)
#define NU_EMAC_PDMA_MEMCOPY_THRESHOLD 1024
#endif
#define NU_EMAC_DEBUG
#if defined(NU_EMAC_DEBUG)
//#define NU_EMAC_RX_DUMP
......@@ -45,6 +40,28 @@
#define NU_EMAC_TID_STACK_SIZE 1024
/* Private typedef --------------------------------------------------------------*/
enum
{
EMAC_START = -1,
#if defined(BSP_USING_EMAC0)
EMAC0_IDX,
#endif
#if defined(BSP_USING_EMAC1)
EMAC1_IDX,
#endif
EMAC_CNT
};
struct nu_emac_lwip_pbuf
{
struct pbuf_custom p; // lwip pbuf
EMAC_FRAME_T *psPktFrameDataBuf; // gmac descriptor
EMAC_MEMMGR_T *psMemMgr;
EMAC_DESCRIPTOR_T * rx_desc;
const struct memp_desc *memp_rx_pool;
};
typedef struct nu_emac_lwip_pbuf *nu_emac_lwip_pbuf_t;
struct nu_emac
{
struct eth_device eth;
......@@ -57,21 +74,10 @@ struct nu_emac
rt_thread_t link_monitor;
rt_uint8_t mac_addr[6];
struct rt_semaphore eth_sem;
const struct memp_desc *memp_rx_pool;
};
typedef struct nu_emac *nu_emac_t;
enum
{
EMAC_START = -1,
#if defined(BSP_USING_EMAC0)
EMAC0_IDX,
#endif
#if defined(BSP_USING_EMAC1)
EMAC1_IDX,
#endif
EMAC_CNT
};
/* Private functions ------------------------------------------------------------*/
#if defined(NU_EMAC_RX_DUMP) || defined(NU_EMAC_TX_DUMP)
static void nu_emac_pkt_dump(const char *msg, const struct pbuf *p);
......@@ -100,6 +106,14 @@ static void nu_emac_rx_isr(int vector, void *param);
/* Public functions -------------------------------------------------------------*/
/* Private variables ------------------------------------------------------------*/
#if defined(BSP_USING_EMAC0)
LWIP_MEMPOOL_DECLARE(emac0_rx, EMAC_RX_DESC_SIZE, sizeof(struct nu_emac_lwip_pbuf), "EMAC0 RX PBUF pool");
#endif
#if defined(BSP_USING_EMAC1)
LWIP_MEMPOOL_DECLARE(emac1_rx, EMAC_RX_DESC_SIZE, sizeof(struct nu_emac_lwip_pbuf), "EMAC1 RX PBUF pool");
#endif
static struct nu_emac nu_emac_arr[] =
{
#if defined(BSP_USING_EMAC0)
......@@ -110,6 +124,7 @@ static struct nu_emac nu_emac_arr[] =
.irqn_rx = IRQ_EMC0_RX,
.rstidx = EMAC0RST,
.clkidx = EMAC0CKEN,
.memp_rx_pool = &memp_emac0_rx
},
#endif
#if defined(BSP_USING_EMAC1)
......@@ -120,6 +135,7 @@ static struct nu_emac nu_emac_arr[] =
.irqn_rx = IRQ_EMC1_RX,
.rstidx = EMAC1RST,
.clkidx = EMAC1CKEN,
.memp_rx_pool = &memp_emac1_rx
},
#endif
};
......@@ -158,11 +174,7 @@ static void nu_emac_halt(nu_emac_t psNuEmac)
static void *nu_emac_memcpy(void *dest, void *src, unsigned int count)
{
#if defined(NU_EMAC_PDMA_MEMCOPY)
if ((count >= NU_EMAC_PDMA_MEMCOPY_THRESHOLD))
return nu_pdma_memcpy(dest, src, count);
#endif
return memcpy(dest, src, count);
return rt_memcpy(dest, src, count);
}
static void nu_emac_reinit(nu_emac_t psNuEmac)
......@@ -437,12 +449,25 @@ static rt_err_t nu_emac_tx(rt_device_t dev, struct pbuf *p)
#endif
/* Return SUCCESS? */
#if defined(BSP_USING_MMU)
mmu_clean_invalidated_dcache((uint32_t)psNuEmac->memmgr.psCurrentTxDesc, sizeof(EMAC_DESCRIPTOR_T));
#endif
return (EMAC_SendPktWoCopy(&psNuEmac->memmgr, offset) == 1) ? RT_EOK : RT_ERROR;
}
void nu_emac_pbuf_free(struct pbuf *p)
{
nu_emac_lwip_pbuf_t my_buf = (nu_emac_lwip_pbuf_t)p;
SYS_ARCH_DECL_PROTECT(old_level);
SYS_ARCH_PROTECT(old_level);
//rt_kprintf("%08x %08x\n",my_buf, my_buf->rx_desc);
/* Update RX descriptor & trigger */
EMAC_RxTrigger(my_buf->psMemMgr, my_buf->rx_desc);
memp_free_pool(my_buf->memp_rx_pool, my_buf);
SYS_ARCH_UNPROTECT(old_level);
}
static struct pbuf *nu_emac_rx(rt_device_t dev)
{
nu_emac_t psNuEmac = (nu_emac_t)dev;
......@@ -452,30 +477,40 @@ static struct pbuf *nu_emac_rx(rt_device_t dev)
EMAC_T *EMAC = psNuEmac->memmgr.psEmac;
/* Check available data. */
#if defined(BSP_USING_MMU)
mmu_clean_invalidated_dcache((uint32_t)psNuEmac->memmgr.psCurrentRxDesc, sizeof(EMAC_DESCRIPTOR_T));
#endif
if ((avaialbe_size = EMAC_GetAvailRXBufSize(&psNuEmac->memmgr, &pu8DataBuf)) > 0)
{
/* Allocate RX packet buffer. */
p = pbuf_alloc(PBUF_RAW, avaialbe_size, PBUF_RAM);
if (p != RT_NULL)
EMAC_DESCRIPTOR_T * cur_rx = EMAC_RecvPktDoneWoRxTrigger(&psNuEmac->memmgr);
nu_emac_lwip_pbuf_t my_pbuf = (nu_emac_lwip_pbuf_t)memp_malloc_pool(psNuEmac->memp_rx_pool);
if (my_pbuf != RT_NULL)
{
RT_ASSERT(p->next == RT_NULL);
my_pbuf->p.custom_free_function = nu_emac_pbuf_free;
my_pbuf->psPktFrameDataBuf = (EMAC_FRAME_T *)pu8DataBuf;
my_pbuf->rx_desc = cur_rx;
my_pbuf->psMemMgr = &psNuEmac->memmgr;
my_pbuf->memp_rx_pool = psNuEmac->memp_rx_pool;
nu_emac_memcpy((void *)p->payload, (void *)pu8DataBuf, avaialbe_size);
#if defined(NU_EMAC_RX_DUMP)
nu_emac_pkt_dump("RX dump", p);
#if defined(BSP_USING_MMU)
mmu_invalidate_dcache((rt_uint32_t)pu8DataBuf, (rt_uint32_t)avaialbe_size);
#endif
//rt_kprintf("%08x, %08x, %d\n", my_pbuf, cur_rx, avaialbe_size);
p = pbuf_alloced_custom(PBUF_RAW,
avaialbe_size,
PBUF_REF,
&my_pbuf->p,
pu8DataBuf,
EMAC_MAX_PKT_SIZE);
if (p == RT_NULL)
{
rt_kprintf("%s : failed to alloted %08x\n", __func__, p);
EMAC_RxTrigger(&psNuEmac->memmgr, cur_rx);
}
}
else
{
NU_EMAC_TRACE("Can't allocate memory for RX packet.(%d)\n", avaialbe_size);
rt_kprintf("LWIP_MEMPOOL_ALLOC < 0!!\n");
EMAC_RxTrigger(&psNuEmac->memmgr, cur_rx);
}
/* Update RX descriptor & New trigger */
EMAC_RecvPktDone(&psNuEmac->memmgr);
}
else /* If it hasn't RX packet, it will enable interrupt. */
{
......@@ -614,6 +649,9 @@ static int rt_hw_nu_emac_init(void)
rt_hw_interrupt_install(psNuEMAC->irqn_rx, nu_emac_rx_isr, (void *)psNuEMAC, szTmp);
rt_hw_interrupt_umask(psNuEMAC->irqn_rx);
/* Initial zero_copy rx pool */
memp_init_pool(psNuEMAC->memp_rx_pool);
/* Register eth device */
ret = eth_device_init(&psNuEMAC->eth, psNuEMAC->name);
RT_ASSERT(ret == RT_EOK);
......@@ -624,6 +662,31 @@ static int rt_hw_nu_emac_init(void)
INIT_APP_EXPORT(rt_hw_nu_emac_init);
#endif /* #if defined( RT_USING_LWIP ) */
#endif /* #if defined( BSP_USING_EMAC ) */
#if 0
/*
Remeber src += lwipiperf_SRCS in components\net\lwip-*\SConscript
*/
#include "lwip/apps/lwiperf.h"
static void
lwiperf_report(void *arg, enum lwiperf_report_type report_type,
const ip_addr_t *local_addr, u16_t local_port, const ip_addr_t *remote_addr, u16_t remote_port,
u32_t bytes_transferred, u32_t ms_duration, u32_t bandwidth_kbitpsec)
{
LWIP_UNUSED_ARG(arg);
LWIP_UNUSED_ARG(local_addr);
LWIP_UNUSED_ARG(local_port);
rt_kprintf("IPERF report: type=%d, remote: %s:%d, total bytes: %"U32_F", duration in ms: %"U32_F", kbits/s: %"U32_F"\n",
(int)report_type, ipaddr_ntoa(remote_addr), (int)remote_port, bytes_transferred, ms_duration, bandwidth_kbitpsec);
}
void lwiperf_example_init(void)
{
lwiperf_start_tcp_server_default(lwiperf_report, NULL);
}
MSH_CMD_EXPORT(lwiperf_example_init, start lwip tcp server);
#endif
#endif /* #if defined( BSP_USING_EMAC ) && defined( RT_USING_LWIP )*/
......@@ -100,20 +100,32 @@ static nu_i2c_bus_t nu_i2c_arr [ ] =
static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
struct rt_i2c_msg msgs[],
rt_uint32_t num);
static rt_err_t nu_i2c_bus_control(struct rt_i2c_bus_device *bus,
rt_uint32_t u32Cmd,
rt_uint32_t u32Value);
static const struct rt_i2c_bus_device_ops nu_i2c_ops =
{
.master_xfer = nu_i2c_mst_xfer,
.slave_xfer = NULL,
.i2c_bus_control = NULL,
.i2c_bus_control = nu_i2c_bus_control
};
static rt_err_t nu_i2c_configure(nu_i2c_bus_t *bus)
static rt_err_t nu_i2c_bus_control(struct rt_i2c_bus_device *bus, rt_uint32_t u32Cmd, rt_uint32_t u32Value)
{
nu_i2c_bus_t *nu_i2c;
RT_ASSERT(bus != RT_NULL);
nu_i2c = (nu_i2c_bus_t *) bus;
bus->parent.ops = &nu_i2c_ops;
I2C_Open(bus->I2C, 100000);
switch (RT_I2C_DEV_CTRL_CLK)
{
case RT_I2C_DEV_CTRL_CLK:
I2C_SetBusClockFreq(nu_i2c->I2C, u32Value);
break;
default:
return -RT_EIO;
}
return RT_EOK;
}
......@@ -376,11 +388,14 @@ int rt_hw_i2c_init(void)
for (i = (I2C_START + 1); i < I2C_CNT; i++)
{
nu_sys_ipclk_enable(nu_i2c_arr[i].clkidx);
nu_sys_ip_reset(nu_i2c_arr[i].rstidx);
nu_i2c_configure(&nu_i2c_arr[i]);
/* Reset and initial IP engine. */
I2C_Close(nu_i2c_arr[i].I2C);
I2C_Open(nu_i2c_arr[i].I2C, 100000);
nu_i2c_arr[i].parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c_arr[i].parent, nu_i2c_arr[i].device_name);
RT_ASSERT(RT_EOK == ret);
}
......
......@@ -244,6 +244,11 @@ static rt_err_t nu_i2s_dai_setup(nu_i2s_t psNuI2s, struct rt_audio_configure *pc
i2sIoctl(I2S_SET_I2S_FORMAT, I2S_FORMAT_I2S, 0);
if (psNuI2s->AcodecOps->role == NU_ACODEC_ROLE_MASTER)
{
// Set as slave, source clock is XIN (12MHz)
i2sIoctl(I2S_SET_MODE, I2S_MODE_SLAVE, 0);
}
else
{
if (pconfig->samplerate % 11025)
{
......@@ -284,11 +289,6 @@ static rt_err_t nu_i2s_dai_setup(nu_i2s_t psNuI2s, struct rt_audio_configure *pc
// Set as master
i2sIoctl(I2S_SET_MODE, I2S_MODE_MASTER, 0);
}
else
{
// Set as slave, source clock is XIN (12MHz)
i2sIoctl(I2S_SET_MODE, I2S_MODE_SLAVE, 0);
}
LOG_I("Open I2S.");
......
......@@ -302,7 +302,6 @@ E_SYS_USB0_ID nu_sys_usb0_role(void)
#ifdef RT_USING_FINSH
#include <finsh.h>
FINSH_FUNCTION_EXPORT_ALIAS(rt_hw_cpu_reset, reset, restart the system);
#ifdef FINSH_USING_MSH
int cmd_reset(int argc, char **argv)
......
......@@ -30,6 +30,21 @@
#define NU_MAX_USBH_HUB_PORT_DEV USB_HUB_PORT_NUM
#define NU_USBHOST_MUTEX_INIT() { \
s_sUSBHDev.lock = rt_mutex_create("usbhost_lock", RT_IPC_FLAG_PRIO); \
RT_ASSERT(s_sUSBHDev.lock != RT_NULL); \
}
#define NU_USBHOST_LOCK() { \
rt_err_t result = rt_mutex_take(s_sUSBHDev.lock, RT_WAITING_FOREVER); \
RT_ASSERT(result == RT_EOK); \
}
#define NU_USBHOST_UNLOCK() { \
rt_err_t result = rt_mutex_release(s_sUSBHDev.lock); \
RT_ASSERT(result == RT_EOK); \
}
/* Private typedef --------------------------------------------------------------*/
typedef struct nu_port_dev
{
......@@ -59,6 +74,7 @@ struct nu_usbh_dev
E_SYS_IPRST rstidx;
E_SYS_IPCLK clkidx;
rt_thread_t polling_thread;
rt_mutex_t lock;
S_NU_RH_PORT_CTRL asPortCtrl[NU_MAX_USBH_PORT];
};
......@@ -398,15 +414,25 @@ static int nu_bulk_xfer(
UTR_T *psUTR,
int timeouts)
{
int ret;
ret = usbh_bulk_xfer(psUTR);
int ret = usbh_bulk_xfer(psUTR);
if (ret < 0)
return ret;
//wait transfer done
rt_completion_wait(&(psPortDev->utr_completion), timeouts);
if (rt_completion_wait(&(psPortDev->utr_completion), timeouts) < 0)
{
rt_kprintf("Request Timeout in %d ms!! (bulk_xfer)\n", timeouts);
rt_kprintf("psUTR->buff: %08x\n", psUTR->buff);
rt_kprintf("psUTR->data_len: %d\n", psUTR->data_len);
rt_kprintf("psUTR->xfer_len: %d\n", psUTR->xfer_len);
rt_kprintf("psUTR->ep: %08x\n", psUTR->ep);
rt_kprintf("psUTR->bIsTransferDone: %08x\n", psUTR->bIsTransferDone);
rt_kprintf("psUTR->status: %08x\n", psUTR->status);
rt_kprintf("psUTR->td_cnt: %08x\n", psUTR->td_cnt);
return -1;
}
return 0;
}
......@@ -477,6 +503,8 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
void *buffer_nonch = buffer;
NU_USBHOST_LOCK();
psPortCtrl = GetRHPortControlFromPipe(pipe);
if (psPortCtrl == RT_NULL)
{
......@@ -494,8 +522,11 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
if (buffer_nonch && nbytes)
{
buffer_nonch = psPortDev->asPipePktBuf[pipe->pipe_index];
rt_memcpy(buffer_nonch, buffer, nbytes);
mmu_clean_invalidated_dcache((uint32_t)buffer_nonch, nbytes);
if ((pipe->ep.bEndpointAddress & USB_DIR_MASK) == USB_DIR_OUT)
{
rt_memcpy(buffer_nonch, buffer, nbytes);
mmu_clean_dcache((uint32_t)buffer_nonch, nbytes);
}
}
#endif
......@@ -503,6 +534,7 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
if (pipe->ep.bmAttributes == USB_EP_ATTR_CONTROL)
{
int ret;
if (token == USBH_PID_SETUP)
{
struct urequest *psSetup = (struct urequest *)buffer_nonch;
......@@ -517,7 +549,7 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
else
{
/* Write data to USB device. */
//Trigger USBHostLib Ctril_Xfer
//Trigger USBHostLib Ctrl_Xfer
ret = nu_ctrl_xfer(psPortDev, psSetup, NULL, timeouts);
if (ret != psSetup->wLength)
goto exit_nu_pipe_xfer;
......@@ -571,7 +603,7 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
if (nu_bulk_xfer(psPortDev, psUTR, timeouts) < 0)
{
RT_DEBUG_LOG(RT_DEBUG_USB, ("nu_pipe_xfer ERROR: bulk transfer failed\n"));
goto exit_nu_pipe_xfer;
goto failreport_nu_pipe_xfer;
}
}
else if (pipe->ep.bmAttributes == USB_EP_ATTR_INT)
......@@ -588,7 +620,7 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
{
i32XferLen = nbytes;
}
return i32XferLen;
goto exit2_nu_pipe_xfer;
}
else if (pipe->ep.bmAttributes == USB_EP_ATTR_ISOC)
{
......@@ -599,6 +631,8 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
} //else
failreport_nu_pipe_xfer:
if (psUTR->bIsTransferDone == 0)
{
//Timeout
......@@ -628,29 +662,29 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
//Call callback
if (pipe->callback != RT_NULL)
{
struct uhost_msg msg;
msg.type = USB_MSG_CALLBACK;
msg.content.cb.function = pipe->callback;
msg.content.cb.context = pipe->user_data;
rt_usbh_event_signal(&msg);
pipe->callback(pipe);
}
if (pipe->status != UPIPE_STATUS_OK)
goto exit_nu_pipe_xfer;
exit_nu_pipe_xfer:
if (psUTR)
free_utr(psUTR);
exit2_nu_pipe_xfer:
#if defined(BSP_USING_MMU)
if ((nbytes) &&
(buffer_nonch != buffer))
{
mmu_invalidate_dcache((uint32_t)buffer_nonch, nbytes);
rt_memcpy(buffer, buffer_nonch, nbytes);
if ((pipe->ep.bEndpointAddress & USB_DIR_MASK) == USB_DIR_IN)
{
mmu_invalidate_dcache((uint32_t)buffer_nonch, nbytes);
rt_memcpy(buffer, buffer_nonch, nbytes);
}
}
#endif
if (psUTR)
free_utr(psUTR);
NU_USBHOST_UNLOCK();
return i32XferLen;
}
......@@ -660,7 +694,10 @@ static void nu_usbh_rh_thread_entry(void *parameter)
{
while (1)
{
NU_USBHOST_LOCK();
usbh_polling_root_hubs();
NU_USBHOST_UNLOCK();
rt_thread_mdelay(NU_USBHOST_HUB_POLLING_INTERVAL);
}
}
......@@ -871,6 +908,8 @@ int nu_usbh_register(void)
psUHCD->ops = &nu_uhcd_ops;
psUHCD->num_ports = NU_MAX_USBH_PORT;
NU_USBHOST_MUTEX_INIT();
res = rt_device_register(&psUHCD->parent, "usbh", RT_DEVICE_FLAG_DEACTIVATE);
RT_ASSERT(res == RT_EOK);
......
......@@ -7,6 +7,7 @@
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=16
# CONFIG_RT_USING_BIG_ENDIAN is not set
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
......@@ -21,6 +22,13 @@ CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=2048
# CONFIG_RT_USING_TIMER_SOFT is not set
#
# kservice optimization
#
# CONFIG_RT_KSERVICE_USING_STDLIB is not set
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_ASM_MEMCPY is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
......@@ -66,7 +74,8 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=256
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
CONFIG_RT_VER_NUM=0x40003
# CONFIG_RT_PRINTF_LONGLONG is not set
CONFIG_RT_VER_NUM=0x40004
CONFIG_ARCH_ARM=y
# CONFIG_RT_USING_CPU_FFS is not set
CONFIG_ARCH_ARM_ARM9=y
......@@ -89,19 +98,19 @@ CONFIG_RT_MAIN_THREAD_PRIORITY=10
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_RT_USING_MSH=y
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_CMD_SIZE=80
CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
# CONFIG_FINSH_USING_MSH_ONLY is not set
CONFIG_FINSH_ARG_MAX=10
#
......@@ -135,6 +144,7 @@ CONFIG_RT_DFS_ELM_DRIVES=8
CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=4096
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
CONFIG_RT_DFS_ELM_REENTRANT=y
CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000
CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
......@@ -149,6 +159,8 @@ CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048
CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_USING_SERIAL_V1=y
# CONFIG_RT_USING_SERIAL_V2 is not set
CONFIG_RT_SERIAL_USING_DMA=y
CONFIG_RT_SERIAL_RB_BUFSZ=2048
CONFIG_RT_USING_CAN=y
......@@ -171,9 +183,6 @@ CONFIG_RT_MTD_NAND_DEBUG=y
CONFIG_RT_USING_RTC=y
CONFIG_RT_USING_ALARM=y
# CONFIG_RT_USING_SOFT_RTC is not set
CONFIG_RTC_SYNC_USING_NTP=y
CONFIG_RTC_NTP_FIRST_SYNC_DELAY=30
CONFIG_RTC_NTP_SYNC_PERIOD=3600
# CONFIG_RT_USING_SDIO is not set
CONFIG_RT_USING_SPI=y
CONFIG_RT_USING_QSPI=y
......@@ -219,6 +228,7 @@ CONFIG_RT_HWCRYPTO_USING_RNG=y
#
# Using USB
#
CONFIG_RT_USING_USB=y
CONFIG_RT_USING_USB_HOST=y
CONFIG_RT_USBH_MSTORAGE=y
CONFIG_UDISK_MOUNTPOINT="/mnt/udisk"
......@@ -248,13 +258,16 @@ CONFIG_RT_USB_MSTORAGE_DISK_NAME="ramdisk1"
# POSIX layer and C standard library
#
CONFIG_RT_USING_LIBC=y
CONFIG_RT_LIBC_USING_TIME=y
# CONFIG_RT_LIBC_USING_FILEIO is not set
# CONFIG_RT_USING_MODULE is not set
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_RT_USING_PTHREADS is not set
CONFIG_RT_USING_POSIX=y
# CONFIG_RT_USING_POSIX_MMAP is not set
# CONFIG_RT_USING_POSIX_TERMIOS is not set
# CONFIG_RT_USING_POSIX_GETLINE is not set
# CONFIG_RT_USING_POSIX_AIO is not set
# CONFIG_RT_USING_MODULE is not set
#
# Network
......@@ -264,7 +277,7 @@ CONFIG_RT_USING_POSIX=y
# Socket abstraction layer
#
CONFIG_RT_USING_SAL=y
CONFIG_SAL_INTERNET_CHECK=y
# CONFIG_SAL_INTERNET_CHECK is not set
#
# protocol stack implement
......@@ -290,8 +303,9 @@ CONFIG_NETDEV_IPV6=0
#
CONFIG_RT_USING_LWIP=y
# CONFIG_RT_USING_LWIP141 is not set
CONFIG_RT_USING_LWIP202=y
# CONFIG_RT_USING_LWIP212 is not set
# CONFIG_RT_USING_LWIP202 is not set
# CONFIG_RT_USING_LWIP203 is not set
CONFIG_RT_USING_LWIP212=y
# CONFIG_RT_USING_LWIP_IPV6 is not set
CONFIG_RT_LWIP_MEM_ALIGNMENT=4
CONFIG_RT_LWIP_IGMP=y
......@@ -305,30 +319,30 @@ CONFIG_IP_SOF_BROADCAST_RECV=1
#
# Static IPv4 Address
#
CONFIG_RT_LWIP_IPADDR="192.168.1.30"
CONFIG_RT_LWIP_GWADDR="192.168.1.1"
CONFIG_RT_LWIP_IPADDR="192.168.31.55"
CONFIG_RT_LWIP_GWADDR="192.168.31.1"
CONFIG_RT_LWIP_MSKADDR="255.255.255.0"
CONFIG_RT_LWIP_UDP=y
CONFIG_RT_LWIP_TCP=y
CONFIG_RT_LWIP_RAW=y
# CONFIG_RT_LWIP_PPP is not set
CONFIG_RT_MEMP_NUM_NETCONN=32
CONFIG_RT_MEMP_NUM_NETCONN=16
CONFIG_RT_LWIP_PBUF_NUM=256
CONFIG_RT_LWIP_RAW_PCB_NUM=32
CONFIG_RT_LWIP_UDP_PCB_NUM=32
CONFIG_RT_LWIP_TCP_PCB_NUM=32
CONFIG_RT_LWIP_TCP_SEG_NUM=256
CONFIG_RT_LWIP_TCP_SND_BUF=32768
CONFIG_RT_LWIP_TCP_WND=10240
CONFIG_RT_LWIP_RAW_PCB_NUM=16
CONFIG_RT_LWIP_UDP_PCB_NUM=16
CONFIG_RT_LWIP_TCP_PCB_NUM=16
CONFIG_RT_LWIP_TCP_SEG_NUM=64
CONFIG_RT_LWIP_TCP_SND_BUF=16384
CONFIG_RT_LWIP_TCP_WND=65535
CONFIG_RT_LWIP_TCPTHREAD_PRIORITY=10
CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=32
CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=256
CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=4096
# CONFIG_LWIP_NO_RX_THREAD is not set
# CONFIG_LWIP_NO_TX_THREAD is not set
CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=1024
CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=32
# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set
CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=4096
CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=256
CONFIG_RT_LWIP_REASSEMBLY_FRAG=y
CONFIG_LWIP_NETIF_STATUS_CALLBACK=1
CONFIG_LWIP_NETIF_LINK_CALLBACK=1
CONFIG_SO_REUSE=1
......@@ -362,8 +376,15 @@ CONFIG_RT_LWIP_USING_PING=y
CONFIG_RT_USING_UTEST=y
CONFIG_UTEST_THR_STACK_SIZE=4096
CONFIG_UTEST_THR_PRIORITY=20
# CONFIG_RT_USING_VAR_EXPORT is not set
# CONFIG_RT_USING_RT_LINK is not set
# CONFIG_RT_USING_LWP is not set
#
# RT-Thread Utestcases
#
# CONFIG_RT_USING_UTESTCASES is not set
#
# RT-Thread online packages
#
......@@ -490,11 +511,21 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0"
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
# CONFIG_PKG_USING_WAVPLAYER is not set
CONFIG_PKG_USING_WAVPLAYER=y
CONFIG_PKG_WAVPLAYER_PATH="/packages/multimedia/wavplayer"
CONFIG_PKG_WP_USING_PLAY=y
CONFIG_PKG_WP_PLAY_DEVICE="sound0"
CONFIG_PKG_WP_USING_RECORD=y
CONFIG_PKG_WP_RECORD_DEVICE="sound0"
# CONFIG_PKG_USING_WAVPLAYER_V020 is not set
CONFIG_PKG_USING_WAVPLAYER_LATEST_VERSION=y
CONFIG_PKG_WAVPLAYER_VER="latest"
# CONFIG_PKG_USING_TJPGD is not set
# CONFIG_PKG_USING_PDFGEN is not set
# CONFIG_PKG_USING_HELIX is not set
# CONFIG_PKG_USING_AZUREGUIX is not set
# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
# CONFIG_PKG_USING_NUEMWIN is not set
#
# tools packages
......@@ -518,19 +549,6 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0"
# CONFIG_PKG_USING_BS8116A is not set
# CONFIG_PKG_USING_GPS_RMC is not set
# CONFIG_PKG_USING_URLENCODE is not set
# CONFIG_PKG_USING_UMCN is not set
# CONFIG_PKG_USING_LWRB2RTT is not set
# CONFIG_PKG_USING_CPU_USAGE is not set
# CONFIG_PKG_USING_GBK2UTF8 is not set
# CONFIG_PKG_USING_VCONSOLE is not set
# CONFIG_PKG_USING_KDB is not set
# CONFIG_PKG_USING_WAMR is not set
# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
# CONFIG_PKG_USING_LWLOG is not set
# CONFIG_PKG_USING_ANV_TRACE is not set
# CONFIG_PKG_USING_ANV_MEMLEAK is not set
# CONFIG_PKG_USING_ANV_TESTSUIT is not set
# CONFIG_PKG_USING_ANV_BENCH is not set
#
# system packages
......@@ -592,6 +610,7 @@ CONFIG_PKG_RAMDISK_VER="latest"
# CONFIG_PKG_USING_QFPLIB_M3 is not set
# CONFIG_PKG_USING_LPM is not set
# CONFIG_PKG_USING_TLSF is not set
# CONFIG_PKG_USING_EVENT_RECORDER is not set
#
# peripheral libraries and drivers
......@@ -659,6 +678,7 @@ CONFIG_PKG_RAMDISK_VER="latest"
# CONFIG_PKG_USING_LIBNFC is not set
# CONFIG_PKG_USING_MFOC is not set
# CONFIG_PKG_USING_TMC51XX is not set
# CONFIG_PKG_USING_TCA9534 is not set
#
# AI packages
......@@ -705,23 +725,8 @@ CONFIG_PKG_OPTPARSE_VER="latest"
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
CONFIG_PKG_USING_VI=y
CONFIG_PKG_VI_PATH="/packages/misc/vi"
CONFIG_VI_MAX_LEN=4096
# CONFIG_VI_ENABLE_8BIT is not set
CONFIG_VI_ENABLE_COLON=y
CONFIG_VI_ENABLE_YANKMARK=y
CONFIG_VI_ENABLE_SEARCH=y
CONFIG_VI_ENABLE_DOT_CMD=y
CONFIG_VI_ENABLE_READONLY=y
CONFIG_VI_ENABLE_SETOPTS=y
CONFIG_VI_ENABLE_SET=y
CONFIG_VI_ENABLE_VI_ASK_TERMINAL=y
CONFIG_VI_ENABLE_UNDO=y
CONFIG_VI_ENABLE_UNDO_QUEUE=y
CONFIG_VI_UNDO_QUEUE_MAX=256
CONFIG_PKG_USING_VI_LATEST_VERSION=y
CONFIG_PKG_VI_VER="latest"
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_VI_LATEST_VERSION is not set
# CONFIG_PKG_USING_KI is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_VT100 is not set
......@@ -751,6 +756,7 @@ CONFIG_NU_PKG_USING_DEMO=y
# CONFIG_NU_PKG_USING_MAX31875 is not set
# CONFIG_NU_PKG_USING_NAU88L25 is not set
CONFIG_NU_PKG_USING_NAU8822=y
# CONFIG_NU_PKG_USING_DA9062 is not set
# CONFIG_NU_PKG_USING_ILI9341 is not set
CONFIG_NU_PKG_USING_SPINAND=y
......@@ -762,7 +768,7 @@ CONFIG_NU_PKG_USING_SPINAND=y
# On-chip Peripheral Drivers
#
CONFIG_SOC_SERIES_NUC980=y
# CONFIG_BSP_USE_STDDRIVER_SOURCE is not set
CONFIG_BSP_USE_STDDRIVER_SOURCE=y
CONFIG_BSP_USING_MMU=y
CONFIG_BSP_USING_PDMA=y
CONFIG_NU_PDMA_MEMFUN_ACTOR_MAX=2
......
......@@ -7,6 +7,7 @@
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=16
# CONFIG_RT_USING_BIG_ENDIAN is not set
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
......@@ -27,6 +28,7 @@ CONFIG_IDLE_THREAD_STACK_SIZE=2048
#
# CONFIG_RT_KSERVICE_USING_STDLIB is not set
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_ASM_MEMCPY is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
......@@ -72,6 +74,7 @@ CONFIG_RT_USING_INTERRUPT_INFO=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=256
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
# CONFIG_RT_PRINTF_LONGLONG is not set
CONFIG_RT_VER_NUM=0x40004
CONFIG_ARCH_ARM=y
# CONFIG_RT_USING_CPU_FFS is not set
......@@ -95,19 +98,19 @@ CONFIG_RT_MAIN_THREAD_PRIORITY=10
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_RT_USING_MSH=y
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_CMD_SIZE=80
CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
# CONFIG_FINSH_USING_MSH_ONLY is not set
CONFIG_FINSH_ARG_MAX=10
#
......@@ -141,6 +144,7 @@ CONFIG_RT_DFS_ELM_DRIVES=8
CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=4096
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
CONFIG_RT_DFS_ELM_REENTRANT=y
CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000
CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
......@@ -155,6 +159,8 @@ CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048
CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_USING_SERIAL_V1=y
# CONFIG_RT_USING_SERIAL_V2 is not set
# CONFIG_RT_SERIAL_USING_DMA is not set
CONFIG_RT_SERIAL_RB_BUFSZ=2048
CONFIG_RT_USING_CAN=y
......@@ -205,6 +211,7 @@ CONFIG_RT_INPUT_CAPTURE_RB_SIZE=100
#
# Using USB
#
CONFIG_RT_USING_USB=y
CONFIG_RT_USING_USB_HOST=y
CONFIG_RT_USBH_MSTORAGE=y
CONFIG_UDISK_MOUNTPOINT="/mnt/udisk"
......@@ -234,14 +241,16 @@ CONFIG_RT_USB_MSTORAGE_DISK_NAME="ramdisk1"
# POSIX layer and C standard library
#
CONFIG_RT_USING_LIBC=y
CONFIG_RT_LIBC_USING_TIME=y
# CONFIG_RT_LIBC_USING_FILEIO is not set
# CONFIG_RT_USING_MODULE is not set
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_RT_USING_PTHREADS is not set
CONFIG_RT_USING_POSIX=y
# CONFIG_RT_USING_POSIX_MMAP is not set
# CONFIG_RT_USING_POSIX_TERMIOS is not set
# CONFIG_RT_USING_POSIX_GETLINE is not set
# CONFIG_RT_USING_POSIX_AIO is not set
# CONFIG_RT_USING_MODULE is not set
CONFIG_RT_LIBC_FIXED_TIMEZONE=8
#
# Network
......@@ -278,6 +287,7 @@ CONFIG_NETDEV_IPV6=0
CONFIG_RT_USING_LWIP=y
# CONFIG_RT_USING_LWIP141 is not set
CONFIG_RT_USING_LWIP202=y
# CONFIG_RT_USING_LWIP203 is not set
# CONFIG_RT_USING_LWIP212 is not set
# CONFIG_RT_USING_LWIP_IPV6 is not set
CONFIG_RT_LWIP_MEM_ALIGNMENT=4
......@@ -349,6 +359,7 @@ CONFIG_RT_LWIP_USING_PING=y
CONFIG_RT_USING_UTEST=y
CONFIG_UTEST_THR_STACK_SIZE=4096
CONFIG_UTEST_THR_PRIORITY=20
# CONFIG_RT_USING_VAR_EXPORT is not set
# CONFIG_RT_USING_RT_LINK is not set
# CONFIG_RT_USING_LWP is not set
......@@ -490,8 +501,6 @@ CONFIG_PKG_USING_NUEMWIN_GUIDEMO=y
CONFIG_PKG_USING_NUEMWIN_LATEST_VERSION=y
CONFIG_PKG_NUEMWIN_VER="latest"
CONFIG_PKG_NUEMWIN_VER_NUM=0x99999
# CONFIG_PKG_USING_MP3PLAYER is not set
# CONFIG_PKG_USING_TINYJPEG is not set
#
# tools packages
......@@ -500,7 +509,6 @@ CONFIG_PKG_NUEMWIN_VER_NUM=0x99999
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_SEGGER_RTT is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
......@@ -516,49 +524,10 @@ CONFIG_PKG_NUEMWIN_VER_NUM=0x99999
# CONFIG_PKG_USING_BS8116A is not set
# CONFIG_PKG_USING_GPS_RMC is not set
# CONFIG_PKG_USING_URLENCODE is not set
# CONFIG_PKG_USING_UMCN is not set
# CONFIG_PKG_USING_LWRB2RTT is not set
# CONFIG_PKG_USING_CPU_USAGE is not set
# CONFIG_PKG_USING_GBK2UTF8 is not set
# CONFIG_PKG_USING_VCONSOLE is not set
# CONFIG_PKG_USING_KDB is not set
# CONFIG_PKG_USING_WAMR is not set
# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
# CONFIG_PKG_USING_LWLOG is not set
# CONFIG_PKG_USING_ANV_TRACE is not set
# CONFIG_PKG_USING_ANV_MEMLEAK is not set
# CONFIG_PKG_USING_ANV_TESTSUIT is not set
# CONFIG_PKG_USING_ANV_BENCH is not set
# CONFIG_PKG_USING_DEVMEM is not set
# CONFIG_PKG_USING_REGEX is not set
CONFIG_PKG_USING_MEM_SANDBOX=y
CONFIG_PKG_MEM_SANDBOX_PATH="/packages/tools/mem_sandbox"
CONFIG_PKG_USING_MEM_SANDBOX_LATEST_VERSION=y
CONFIG_PKG_MEM_SANDBOX_VER="latest"
# CONFIG_PKG_USING_SOLAR_TERMS is not set
# CONFIG_PKG_USING_GAN_ZHI is not set
#
# system packages
#
#
# acceleration: Assembly language or algorithmic acceleration packages
#
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
# CONFIG_PKG_USING_QFPLIB_M3 is not set
#
# Micrium: Micrium software products porting for RT-Thread
#
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
# CONFIG_PKG_USING_UC_CRC is not set
# CONFIG_PKG_USING_UC_CLK is not set
# CONFIG_PKG_USING_UC_COMMON is not set
# CONFIG_PKG_USING_UC_MODBUS is not set
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_PERSIMMON is not set
# CONFIG_PKG_USING_CAIRO is not set
......@@ -626,9 +595,23 @@ CONFIG_PKG_USING_RAMDISK_LATEST_VERSION=y
CONFIG_PKG_RAMDISK_VER="latest"
# CONFIG_PKG_USING_MININI is not set
# CONFIG_PKG_USING_QBOOT is not set
#
# Micrium: Micrium software products porting for RT-Thread
#
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
# CONFIG_PKG_USING_UC_CRC is not set
# CONFIG_PKG_USING_UC_CLK is not set
# CONFIG_PKG_USING_UC_COMMON is not set
# CONFIG_PKG_USING_UC_MODBUS is not set
# CONFIG_PKG_USING_PPOOL is not set
# CONFIG_PKG_USING_OPENAMP is not set
# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
# CONFIG_PKG_USING_QFPLIB_M3 is not set
# CONFIG_PKG_USING_LPM is not set
# CONFIG_PKG_USING_TLSF is not set
# CONFIG_PKG_USING_EVENT_RECORDER is not set
......@@ -656,6 +639,7 @@ CONFIG_PKG_RAMDISK_VER="latest"
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AGILE_BUTTON is not set
# CONFIG_PKG_USING_AGILE_LED is not set
# CONFIG_PKG_USING_AT24CXX is not set
......@@ -699,9 +683,6 @@ CONFIG_PKG_RAMDISK_VER="latest"
# CONFIG_PKG_USING_MFOC is not set
# CONFIG_PKG_USING_TMC51XX is not set
# CONFIG_PKG_USING_TCA9534 is not set
# CONFIG_PKG_USING_KOBUKI is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_MICRO_ROS is not set
#
# AI packages
......@@ -733,7 +714,6 @@ CONFIG_PKG_OPTPARSE_VER="latest"
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_MINIZIP is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
......@@ -749,27 +729,8 @@ CONFIG_PKG_OPTPARSE_VER="latest"
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
CONFIG_PKG_USING_VI=y
CONFIG_PKG_VI_PATH="/packages/misc/vi"
CONFIG_VI_SANDBOX_SIZE_KB=20
CONFIG_VI_MAX_LEN=4096
# CONFIG_VI_ENABLE_8BIT is not set
CONFIG_VI_ENABLE_COLON=y
CONFIG_VI_ENABLE_COLON_EXPAND=y
CONFIG_VI_ENABLE_YANKMARK=y
CONFIG_VI_ENABLE_SEARCH=y
CONFIG_VI_ENABLE_DOT_CMD=y
CONFIG_VI_ENABLE_READONLY=y
CONFIG_VI_ENABLE_SETOPTS=y
CONFIG_VI_ENABLE_SET=y
# CONFIG_VI_ENABLE_WIN_RESIZE is not set
CONFIG_VI_ENABLE_VI_ASK_TERMINAL=y
CONFIG_VI_ENABLE_UNDO=y
CONFIG_VI_ENABLE_UNDO_QUEUE=y
CONFIG_VI_UNDO_QUEUE_MAX=256
CONFIG_VI_ENABLE_VERBOSE_STATUS=y
CONFIG_PKG_USING_VI_LATEST_VERSION=y
CONFIG_PKG_VI_VER="latest"
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_VI_LATEST_VERSION is not set
# CONFIG_PKG_USING_KI is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_VT100 is not set
......@@ -799,6 +760,7 @@ CONFIG_NU_PKG_USING_UTILS=y
# CONFIG_NU_PKG_USING_MAX31875 is not set
# CONFIG_NU_PKG_USING_NAU88L25 is not set
CONFIG_NU_PKG_USING_NAU8822=y
# CONFIG_NU_PKG_USING_DA9062 is not set
# CONFIG_NU_PKG_USING_ILI9341 is not set
# CONFIG_NU_PKG_USING_SPINAND is not set
......@@ -859,9 +821,8 @@ CONFIG_BSP_USING_I2C=y
CONFIG_BSP_USING_I2C0=y
# CONFIG_BSP_USING_I2C1 is not set
CONFIG_BSP_USING_SDH=y
# CONFIG_BSP_USING_EMMC is not set
CONFIG_BSP_USING_SDH0=y
# CONFIG_BSP_USING_SDH1 is not set
# CONFIG_BSP_USING_SDH0 is not set
CONFIG_BSP_USING_SDH1=y
CONFIG_NU_SDH_HOTPLUG=y
# CONFIG_NU_SDH_MOUNT_ON_ROOT is not set
CONFIG_BSP_USING_CAN=y
......@@ -907,3 +868,5 @@ CONFIG_BOARD_USING_USB1_HOST=y
#
# Board extended module drivers
#
CONFIG_BOARD_USE_UTEST=y
CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.nk-n9h30.test.utest."
......@@ -7,6 +7,7 @@
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=16
# CONFIG_RT_USING_BIG_ENDIAN is not set
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
......@@ -21,6 +22,13 @@ CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=2048
# CONFIG_RT_USING_TIMER_SOFT is not set
#
# kservice optimization
#
# CONFIG_RT_KSERVICE_USING_STDLIB is not set
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_ASM_MEMCPY is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
......@@ -66,7 +74,8 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=256
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
CONFIG_RT_VER_NUM=0x40003
# CONFIG_RT_PRINTF_LONGLONG is not set
CONFIG_RT_VER_NUM=0x40004
CONFIG_ARCH_ARM=y
# CONFIG_RT_USING_CPU_FFS is not set
CONFIG_ARCH_ARM_ARM9=y
......@@ -89,19 +98,19 @@ CONFIG_RT_MAIN_THREAD_PRIORITY=10
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_RT_USING_MSH=y
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_CMD_SIZE=80
CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
# CONFIG_FINSH_USING_MSH_ONLY is not set
CONFIG_FINSH_ARG_MAX=10
#
......@@ -135,11 +144,10 @@ CONFIG_RT_DFS_ELM_DRIVES=8
CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=4096
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
CONFIG_RT_DFS_ELM_REENTRANT=y
CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000
CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_UFFS is not set
# CONFIG_RT_USING_DFS_JFFS2 is not set
# CONFIG_RT_USING_DFS_NFS is not set
#
......@@ -151,6 +159,8 @@ CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048
CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_USING_SERIAL_V1=y
# CONFIG_RT_USING_SERIAL_V2 is not set
CONFIG_RT_SERIAL_USING_DMA=y
CONFIG_RT_SERIAL_RB_BUFSZ=2048
CONFIG_RT_USING_CAN=y
......@@ -179,7 +189,7 @@ CONFIG_RT_SFUD_USING_SFDP=y
CONFIG_RT_SFUD_USING_FLASH_INFO_TABLE=y
CONFIG_RT_SFUD_USING_QSPI=y
CONFIG_RT_SFUD_SPI_MAX_HZ=50000000
CONFIG_RT_DEBUG_SFUD=y
# CONFIG_RT_DEBUG_SFUD is not set
# CONFIG_RT_USING_ENC28J60 is not set
# CONFIG_RT_USING_SPI_WIFI is not set
CONFIG_RT_USING_WDT=y
......@@ -217,9 +227,11 @@ CONFIG_RT_HWCRYPTO_USING_RNG=y
#
# Using USB
#
CONFIG_RT_USING_USB=y
CONFIG_RT_USING_USB_HOST=y
CONFIG_RT_USBH_MSTORAGE=y
CONFIG_UDISK_MOUNTPOINT="/mnt/udisk"
# CONFIG_RT_USBH_HID is not set
CONFIG_RT_USING_USB_DEVICE=y
CONFIG_RT_USBD_THREAD_STACK_SZ=4096
CONFIG_USB_VENDOR_ID=0x0FFE
......@@ -245,13 +257,16 @@ CONFIG_RT_USB_MSTORAGE_DISK_NAME="ramdisk1"
# POSIX layer and C standard library
#
CONFIG_RT_USING_LIBC=y
CONFIG_RT_LIBC_USING_TIME=y
# CONFIG_RT_LIBC_USING_FILEIO is not set
# CONFIG_RT_USING_MODULE is not set
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_RT_USING_PTHREADS is not set
CONFIG_RT_USING_POSIX=y
# CONFIG_RT_USING_POSIX_MMAP is not set
# CONFIG_RT_USING_POSIX_TERMIOS is not set
# CONFIG_RT_USING_POSIX_GETLINE is not set
# CONFIG_RT_USING_POSIX_AIO is not set
# CONFIG_RT_USING_MODULE is not set
#
# Network
......@@ -261,7 +276,7 @@ CONFIG_RT_USING_POSIX=y
# Socket abstraction layer
#
CONFIG_RT_USING_SAL=y
CONFIG_SAL_INTERNET_CHECK=y
# CONFIG_SAL_INTERNET_CHECK is not set
#
# protocol stack implement
......@@ -287,8 +302,9 @@ CONFIG_NETDEV_IPV6=0
#
CONFIG_RT_USING_LWIP=y
# CONFIG_RT_USING_LWIP141 is not set
CONFIG_RT_USING_LWIP202=y
# CONFIG_RT_USING_LWIP212 is not set
# CONFIG_RT_USING_LWIP202 is not set
# CONFIG_RT_USING_LWIP203 is not set
CONFIG_RT_USING_LWIP212=y
# CONFIG_RT_USING_LWIP_IPV6 is not set
CONFIG_RT_LWIP_MEM_ALIGNMENT=4
CONFIG_RT_LWIP_IGMP=y
......@@ -302,30 +318,30 @@ CONFIG_IP_SOF_BROADCAST_RECV=1
#
# Static IPv4 Address
#
CONFIG_RT_LWIP_IPADDR="192.168.1.30"
CONFIG_RT_LWIP_GWADDR="192.168.1.1"
CONFIG_RT_LWIP_IPADDR="192.168.31.55"
CONFIG_RT_LWIP_GWADDR="192.168.31.1"
CONFIG_RT_LWIP_MSKADDR="255.255.255.0"
CONFIG_RT_LWIP_UDP=y
CONFIG_RT_LWIP_TCP=y
CONFIG_RT_LWIP_RAW=y
# CONFIG_RT_LWIP_PPP is not set
CONFIG_RT_MEMP_NUM_NETCONN=32
CONFIG_RT_MEMP_NUM_NETCONN=16
CONFIG_RT_LWIP_PBUF_NUM=256
CONFIG_RT_LWIP_RAW_PCB_NUM=32
CONFIG_RT_LWIP_UDP_PCB_NUM=32
CONFIG_RT_LWIP_TCP_PCB_NUM=32
CONFIG_RT_LWIP_TCP_SEG_NUM=256
CONFIG_RT_LWIP_TCP_SND_BUF=32768
CONFIG_RT_LWIP_TCP_WND=10240
CONFIG_RT_LWIP_RAW_PCB_NUM=16
CONFIG_RT_LWIP_UDP_PCB_NUM=16
CONFIG_RT_LWIP_TCP_PCB_NUM=16
CONFIG_RT_LWIP_TCP_SEG_NUM=64
CONFIG_RT_LWIP_TCP_SND_BUF=16384
CONFIG_RT_LWIP_TCP_WND=65535
CONFIG_RT_LWIP_TCPTHREAD_PRIORITY=10
CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=32
CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=256
CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=4096
# CONFIG_LWIP_NO_RX_THREAD is not set
# CONFIG_LWIP_NO_TX_THREAD is not set
CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=1024
CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=32
# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set
CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=4096
CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=256
CONFIG_RT_LWIP_REASSEMBLY_FRAG=y
CONFIG_LWIP_NETIF_STATUS_CALLBACK=1
CONFIG_LWIP_NETIF_LINK_CALLBACK=1
CONFIG_SO_REUSE=1
......@@ -359,8 +375,15 @@ CONFIG_RT_LWIP_USING_PING=y
CONFIG_RT_USING_UTEST=y
CONFIG_UTEST_THR_STACK_SIZE=4096
CONFIG_UTEST_THR_PRIORITY=20
# CONFIG_RT_USING_VAR_EXPORT is not set
# CONFIG_RT_USING_RT_LINK is not set
# CONFIG_RT_USING_LWP is not set
#
# RT-Thread Utestcases
#
# CONFIG_RT_USING_UTESTCASES is not set
#
# RT-Thread online packages
#
......@@ -444,8 +467,6 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0"
# CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set
# CONFIG_PKG_USING_PROTOBUF_C is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_DLT645 is not set
# CONFIG_PKG_USING_QXWZ is not set
# CONFIG_PKG_USING_SMTP_CLIENT is not set
......@@ -460,6 +481,12 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0"
# CONFIG_PKG_USING_BTSTACK is not set
# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
# CONFIG_PKG_USING_MAVLINK is not set
# CONFIG_PKG_USING_RAPIDJSON is not set
# CONFIG_PKG_USING_BSAL is not set
# CONFIG_PKG_USING_AGILE_MODBUS is not set
# CONFIG_PKG_USING_AGILE_FTP is not set
# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
#
# security packages
......@@ -485,9 +512,11 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0"
# CONFIG_PKG_USING_STEMWIN is not set
# CONFIG_PKG_USING_WAVPLAYER is not set
# CONFIG_PKG_USING_TJPGD is not set
# CONFIG_PKG_USING_PDFGEN is not set
# CONFIG_PKG_USING_HELIX is not set
# CONFIG_PKG_USING_AZUREGUIX is not set
# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
# CONFIG_PKG_USING_NUEMWIN is not set
#
# tools packages
......@@ -511,13 +540,6 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0"
# CONFIG_PKG_USING_BS8116A is not set
# CONFIG_PKG_USING_GPS_RMC is not set
# CONFIG_PKG_USING_URLENCODE is not set
# CONFIG_PKG_USING_UMCN is not set
# CONFIG_PKG_USING_LWRB2RTT is not set
# CONFIG_PKG_USING_CPU_USAGE is not set
# CONFIG_PKG_USING_GBK2UTF8 is not set
# CONFIG_PKG_USING_VCONSOLE is not set
# CONFIG_PKG_USING_KDB is not set
# CONFIG_PKG_USING_WAMR is not set
#
# system packages
......@@ -526,7 +548,6 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0"
# CONFIG_PKG_USING_PERSIMMON is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
CONFIG_PKG_USING_FAL=y
CONFIG_PKG_FAL_PATH="/packages/system/fal"
......@@ -550,6 +571,9 @@ CONFIG_PKG_FAL_VER_NUM=0x99999
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_DFS_JFFS2 is not set
# CONFIG_PKG_USING_DFS_UFFS is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set
# CONFIG_PKG_USING_EV is not set
......@@ -575,11 +599,14 @@ CONFIG_PKG_RAMDISK_VER="latest"
# CONFIG_PKG_USING_UC_MODBUS is not set
# CONFIG_PKG_USING_PPOOL is not set
# CONFIG_PKG_USING_OPENAMP is not set
# CONFIG_PKG_USING_RT_PRINTF is not set
# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
# CONFIG_PKG_USING_QFPLIB_M3 is not set
# CONFIG_PKG_USING_LPM is not set
# CONFIG_PKG_USING_TLSF is not set
# CONFIG_PKG_USING_EVENT_RECORDER is not set
#
# peripheral libraries and drivers
......@@ -642,6 +669,25 @@ CONFIG_PKG_RAMDISK_VER="latest"
# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
# CONFIG_PKG_USING_VDEVICE is not set
# CONFIG_PKG_USING_SGM706 is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set
# CONFIG_PKG_USING_RDA58XX is not set
# CONFIG_PKG_USING_LIBNFC is not set
# CONFIG_PKG_USING_MFOC is not set
# CONFIG_PKG_USING_TMC51XX is not set
# CONFIG_PKG_USING_TCA9534 is not set
#
# AI packages
#
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_QUEST is not set
# CONFIG_PKG_USING_NAXOS is not set
#
# miscellaneous packages
......@@ -649,9 +695,8 @@ CONFIG_PKG_RAMDISK_VER="latest"
# CONFIG_PKG_USING_LIBCSV is not set
CONFIG_PKG_USING_OPTPARSE=y
CONFIG_PKG_OPTPARSE_PATH="/packages/misc/optparse"
CONFIG_PKG_USING_OPTPARSE_V100=y
# CONFIG_PKG_USING_OPTPARSE_LATEST_VERSION is not set
CONFIG_PKG_OPTPARSE_VER="v1.0.0"
CONFIG_PKG_USING_OPTPARSE_LATEST_VERSION=y
CONFIG_PKG_OPTPARSE_VER="latest"
# CONFIG_OPTPARSE_USING_DEMO is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
......@@ -676,43 +721,27 @@ CONFIG_PKG_OPTPARSE_VER="v1.0.0"
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
CONFIG_PKG_USING_VI=y
CONFIG_PKG_VI_PATH="/packages/misc/vi"
CONFIG_VI_MAX_LEN=4096
# CONFIG_VI_ENABLE_8BIT is not set
CONFIG_VI_ENABLE_COLON=y
CONFIG_VI_ENABLE_YANKMARK=y
CONFIG_VI_ENABLE_SEARCH=y
CONFIG_VI_ENABLE_DOT_CMD=y
CONFIG_VI_ENABLE_READONLY=y
CONFIG_VI_ENABLE_SETOPTS=y
CONFIG_VI_ENABLE_SET=y
CONFIG_VI_ENABLE_VI_ASK_TERMINAL=y
CONFIG_VI_ENABLE_UNDO=y
CONFIG_VI_ENABLE_UNDO_QUEUE=y
CONFIG_VI_UNDO_QUEUE_MAX=256
CONFIG_PKG_USING_VI_LATEST_VERSION=y
CONFIG_PKG_VI_VER="latest"
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_VI_LATEST_VERSION is not set
# CONFIG_PKG_USING_KI is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
#
# games: games run on RT-Thread console
# entertainment: terminal games and other interesting software packages
#
# CONFIG_PKG_USING_THREES is not set
# CONFIG_PKG_USING_2048 is not set
# CONFIG_PKG_USING_SNAKE is not set
# CONFIG_PKG_USING_TETRIS is not set
# CONFIG_PKG_USING_DONUT is not set
# CONFIG_PKG_USING_ACLOCK is not set
# CONFIG_PKG_USING_LWGPS is not set
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
# CONFIG_PKG_USING_STATE_MACHINE is not set
# CONFIG_PKG_USING_MCURSES is not set
# CONFIG_PKG_USING_COWSAY is not set
#
# Nuvoton Packages Config
......@@ -723,6 +752,7 @@ CONFIG_NU_PKG_USING_DEMO=y
# CONFIG_NU_PKG_USING_MAX31875 is not set
# CONFIG_NU_PKG_USING_NAU88L25 is not set
# CONFIG_NU_PKG_USING_NAU8822 is not set
# CONFIG_NU_PKG_USING_DA9062 is not set
# CONFIG_NU_PKG_USING_ILI9341 is not set
# CONFIG_NU_PKG_USING_SPINAND is not set
......@@ -801,6 +831,7 @@ CONFIG_BSP_USING_SPI1_NONE=y
# CONFIG_BSP_USING_SPI1 is not set
# CONFIG_BSP_USING_I2S is not set
CONFIG_BSP_USING_QSPI=y
CONFIG_BSP_USING_QSPI_PDMA=y
CONFIG_BSP_USING_QSPI0=y
CONFIG_BSP_USING_QSPI0_PDMA=y
# CONFIG_BSP_USING_SCUART is not set
......
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