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d675ede8
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d675ede8
编写于
9月 21, 2018
作者:
B
Bernard Xiong
提交者:
GitHub
9月 21, 2018
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差异文件
Merge pull request #1831 from Haleyl/master
[BSP]Add sct and fix some drivers bug
上级
b611f317
05cc8415
变更
101
展开全部
隐藏空白更改
内联
并排
Showing
101 changed file
with
3671 addition
and
1379 deletion
+3671
-1379
bsp/apollo2/board/adc.c
bsp/apollo2/board/adc.c
+54
-31
bsp/apollo2/board/adc.h
bsp/apollo2/board/adc.h
+3
-3
bsp/apollo2/board/board.c
bsp/apollo2/board/board.c
+4
-2
bsp/apollo2/board/flash.c
bsp/apollo2/board/flash.c
+1
-1
bsp/apollo2/board/gpio.c
bsp/apollo2/board/gpio.c
+137
-9
bsp/apollo2/board/i2c.c
bsp/apollo2/board/i2c.c
+34
-10
bsp/apollo2/board/pdm.c
bsp/apollo2/board/pdm.c
+33
-68
bsp/apollo2/board/pdm.h
bsp/apollo2/board/pdm.h
+1
-1
bsp/apollo2/board/pwm.h
bsp/apollo2/board/pwm.h
+2
-0
bsp/apollo2/board/rtc.c
bsp/apollo2/board/rtc.c
+0
-1
bsp/apollo2/board/smbus.c
bsp/apollo2/board/smbus.c
+8
-9
bsp/apollo2/board/spi.c
bsp/apollo2/board/spi.c
+49
-43
bsp/apollo2/board/uart.c
bsp/apollo2/board/uart.c
+10
-11
bsp/apollo2/libraries/drivers/SConscript
bsp/apollo2/libraries/drivers/SConscript
+1
-0
bsp/apollo2/libraries/drivers/am_mcu_apollo.h
bsp/apollo2/libraries/drivers/am_mcu_apollo.h
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_adc.c
bsp/apollo2/libraries/drivers/hal/am_hal_adc.c
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_adc.h
bsp/apollo2/libraries/drivers/hal/am_hal_adc.h
+6
-6
bsp/apollo2/libraries/drivers/hal/am_hal_cachectrl.c
bsp/apollo2/libraries/drivers/hal/am_hal_cachectrl.c
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_cachectrl.h
bsp/apollo2/libraries/drivers/hal/am_hal_cachectrl.h
+6
-6
bsp/apollo2/libraries/drivers/hal/am_hal_clkgen.c
bsp/apollo2/libraries/drivers/hal/am_hal_clkgen.c
+18
-10
bsp/apollo2/libraries/drivers/hal/am_hal_clkgen.h
bsp/apollo2/libraries/drivers/hal/am_hal_clkgen.h
+6
-6
bsp/apollo2/libraries/drivers/hal/am_hal_ctimer.c
bsp/apollo2/libraries/drivers/hal/am_hal_ctimer.c
+11
-10
bsp/apollo2/libraries/drivers/hal/am_hal_ctimer.h
bsp/apollo2/libraries/drivers/hal/am_hal_ctimer.h
+7
-7
bsp/apollo2/libraries/drivers/hal/am_hal_debug.c
bsp/apollo2/libraries/drivers/hal/am_hal_debug.c
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_debug.h
bsp/apollo2/libraries/drivers/hal/am_hal_debug.h
+6
-6
bsp/apollo2/libraries/drivers/hal/am_hal_flash.c
bsp/apollo2/libraries/drivers/hal/am_hal_flash.c
+42
-1
bsp/apollo2/libraries/drivers/hal/am_hal_flash.h
bsp/apollo2/libraries/drivers/hal/am_hal_flash.h
+19
-9
bsp/apollo2/libraries/drivers/hal/am_hal_global.c
bsp/apollo2/libraries/drivers/hal/am_hal_global.c
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_global.h
bsp/apollo2/libraries/drivers/hal/am_hal_global.h
+6
-6
bsp/apollo2/libraries/drivers/hal/am_hal_gpio.c
bsp/apollo2/libraries/drivers/hal/am_hal_gpio.c
+2
-2
bsp/apollo2/libraries/drivers/hal/am_hal_gpio.h
bsp/apollo2/libraries/drivers/hal/am_hal_gpio.h
+14
-5
bsp/apollo2/libraries/drivers/hal/am_hal_i2c_bit_bang.c
bsp/apollo2/libraries/drivers/hal/am_hal_i2c_bit_bang.c
+11
-11
bsp/apollo2/libraries/drivers/hal/am_hal_i2c_bit_bang.h
bsp/apollo2/libraries/drivers/hal/am_hal_i2c_bit_bang.h
+11
-10
bsp/apollo2/libraries/drivers/hal/am_hal_interrupt.c
bsp/apollo2/libraries/drivers/hal/am_hal_interrupt.c
+4
-4
bsp/apollo2/libraries/drivers/hal/am_hal_interrupt.h
bsp/apollo2/libraries/drivers/hal/am_hal_interrupt.h
+6
-5
bsp/apollo2/libraries/drivers/hal/am_hal_iom.c
bsp/apollo2/libraries/drivers/hal/am_hal_iom.c
+1264
-451
bsp/apollo2/libraries/drivers/hal/am_hal_iom.h
bsp/apollo2/libraries/drivers/hal/am_hal_iom.h
+84
-32
bsp/apollo2/libraries/drivers/hal/am_hal_ios.c
bsp/apollo2/libraries/drivers/hal/am_hal_ios.c
+45
-11
bsp/apollo2/libraries/drivers/hal/am_hal_ios.h
bsp/apollo2/libraries/drivers/hal/am_hal_ios.h
+5
-5
bsp/apollo2/libraries/drivers/hal/am_hal_itm.c
bsp/apollo2/libraries/drivers/hal/am_hal_itm.c
+4
-27
bsp/apollo2/libraries/drivers/hal/am_hal_itm.h
bsp/apollo2/libraries/drivers/hal/am_hal_itm.h
+6
-7
bsp/apollo2/libraries/drivers/hal/am_hal_mcuctrl.c
bsp/apollo2/libraries/drivers/hal/am_hal_mcuctrl.c
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_mcuctrl.h
bsp/apollo2/libraries/drivers/hal/am_hal_mcuctrl.h
+6
-6
bsp/apollo2/libraries/drivers/hal/am_hal_otp.c
bsp/apollo2/libraries/drivers/hal/am_hal_otp.c
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_otp.h
bsp/apollo2/libraries/drivers/hal/am_hal_otp.h
+6
-6
bsp/apollo2/libraries/drivers/hal/am_hal_pdm.c
bsp/apollo2/libraries/drivers/hal/am_hal_pdm.c
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_pdm.h
bsp/apollo2/libraries/drivers/hal/am_hal_pdm.h
+10
-1
bsp/apollo2/libraries/drivers/hal/am_hal_pin.h
bsp/apollo2/libraries/drivers/hal/am_hal_pin.h
+30
-39
bsp/apollo2/libraries/drivers/hal/am_hal_pwrctrl.c
bsp/apollo2/libraries/drivers/hal/am_hal_pwrctrl.c
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_pwrctrl.h
bsp/apollo2/libraries/drivers/hal/am_hal_pwrctrl.h
+10
-1
bsp/apollo2/libraries/drivers/hal/am_hal_queue.c
bsp/apollo2/libraries/drivers/hal/am_hal_queue.c
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_queue.h
bsp/apollo2/libraries/drivers/hal/am_hal_queue.h
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_reset.c
bsp/apollo2/libraries/drivers/hal/am_hal_reset.c
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_reset.h
bsp/apollo2/libraries/drivers/hal/am_hal_reset.h
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_rtc.c
bsp/apollo2/libraries/drivers/hal/am_hal_rtc.c
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_rtc.h
bsp/apollo2/libraries/drivers/hal/am_hal_rtc.h
+6
-6
bsp/apollo2/libraries/drivers/hal/am_hal_stimer.c
bsp/apollo2/libraries/drivers/hal/am_hal_stimer.c
+25
-2
bsp/apollo2/libraries/drivers/hal/am_hal_stimer.h
bsp/apollo2/libraries/drivers/hal/am_hal_stimer.h
+6
-6
bsp/apollo2/libraries/drivers/hal/am_hal_sysctrl.c
bsp/apollo2/libraries/drivers/hal/am_hal_sysctrl.c
+1
-5
bsp/apollo2/libraries/drivers/hal/am_hal_sysctrl.h
bsp/apollo2/libraries/drivers/hal/am_hal_sysctrl.h
+5
-5
bsp/apollo2/libraries/drivers/hal/am_hal_systick.c
bsp/apollo2/libraries/drivers/hal/am_hal_systick.c
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_systick.h
bsp/apollo2/libraries/drivers/hal/am_hal_systick.h
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_tpiu.c
bsp/apollo2/libraries/drivers/hal/am_hal_tpiu.c
+2
-2
bsp/apollo2/libraries/drivers/hal/am_hal_tpiu.h
bsp/apollo2/libraries/drivers/hal/am_hal_tpiu.h
+6
-6
bsp/apollo2/libraries/drivers/hal/am_hal_ttp.c
bsp/apollo2/libraries/drivers/hal/am_hal_ttp.c
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_ttp.h
bsp/apollo2/libraries/drivers/hal/am_hal_ttp.h
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_uart.c
bsp/apollo2/libraries/drivers/hal/am_hal_uart.c
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_uart.h
bsp/apollo2/libraries/drivers/hal/am_hal_uart.h
+6
-6
bsp/apollo2/libraries/drivers/hal/am_hal_vcomp.c
bsp/apollo2/libraries/drivers/hal/am_hal_vcomp.c
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_vcomp.h
bsp/apollo2/libraries/drivers/hal/am_hal_vcomp.h
+6
-6
bsp/apollo2/libraries/drivers/hal/am_hal_wdt.c
bsp/apollo2/libraries/drivers/hal/am_hal_wdt.c
+1
-1
bsp/apollo2/libraries/drivers/hal/am_hal_wdt.h
bsp/apollo2/libraries/drivers/hal/am_hal_wdt.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_adc.h
bsp/apollo2/libraries/drivers/regs/am_reg_adc.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_base_addresses.h
bsp/apollo2/libraries/drivers/regs/am_reg_base_addresses.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_cachectrl.h
bsp/apollo2/libraries/drivers/regs/am_reg_cachectrl.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_clkgen.h
bsp/apollo2/libraries/drivers/regs/am_reg_clkgen.h
+1
-12
bsp/apollo2/libraries/drivers/regs/am_reg_ctimer.h
bsp/apollo2/libraries/drivers/regs/am_reg_ctimer.h
+2
-2
bsp/apollo2/libraries/drivers/regs/am_reg_flashctrl.h
bsp/apollo2/libraries/drivers/regs/am_reg_flashctrl.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_gpio.h
bsp/apollo2/libraries/drivers/regs/am_reg_gpio.h
+12
-12
bsp/apollo2/libraries/drivers/regs/am_reg_iomstr.h
bsp/apollo2/libraries/drivers/regs/am_reg_iomstr.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_ioslave.h
bsp/apollo2/libraries/drivers/regs/am_reg_ioslave.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_itm.h
bsp/apollo2/libraries/drivers/regs/am_reg_itm.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_jedec.h
bsp/apollo2/libraries/drivers/regs/am_reg_jedec.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_macros.h
bsp/apollo2/libraries/drivers/regs/am_reg_macros.h
+18
-9
bsp/apollo2/libraries/drivers/regs/am_reg_macros_asm.h
bsp/apollo2/libraries/drivers/regs/am_reg_macros_asm.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_mcuctrl.h
bsp/apollo2/libraries/drivers/regs/am_reg_mcuctrl.h
+2
-1
bsp/apollo2/libraries/drivers/regs/am_reg_nvic.h
bsp/apollo2/libraries/drivers/regs/am_reg_nvic.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_pdm.h
bsp/apollo2/libraries/drivers/regs/am_reg_pdm.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_pwrctrl.h
bsp/apollo2/libraries/drivers/regs/am_reg_pwrctrl.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_rstgen.h
bsp/apollo2/libraries/drivers/regs/am_reg_rstgen.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_rtc.h
bsp/apollo2/libraries/drivers/regs/am_reg_rtc.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_sysctrl.h
bsp/apollo2/libraries/drivers/regs/am_reg_sysctrl.h
+44
-1
bsp/apollo2/libraries/drivers/regs/am_reg_systick.h
bsp/apollo2/libraries/drivers/regs/am_reg_systick.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_tpiu.h
bsp/apollo2/libraries/drivers/regs/am_reg_tpiu.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_uart.h
bsp/apollo2/libraries/drivers/regs/am_reg_uart.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_vcomp.h
bsp/apollo2/libraries/drivers/regs/am_reg_vcomp.h
+1
-1
bsp/apollo2/libraries/drivers/regs/am_reg_wdt.h
bsp/apollo2/libraries/drivers/regs/am_reg_wdt.h
+1
-1
bsp/apollo2/libraries/startup/SConscript
bsp/apollo2/libraries/startup/SConscript
+1
-0
bsp/apollo2/project.uvoptx
bsp/apollo2/project.uvoptx
+1224
-0
bsp/apollo2/project.uvprojx
bsp/apollo2/project.uvprojx
+267
-378
bsp/apollo2/rtthread.sct
bsp/apollo2/rtthread.sct
+14
-0
未找到文件。
bsp/apollo2/board/adc.c
浏览文件 @
d675ede8
...
...
@@ -19,46 +19,57 @@
*
* Change Logs:
* Date Author Notes
* 2017-
12-04
Haley the first version
* 2017-
09-18
Haley the first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include "am_mcu_apollo.h"
#include "board.h"
#ifdef RT_USING_ADC
/*
sem
define */
rt_sem_t
adcsem
=
RT_NULL
;
/*
messagequeue
define */
struct
rt_messagequeue
adcbat_mq
;
#define BATTERY_GPIO
29
/* Battery */
#define BATTERY_ADC_PIN AM_HAL_PIN_
29_ADCSE1
#define BATTERY_ADC_CHANNEL AM_HAL_ADC_SLOT_CHSEL_SE
1
/* BATTERY ADC采集通道 */
#define BATTERY_ADC_CHANNELNUM
1
/* BATTERY ADC采集通道号 */
#define BATTERY_GPIO
35
/* Battery */
#define BATTERY_ADC_PIN AM_HAL_PIN_
35_ADCSE7
#define BATTERY_ADC_CHANNEL AM_HAL_ADC_SLOT_CHSEL_SE
7
/* BATTERY ADC采集通道 */
#define BATTERY_ADC_CHANNELNUM
7
/* BATTERY ADC采集通道号 */
#define ADC_CTIMER_NUM 3
/* ADC使用定时器 */
#define ADC_CTIMER_COUNT (2048/512 - 1)
#define ADC_CHANNEL_NUM 1
/* ADC采集通道个数 */
#define ADC_SAMPLE_NUM 8
/* ADC采样个数
, NE_OF_OUTPUT
*/
#define ADC_SAMPLE_NUM 8
/* ADC采样个数 */
rt_uint8_t
bat_adc_cnt
=
(
ADC_CHANNEL_NUM
+
1
)
*
ADC_SAMPLE_NUM
;
rt_int16_t
am_adc_buffer_pool
[
64
];
rt_uint8_t
bat_adc_cnt
=
0
;
static
rt_uint8_t
am_adcbat_buffer_pool
[
256
];
static
rt_int16_t
am_adcbat_buffertemp
[
32
];
rt_uint8_t
am_adc_data_get
(
rt_int16_t
*
buff
,
rt_uint16_t
size
)
rt_uint8_t
am_adc_data_get
(
rt_
uint8_t
channel
,
rt_
int16_t
*
buff
,
rt_uint16_t
size
)
{
/* wait adc interrupt release sem forever */
rt_sem_take
(
adcsem
,
RT_WAITING_FOREVER
);
rt_uint8_t
adc_bufftemp
[
32
];
if
(
channel
==
BATTERY_ADC_CHANNELNUM
)
{
/* wait adc message forever */
rt_mq_recv
(
&
adcbat_mq
,
adc_bufftemp
,
32
,
RT_WAITING_FOREVER
);
}
/* copy the data */
rt_memcpy
(
buff
,
a
m_adc_buffer_pool
,
size
*
sizeof
(
rt_int16_t
));
rt_memcpy
(
buff
,
a
dc_bufftemp
,
size
*
sizeof
(
rt_int16_t
));
return
0
;
}
void
am_adc_start
(
void
)
void
am_adc_start
(
rt_uint8_t
channel
)
{
/* adcsem create */
adcsem
=
rt_sem_create
(
"adcsem"
,
0
,
RT_IPC_FLAG_FIFO
);
/* messagequeue init */
rt_mq_init
(
&
adcbat_mq
,
"mq_adcbat"
,
&
am_adcbat_buffer_pool
[
0
],
32
-
sizeof
(
void
*
),
sizeof
(
am_adcbat_buffer_pool
),
RT_IPC_FLAG_FIFO
);
/* Start the ctimer */
am_hal_ctimer_start
(
ADC_CTIMER_NUM
,
AM_HAL_CTIMER_TIMERA
);
...
...
@@ -67,13 +78,16 @@ void am_adc_start(void)
am_hal_adc_trigger
();
}
void
am_adc_stop
(
void
)
void
am_adc_stop
(
rt_uint8_t
channel
)
{
/* Stop the ctimer */
am_hal_ctimer_stop
(
ADC_CTIMER_NUM
,
AM_HAL_CTIMER_TIMERA
);
/* adcsem delete */
rt_sem_delete
(
adcsem
);
/* messagequeue delete */
rt_mq_delete
(
&
adceeg_mq
);
/* messagequeue delete */
rt_mq_delete
(
&
adcbat_mq
);
}
/**
...
...
@@ -87,6 +101,9 @@ void am_adc_isr(void)
{
uint32_t
ui32Status
,
ui32FifoData
;
/* enter interrupt */
rt_interrupt_enter
();
/* Read the interrupt status */
ui32Status
=
am_hal_adc_int_status_get
(
true
);
...
...
@@ -101,20 +118,23 @@ void am_adc_isr(void)
/* Read the value from the FIFO into the circular buffer */
ui32FifoData
=
am_hal_adc_fifo_pop
();
if
(
AM_HAL_ADC_FIFO_SLOT
(
ui32FifoData
)
==
BATTERY_ADC_CHANNELNUM
)
am_adc_buffer_pool
[
bat_adc_cnt
++
]
=
AM_HAL_ADC_FIFO_SAMPLE
(
ui32FifoData
);
if
(
AM_HAL_ADC_FIFO_SLOT
(
ui32FifoData
)
==
BATTERY_ADC_CHANNELNUM
)
{
am_adcbat_buffertemp
[
bat_adc_cnt
++
]
=
AM_HAL_ADC_FIFO_SAMPLE
(
ui32FifoData
);
}
if
(
bat_adc_cnt
>
(
ADC_CHANNEL_NUM
+
1
)
*
ADC_SAMPLE_NUM
-
1
)
if
((
bat_adc_cnt
>
ADC_SAMPLE_NUM
+
2
-
1
)
)
{
/* shift data */
rt_memmove
(
am_adc_buffer_pool
,
am_adc_buffer_pool
+
ADC_CHANNEL_NUM
*
ADC_SAMPLE_NUM
,
ADC_CHANNEL_NUM
*
ADC_SAMPLE_NUM
*
sizeof
(
rt_int16_t
));
bat_adc_cnt
=
(
ADC_CHANNEL_NUM
+
1
)
*
ADC_SAMPLE_NUM
;
bat_adc_cnt
=
0
;
/*
release adcsem
*/
rt_
sem_release
(
adcsem
);
/*
send the message
*/
rt_
mq_send
(
&
adcbat_mq
,
am_adcbat_buffertemp
,
ADC_SAMPLE_NUM
*
sizeof
(
rt_int16_t
)
);
}
}
while
(
AM_HAL_ADC_FIFO_COUNT
(
ui32FifoData
)
>
0
);
}
/* leave interrupt */
rt_interrupt_leave
();
}
static
void
timerA3_for_adc_init
(
void
)
...
...
@@ -129,7 +149,7 @@ static void timerA3_for_adc_init(void)
am_hal_ctimer_int_enable
(
AM_HAL_CTIMER_INT_TIMERA3
);
/* Set 512 sample rate */
am_hal_ctimer_period_set
(
ADC_CTIMER_NUM
,
AM_HAL_CTIMER_TIMERA
,
3
,
1
);
am_hal_ctimer_period_set
(
ADC_CTIMER_NUM
,
AM_HAL_CTIMER_TIMERA
,
ADC_CTIMER_COUNT
,
1
);
/* Enable the timer A3 to trigger the ADC directly */
am_hal_ctimer_adc_trigger_enable
();
...
...
@@ -184,7 +204,10 @@ int rt_hw_adc_init(void)
/* Enable the ADC */
am_hal_adc_enable
();
rt_kprintf
(
"adc_init!
\n
"
);
/* Trigger the ADC once */
//am_hal_adc_trigger();
//rt_kprintf("adc_init!\n");
return
0
;
}
...
...
bsp/apollo2/board/adc.h
浏览文件 @
d675ede8
...
...
@@ -32,8 +32,8 @@
*
*/
int
rt_hw_adc_init
(
void
);
rt_uint8_t
am_adc_data_get
(
rt_int16_t
*
buff
,
rt_uint16_t
size
);
void
am_adc_start
(
void
);
void
am_adc_stop
(
void
);
rt_uint8_t
am_adc_data_get
(
rt_
uint8_t
channel
,
rt_
int16_t
*
buff
,
rt_uint16_t
size
);
void
am_adc_start
(
rt_uint8_t
channel
);
void
am_adc_stop
(
rt_uint8_t
channel
);
#endif // __ADC_H_
bsp/apollo2/board/board.c
浏览文件 @
d675ede8
...
...
@@ -104,15 +104,17 @@ void am_low_power_init(void)
/* Turn off the voltage comparator as this is enabled on reset */
am_hal_vcomp_disable
();
#ifndef RT_USING_RTC
/* Run the RTC off the LFRC */
am_hal_rtc_osc_select
(
AM_HAL_RTC_OSC_LFRC
);
/* Stop the XT and LFRC */
am_hal_clkgen_osc_stop
(
AM_HAL_CLKGEN_OSC_XT
);
am_hal_clkgen_osc_stop
(
AM_HAL_CLKGEN_OSC_LFRC
);
//
am_hal_clkgen_osc_stop(AM_HAL_CLKGEN_OSC_LFRC);
/* Disable the RTC */
am_hal_rtc_osc_disable
();
#endif
}
/**
...
...
@@ -159,7 +161,7 @@ void rt_hw_board_init(void)
/* Turn off unused Flash & SRAM */
am_hal_pwrctrl_memory_enable
(
AM_HAL_PWRCTRL_MEMEN_FLASH512K
);
am_hal_pwrctrl_memory_enable
(
AM_HAL_PWRCTRL_MEMEN_SRAM32K
);
//
am_hal_pwrctrl_memory_enable(AM_HAL_PWRCTRL_MEMEN_SRAM32K);
#endif
...
...
bsp/apollo2/board/flash.c
浏览文件 @
d675ede8
...
...
@@ -140,7 +140,7 @@ int rt_hw_rom_init(void)
/* register the device */
rt_device_register
(
&
device
,
"rom"
,
RT_DEVICE_FLAG_RDWR
);
rt_kprintf
(
"register device rom!
\r\n
"
);
//
rt_kprintf("register device rom!\r\n");
return
0
;
}
...
...
bsp/apollo2/board/gpio.c
浏览文件 @
d675ede8
...
...
@@ -24,10 +24,14 @@
#include <rtthread.h>
#include <rtdevice.h>
#include <rthw.h>
#include "am_mcu_apollo.h"
#ifdef RT_USING_PIN
#define APLLO2_PIN_NUMBERS 64 //[34, 64]
struct
rt_pin_irq_hdr
am_pin_irq_hdr_tab
[
64
];
void
am_pin_mode
(
rt_device_t
dev
,
rt_base_t
pin
,
rt_base_t
mode
)
{
if
(
mode
==
PIN_MODE_OUTPUT
)
...
...
@@ -43,12 +47,17 @@ void am_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
else
if
(
mode
==
PIN_MODE_INPUT_PULLUP
)
{
/* input setting: pull up. */
am_hal_gpio_pin_config
(
pin
,
AM_HAL_GPIO_INPUT
);
}
else
if
(
mode
==
PIN_MODE_INPUT_PULLDOWN
)
{
/* input setting: pull down. */
am_hal_gpio_pin_config
(
pin
,
AM_HAL_GPIO_OPENDRAIN
);
}
else
{
/* input setting:default. */
am_hal_gpio_pin_config
(
pin
,
AM_HAL_GPIO_
INPUT
);
am_hal_gpio_pin_config
(
pin
,
AM_HAL_GPIO_
3STATE
);
}
}
...
...
@@ -58,40 +67,159 @@ void am_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
{
am_hal_gpio_out_bit_clear
(
pin
);
}
else
else
if
(
value
==
PIN_HIGH
)
{
am_hal_gpio_out_bit_set
(
pin
);
}
}
}
int
am_pin_read
(
rt_device_t
dev
,
rt_base_t
pin
)
{
int
value
=
PIN_LOW
;
if
(
am_hal_gpio_
input_bit_read
(
pin
)
==
0
)
if
(
am_hal_gpio_
pin_config_read
(
pin
)
==
AM_HAL_GPIO_OUTPUT
)
{
value
=
PIN_LOW
;
if
(
am_hal_gpio_out_bit_read
(
pin
)
==
0
)
{
value
=
PIN_LOW
;
}
else
{
value
=
PIN_HIGH
;
}
}
else
{
value
=
PIN_HIGH
;
if
(
am_hal_gpio_input_bit_read
(
pin
)
==
0
)
{
value
=
PIN_LOW
;
}
else
{
value
=
PIN_HIGH
;
}
}
return
value
;
}
const
static
struct
rt_pin_ops
_am_pin_ops
=
rt_err_t
am_pin_attach_irq
(
struct
rt_device
*
device
,
rt_int32_t
pin
,
rt_uint32_t
mode
,
void
(
*
hdr
)(
void
*
args
),
void
*
args
)
{
rt_base_t
level
;
rt_int32_t
irqindex
=
-
1
;
irqindex
=
pin
;
level
=
rt_hw_interrupt_disable
();
if
(
am_pin_irq_hdr_tab
[
irqindex
].
pin
==
pin
&&
am_pin_irq_hdr_tab
[
irqindex
].
hdr
==
hdr
&&
am_pin_irq_hdr_tab
[
irqindex
].
mode
==
mode
&&
am_pin_irq_hdr_tab
[
irqindex
].
args
==
args
)
{
rt_hw_interrupt_enable
(
level
);
return
RT_EOK
;
}
if
(
am_pin_irq_hdr_tab
[
irqindex
].
pin
!=
-
1
)
{
rt_hw_interrupt_enable
(
level
);
return
-
RT_EBUSY
;
}
am_pin_irq_hdr_tab
[
irqindex
].
pin
=
pin
;
am_pin_irq_hdr_tab
[
irqindex
].
hdr
=
hdr
;
am_pin_irq_hdr_tab
[
irqindex
].
mode
=
mode
;
am_pin_irq_hdr_tab
[
irqindex
].
args
=
args
;
rt_hw_interrupt_enable
(
level
);
return
RT_EOK
;
}
rt_err_t
am_pin_dettach_irq
(
struct
rt_device
*
device
,
rt_int32_t
pin
)
{
rt_base_t
level
;
rt_int32_t
irqindex
=
-
1
;
irqindex
=
pin
;
level
=
rt_hw_interrupt_disable
();
if
(
am_pin_irq_hdr_tab
[
irqindex
].
pin
==
-
1
)
{
rt_hw_interrupt_enable
(
level
);
return
RT_EOK
;
}
am_pin_irq_hdr_tab
[
irqindex
].
pin
=
-
1
;
am_pin_irq_hdr_tab
[
irqindex
].
hdr
=
RT_NULL
;
am_pin_irq_hdr_tab
[
irqindex
].
mode
=
0
;
am_pin_irq_hdr_tab
[
irqindex
].
args
=
RT_NULL
;
rt_hw_interrupt_enable
(
level
);
return
RT_EOK
;
}
rt_err_t
am_pin_irq_enable
(
struct
rt_device
*
device
,
rt_base_t
pin
,
rt_uint32_t
enabled
)
{
rt_base_t
level
;
rt_int32_t
irqindex
=
-
1
;
irqindex
=
pin
;
if
(
enabled
==
PIN_IRQ_ENABLE
)
{
level
=
rt_hw_interrupt_disable
();
/* Configure the GPIO/button interrupt polarity */
if
(
am_pin_irq_hdr_tab
[
irqindex
].
mode
==
PIN_IRQ_MODE_RISING
)
{
am_hal_gpio_int_polarity_bit_set
(
am_pin_irq_hdr_tab
[
irqindex
].
pin
,
AM_HAL_GPIO_RISING
);
}
else
if
(
am_pin_irq_hdr_tab
[
irqindex
].
mode
==
PIN_IRQ_MODE_FALLING
)
{
am_hal_gpio_int_polarity_bit_set
(
am_pin_irq_hdr_tab
[
irqindex
].
pin
,
AM_HAL_GPIO_FALLING
);
}
/* Clear the GPIO Interrupt (write to clear) */
am_hal_gpio_int_clear
(
AM_HAL_GPIO_BIT
(
am_pin_irq_hdr_tab
[
irqindex
].
pin
));
/* Enable the GPIO/button interrupt */
am_hal_gpio_int_enable
(
AM_HAL_GPIO_BIT
(
am_pin_irq_hdr_tab
[
irqindex
].
pin
));
rt_hw_interrupt_enable
(
level
);
}
else
if
(
enabled
==
PIN_IRQ_DISABLE
)
{
if
(
am_hal_gpio_int_enable_get
()
!=
AM_HAL_GPIO_BIT
(
am_pin_irq_hdr_tab
[
irqindex
].
pin
))
{
return
RT_ENOSYS
;
}
/* Disable the GPIO/button interrupt */
am_hal_gpio_int_disable
(
AM_HAL_GPIO_BIT
(
am_pin_irq_hdr_tab
[
irqindex
].
pin
));
}
else
{
return
RT_ENOSYS
;
}
return
RT_EOK
;
}
const
static
struct
rt_pin_ops
am_pin_ops
=
{
am_pin_mode
,
am_pin_write
,
am_pin_read
,
am_pin_attach_irq
,
am_pin_dettach_irq
,
am_pin_irq_enable
,
};
int
rt_hw_pin_init
(
void
)
{
rt_device_pin_register
(
"pin"
,
&
_
am_pin_ops
,
RT_NULL
);
rt_device_pin_register
(
"pin"
,
&
am_pin_ops
,
RT_NULL
);
rt_kprintf
(
"pin_init!
\n
"
);
//rt_device_pin_irq_register("pin", &am_pin_ops, RT_NULL);
//rt_kprintf("pin_init!\n");
return
0
;
}
...
...
bsp/apollo2/board/i2c.c
浏览文件 @
d675ede8
...
...
@@ -25,7 +25,6 @@
#include <rtthread.h>
#include <rtdevice.h>
#include "am_mcu_apollo.h"
#include "board.h"
/* I2C0 */
#define AM_I2C0_IOM_INST 0
...
...
@@ -43,6 +42,14 @@
#define I2C2_GPIO_SDA 25
#define I2C2_GPIO_CFG_SDA AM_HAL_PIN_25_M2SDA
/* I2C3 */
#define AM_I2C3_IOM_INST 3
#define I2C3_GPIO_SCL 42
#define I2C3_GPIO_CFG_SCK AM_HAL_PIN_42_M3SCL
#define I2C3_GPIO_SDA 43
#define I2C3_GPIO_CFG_SDA AM_HAL_PIN_43_M3SDA
/* I2C4 */
#define AM_I2C4_IOM_INST 4
...
...
@@ -76,7 +83,7 @@ rt_size_t rt_i2c_master_xfer(struct rt_i2c_bus_device *bus,
struct
am_i2c_bus
*
am_i2c_bus
=
(
struct
am_i2c_bus
*
)
bus
;
struct
rt_i2c_msg
*
msg
;
int
i
;
rt_
int32_t
ret
=
RT_EOK
;
rt_
uint32_t
msg_len
=
0
;
for
(
i
=
0
;
i
<
num
;
i
++
)
{
...
...
@@ -84,16 +91,16 @@ rt_size_t rt_i2c_master_xfer(struct rt_i2c_bus_device *bus,
if
(
msg
->
flags
==
RT_I2C_RD
)
{
am_hal_iom_i2c_read
(
am_i2c_bus
->
u32Module
,
msg
->
addr
,
(
uint32_t
*
)
msg
->
buf
,
msg
->
len
,
AM_HAL_IOM_RAW
);
msg_len
+=
msg
->
len
;
}
else
if
(
msg
->
flags
==
RT_I2C_WR
)
{
am_hal_iom_i2c_write
(
am_i2c_bus
->
u32Module
,
msg
->
addr
,
(
uint32_t
*
)
msg
->
buf
,
msg
->
len
,
AM_HAL_IOM_RAW
);
msg_len
+=
(
msg
->
len
-
1
);
}
ret
++
;
}
return
ret
;
return
msg_len
;
}
rt_err_t
rt_i2c_bus_control
(
struct
rt_i2c_bus_device
*
bus
,
...
...
@@ -136,7 +143,7 @@ static struct am_i2c_bus am_i2c_bus_0 =
#ifdef RT_USING_I2C1
static
struct
am_i2c_bus
am_i2c_bus_1
=
{
{
0
},
{
1
},
AM_I2C1_IOM_INST
};
#endif
...
...
@@ -144,7 +151,7 @@ static struct am_i2c_bus am_i2c_bus_1 =
#ifdef RT_USING_I2C2
static
struct
am_i2c_bus
am_i2c_bus_2
=
{
{
1
},
{
2
},
AM_I2C2_IOM_INST
};
#endif
...
...
@@ -152,7 +159,7 @@ static struct am_i2c_bus am_i2c_bus_2 =
#ifdef RT_USING_I2C3
static
struct
am_i2c_bus
am_i2c_bus_3
=
{
{
2
},
{
3
},
AM_I2C3_IOM_INST
};
#endif
...
...
@@ -160,7 +167,7 @@ static struct am_i2c_bus am_i2c_bus_3 =
#ifdef RT_USING_I2C4
static
struct
am_i2c_bus
am_i2c_bus_4
=
{
{
3
},
{
4
},
AM_I2C4_IOM_INST
};
#endif
...
...
@@ -203,6 +210,23 @@ int rt_i2c_init(void)
rt_i2c_bus_device_register
(
&
am_i2c
->
parent
,
"i2c2"
);
#endif
#ifdef RT_USING_I2C3
/* init i2c gpio */
am_hal_gpio_pin_config
(
I2C3_GPIO_SCL
,
I2C3_GPIO_CFG_SCK
|
AM_HAL_GPIO_PULL6K
);
am_hal_gpio_pin_config
(
I2C3_GPIO_SDA
,
I2C3_GPIO_CFG_SDA
|
AM_HAL_GPIO_PULL6K
);
/* Initialize IOM 3 in I2C mode at 400KHz */
am_hal_iom_pwrctrl_enable
(
AM_I2C3_IOM_INST
);
g_sIOMConfig
.
ui32ClockFrequency
=
AM_HAL_IOM_400KHZ
;
am_hal_iom_config
(
AM_I2C3_IOM_INST
,
&
g_sIOMConfig
);
am_hal_iom_enable
(
AM_I2C3_IOM_INST
);
/* init i2c bus device */
am_i2c
=
&
am_i2c_bus_3
;
am_i2c
->
parent
.
ops
=
&
am_i2c_ops
;
rt_i2c_bus_device_register
(
&
am_i2c
->
parent
,
"i2c3"
);
#endif
#ifdef RT_USING_I2C4
/* init i2c gpio */
am_hal_gpio_pin_config
(
I2C4_GPIO_SCL
,
I2C4_GPIO_CFG_SCK
|
AM_HAL_GPIO_PULL6K
);
...
...
@@ -220,7 +244,7 @@ int rt_i2c_init(void)
rt_i2c_bus_device_register
(
&
am_i2c
->
parent
,
"i2c4"
);
#endif
rt_kprintf
(
"i2c_init!
\n
"
);
//
rt_kprintf("i2c_init!\n");
return
0
;
}
...
...
bsp/apollo2/board/pdm.c
浏览文件 @
d675ede8
...
...
@@ -25,15 +25,15 @@
#include <rtthread.h>
#include <rtdevice.h>
#include "am_mcu_apollo.h"
#include "board.h"
#ifdef RT_USING_PDM
/*
sem
define */
rt_sem_t
pdmsem
=
RT_NULL
;
/*
messagequeue
define */
struct
rt_messagequeue
pdm_mq
;
#define NWA_FRAME_MS 10
#define NWA_FRAME_SAMPLES (16*NWA_FRAME_MS)
/* 16k, 16bit, mono audio data */
static
rt_uint8_t
am_pdm_buffer_pool
[
1024
];
#define NWA_FRAME_SAMPLES 160
/* 8k, 16bit, mono audio data */
#define PDM_FIFO_THRESHOLD NWA_FRAME_SAMPLES
#define PDM_GPIO_CLK 22
...
...
@@ -41,23 +41,16 @@ rt_sem_t pdmsem = RT_NULL;
#define PDM_GPIO_DATA 23
#define PDM_GPIO_CFG_DATA AM_HAL_PIN_23_PDM_DATA
#define PING_PONG_BUF_SIZE 8000*NWA_FRAME_MS
static
rt_uint16_t
am_pdm_buffer_pool
[
PING_PONG_BUF_SIZE
];
static
rt_uint8_t
pdm_flag
=
0
;
static
rt_uint16_t
pdm_cnt
=
0
;
static
am_hal_pdm_config_t
g_sPDMConfig
=
{
AM_HAL_PDM_PCFG_LRSWAP_DISABLE
|
AM_HAL_PDM_PCFG_RIGHT_PGA_P105DB
|
AM_HAL_PDM_PCFG_LEFT_PGA_P105DB
|
AM_HAL_PDM_PCFG_MCLKDIV_DIV1
|
AM_HAL_PDM_PCFG_SINC_RATE
(
48
)
|
AM_HAL_PDM_PCFG_ADCHPD_ENABLE
|
AM_HAL_PDM_PCFG_HPCUTOFF
(
0xB
)
|
AM_HAL_PDM_PCFG_CYCLES
(
0x1
)
|
AM_HAL_PDM_PCFG_SOFTMUTE_DISABLE
|
AM_HAL_PDM_PCFG_PDMCORE_ENABLE
,
/* Set the PDM configuration */
AM_REG_PDM_VCFG_IOCLKEN_EN
|
AM_HAL_PDM_VCFG_RSTB_NORMAL
|
AM_REG_PDM_VCFG_PDMCLKSEL_750KHz
|
AM_HAL_PDM_VCFG_PDMCLK_ENABLE
|
AM_HAL_PDM_VCFG_I2SMODE_DISABLE
|
AM_HAL_PDM_VCFG_BCLKINV_DISABLE
|
AM_HAL_PDM_VCFG_DMICDEL_DISABLE
|
AM_HAL_PDM_VCFG_SELAP_INTERNAL
|
AM_HAL_PDM_VCFG_PACK_DISABLE
|
AM_HAL_PDM_VCFG_CHANNEL_RIGHT
,
/* Set the Voice Configuration */
PDM_FIFO_THRESHOLD
,
/* Select the FIFO PCM sample threshold */
AM_HAL_PDM_PCFG_LRSWAP_DISABLE
|
AM_HAL_PDM_PCFG_RIGHT_PGA_0DB
|
AM_HAL_PDM_PCFG_LEFT_PGA_0DB
|
AM_HAL_PDM_PCFG_MCLKDIV_DIV1
|
AM_HAL_PDM_PCFG_SINC_RATE
(
48
)
|
AM_HAL_PDM_PCFG_ADCHPD_ENABLE
|
AM_HAL_PDM_PCFG_HPCUTOFF
(
0x1
)
|
AM_HAL_PDM_PCFG_CYCLES
(
0x1
)
|
AM_HAL_PDM_PCFG_SOFTMUTE_DISABLE
|
AM_HAL_PDM_PCFG_PDMCORE_ENABLE
,
/* Set the PDM configuration */
AM_HAL_PDM_IOCLK_750KHZ
|
AM_HAL_PDM_VCFG_RSTB_NORMAL
|
AM_HAL_PDM_VCFG_PDMCLK_ENABLE
|
AM_HAL_PDM_VCFG_I2SMODE_DISABLE
|
AM_HAL_PDM_VCFG_BCLKINV_DISABLE
|
AM_HAL_PDM_VCFG_DMICDEL_DISABLE
|
AM_HAL_PDM_VCFG_SELAP_INTERNAL
|
AM_HAL_PDM_VCFG_PACK_DISABLE
|
AM_HAL_PDM_VCFG_CHANNEL_LEFT
,
/* Set the Voice Configuration */
PDM_FIFO_THRESHOLD
,
/* Select the FIFO PCM sample threshold 0~256 */
};
/**
...
...
@@ -71,28 +64,13 @@ static am_hal_pdm_config_t g_sPDMConfig =
*/
rt_uint8_t
am_pdm_data_get
(
rt_uint8_t
*
buff
,
rt_uint16_t
size
)
{
uint8_t
temp
;
int
i
;
/* wait adc interrupt release sem forever */
rt_sem_take
(
pdmsem
,
RT_WAITING_FOREVER
);
rt_uint8_t
pdm_rbufftemp
[
340
];
for
(
i
=
0
;
i
<
PING_PONG_BUF_SIZE
;
i
++
)
{
temp
=
(
uint8_t
)(
am_pdm_buffer_pool
[
i
]
&
0xFF
);
/* lower byte */
while
(
AM_BFRn
(
UART
,
0
,
FR
,
TXFF
)
);
AM_REGn
(
UART
,
0
,
DR
)
=
temp
;
/* wait pdm message forever */
rt_mq_recv
(
&
pdm_mq
,
pdm_rbufftemp
,
340
,
RT_WAITING_FOREVER
);
temp
=
(
uint8_t
)((
am_pdm_buffer_pool
[
i
]
&
0xFF00
)
>>
8
);
/* higher byte */
while
(
AM_BFRn
(
UART
,
0
,
FR
,
TXFF
)
);
AM_REGn
(
UART
,
0
,
DR
)
=
temp
;
}
/* copy the data */
//rt_memcpy(buff, am_pdm_buffer_pool, size*sizeof(rt_uint16_t));
pdm_flag
=
0
;
rt_memcpy
(
buff
,
(
char
*
)
pdm_rbufftemp
,
size
);
return
0
;
}
...
...
@@ -108,12 +86,9 @@ rt_uint8_t am_pdm_data_get(rt_uint8_t *buff, rt_uint16_t size)
*/
void
am_pdm_start
(
void
)
{
/* adcsem create */
pdmsem
=
rt_sem_create
(
"pdmsem"
,
0
,
RT_IPC_FLAG_FIFO
);
/* Enable PDM */
am_hal_pdm_enable
();
am_hal_interrupt_enable
(
AM_HAL_INTERRUPT_PDM
);
am_hal_pdm_enable
();
}
/**
...
...
@@ -128,11 +103,8 @@ void am_pdm_start(void)
void
am_pdm_stop
(
void
)
{
/* Disable PDM */
am_hal_pdm_disable
();
am_hal_interrupt_disable
(
AM_HAL_INTERRUPT_PDM
);
/* adcsem delete */
rt_sem_delete
(
pdmsem
);
am_hal_pdm_disable
();
}
/**
...
...
@@ -153,7 +125,7 @@ uint8_t am_pdm_left_gain_get(void)
/**
* @brief Set the pdm left gain.
*
* @param
None
.
* @param
gain_val
.
*
* This function Set the pdm left gain.
*
...
...
@@ -183,7 +155,7 @@ uint8_t am_pdm_right_gain_get(void)
/**
* @brief Set the pdm right gain.
*
* @param
None
.
* @param
gain_val
.
*
* This function Set the pdm right gain.
*
...
...
@@ -204,33 +176,19 @@ void am_pdm_right_gain_set(uint8_t gain_val)
*/
void
am_pdm_isr
(
void
)
{
uint32_t
ui32FifoData
;
int
i
;
rt_int16_t
pdm_sbufftemp
[
160
];
/* Clear the PDM interrupt */
am_hal_pdm_int_clear
(
AM_HAL_PDM_INT_UNDFL
|
AM_HAL_PDM_INT_OVF
|
AM_HAL_PDM_INT_FIFO
);
for
(
i
=
0
;
i
<
PDM_FIFO_THRESHOLD
;
i
++
)
/* adjust as needed */
{
ui32FifoData
=
am_hal_pdm_fifo_data_read
();
if
(
pdm_flag
==
0
)
{
am_pdm_buffer_pool
[
pdm_cnt
*
PDM_FIFO_THRESHOLD
+
i
]
=
(
uint16_t
)
ui32FifoData
;
}
pdm_sbufftemp
[
i
]
=
(
rt_int16_t
)
am_hal_pdm_fifo_data_read
();
}
if
(
pdm_flag
==
0
)
pdm_cnt
++
;
if
(
pdm_cnt
==
PING_PONG_BUF_SIZE
/
PDM_FIFO_THRESHOLD
)
/* 500 means 10 second logging under 8k sampling rate */
{
pdm_cnt
=
0
;
pdm_flag
=
1
;
/* release pdmsem */
rt_sem_release
(
pdmsem
);
}
/* send the message */
rt_mq_send
(
&
pdm_mq
,
pdm_sbufftemp
,
PDM_FIFO_THRESHOLD
*
sizeof
(
rt_int16_t
));
}
/**
...
...
@@ -258,7 +216,14 @@ int rt_hw_pdm_init(void)
/* Clear PDM interrupts */
am_hal_pdm_int_clear
(
AM_HAL_PDM_INT_UNDFL
|
AM_HAL_PDM_INT_OVF
|
AM_HAL_PDM_INT_FIFO
);
rt_kprintf
(
"pdm_init!
\n
"
);
/* messagequeue init */
rt_mq_init
(
&
pdm_mq
,
"mq_pdm"
,
&
am_pdm_buffer_pool
[
0
],
340
-
sizeof
(
void
*
),
sizeof
(
am_pdm_buffer_pool
),
RT_IPC_FLAG_FIFO
);
//rt_kprintf("pdm_init!\n");
return
0
;
}
...
...
bsp/apollo2/board/pdm.h
浏览文件 @
d675ede8
...
...
@@ -31,7 +31,7 @@
* @brief External function definitions
*
*/
int
rt_
hw_
pdm_init
(
void
);
int
rt_pdm_init
(
void
);
rt_uint8_t
am_pdm_data_get
(
rt_uint8_t
*
buff
,
rt_uint16_t
size
);
void
am_pdm_start
(
void
);
void
am_pdm_stop
(
void
);
...
...
bsp/apollo2/board/pwm.h
浏览文件 @
d675ede8
...
...
@@ -32,5 +32,7 @@
*
*/
int
rt_hw_pwm_init
(
void
);
void
am_pwm_start
(
int
led
);
void
am_pwm_stop
(
int
led
);
#endif // __PWM_H_
bsp/apollo2/board/rtc.c
浏览文件 @
d675ede8
...
...
@@ -118,7 +118,6 @@ int rt_hw_rtc_init(void)
#if RTC_CLK_SRC == XT
/* Enable the XT for the RTC */
//am_hal_clkgen_osc_start(AM_HAL_CLKGEN_OSC_LFRC);
am_hal_clkgen_osc_start
(
AM_HAL_CLKGEN_OSC_XT
);
/* Select XT for RTC clock source */
...
...
bsp/apollo2/board/smbus.c
浏览文件 @
d675ede8
...
...
@@ -25,23 +25,22 @@
#include <rtthread.h>
#include <rtdevice.h>
#include "am_mcu_apollo.h"
#include "board.h"
#ifdef RT_USING_SMBUS
#define SMBUS_GPIO_SDA 5
#define SMBUS_GPIO_SCL 6
#define mSDA_LOW() am_hal_gpio_out_bit_clear(SMBUS_GPIO_S
CL
)
/* Clear SDA line */
#define mSDA_HIGH() am_hal_gpio_out_bit_set(SMBUS_GPIO_S
CL
)
/* Set SDA line */
#define mSCL_LOW() am_hal_gpio_out_bit_clear(SMBUS_GPIO_S
DA
)
/* Clear SCL line */
#define mSCL_HIGH() am_hal_gpio_out_bit_set(SMBUS_GPIO_S
DA
)
/* Set SCL line */
#define mSDA_LOW() am_hal_gpio_out_bit_clear(SMBUS_GPIO_S
DA
)
/* Clear SDA line */
#define mSDA_HIGH() am_hal_gpio_out_bit_set(SMBUS_GPIO_S
DA
)
/* Set SDA line */
#define mSCL_LOW() am_hal_gpio_out_bit_clear(SMBUS_GPIO_S
CL
)
/* Clear SCL line */
#define mSCL_HIGH() am_hal_gpio_out_bit_set(SMBUS_GPIO_S
CL
)
/* Set SCL line */
#define mSDA_READ() am_hal_gpio_input_bit_read(SMBUS_GPIO_S
CL)
/* Read SCL
line */
#define mSDA_READ() am_hal_gpio_input_bit_read(SMBUS_GPIO_S
DA)
/* Read SDA
line */
#define mSDA_IN() am_hal_gpio_pin_config(SMBUS_GPIO_S
CL
, AM_HAL_GPIO_INPUT | AM_HAL_GPIO_PULL6K)
/* Set SDA as Input */
#define mSDA_OUT() am_hal_gpio_pin_config(SMBUS_GPIO_S
CL
, AM_HAL_GPIO_OUTPUT)
/* Set SDA as Output */
#define mSCL_OUT() am_hal_gpio_pin_config(SMBUS_GPIO_S
DA
, AM_HAL_GPIO_OUTPUT)
/* Set SCL as Output */
#define mSDA_IN() am_hal_gpio_pin_config(SMBUS_GPIO_S
DA
, AM_HAL_GPIO_INPUT | AM_HAL_GPIO_PULL6K)
/* Set SDA as Input */
#define mSDA_OUT() am_hal_gpio_pin_config(SMBUS_GPIO_S
DA
, AM_HAL_GPIO_OUTPUT)
/* Set SDA as Output */
#define mSCL_OUT() am_hal_gpio_pin_config(SMBUS_GPIO_S
CL
, AM_HAL_GPIO_OUTPUT)
/* Set SCL as Output */
#define ACK 0
#define NACK 1
...
...
bsp/apollo2/board/spi.c
浏览文件 @
d675ede8
...
...
@@ -25,10 +25,9 @@
#include <rtthread.h>
#include <rtdevice.h>
#include "am_mcu_apollo.h"
#include "board.h"
#include "spi.h"
/* SPI
1
*/
/* SPI
0
*/
#define AM_SPI0_IOM_INST 0
#define SPI0_GPIO_SCK 5
...
...
@@ -38,17 +37,17 @@
#define SPI0_GPIO_MOSI 7
#define SPI0_GPIO_CFG_MOSI AM_HAL_PIN_7_M0MOSI
/* SPI
2
*/
/* SPI
1
*/
#define AM_SPI1_IOM_INST 1
static
am_hal_iom_config_t
g_sIOMConfig
=
{
AM_HAL_IOM_SPIMODE
,
// ui32InterfaceMode
AM_HAL_IOM_
8M
HZ
,
// ui32ClockFrequency
AM_HAL_IOM_
400K
HZ
,
// ui32ClockFrequency
0
,
// bSPHA
0
,
// bSPOL
4
,
// ui8WriteThreshold
6
0
,
// ui8ReadThreshold
80
,
// ui8WriteThreshold
8
0
,
// ui8ReadThreshold
};
/* AM spi driver */
...
...
@@ -64,7 +63,19 @@ static rt_err_t configure(struct rt_spi_device* device, struct rt_spi_configurat
struct
am_spi_bus
*
am_spi_bus
=
(
struct
am_spi_bus
*
)
device
->
bus
;
rt_uint32_t
max_hz
=
configuration
->
max_hz
;
if
(
max_hz
>=
8000000
)
if
(
max_hz
>=
24000000
)
{
g_sIOMConfig
.
ui32ClockFrequency
=
AM_HAL_IOM_24MHZ
;
}
else
if
(
max_hz
>=
16000000
)
{
g_sIOMConfig
.
ui32ClockFrequency
=
AM_HAL_IOM_16MHZ
;
}
else
if
(
max_hz
>=
12000000
)
{
g_sIOMConfig
.
ui32ClockFrequency
=
AM_HAL_IOM_12MHZ
;
}
else
if
(
max_hz
>=
8000000
)
{
g_sIOMConfig
.
ui32ClockFrequency
=
AM_HAL_IOM_8MHZ
;
}
...
...
@@ -147,7 +158,6 @@ static rt_err_t configure(struct rt_spi_device* device, struct rt_spi_configurat
/* init SPI */
am_hal_iom_disable
(
am_spi_bus
->
u32Module
);
am_hal_iom_pwrctrl_enable
(
am_spi_bus
->
u32Module
);
am_hal_iom_config
(
am_spi_bus
->
u32Module
,
&
g_sIOMConfig
);
am_hal_iom_enable
(
am_spi_bus
->
u32Module
);
...
...
@@ -167,14 +177,12 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message* mes
/* take CS */
if
(
message
->
cs_take
)
{
;
am_hal_gpio_out_bit_clear
(
am_spi_cs
->
chip_select
)
;
}
//
if
(
recv_ptr
!=
RT_NULL
)
{
u32TransferSize
=
u32BytesRemaining
;
while
(
u32BytesRemaining
)
{
/* Set the transfer size to either 64, or the number of remaining
...
...
@@ -182,22 +190,21 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message* mes
if
(
u32BytesRemaining
>
64
)
{
u32TransferSize
=
64
;
am_hal_gpio_pin_config
(
SPI0_GPIO_MOSI
,
AM_HAL_GPIO_OUTPUT
|
AM_HAL_GPIO_PULL6K
);
am_hal_gpio_out_bit_set
(
SPI0_GPIO_MOSI
);
am_hal_iom_spi_read
(
am_spi_bus
->
u32Module
,
am_spi_cs
->
chip_select
,
(
uint32_t
*
)
recv_ptr
,
u32TransferSize
,
AM_HAL_IOM_CS_LOW
|
AM_HAL_IOM_RAW
);
(
uint32_t
*
)
recv_ptr
,
u32TransferSize
,
AM_HAL_IOM_RAW
);
am_hal_gpio_pin_config
(
SPI0_GPIO_MOSI
,
SPI0_GPIO_CFG_MOSI
|
AM_HAL_GPIO_PULL6K
);
}
else
{
u32TransferSize
=
u32BytesRemaining
;
/* release CS */
if
(
message
->
cs_release
)
{
am_hal_gpio_pin_config
(
SPI0_GPIO_MOSI
,
AM_HAL_GPIO_OUTPUT
|
AM_HAL_GPIO_PULL6K
);
am_hal_gpio_out_bit_set
(
SPI0_GPIO_MOSI
);
am_hal_iom_spi_read
(
am_spi_bus
->
u32Module
,
am_spi_cs
->
chip_select
,
(
uint32_t
*
)
recv_ptr
,
u32TransferSize
,
AM_HAL_IOM_RAW
);
}
else
{
am_hal_iom_spi_read
(
am_spi_bus
->
u32Module
,
am_spi_cs
->
chip_select
,
(
uint32_t
*
)
recv_ptr
,
u32TransferSize
,
AM_HAL_IOM_CS_LOW
|
AM_HAL_IOM_RAW
);
am_hal_gpio_pin_config
(
SPI0_GPIO_MOSI
,
SPI0_GPIO_CFG_MOSI
|
AM_HAL_GPIO_PULL6K
);
}
}
...
...
@@ -207,33 +214,26 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message* mes
}
// д
else
if
(
send_ptr
!=
RT_NULL
)
else
{
while
(
u32BytesRemaining
)
{
/* Set the transfer size to either 32, or the number of remaining
bytes, whichever is smaller */
if
(
u32BytesRemaining
>
32
)
if
(
u32BytesRemaining
>
64
)
{
u32TransferSize
=
32
;
u32TransferSize
=
64
;
am_hal_iom_spi_write
(
am_spi_bus
->
u32Module
,
am_spi_cs
->
chip_select
,
(
uint32_t
*
)
send_ptr
,
u32TransferSize
,
AM_HAL_IOM_
CS_LOW
|
AM_HAL_IOM_
RAW
);
(
uint32_t
*
)
send_ptr
,
u32TransferSize
,
AM_HAL_IOM_RAW
);
}
else
{
u32TransferSize
=
u32BytesRemaining
;
/* release CS */
if
(
message
->
cs_release
)
{
am_hal_iom_spi_write
(
am_spi_bus
->
u32Module
,
am_spi_cs
->
chip_select
,
(
uint32_t
*
)
send_ptr
,
u32TransferSize
,
AM_HAL_IOM_RAW
);
}
else
{
am_hal_iom_spi_write
(
am_spi_bus
->
u32Module
,
am_spi_cs
->
chip_select
,
(
uint32_t
*
)
send_ptr
,
u32TransferSize
,
AM_HAL_IOM_CS_LOW
|
AM_HAL_IOM_RAW
);
}
}
u32BytesRemaining
-=
u32TransferSize
;
...
...
@@ -241,6 +241,12 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message* mes
}
}
/* release CS */
if
(
message
->
cs_release
)
{
am_hal_gpio_out_bit_set
(
am_spi_cs
->
chip_select
);
}
return
message
->
length
;
}
...
...
@@ -250,31 +256,31 @@ static const struct rt_spi_ops am_spi_ops =
xfer
};
#ifdef RT_USING_SPI
1
static
struct
am_spi_bus
am_spi_bus_
1
=
#ifdef RT_USING_SPI
0
static
struct
am_spi_bus
am_spi_bus_
0
=
{
{
0
},
AM_SPI0_IOM_INST
};
#endif
/* #ifdef RT_USING_SPI
1
*/
#endif
/* #ifdef RT_USING_SPI
0
*/
#ifdef RT_USING_SPI
2
static
struct
am
biq_spi_bus
ambiq_spi_bus_2
=
#ifdef RT_USING_SPI
1
static
struct
am
_spi_bus
am_spi_bus_1
=
{
{
1
},
{
0
},
AM_SPI1_IOM_INST
};
#endif
/* #ifdef RT_USING_SPI
2
*/
#endif
/* #ifdef RT_USING_SPI
1
*/
int
yr_hw_spi_init
(
void
)
{
struct
am_spi_bus
*
am_spi
;
#ifdef RT_USING_SPI
1
#ifdef RT_USING_SPI
0
/* init spi gpio */
am_hal_gpio_pin_config
(
SPI0_GPIO_SCK
,
SPI0_GPIO_CFG_SCK
);
am_hal_gpio_pin_config
(
SPI0_GPIO_MISO
,
SPI0_GPIO_CFG_MISO
);
am_hal_gpio_pin_config
(
SPI0_GPIO_MOSI
,
SPI0_GPIO_CFG_MOSI
);
am_hal_gpio_pin_config
(
SPI0_GPIO_MISO
,
SPI0_GPIO_CFG_MISO
|
AM_HAL_GPIO_PULL6K
);
am_hal_gpio_pin_config
(
SPI0_GPIO_MOSI
,
SPI0_GPIO_CFG_MOSI
|
AM_HAL_GPIO_PULL6K
);
/* Initialize IOM 0 in SPI mode at 100KHz */
am_hal_iom_pwrctrl_enable
(
AM_SPI0_IOM_INST
);
...
...
@@ -282,11 +288,11 @@ int yr_hw_spi_init(void)
am_hal_iom_enable
(
AM_SPI0_IOM_INST
);
//init spi bus device
am_spi
=
&
am_spi_bus_
1
;
rt_spi_bus_register
(
&
am_spi
->
parent
,
"spi
1
"
,
&
am_spi_ops
);
am_spi
=
&
am_spi_bus_
0
;
rt_spi_bus_register
(
&
am_spi
->
parent
,
"spi
0
"
,
&
am_spi_ops
);
#endif
rt_kprintf
(
"spi init!
\n
"
);
//
rt_kprintf("spi init!\n");
return
0
;
}
...
...
bsp/apollo2/board/uart.c
浏览文件 @
d675ede8
...
...
@@ -25,7 +25,6 @@
#include <rtthread.h>
#include <rtdevice.h>
#include "am_mcu_apollo.h"
#include "board.h"
/* USART0 */
#define AM_UART0_INST 0
...
...
@@ -165,8 +164,14 @@ static rt_err_t am_configure(struct rt_serial_device *serial, struct serial_conf
else
if
(
cfg
->
stop_bits
==
STOP_BITS_2
)
uart_cfg
.
bTwoStopBits
=
true
;
uart_cfg
.
ui32Parity
=
cfg
->
parity
;
uart_cfg
.
ui32FlowCtrl
=
AM_HAL_UART_PARITY_NONE
;
if
(
cfg
->
parity
==
PARITY_NONE
)
uart_cfg
.
ui32Parity
=
AM_HAL_UART_PARITY_NONE
;
else
if
(
cfg
->
parity
==
PARITY_ODD
)
uart_cfg
.
ui32Parity
=
AM_HAL_UART_PARITY_ODD
;
else
if
(
cfg
->
parity
==
PARITY_EVEN
)
uart_cfg
.
ui32Parity
=
AM_HAL_UART_PARITY_EVEN
;
uart_cfg
.
ui32FlowCtrl
=
AM_HAL_UART_FLOW_CTRL_NONE
;
/* UART Config */
am_hal_uart_config
(
uart
->
uart_device
,
&
uart_cfg
);
...
...
@@ -181,7 +186,7 @@ static rt_err_t am_configure(struct rt_serial_device *serial, struct serial_conf
am_hal_uart_enable
(
uart
->
uart_device
);
/* Enable interrupts */
am_hal_uart_int_enable
(
uart
->
uart_device
,
AM_HAL_UART_INT_RX_TMOUT
|
AM_HAL_UART_INT_RX
|
AM_HAL_UART_INT_TX
);
am_hal_uart_int_enable
(
uart
->
uart_device
,
AM_HAL_UART_INT_RX_TMOUT
|
AM_HAL_UART_INT_RX
);
/* Enable the uart interrupt in the NVIC */
am_hal_interrupt_enable
(
uart
->
uart_interrupt
);
...
...
@@ -231,7 +236,7 @@ static int am_putc(struct rt_serial_device *serial, char c)
//if (txsize > 0)
{
am_hal_uart_char_transmit_buffered
(
uart
->
uart_device
,
c
);
}
}
/* Wait until busy bit clears to make sure UART fully transmitted last byte */
while
(
am_hal_uart_flags_get
(
uart
->
uart_device
)
&
AM_HAL_UART_FR_BUSY
);
...
...
@@ -400,9 +405,6 @@ int rt_hw_uart_init(void)
#if defined(RT_USING_UART0)
uart
=
&
uart0
;
config
.
baud_rate
=
BAUD_RATE_115200
;
config
.
data_bits
=
DATA_BITS_8
;
config
.
stop_bits
=
STOP_BITS_1
;
config
.
parity
=
PARITY_NONE
;
RCC_Configuration
(
uart
);
...
...
@@ -418,9 +420,6 @@ int rt_hw_uart_init(void)
#if defined(RT_USING_UART1)
uart
=
&
uart1
;
config
.
baud_rate
=
BAUD_RATE_115200
;
config
.
data_bits
=
DATA_BITS_8
;
config
.
stop_bits
=
STOP_BITS_1
;
config
.
parity
=
PARITY_NONE
;
RCC_Configuration
(
uart
);
...
...
bsp/apollo2/libraries/drivers/SConscript
浏览文件 @
d675ede8
...
...
@@ -10,6 +10,7 @@ hal/am_hal_clkgen.c
hal/am_hal_debug.c
hal/am_hal_cachectrl.c
hal/am_hal_pwrctrl.c
hal/am_hal_mcuctrl.c
hal/am_hal_sysctrl.c
hal/am_hal_reset.c
hal/am_hal_stimer.c
...
...
bsp/apollo2/libraries/drivers/am_mcu_apollo.h
浏览文件 @
d675ede8
...
...
@@ -44,7 +44,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_MCU_APOLLO_H
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_adc.c
浏览文件 @
d675ede8
...
...
@@ -42,7 +42,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_adc.h
浏览文件 @
d675ede8
...
...
@@ -42,17 +42,12 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_ADC_H
#define AM_HAL_ADC_H
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
//! @name Clock Selection
...
...
@@ -309,6 +304,11 @@ am_hal_adc_config_t;
(((value) & AM_REG_ADC_FIFO_COUNT_M) >> AM_REG_ADC_FIFO_COUNT_S)
//! @}
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
// External function definitions
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_cachectrl.c
浏览文件 @
d675ede8
...
...
@@ -42,7 +42,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_cachectrl.h
浏览文件 @
d675ede8
...
...
@@ -38,17 +38,12 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_CACHECTRL_H
#define AM_HAL_CACHECTRL_H
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
// Cache configuration structure
...
...
@@ -186,6 +181,11 @@ extern const am_hal_cachectrl_config_t am_hal_cachectrl_defaults;
AM_HAL_CACHECTRL_CACHECFG_DATA_CLKGATE_ENABLE | \
AM_HAL_CACHECTRL_CACHECFG_CONFIG_2WAY_512)
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
// External function definitions
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_clkgen.c
浏览文件 @
d675ede8
...
...
@@ -42,7 +42,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
...
...
@@ -287,16 +287,20 @@ am_hal_clkgen_int_clear(uint32_t ui32Interrupt)
//! AM_HAL_CLKGEN_OSC_LFRC
//! AM_HAL_CLKGEN_OSC_XT
//!
//! @return
0
None.
//! @return None.
//
//*****************************************************************************
void
am_hal_clkgen_osc_start
(
uint32_t
ui32OscFlags
)
{
//
// Start the oscillator(s).
//
AM_REG
(
CLKGEN
,
OCTRL
)
&=
~
ui32OscFlags
;
if
(
ui32OscFlags
&
(
AM_HAL_CLKGEN_OSC_LFRC
|
AM_HAL_CLKGEN_OSC_XT
)
)
{
//
// Start the oscillator(s).
// Note that these bits are cleared in order to enable the oscillator.
//
AM_REG
(
CLKGEN
,
OCTRL
)
&=
~
ui32OscFlags
;
}
}
//*****************************************************************************
...
...
@@ -318,10 +322,14 @@ am_hal_clkgen_osc_start(uint32_t ui32OscFlags)
void
am_hal_clkgen_osc_stop
(
uint32_t
ui32OscFlags
)
{
//
// Stop the oscillator(s).
//
AM_REG
(
CLKGEN
,
OCTRL
)
|=
ui32OscFlags
;
if
(
ui32OscFlags
&
(
AM_HAL_CLKGEN_OSC_LFRC
|
AM_HAL_CLKGEN_OSC_XT
)
)
{
//
// Stop the oscillator(s).
// Note that these bits are set in order to stop the oscillator.
//
AM_REG
(
CLKGEN
,
OCTRL
)
|=
ui32OscFlags
;
}
}
//*****************************************************************************
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_clkgen.h
浏览文件 @
d675ede8
...
...
@@ -38,17 +38,12 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_CLKGEN_H
#define AM_HAL_CLKGEN_H
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
//! @name System Clock max frequency
...
...
@@ -178,6 +173,11 @@ extern "C"
(AM_REG_CLKGEN_UARTEN_UART0EN_##entype << \
AM_HAL_CLKGEN_UARTEN_UARTENn_S(module))
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
// External function definitions
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_ctimer.c
浏览文件 @
d675ede8
...
...
@@ -42,7 +42,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
...
...
@@ -68,11 +68,12 @@
// still pass in the event of a timer rollover.
//
//*****************************************************************************
//! Timer read workaround: Do count values differ by one tick or less.
#define adjacent(A, B) (((A) == (B)) || (((A) + 1) == (B)) || ((B) == 0))
//*****************************************************************************
//
// Array of function pointers for handling CTimer interrupts.
//
!
Array of function pointers for handling CTimer interrupts.
//
//*****************************************************************************
am_hal_ctimer_handler_t
am_hal_ctimer_ppfnHandlers
[
16
];
...
...
@@ -162,10 +163,10 @@ back2back_reads( uint32_t u32TimerAddr, uint32_t u32Data[])
//*****************************************************************************
//
// @brief Check to see if the given CTimer is using the HFRC
//
//
Note -
Calls to this function should be from inside a critical section.
//
//
!
@brief Check to see if the given CTimer is using the HFRC
//
!
//
! @note
Calls to this function should be from inside a critical section.
//
!
//! @return None.
//
//*****************************************************************************
...
...
@@ -501,7 +502,7 @@ am_hal_ctimer_config(uint32_t ui32TimerNumber,
//! @param ui32TimerSegment specifies which segment of the timer should be
//! enabled.
//!
//! @param ui32Config
v
al specifies the configuration options for the selected
//! @param ui32Config
V
al specifies the configuration options for the selected
//! timer.
//!
//! This function should be used to perform the initial set-up of the
...
...
@@ -823,7 +824,7 @@ uint32_t
am_hal_ctimer_read
(
uint32_t
ui32TimerNumber
,
uint32_t
ui32TimerSegment
)
{
volatile
uint32_t
ui32Value
=
0
;
uint32_t
ui32Values
[
3
]
=
{
0
};
uint32_t
ui32Values
[
4
]
=
{
0
,
};
uint32_t
ui32TimerAddrTbl
[
4
]
=
{
REG_CTIMER_BASEADDR
+
AM_REG_CTIMER_TMR0_O
,
...
...
@@ -1023,7 +1024,7 @@ am_hal_ctimer_pin_disable(uint32_t ui32TimerNumber, uint32_t ui32TimerSegment)
//!
//! @param ui32TimerSegment specifies which segment of the timer to use.
//!
//! @param bInvertOutpt determines whether the output should be inverted. If
//! @param bInvertOutp
u
t determines whether the output should be inverted. If
//! true, the timer output pin for the selected timer segment will be
//! inverted.
//!
...
...
@@ -1131,7 +1132,7 @@ am_hal_ctimer_compare_set(uint32_t ui32TimerNumber, uint32_t ui32TimerSegment,
pui32CmprRegA
=
(
uint32_t
*
)(
AM_REG_CTIMERn
(
0
)
+
AM_REG_CTIMER_CMPRA0_O
+
(
ui32TimerNumber
*
TIMER_OFFSET
));
pui32CmprRegB
=
pui32CmprRegA
+
CTIMER_CMPR_OFFSET
;
pui32CmprRegB
=
pui32CmprRegA
+
CTIMER_CMPR_OFFSET
/
4
;
//
// Write the compare register with the selected value.
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_ctimer.h
浏览文件 @
d675ede8
...
...
@@ -42,17 +42,12 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_CTIMER_H
#define AM_HAL_CTIMER_H
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
//! Number of timers
...
...
@@ -114,7 +109,7 @@ extern "C"
//!
//! These options are to be used with the \e am_hal_ctimer_config_t structure
//! used by \e am_hal_ctimer_config
//!
@{
//! @{
//
//*****************************************************************************
#define AM_HAL_CTIMER_CLK_PIN AM_REG_CTIMER_CTRL0_TMRA0CLK(0x0)
...
...
@@ -208,6 +203,11 @@ am_hal_ctimer_config_t;
//*****************************************************************************
typedef
void
(
*
am_hal_ctimer_handler_t
)(
void
);
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
// External function definitions
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_debug.c
浏览文件 @
d675ede8
...
...
@@ -42,7 +42,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_debug.h
浏览文件 @
d675ede8
...
...
@@ -42,17 +42,12 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_DEBUG_H
#define AM_HAL_DEBUG_H
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
// Debug assert macros.
...
...
@@ -73,6 +68,11 @@ extern "C"
#endif // AM_DEBUG_ASSERT
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
// External function prototypes.
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_flash.c
浏览文件 @
d675ede8
...
...
@@ -54,7 +54,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
...
...
@@ -428,6 +428,47 @@ am_hal_flash_delay(uint32_t ui32Iterations)
g_am_hal_flash
.
delay_cycles
(
ui32Iterations
);
}
//*****************************************************************************
//
//! @brief Delays for a desired amount of cycles while also waiting for a
//! status change.
//!
//! @param ui32usMaxDelay - Maximum number of ~1uS delay loops.
//! @param ui32Address - Address of the register for the status change.
//! @param ui32Mask - Mask for the status change.
//! @param ui32Value - Target value for the status change.
//!
//! This function will delay for approximately the given number of microseconds
//! while checking for a status change, exiting when either the given time has
//! expired or the status change is detected.
//!
//! @returns 0 = timeout.
//! 1 = status change detected.
//
//*****************************************************************************
uint32_t
am_hal_flash_delay_status_change
(
uint32_t
ui32usMaxDelay
,
uint32_t
ui32Address
,
uint32_t
ui32Mask
,
uint32_t
ui32Value
)
{
while
(
ui32usMaxDelay
--
)
{
//
// Check the status
//
if
(
(
AM_REGVAL
(
ui32Address
)
&
ui32Mask
)
==
ui32Value
)
{
return
1
;
}
//
// Call the BOOTROM cycle function to delay for about 1 microsecond.
//
am_hal_flash_delay
(
FLASH_CYCLES_US
(
1
)
);
}
return
0
;
}
// am_hal_flash_delay_status_change()
//*****************************************************************************
//
//! @brief Static Helper Function to check customer info valid bits erasure.
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_flash.h
浏览文件 @
d675ede8
...
...
@@ -42,17 +42,12 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_FLASH_H
#define AM_HAL_FLASH_H
#ifdef __cplusplus
extern
"C"
{
#endif
#include <stdint.h>
#include <stdbool.h>
...
...
@@ -94,13 +89,19 @@ extern "C"
//
#define AM_HAL_FLASH_ADDR2ABSPAGE(addr) ( addr >> 13 )
//*****************************************************************************
//
// Given an integer number of microseconds, convert to a value representing the
// number of am_hal_flash_delay() cycles that will provide that amount of delay.
// This macro is designed to take into account some of the call overhead.
//
// Given a number of microseconds, convert to a value representing the number of
// cycles that will give that delay. This macro is basically taking into account
// some of the call overhead.
// e.g. To provide a 2us delay:
// am_hal_flash_delay( FLASH_CYCLES_US(2) );
//
// IMPORTANT - Apollo2 is spec'ed for only 48MHz operation, so this macro
// assumes that.
//
//*****************************************************************************
#define FLASH_CYCLES_US(n) ((n * (AM_HAL_CLKGEN_FREQ_MAX_MHZ / 3)) - 4)
//
...
...
@@ -223,6 +224,11 @@ extern g_am_hal_flash_t g_am_hal_flash;
#define AM_HAL_FLASH_INFO_CHUNK2INST(n) ((n >> 5) & 1
#define AM_HAL_FLASH_INFO_ADDR2CHUNK(n) ((n) >> 14)
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
// Function prototypes for the helper functions
...
...
@@ -254,6 +260,10 @@ extern void am_hal_flash_recovery(uint32_t ui32RecoveryKey);
extern
uint32_t
am_hal_flash_load_ui32
(
uint32_t
ui32Address
);
extern
void
am_hal_flash_store_ui32
(
uint32_t
ui32Address
,
uint32_t
ui32Data
);
extern
void
am_hal_flash_delay
(
uint32_t
ui32Iterations
);
extern
uint32_t
am_hal_flash_delay_status_change
(
uint32_t
ui32Iterations
,
uint32_t
ui32Address
,
uint32_t
ui32Mask
,
uint32_t
ui32Value
);
//
// These functions update security/protection bits in the customer INFO blOCK.
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_global.c
浏览文件 @
d675ede8
...
...
@@ -43,7 +43,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_global.h
浏览文件 @
d675ede8
...
...
@@ -42,17 +42,12 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_GLOBAL_H
#define AM_HAL_GLOBAL_H
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
// Macro definitions
...
...
@@ -107,6 +102,11 @@ extern "C"
//*****************************************************************************
extern
volatile
uint32_t
g_ui32HALflags
;
#ifdef __cplusplus
extern
"C"
{
#endif
#ifdef __cplusplus
}
#endif
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_gpio.c
浏览文件 @
d675ede8
...
...
@@ -42,7 +42,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
...
...
@@ -479,7 +479,7 @@ am_hal_gpio_int_register(uint32_t ui32GPIONumber,
//!
//! This function gets the state of one GPIO polarity bit.
//!
//! @note When the bit is a
one
the interrupt polarity is rising edge.
//! @note When the bit is a
zero
the interrupt polarity is rising edge.
//!
//! @return the current polarity.
//
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_gpio.h
浏览文件 @
d675ede8
...
...
@@ -42,7 +42,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
...
...
@@ -119,7 +119,7 @@
//*****************************************************************************
//
// Output options
// Output options
(OUTCFG)
//
//*****************************************************************************
#define AM_HAL_GPIO_OUT_DISABLE ((0x0 << 1) << CFGVAL_GPIOCFG_S)
...
...
@@ -127,6 +127,15 @@
#define AM_HAL_GPIO_OUT_OPENDRAIN ((0x2 << 1) << CFGVAL_GPIOCFG_S)
#define AM_HAL_GPIO_OUT_3STATE ((0x3 << 1) << CFGVAL_GPIOCFG_S)
//*****************************************************************************
//
// Special options for IOM0 and IOM4 clocks.
// For 24MHz operation, a special enable must be selected. The 24MHZ select is
// selected via bit0 of OUTCFG (which is, in a way,an alias of OUT_PUSHPULL).
//
//*****************************************************************************
#define AM_HAL_GPIO_24MHZ_ENABLE ((0x1 << 1) << CFGVAL_GPIOCFG_S)
//*****************************************************************************
//
// Pad configuration options.
...
...
@@ -498,13 +507,13 @@
//! @return None.
//
//*****************************************************************************
#define am_hal_gpio_int_polarity_bit_set(ui32
PinNumber, ui32Polarity)
\
if ( (uint32_t)(ui32
PinNumber) < AM_HAL_GPIO_MAX_PADS )
\
#define am_hal_gpio_int_polarity_bit_set(ui32
BitNum, ui32Polarity)
\
if ( (uint32_t)(ui32
BitNum) < AM_HAL_GPIO_MAX_PADS )
\
{ \
AM_CRITICAL_BEGIN_ASM \
\
AM_REGn(GPIO, 0, PADKEY) = AM_REG_GPIO_PADKEY_KEYVAL; \
AM_HAL_GPIO_POL_W(ui32
PinNumber, ui32Polarity);
\
AM_HAL_GPIO_POL_W(ui32
BitNum, ui32Polarity);
\
AM_REGn(GPIO, 0, PADKEY) = 0; \
\
AM_CRITICAL_END_ASM \
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_i2c_bit_bang.c
浏览文件 @
d675ede8
...
...
@@ -41,7 +41,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
...
...
@@ -133,7 +133,7 @@ static am_hal_i2c_bit_bang_priv_t am_hal_i2c_bit_bang_priv;
// Wait for any stretched clock to go high
// If it times out - return failure
//
static
bool
static
__inline
bool
i2c_pull_and_wait_scl_hi
(
void
)
{
// Maximum time to wait for clock stretching
...
...
@@ -165,7 +165,7 @@ i2c_pull_and_wait_scl_hi(void)
//! returns None.
//
//*****************************************************************************
am_hal_i2c_bit_bang_enum_
t
am_hal_i2c_bit_bang_enum_
e
am_hal_i2c_bit_bang_init
(
uint32_t
sck_gpio_number
,
uint32_t
sda_gpio_number
)
{
...
...
@@ -192,7 +192,7 @@ am_hal_i2c_bit_bang_init(uint32_t sck_gpio_number,
//
// Set up SCK GPIO configuration bi-direction, input
//
am_hal_gpio_pin_config
(
sck_gpio_number
,
AM_HAL_PIN_OPENDRAIN
);
am_hal_gpio_pin_config
(
sck_gpio_number
,
AM_HAL_PIN_OPENDRAIN
|
AM_HAL_GPIO_INPEN
);
//
// Set SDA GPIO data bit high so we aren't pulling down the data line
...
...
@@ -201,7 +201,7 @@ am_hal_i2c_bit_bang_init(uint32_t sck_gpio_number,
//
// Set up SDA GPIO configuration bi-direction, input
//
am_hal_gpio_pin_config
(
sda_gpio_number
,
AM_HAL_PIN_OPENDRAIN
);
am_hal_gpio_pin_config
(
sda_gpio_number
,
AM_HAL_PIN_OPENDRAIN
|
AM_HAL_GPIO_INPEN
);
// Now make sure we have control of the clock line
//
...
...
@@ -284,7 +284,7 @@ am_hal_i2c_bit_bang_init(uint32_t sck_gpio_number,
//! returns the byte received
//
//*****************************************************************************
static
am_hal_i2c_bit_bang_enum_t
static
__inline
am_hal_i2c_bit_bang_enum_e
i2c_receive_byte
(
uint8_t
*
pRxByte
,
bool
bNack
)
{
int
i
;
...
...
@@ -389,7 +389,7 @@ i2c_receive_byte(uint8_t *pRxByte, bool bNack)
//! }
//
//*****************************************************************************
static
am_hal_i2c_bit_bang_enum_t
static
__inline
am_hal_i2c_bit_bang_enum_e
i2c_send_byte
(
uint8_t
one_byte
)
{
int
i
;
...
...
@@ -478,13 +478,13 @@ i2c_send_byte(uint8_t one_byte)
//! returns ENUM{AM_HAL_I2C_BIT_BANG_SUCCESS,AM_HAL_I2C_BIT_BANG_ADDRESS_NAKED}
//
//*****************************************************************************
am_hal_i2c_bit_bang_enum_
t
am_hal_i2c_bit_bang_enum_
e
am_hal_i2c_bit_bang_receive
(
uint8_t
address
,
uint32_t
number_of_bytes
,
uint8_t
*
pData
,
uint8_t
ui8Offset
,
bool
bUseOffset
,
bool
bNoStop
)
{
uint32_t
ui32I
;
am_hal_i2c_bit_bang_enum_
t
status
=
AM_HAL_I2C_BIT_BANG_SUCCESS
;
am_hal_i2c_bit_bang_enum_
e
status
=
AM_HAL_I2C_BIT_BANG_SUCCESS
;
if
(
i2c_pull_and_wait_scl_hi
())
...
...
@@ -617,13 +617,13 @@ am_hal_i2c_bit_bang_receive(uint8_t address, uint32_t number_of_bytes,
//! AM_HAL_I2C_BIT_BANG_ADDRESS_NAKED}
//
//*****************************************************************************
am_hal_i2c_bit_bang_enum_
t
am_hal_i2c_bit_bang_enum_
e
am_hal_i2c_bit_bang_send
(
uint8_t
address
,
uint32_t
number_of_bytes
,
uint8_t
*
pData
,
uint8_t
ui8Offset
,
bool
bUseOffset
,
bool
bNoStop
)
{
uint32_t
ui32I
;
am_hal_i2c_bit_bang_enum_
t
status
;
am_hal_i2c_bit_bang_enum_
e
status
;
bool
data_naked
=
false
;
if
(
i2c_pull_and_wait_scl_hi
())
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_i2c_bit_bang.h
浏览文件 @
d675ede8
...
...
@@ -40,17 +40,12 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_I2C_BIT_BANG_H
#define AM_HAL_I2C_BIT_BANG_H
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
// Enumerated return constants
...
...
@@ -63,24 +58,30 @@ typedef enum
AM_HAL_I2C_BIT_BANG_DATA_NAKED
,
AM_HAL_I2C_BIT_BANG_CLOCK_TIMEOUT
,
AM_HAL_I2C_BIT_BANG_DATA_TIMEOUT
,
}
am_hal_i2c_bit_bang_enum_t
;
AM_HAL_I2C_BIT_BANG_STATUS_MAX
,
}
am_hal_i2c_bit_bang_enum_e
;
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
// External function definitions
//
//*****************************************************************************
extern
am_hal_i2c_bit_bang_enum_
t
am_hal_i2c_bit_bang_init
(
uint32_t
sck_gpio_number
,
extern
am_hal_i2c_bit_bang_enum_
e
am_hal_i2c_bit_bang_init
(
uint32_t
sck_gpio_number
,
uint32_t
sda_gpio_number
);
extern
am_hal_i2c_bit_bang_enum_
t
am_hal_i2c_bit_bang_send
(
uint8_t
address
,
extern
am_hal_i2c_bit_bang_enum_
e
am_hal_i2c_bit_bang_send
(
uint8_t
address
,
uint32_t
number_of_bytes
,
uint8_t
*
pData
,
uint8_t
ui8Offset
,
bool
bUseOffset
,
bool
bNoStop
);
extern
am_hal_i2c_bit_bang_enum_
t
am_hal_i2c_bit_bang_receive
(
uint8_t
address
,
extern
am_hal_i2c_bit_bang_enum_
e
am_hal_i2c_bit_bang_receive
(
uint8_t
address
,
uint32_t
number_of_bytes
,
uint8_t
*
pData
,
uint8_t
ui8Offset
,
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_interrupt.c
浏览文件 @
d675ede8
...
...
@@ -44,7 +44,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
...
...
@@ -190,7 +190,7 @@ am_hal_interrupt_priority_set(uint32_t ui32Interrupt, uint32_t ui32Priority)
//
// OR in the new priority.
//
*
pui32PriorityReg
|=
(
ui32Priority
<<
ui32Shift
);
*
pui32PriorityReg
=
ui32OldPriority
|
(
ui32Priority
<<
ui32Shift
);
}
//*****************************************************************************
...
...
@@ -210,7 +210,7 @@ void am_hal_interrupt_pend_set(uint32_t ui32Interrupt)
//
// Check to see if the specified interrupt is valid for this MCU
//
if
(
ui32Interrupt
>
47
)
if
(
ui32Interrupt
>
AM_HAL_INTERRUPT_MAX
)
{
return
;
}
...
...
@@ -247,7 +247,7 @@ void am_hal_interrupt_pend_clear(uint32_t ui32Interrupt)
//
// Check to see if the specified interrupt is valid for this MCU
//
if
(
ui32Interrupt
>
47
)
if
(
ui32Interrupt
>
AM_HAL_INTERRUPT_MAX
)
{
return
;
}
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_interrupt.h
浏览文件 @
d675ede8
...
...
@@ -44,16 +44,12 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_INTERRUPT_H
#define AM_HAL_INTERRUPT_H
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
//! @name ISR number macros.
...
...
@@ -66,6 +62,7 @@ extern "C"
//
// Hardware interrupts
//
#define AM_HAL_INTERRUPT_MAX (47) //AM_HAL_INTERRUPT_SOFTWARE3
#define AM_HAL_INTERRUPT_RESET 1
#define AM_HAL_INTERRUPT_NMI 2
#define AM_HAL_INTERRUPT_HARDFAULT 3
...
...
@@ -130,6 +127,10 @@ extern "C"
//*****************************************************************************
#define AM_HAL_INTERRUPT_PRIORITY(n) (((uint32_t)(n) & 0x7) << 5)
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
// External function definitions
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_iom.c
浏览文件 @
d675ede8
此差异已折叠。
点击以展开。
bsp/apollo2/libraries/drivers/hal/am_hal_iom.h
浏览文件 @
d675ede8
...
...
@@ -42,7 +42,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
...
...
@@ -79,11 +79,13 @@
#define AM_HAL_IOM_2MHZ 2000000
#define AM_HAL_IOM_1_5MHZ 1500000
#define AM_HAL_IOM_1MHZ 1000000
#define AM_HAL_IOM_800KHZ 800000
#define AM_HAL_IOM_750KHZ 750000
#define AM_HAL_IOM_500KHZ 500000
#define AM_HAL_IOM_400KHZ 400000
#define AM_HAL_IOM_375KHZ 375000
#define AM_HAL_IOM_250KHZ 250000
#define AM_HAL_IOM_200KHZ 200000
#define AM_HAL_IOM_125KHZ 125000
#define AM_HAL_IOM_100KHZ 100000
#define AM_HAL_IOM_50KHZ 50000
...
...
@@ -176,32 +178,69 @@
#define AM_HAL_IOM_INT_FUNDFL AM_REG_IOMSTR_INTEN_FUNDFL_M
#define AM_HAL_IOM_INT_THR AM_REG_IOMSTR_INTEN_THR_M
#define AM_HAL_IOM_INT_CMDCMP AM_REG_IOMSTR_INTEN_CMDCMP_M
#define AM_HAL_IOM_INT_ALL ( \
AM_HAL_IOM_INT_ARB | \
AM_HAL_IOM_INT_STOP | \
AM_HAL_IOM_INT_START | \
AM_HAL_IOM_INT_ICMD | \
AM_HAL_IOM_INT_IACC | \
AM_HAL_IOM_INT_WTLEN | \
AM_HAL_IOM_INT_NAK | \
AM_HAL_IOM_INT_FOVFL | \
AM_HAL_IOM_INT_FUNDFL | \
AM_HAL_IOM_INT_THR | \
AM_HAL_IOM_INT_CMDCMP)
#define AM_HAL_IOM_INT_SWERR ( \
AM_HAL_IOM_INT_ICMD | \
AM_HAL_IOM_INT_FOVFL | \
AM_HAL_IOM_INT_FUNDFL | \
AM_HAL_IOM_INT_IACC)
#define AM_HAL_IOM_INT_I2CARBERR ( \
AM_HAL_IOM_INT_ARB | \
AM_HAL_IOM_INT_START | \
AM_HAL_IOM_INT_STOP)
//! @}
//*****************************************************************************
//
//! @name IOM function errors
//! @brief Return values for IOM HAL function errors, such as with the function
//! am_hal_iom_error_status_get().
//! @name Software IOM modules
//! @brief Macro definitions for using the software I2C interface.
//!
//! Use this macro as the module number for standard IOM functions to emulate
//! them using the bit-banged i2c interface.
//!
//! @{
//
//*****************************************************************************
#define AM_HAL_IOM_
ERR_INVALID_MODULE (1 << 30)
#define AM_HAL_IOM_
I2CBB_MODULE AM_REG_IOMSTR_NUM_MODULES
//! @}
//*****************************************************************************
//
//! @name
Software IOM modul
es
//! @brief
Macro definitions for using the software I2C interface.
//! @name
IOM Return Cod
es
//! @brief
Enum definitions for defining return values for IOM APIs
//!
//! Use this macro as the module number for standard IOM functions to emulate
//! them using the bit-banged i2c interface.
//! This enum defines possible values for non-void IOM APIs
//!
//! @{
//
//*****************************************************************************
#define AM_HAL_IOM_I2CBB_MODULE AM_REG_IOMSTR_NUM_MODULES
typedef
enum
{
AM_HAL_IOM_SUCCESS
=
0
,
AM_HAL_IOM_ERR_TIMEOUT
,
AM_HAL_IOM_ERR_INVALID_MODULE
,
AM_HAL_IOM_ERR_INVALID_PARAM
,
AM_HAL_IOM_ERR_INVALID_CFG
,
AM_HAL_IOM_ERR_INVALID_OPER
,
AM_HAL_IOM_ERR_I2C_NAK
,
AM_HAL_IOM_ERR_I2C_ARB
,
AM_HAL_IOM_ERR_RESOURCE_ERR
,
}
am_hal_iom_status_e
;
//! @}
//*****************************************************************************
...
...
@@ -271,7 +310,7 @@ typedef struct
//! Select the SPI clock polarity (unused in I2C mode).
//
bool
bSPOL
;
//
//! @brief Select the FIFO write threshold.
//!
...
...
@@ -404,7 +443,11 @@ am_hal_iom_pwrsave_t;
//
//*****************************************************************************
extern
am_hal_iom_pwrsave_t
am_hal_iom_pwrsave
[
AM_REG_IOMSTR_NUM_MODULES
];
extern
uint32_t
g_iom_error_status
;
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
...
...
@@ -420,23 +463,30 @@ extern void am_hal_iom_config(uint32_t ui32Module,
extern
uint32_t
am_hal_iom_frequency_get
(
uint32_t
ui32Module
);
extern
void
am_hal_iom_enable
(
uint32_t
ui32Module
);
extern
void
am_hal_iom_disable
(
uint32_t
ui32Module
);
extern
void
am_hal_iom_spi_write
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
extern
am_hal_iom_status_e
am_hal_iom_spi_write
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
);
extern
void
am_hal_iom_spi_read
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
extern
am_hal_iom_status_e
am_hal_iom_spi_read
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
);
extern
uint32_t
am_hal_iom_spi_write_nq
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
extern
am_hal_iom_status_e
am_hal_iom_spi_fullduplex
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
uint32_t
*
pui32TxData
,
uint32_t
*
pui32RxData
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
);
extern
am_hal_iom_status_e
am_hal_iom_spi_write_nq
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
);
extern
uint32_t
am_hal_iom_spi_read_nq
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
extern
am_hal_iom_status_e
am_hal_iom_spi_read_nq
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
);
extern
void
am_hal_iom_spi_write_nb
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
extern
am_hal_iom_status_e
am_hal_iom_spi_fullduplex_nq
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
uint32_t
*
pui32TxData
,
uint32_t
*
pui32RxData
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
);
extern
am_hal_iom_status_e
am_hal_iom_spi_write_nb
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
,
am_hal_iom_callback_t
pfnCallback
);
extern
uint32_t
am_hal_iom_spi_read_nb
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
extern
am_hal_iom_status_e
am_hal_iom_spi_read_nb
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
,
am_hal_iom_callback_t
pfnCallback
);
...
...
@@ -445,39 +495,39 @@ extern void am_hal_iom_spi_cmd_run(uint32_t ui32Operation,
uint32_t
ui32ChipSelect
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
);
extern
void
am_hal_iom_i2c_write
(
uint32_t
ui32Module
,
extern
am_hal_iom_status_e
am_hal_iom_i2c_write
(
uint32_t
ui32Module
,
uint32_t
ui32BusAddress
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
);
extern
void
am_hal_iom_i2c_read
(
uint32_t
ui32Module
,
extern
am_hal_iom_status_e
am_hal_iom_i2c_read
(
uint32_t
ui32Module
,
uint32_t
ui32BusAddress
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
);
extern
uint32_t
am_hal_iom_i2c_write_nq
(
uint32_t
ui32Module
,
extern
am_hal_iom_status_e
am_hal_iom_i2c_write_nq
(
uint32_t
ui32Module
,
uint32_t
ui32BusAddress
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
);
extern
uint32_t
am_hal_iom_i2c_read_nq
(
uint32_t
ui32Module
,
extern
am_hal_iom_status_e
am_hal_iom_i2c_read_nq
(
uint32_t
ui32Module
,
uint32_t
ui32BusAddress
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
);
extern
void
am_hal_iom_i2c_write_nb
(
uint32_t
ui32Module
,
extern
am_hal_iom_status_e
am_hal_iom_i2c_write_nb
(
uint32_t
ui32Module
,
uint32_t
ui32BusAddress
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
,
am_hal_iom_callback_t
pfnCallback
);
extern
void
am_hal_iom_i2c_read_nb
(
uint32_t
ui32Module
,
extern
am_hal_iom_status_e
am_hal_iom_i2c_read_nb
(
uint32_t
ui32Module
,
uint32_t
ui32BusAddress
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
,
am_hal_iom_callback_t
pfnCallback
);
extern
void
am_hal_iom_i2c_cmd_run
(
uint32_t
ui32Operation
,
extern
am_hal_iom_status_e
am_hal_iom_i2c_cmd_run
(
uint32_t
ui32Operation
,
uint32_t
ui32Module
,
uint32_t
ui32BusAddress
,
uint32_t
ui32NumBytes
,
...
...
@@ -485,7 +535,7 @@ extern void am_hal_iom_i2c_cmd_run(uint32_t ui32Operation,
extern
void
am_hal_iom_command_repeat_set
(
uint32_t
ui32Module
,
uint32_t
ui32CmdCount
);
extern
uint32_t
am_hal_iom_status_get
(
uint32_t
ui32Module
);
extern
uint32_t
am_hal_iom_error_status_get
(
uint32_t
ui32Module
);
extern
am_hal_iom_status_e
am_hal_iom_error_status_get
(
uint32_t
ui32Module
);
extern
uint32_t
am_hal_iom_fifo_write
(
uint32_t
ui32Module
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
);
extern
uint32_t
am_hal_iom_fifo_read
(
uint32_t
ui32Module
,
uint32_t
*
pui32Data
,
...
...
@@ -505,19 +555,19 @@ extern void am_hal_iom_queue_init(uint32_t ui32ModuleNum,
uint32_t
ui32QueueMemSize
);
extern
uint32_t
am_hal_iom_queue_length_get
(
uint32_t
ui32Module
);
extern
void
am_hal_iom_sleeping_queue_flush
(
uint32_t
ui32Module
);
extern
void
am_hal_iom_queue_spi_write
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
extern
am_hal_iom_status_e
am_hal_iom_queue_spi_write
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
,
am_hal_iom_callback_t
pfnCallback
);
extern
void
am_hal_iom_queue_spi_read
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
extern
am_hal_iom_status_e
am_hal_iom_queue_spi_read
(
uint32_t
ui32Module
,
uint32_t
ui32ChipSelect
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
,
am_hal_iom_callback_t
pfnCallback
);
extern
void
am_hal_iom_queue_i2c_write
(
uint32_t
ui32Module
,
uint32_t
ui32BusAddress
,
extern
am_hal_iom_status_e
am_hal_iom_queue_i2c_write
(
uint32_t
ui32Module
,
uint32_t
ui32BusAddress
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
,
am_hal_iom_callback_t
pfnCallback
);
extern
void
am_hal_iom_queue_i2c_read
(
uint32_t
ui32Module
,
uint32_t
ui32BusAddress
,
extern
am_hal_iom_status_e
am_hal_iom_queue_i2c_read
(
uint32_t
ui32Module
,
uint32_t
ui32BusAddress
,
uint32_t
*
pui32Data
,
uint32_t
ui32NumBytes
,
uint32_t
ui32Options
,
am_hal_iom_callback_t
pfnCallback
);
...
...
@@ -533,7 +583,6 @@ extern void am_hal_iom_queue_service(uint32_t ui32Module, uint32_t ui32Statu
void am_iomaster##x##_isr(void) \
{ \
uint32_t ui32IntStatus; \
g_iom_error_status = am_hal_iom_error_status_get(x); \
ui32IntStatus = am_hal_iom_int_status_get(x, false); \
am_hal_iom_int_clear(x, ui32IntStatus); \
am_hal_iom_queue_service(x, ui32IntStatus); \
...
...
@@ -543,12 +592,15 @@ void am_iomaster##x##_isr(void) \
void am_iomaster##x##_isr(void) \
{ \
uint32_t ui32IntStatus; \
g_iom_error_status = am_hal_iom_error_status_get(x); \
ui32IntStatus = am_hal_iom_int_status_get(x, false); \
am_hal_iom_int_clear(x, ui32IntStatus); \
am_hal_iom_int_service(x, ui32IntStatus); \
}
#ifdef __cplusplus
}
#endif
#endif // AM_HAL_IOM_H
//*****************************************************************************
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_ios.c
浏览文件 @
d675ede8
...
...
@@ -42,7 +42,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
...
...
@@ -61,6 +61,7 @@ typedef struct
volatile
uint32_t
ui32WriteIndex
;
volatile
uint32_t
ui32ReadIndex
;
volatile
uint32_t
ui32Length
;
uint32_t
ui32FifoInc
;
uint32_t
ui32Capacity
;
}
am_hal_ios_buffer_t
;
...
...
@@ -103,6 +104,23 @@ uint8_t *g_pui8FIFOPtr = (uint8_t *) REG_IOSLAVE_BASEADDR;
uint8_t
g_ui32HwFifoSize
=
0
;
uint32_t
g_ui32FifoBaseOffset
=
0
;
//*****************************************************************************
//
// Checks to see if this processor is a Rev B2 device.
//
// This is needed to disable SHELBY-1654 workaround.
//
//*****************************************************************************
bool
isRevB2
(
void
)
{
//
// Check to make sure the major rev is B and the minor rev is 2.
//
return
(
(
AM_REG
(
MCUCTRL
,
CHIPREV
)
&
0xFF
)
==
\
(
AM_REG_MCUCTRL_CHIPREV_REVMAJ_B
|
(
AM_REG_MCUCTRL_CHIPREV_REVMIN_REV0
+
2
))
);
}
//*****************************************************************************
//
//! @brief Enable the IOS in the power control block.
...
...
@@ -957,7 +975,10 @@ am_hal_ios_fifo_service(uint32_t ui32Status)
}
}
}
resync_fifoSize
();
if
(
!
isRevB2
())
{
resync_fifoSize
();
}
//
// Need to retake the FIFO space, after Threshold interrupt has been reenabled
...
...
@@ -1041,7 +1062,10 @@ am_hal_ios_fifo_write(uint8_t *pui8Data, uint32_t ui32NumBytes)
ui32NumBytes
-=
ui32FIFOSpace
;
pui8Data
+=
ui32FIFOSpace
;
};
resync_fifoSize
();
if
(
!
isRevB2
())
{
resync_fifoSize
();
}
}
//
...
...
@@ -1102,6 +1126,8 @@ am_hal_ios_fifo_write(uint8_t *pui8Data, uint32_t ui32NumBytes)
}
}
// Number of bytes written
g_sSRAMBuffer
.
ui32FifoInc
+=
totalBytes
-
ui32NumBytes
;
return
(
totalBytes
-
ui32NumBytes
);
}
...
...
@@ -1114,7 +1140,7 @@ am_hal_ios_fifo_write(uint8_t *pui8Data, uint32_t ui32NumBytes)
//!
//! This function will write data from the caller-provided array to the IOS
//! LRAM FIFO. This simple routine does not use SRAM buffering for large
//! messages.
//! messages.
This function also updates the FIFOCTR.
//!
//! The maximum message size for the IO Slave is 128 bytes.
//!
...
...
@@ -1140,6 +1166,8 @@ am_hal_ios_fifo_write_simple(uint8_t *pui8Data, uint32_t ui32NumBytes)
if
(
ui32NumBytes
<=
ui32FIFOSpace
)
{
fifo_write
(
pui8Data
,
ui32NumBytes
);
// Write FIFOINC
AM_BFW
(
IOSLAVE
,
FIFOINC
,
FIFOINC
,
ui32NumBytes
);
}
else
{
...
...
@@ -1209,6 +1237,7 @@ am_hal_ios_buffer_init(am_hal_ios_buffer_t *psBuffer, void *pvArray,
psBuffer
->
ui32ReadIndex
=
0
;
psBuffer
->
ui32Length
=
0
;
psBuffer
->
ui32Capacity
=
ui32Bytes
;
psBuffer
->
ui32FifoInc
=
0
;
psBuffer
->
pui8Data
=
(
uint8_t
*
)
pvArray
;
}
...
...
@@ -1273,12 +1302,19 @@ am_hal_ios_fifo_buffer_init(uint8_t *pui8Buffer, uint32_t ui32NumBytes)
//! @brief Update the FIFOCTR to inform host of available data to read.
//!
//! This function allows the application to indicate to HAL when it is safe to
//! update the FIFOCTR.
//! update the FIFOCTR. This function needs to be used in conjunction with
//! am_hal_ios_fifo_write(), which itself does not update the FIFOCTR
//!
//! CAUTION:
//! Application needs to implement some sort of
//! synchronization with the host to make sure host is not reading FIFOCTR while
//! it is being updated by the MCU, since the FIFOCTR read over
//! IO is not an atomic operation.
//! IO is not an atomic operation. Otherwise, some other logic could be implemented
//! by the host to detect and disregard transient values of FIFOCTR (e.g. multiple
//! reads till it gets a stable value).
//! For Pre-B2 parts, it is necessary to have this synchronization guarantee that
//! Host is not doing any READ operation - be it for FIFOCTR or FIFO itself when
//! this call is made, as otherwise the FIFOCTR value may get corrupted.
//!
//!
//! @return None.
...
...
@@ -1287,11 +1323,9 @@ am_hal_ios_fifo_buffer_init(uint8_t *pui8Buffer, uint32_t ui32NumBytes)
void
am_hal_ios_update_fifoctr
(
void
)
{
uint32_t
ui32Val
;
// Determine the available data
ui32Val
=
am_hal_ios_fifo_space_used
();
// Update FIFOCTR
AM_BFW
(
IOSLAVE
,
FIFOCTR
,
FIFOCTR
,
ui32Val
);
// Write FIFOINC
AM_BFW
(
IOSLAVE
,
FIFOINC
,
FIFOINC
,
g_sSRAMBuffer
.
ui32FifoInc
);
g_sSRAMBuffer
.
ui32FifoInc
=
0
;
return
;
}
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_ios.h
浏览文件 @
d675ede8
...
...
@@ -42,16 +42,12 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_IOS_H
#define AM_HAL_IOS_H
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
...
...
@@ -300,6 +296,10 @@ typedef struct
}
am_hal_ios_config_t
;
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
// External function definitions
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_itm.c
浏览文件 @
d675ede8
...
...
@@ -42,7 +42,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
...
...
@@ -56,30 +56,6 @@
//
//*****************************************************************************
//*****************************************************************************
//
//! @brief Delays for a desired amount of microseconds.
//!
//! @note - This function is based on the similar function in am_util_delay.c,
//! please see that module for implementation details. It was necessary to
//! duplicate it here to avoid having to update every example to include the
//! am_util_delay.c module in its build.
//!
//! @returns None
//
//*****************************************************************************
void
am_hal_itm_delay_us
(
uint32_t
ui32MicroSeconds
)
{
uint32_t
ui32Iterations
=
ui32MicroSeconds
*
(
am_hal_clkgen_sysclk_get
()
/
3000000
);
//
// Call the BOOTROM cycle delay function
//
am_hal_flash_delay
(
ui32Iterations
);
}
//*****************************************************************************
//
//! @brief Enables the ITM
...
...
@@ -118,7 +94,7 @@ am_hal_itm_enable(void)
AM_REGVAL
(
AM_REG_ITM_TER_O
)
=
0xffffffff
;
//
// Write to the ITM control and status register
(don't enable yet)
.
// Write to the ITM control and status register.
//
AM_REGVAL
(
AM_REG_ITM_TCR_O
)
=
AM_WRITE_SM
(
AM_REG_ITM_TCR_ATB_ID
,
0x15
)
|
...
...
@@ -129,6 +105,7 @@ am_hal_itm_enable(void)
AM_WRITE_SM
(
AM_REG_ITM_TCR_SYNC_ENABLE
,
0
)
|
AM_WRITE_SM
(
AM_REG_ITM_TCR_TS_ENABLE
,
0
)
|
AM_WRITE_SM
(
AM_REG_ITM_TCR_ITM_ENABLE
,
1
);
}
//*****************************************************************************
...
...
@@ -203,7 +180,7 @@ am_hal_itm_not_busy(void)
//
// wait for 50us for the data to flush out
//
am_hal_
itm_delay_us
(
50
);
am_hal_
flash_delay
(
FLASH_CYCLES_US
(
50
)
);
}
//*****************************************************************************
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_itm.h
浏览文件 @
d675ede8
...
...
@@ -42,18 +42,13 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_ITM_H
#define AM_HAL_ITM_H
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
// Sync Packet Defines
...
...
@@ -71,12 +66,16 @@ extern "C"
#define AM_HAL_ITM_PRINT_NUM_REGS 1
extern
uint32_t
am_hal_itm_print_registers
[
AM_HAL_ITM_PRINT_NUM_REGS
];
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
// External function definitions
//
//*****************************************************************************
extern
void
am_hal_itm_delay_us
(
uint32_t
ui32MicroSeconds
);
extern
void
am_hal_itm_enable
(
void
);
extern
void
am_hal_itm_disable
(
void
);
extern
void
am_hal_itm_not_busy
(
void
);
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_mcuctrl.c
浏览文件 @
d675ede8
...
...
@@ -42,7 +42,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_mcuctrl.h
浏览文件 @
d675ede8
...
...
@@ -42,17 +42,12 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_MCUCTRL_H
#define AM_HAL_MCUCTRL_H
#ifdef __cplusplus
extern
"C"
{
#endif
//
// Deprecate the am_hal_mcuctrl_bucks_enable() and disable() functions.
// This functionality is now handled in pwrctrl.
...
...
@@ -188,6 +183,11 @@ typedef struct
}
am_hal_mcuctrl_fault_t
;
#ifdef __cplusplus
extern
"C"
{
#endif
//*****************************************************************************
//
// External function definitions
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_otp.c
浏览文件 @
d675ede8
...
...
@@ -38,7 +38,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include "am_mcu_apollo.h"
...
...
bsp/apollo2/libraries/drivers/hal/am_hal_otp.h
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bsp/apollo2/libraries/drivers/hal/am_hal_pdm.c
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...
@@ -42,7 +42,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.
9
of the AmbiqSuite Development Package.
// This is part of revision 1.2.
11
of the AmbiqSuite Development Package.
//
//*****************************************************************************
...
...
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bsp/apollo2/libraries/drivers/regs/am_reg_macros.h
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bsp/apollo2/libraries/drivers/regs/am_reg_macros_asm.h
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bsp/apollo2/libraries/drivers/regs/am_reg_mcuctrl.h
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bsp/apollo2/libraries/drivers/regs/am_reg_nvic.h
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bsp/apollo2/libraries/drivers/regs/am_reg_pdm.h
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bsp/apollo2/libraries/drivers/regs/am_reg_pwrctrl.h
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bsp/apollo2/libraries/drivers/regs/am_reg_rstgen.h
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bsp/apollo2/libraries/drivers/regs/am_reg_rtc.h
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bsp/apollo2/libraries/drivers/regs/am_reg_sysctrl.h
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bsp/apollo2/libraries/drivers/regs/am_reg_systick.h
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bsp/apollo2/libraries/drivers/regs/am_reg_tpiu.h
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bsp/apollo2/libraries/drivers/regs/am_reg_uart.h
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bsp/apollo2/libraries/drivers/regs/am_reg_vcomp.h
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bsp/apollo2/libraries/drivers/regs/am_reg_wdt.h
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bsp/apollo2/libraries/startup/SConscript
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bsp/apollo2/project.uvoptx
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bsp/apollo2/project.uvprojx
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bsp/apollo2/rtthread.sct
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