提交 c19fb2ab 编写于 作者: L lin

Add bsp apollo2

上级 7b4e7224
# for module compiling
import os
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
TARGET = 'rtthread_apollo2.' + rtconfig.TARGET_EXT
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
if rtconfig.PLATFORM == 'iar':
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
env.Replace(ARFLAGS = [''])
env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map project.map'])
Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
# make a building
DoBuilding(TARGET, objs)
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'applications')
src = Glob('*.c')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2015, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2017-09-14 Haley the first version
*/
/**
* @addtogroup APOLLO2
*/
/*@{*/
#include <rtthread.h>
#include <stdint.h>
#ifdef RT_USING_FINSH
#include <finsh.h>
#include <shell.h>
#endif
#include "hw_led.h"
ALIGN(RT_ALIGN_SIZE)
static rt_uint8_t led_stack[ 512 ];
static struct rt_thread led_thread;
static void led_thread_entry(void* parameter)
{
unsigned int count=0;
rt_hw_led_init(0);
rt_hw_led_init(1);
while (1)
{
/* led1 on */
#ifndef RT_USING_FINSH
rt_kprintf("led on, count : %d\r\n",count);
#endif
count++;
rt_hw_led_on(0);
rt_thread_delay( RT_TICK_PER_SECOND/2 ); /* sleep 0.5 second and switch to other thread */
/* led1 off */
#ifndef RT_USING_FINSH
rt_kprintf("led off\r\n");
#endif
rt_hw_led_off(0);
rt_thread_delay( RT_TICK_PER_SECOND/2 );
}
}
void rt_init_thread_entry(void* parameter)
{
#ifdef RT_USING_COMPONENTS_INIT
/* initialization RT-Thread Components */
rt_components_init();
#endif
}
int rt_application_init(void)
{
rt_thread_t init_thread;
rt_err_t result;
/* init led thread */
result = rt_thread_init(&led_thread,
"led",
led_thread_entry,
RT_NULL,
(rt_uint8_t*)&led_stack[0],
sizeof(led_stack),
7,
5);
if (result == RT_EOK)
{
rt_thread_startup(&led_thread);
}
init_thread = rt_thread_create("init", rt_init_thread_entry, RT_NULL, 1024,
RT_THREAD_PRIORITY_MAX / 3, 20);
if (init_thread != RT_NULL)
rt_thread_startup(init_thread);
return 0;
}
/*@}*/
/*
* File : startup.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2015, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2017-09-11 Haley the first version
*/
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
/**
* @addtogroup Apollo2
*/
/*@{*/
extern int rt_application_init(void);
#ifdef __CC_ARM
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define AM_SRAM_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="HEAP"
#define AM_SRAM_BEGIN (__segment_end("HEAP"))
#else
extern int __bss_end;
#define NRF_SRAM_BEGIN (&__bss_end)
#endif
/**
* This function will startup RT-Thread RTOS.
*/
void rtthread_startup(void)
{
/* init board */
rt_hw_board_init();
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();
#ifdef RT_USING_HEAP
rt_system_heap_init((void*)AM_SRAM_BEGIN, (void*)AM_SRAM_END);
#endif
/* init scheduler system */
rt_system_scheduler_init();
/* init application */
rt_application_init();
/* init timer thread */
rt_system_timer_thread_init();
/* init idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return ;
}
int main(void)
{
/* disable interrupt first */
// rt_hw_interrupt_disable();
/* startup RT-Thread RTOS */
rtthread_startup();
return 0;
}
/*@}*/
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd]
#remove other no use files
#SrcRemove(src, '*.c')
group = DefineGroup('Board', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
\ No newline at end of file
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2017-09-14 Haley first implementation
*/
#include "board.h"
#include <rtthread.h>
#include <rthw.h>
#include "am_mcu_apollo.h"
#include "hal/am_hal_clkgen.h"
#include "hal/am_hal_cachectrl.h"
#include "hw_uart.h"
#define TICK_RATE_HZ RT_TICK_PER_SECOND
#define SYSTICK_CLOCK_HZ ( 32768UL )
#define WAKE_INTERVAL ( (uint32_t) ((SYSTICK_CLOCK_HZ / TICK_RATE_HZ)) )
/**
* This is the timer interrupt service routine.
*
*/
void am_stimer_cmpr0_isr(void)
{
/* Check the timer interrupt status */
am_hal_stimer_int_clear(AM_HAL_STIMER_INT_COMPAREA);
am_hal_stimer_compare_delta_set(0, WAKE_INTERVAL);
if (rt_thread_self() != RT_NULL)
{
/* enter interrupt */
rt_interrupt_enter();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
}
}
/**
* This is the SysTick Configure.
*
*/
void SysTick_Configuration(void)
{
/* Set the main clk */
am_hal_clkgen_sysclk_select(AM_HAL_CLKGEN_SYSCLK_MAX);
/* Enable compare A interrupt in STIMER */
am_hal_stimer_int_enable(AM_HAL_STIMER_INT_COMPAREA);
/* Enable the timer interrupt in the NVIC */
am_hal_interrupt_enable(AM_HAL_INTERRUPT_STIMER_CMPR0);
/* Configure the STIMER and run */
am_hal_stimer_config(AM_HAL_STIMER_CFG_CLEAR | AM_HAL_STIMER_CFG_FREEZE);
am_hal_stimer_compare_delta_set(0, WAKE_INTERVAL);
am_hal_stimer_config(AM_HAL_STIMER_XTAL_32KHZ |
AM_HAL_STIMER_CFG_COMPARE_A_ENABLE);
}
/**
* This is the CacheCtrl Enable.
*
*/
void CacheCtrl_Enable(void)
{
am_hal_cachectrl_enable(&am_hal_cachectrl_defaults);
}
/**
* This is the low power operation.
* This function enables several power-saving features of the MCU, and
* disables some of the less-frequently used peripherals. It also sets the
* system clock to 24 MHz.
*/
void am_low_power_init(void)
{
/* Enable internal buck converters */
am_hal_pwrctrl_bucks_init();
/* Initialize for low power in the power control block */
am_hal_pwrctrl_low_power_init();
/* Turn off the voltage comparator as this is enabled on reset */
am_hal_vcomp_disable();
/* Run the RTC off the LFRC */
am_hal_rtc_osc_select(AM_HAL_RTC_OSC_LFRC);
/* Stop the XT and LFRC */
am_hal_clkgen_osc_stop(AM_HAL_CLKGEN_OSC_XT);
// am_hal_clkgen_osc_stop(AM_HAL_CLKGEN_OSC_LFRC);
/* Disable the RTC */
am_hal_rtc_osc_disable();
}
/**
* This is the deep power save.
*
*/
void deep_power_save(void)
{
am_hal_sysctrl_sleep(AM_HAL_SYSCTRL_SLEEP_DEEP);
}
/**
* This function will initial APOLLO2 board.
*/
void rt_hw_board_init(void)
{
/* Set the clock frequency */
SysTick_Configuration();
/* Set the default cache configuration */
CacheCtrl_Enable();
/* Configure the board for low power operation */
//am_low_power_init();
#ifdef RT_USING_IDLE_HOOK
rt_thread_idle_sethook(deep_power_save);
#endif
#ifdef RT_USING_CONSOLE
rt_hw_uart_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
}
/*@}*/
#ifndef __BOARD_H_
#define __BOARD_H_
#include <rtthread.h>
// <o> Internal SRAM memory size[Kbytes] <8-256>
// <i>Default: 256
#define AM_SRAM_SIZE 256
#define AM_SRAM_END (0x10000000 + AM_SRAM_SIZE * 1024)
/* USART driver select. */
#define RT_USING_UART0
#define RT_USING_UART1
void rt_hw_board_init(void);
#endif /* __BOARD_H__ */
/*
* File : hw_led.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2017-09-14 Haley the first version
*/
#include <rtthread.h>
#include "am_mcu_apollo.h"
#include "hw_led.h"
#define AM_GPIO_LED0 46
#define AM_GPIO_LED1 47
#define AM_GPIO_LED2 48
#define AM_GPIO_LED3 49
#define AM_NUM_LEDS 4
rt_hw_led_t am_psLEDs[AM_NUM_LEDS] =
{
{AM_GPIO_LED0, AM_LED_ON_LOW | AM_LED_POL_DIRECT_DRIVE_M},
{AM_GPIO_LED1, AM_LED_ON_LOW | AM_LED_POL_DIRECT_DRIVE_M},
{AM_GPIO_LED2, AM_LED_ON_LOW | AM_LED_POL_DIRECT_DRIVE_M},
{AM_GPIO_LED3, AM_LED_ON_LOW | AM_LED_POL_DIRECT_DRIVE_M},
};
/**
* @brief Configures the necessary pins for an array of LEDs
*
* @param LEDNum is the LED number.
*
* This function configures a GPIO to drive an LED in a low-power way.
*
* @return None.
*/
void rt_hw_led_init(rt_uint32_t LEDNum)
{
rt_hw_led_t *psLED = am_psLEDs + LEDNum;
/* Handle Direct Drive Versus 3-State (with pull-up or no buffer) */
if ( AM_LED_POL_DIRECT_DRIVE_M & psLED->Polarity )
{
/* Configure the pin as a push-pull GPIO output */
am_hal_gpio_pin_config(psLED->GPIONumber, AM_HAL_GPIO_OUTPUT);
/* Enable the output driver, and set the output value to the LEDs "ON" state */
am_hal_gpio_out_enable_bit_set(psLED->GPIONumber);
am_hal_gpio_out_bit_replace(psLED->GPIONumber,
psLED->Polarity &
AM_LED_POL_DIRECT_DRIVE_M);
}
else
{
/* Configure the pin as a tri-state GPIO */
am_hal_gpio_pin_config(psLED->GPIONumber, AM_HAL_GPIO_3STATE);
/* Disable the output driver, and set the output value to the LEDs "ON" state */
am_hal_gpio_out_enable_bit_clear(psLED->GPIONumber);
am_hal_gpio_out_bit_replace(psLED->GPIONumber,
psLED->Polarity &
AM_LED_POL_DIRECT_DRIVE_M );
}
}
/**
* @brief Configures the necessary pins for an array of LEDs
*
* @param NumLEDs is the total number of LEDs in the array.
*
* This function configures the GPIOs for an array of LEDs.
*
* @return None.
*/
void rt_hw_led_array_init(rt_uint32_t NumLEDs)
{
/* Loop through the list of LEDs, configuring each one individually */
for ( int i = 0; i < NumLEDs; i++ )
{
rt_hw_led_init(i);
}
}
/**
* @brief Disables an array of LEDs
*
* @param NumLEDs is the total number of LEDs in the array.
*
* This function disables the GPIOs for an array of LEDs.
*
* @return None.
*/
void rt_hw_led_array_disable(rt_uint32_t NumLEDs)
{
rt_hw_led_t *psLEDs = am_psLEDs;
/* Loop through the list of LEDs, configuring each one individually */
for ( int i = 0; i < NumLEDs; i++ )
{
am_hal_gpio_pin_config((psLEDs + i)->GPIONumber, AM_HAL_GPIO_DISABLE);
}
}
/**
* @brief Turns on the requested LED.
*
* @param LEDNum is the LED number for the light to turn on.
*
* This function turns on a single LED.
*
* @return None.
*/
void rt_hw_led_on(rt_uint32_t LEDNum)
{
rt_hw_led_t *psLEDs = am_psLEDs;
/* Handle Direct Drive Versus 3-State (with pull-up or no buffer) */
if ( AM_LED_POL_DIRECT_DRIVE_M & psLEDs[LEDNum].Polarity )
{
/* Set the output to the correct state for the LED */
am_hal_gpio_out_bit_replace(psLEDs[LEDNum].GPIONumber,
psLEDs[LEDNum].Polarity &
AM_LED_POL_POLARITY_M );
}
else
{
/* Turn on the output driver for the LED */
am_hal_gpio_out_enable_bit_set(psLEDs[LEDNum].GPIONumber);
}
}
/**
* @brief Turns off the requested LED.
*
* @param LEDNum is the LED number for the light to turn off.
*
* This function turns off a single LED.
*
* @return None.
*/
void rt_hw_led_off(rt_uint32_t LEDNum)
{
rt_hw_led_t *psLEDs = am_psLEDs;
/* Handle Direct Drive Versus 3-State (with pull-up or no buffer) */
if ( AM_LED_POL_DIRECT_DRIVE_M & psLEDs[LEDNum].Polarity )
{
/* Set the output to the correct state for the LED */
am_hal_gpio_out_bit_replace(psLEDs[LEDNum].GPIONumber,
!(psLEDs[LEDNum].Polarity &
AM_LED_POL_POLARITY_M) );
}
else
{
/* Turn off the output driver for the LED */
am_hal_gpio_out_enable_bit_clear(psLEDs[LEDNum].GPIONumber);
}
}
/**
* @brief Toggles the requested LED.
*
* @param LEDNum is the LED number for the light to toggle.
*
* This function toggles a single LED.
*
* @return None.
*/
void rt_hw_led_toggle(rt_uint32_t LEDNum)
{
rt_hw_led_t *psLEDs = am_psLEDs;
/* Handle Direct Drive Versus 3-State (with pull-up or no buffer) */
if ( AM_LED_POL_DIRECT_DRIVE_M & psLEDs[LEDNum].Polarity )
{
am_hal_gpio_out_bit_toggle(psLEDs[LEDNum].GPIONumber);
}
else
{
/* Check to see if the LED pin is enabled */
if ( am_hal_gpio_out_enable_bit_get(psLEDs[LEDNum].GPIONumber) )
{
/* If it was enabled, turn if off */
am_hal_gpio_out_enable_bit_clear(psLEDs[LEDNum].GPIONumber);
}
else
{
/* If it was not enabled, turn if on */
am_hal_gpio_out_enable_bit_set(psLEDs[LEDNum].GPIONumber);
}
}
}
/**
* @brief Gets the state of the requested LED.
*
* @param LEDNum is the LED to check.
*
* This function checks the state of a single LED.
*
* @return 1(true) if the LED is on.
*/
int rt_hw_led_get(rt_uint32_t LEDNum)
{
rt_hw_led_t *psLEDs = am_psLEDs;
/* Handle Direct Drive Versus 3-State (with pull-up or no buffer) */
if ( AM_LED_POL_DIRECT_DRIVE_M & psLEDs[LEDNum].Polarity )
{
/* Mask to the GPIO bit position for this GPIO number */
uint64_t ui64Mask = 0x01l << psLEDs[LEDNum].GPIONumber;
/* Extract the state of this bit and return it */
return !!(am_hal_gpio_input_read() & ui64Mask);
}
else
{
return am_hal_gpio_out_enable_bit_get(
psLEDs[LEDNum].GPIONumber);
}
}
/**
* @brief Display a binary value using LEDs.
*
* @param NumLEDs is the number of LEDs in the array.
* @param Value is the value to display on the LEDs.
*
* This function displays a value in binary across an array of LEDs.
*
* @return None.
*/
void rt_hw_led_array_out(rt_uint32_t NumLEDs, rt_uint32_t Value)
{
for ( int i = 0; i < NumLEDs; i++ )
{
if ( Value & (1 << i) )
{
rt_hw_led_on(i);
}
else
{
rt_hw_led_off(i);
}
}
}
#ifdef RT_USING_FINSH
#include <finsh.h>
static rt_uint8_t led_inited = 0;
void led(rt_uint32_t led, rt_uint32_t value)
{
/* init led configuration if it's not inited. */
if (!led_inited)
{
// rt_hw_led_init(0);
// rt_hw_led_init(1);
led_inited = 1;
}
if ( led == 0 )
{
/* set led status */
switch (value)
{
case 0:
rt_hw_led_off(0);
break;
case 1:
rt_hw_led_on(0);
break;
default:
break;
}
}
if ( led == 1 )
{
/* set led status */
switch (value)
{
case 0:
rt_hw_led_off(1);
break;
case 1:
rt_hw_led_on(1);
break;
default:
break;
}
}
}
FINSH_FUNCTION_EXPORT(led, set led[0 - 1] on[1] or off[0].)
#endif
/*@}*/
/*
* File : hw_led.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2017-09-14 Haley the first version
*/
#ifndef __HW_LED_H
#define __HW_LED_H
#include <rtthread.h>
/**
* @brief LED polarity macros
*
*/
#define AM_LED_POL_POLARITY_M 0x1
#define AM_LED_ON_HIGH 0x1
#define AM_LED_ON_LOW 0x0
/**
* @brief LED direct drive indicator macro
* Or this in with the polarity value to use the GPIO DATA register instead of
* the GPIO DATA ENABLE register to directly drive an LED buffer.
*/
#define AM_LED_POL_DIRECT_DRIVE_M 0x2
/**
* @brief Structure for keeping track of LEDs
*
*/
typedef struct
{
rt_uint32_t GPIONumber;
rt_uint32_t Polarity;
}
rt_hw_led_t;
/**
* @brief External function definitions
*
*/
void rt_hw_led_init(rt_uint32_t LEDNum);
void rt_hw_led_array_init(rt_uint32_t NumLEDs);
void rt_hw_led_array_disable(rt_uint32_t NumLEDs);
void rt_hw_led_on(rt_uint32_t LEDNum);
void rt_hw_led_off(rt_uint32_t LEDNum);
void rt_hw_led_toggle(rt_uint32_t LEDNum);
int rt_hw_led_get(rt_uint32_t LEDNum);
void rt_hw_led_array_out(rt_uint32_t NumLEDs, rt_uint32_t Value);
#endif // __HW_LED_H
/*
* File : hw_uart.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2017-09-15 Haley the first version
*/
#include "am_mcu_apollo.h"
#include "hw_uart.h"
#include "board.h"
#include <rtdevice.h>
/* USART0 */
#define AM_UART0_INST 0
#define UART0_GPIO_RX 2
#define UART0_GPIO_CFG_RX AM_HAL_PIN_2_UART0RX
#define UART0_GPIO_TX 1
#define UART0_GPIO_CFG_TX AM_HAL_PIN_1_UART0TX
/* USART1 */
#define AM_UART1_INST 1
#define UART1_GPIO_RX 9
#define UART1_GPIO_CFG_RX AM_HAL_PIN_9_UART1RX
#define UART1_GPIO_TX 8
#define UART1_GPIO_CFG_TX AM_HAL_PIN_8_UART1TX
/* AM uart driver */
struct am_uart
{
uint32_t uart_device;
uint32_t uart_interrupt;
};
/**
* @brief UART configuration settings
*
*/
am_hal_uart_config_t g_sUartConfig =
{
.ui32BaudRate = 115200,
.ui32DataBits = AM_HAL_UART_DATA_BITS_8,
.bTwoStopBits = false,
.ui32Parity = AM_HAL_UART_PARITY_NONE,
.ui32FlowCtrl = AM_HAL_UART_FLOW_CTRL_NONE,
};
/**
* @brief Enable the UART
*
* @param Uart driver
*
* This function is Enable the UART
*
* @return None.
*/
static void rt_hw_uart_enable(struct am_uart* uart)
{
/* Enable the UART clock */
am_hal_uart_clock_enable(uart->uart_device);
/* Enable the UART */
am_hal_uart_enable(uart->uart_device);
#if defined(RT_USING_UART0)
/* Make sure the UART RX and TX pins are enabled */
am_hal_gpio_pin_config(UART0_GPIO_TX, UART0_GPIO_CFG_TX);
am_hal_gpio_pin_config(UART0_GPIO_RX, UART0_GPIO_CFG_RX | AM_HAL_GPIO_PULL12K);
#endif /* RT_USING_UART0 */
#if defined(RT_USING_UART1)
/* Make sure the UART RX and TX pins are enabled */
am_hal_gpio_pin_config(UART1_GPIO_TX, UART1_GPIO_CFG_TX);
am_hal_gpio_pin_config(UART1_GPIO_RX, UART1_GPIO_CFG_RX | AM_HAL_GPIO_PULL12K);
#endif /* RT_USING_UART1 */
}
/**
* @brief Disable the UART
*
* @param Uart driver
*
* This function is Disable the UART
*
* @return None.
*/
static void rt_hw_uart_disable(struct am_uart* uart)
{
/* Clear all interrupts before sleeping as having a pending UART interrupt burns power */
am_hal_uart_int_clear(uart->uart_device, 0xFFFFFFFF);
/* Disable the UART */
am_hal_uart_disable(uart->uart_device);
#if defined(RT_USING_UART0)
/* Disable the UART pins */
am_hal_gpio_pin_config(UART0_GPIO_TX, AM_HAL_PIN_DISABLE);
am_hal_gpio_pin_config(UART0_GPIO_RX, AM_HAL_PIN_DISABLE);
#endif /* RT_USING_UART0 */
#if defined(RT_USING_UART1)
/* Disable the UART pins */
am_hal_gpio_pin_config(UART1_GPIO_TX, AM_HAL_PIN_DISABLE);
am_hal_gpio_pin_config(UART1_GPIO_RX, AM_HAL_PIN_DISABLE);
#endif /* RT_USING_UART1 */
/* Disable the UART clock */
am_hal_uart_clock_disable(uart->uart_device);
}
/**
* @brief UART-based string print function.
*
* @param Send buff
*
* This function is used for printing a string via the UART, which for some
* MCU devices may be multi-module.
*
* @return None.
*/
void rt_hw_uart_send_string(char *pcString)
{
am_hal_uart_string_transmit_polled(AM_UART0_INST, pcString);
/* Wait until busy bit clears to make sure UART fully transmitted last byte */
while ( am_hal_uart_flags_get(AM_UART0_INST) & AM_HAL_UART_FR_BUSY );
}
static rt_err_t am_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
struct am_uart* uart;
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
uart = (struct am_uart *)serial->parent.user_data;
RT_ASSERT(uart != RT_NULL);
/* Get the configure */
g_sUartConfig.ui32BaudRate = cfg->baud_rate;
g_sUartConfig.ui32DataBits = cfg->data_bits;
if (cfg->stop_bits == STOP_BITS_1)
g_sUartConfig.bTwoStopBits = false;
else if (cfg->stop_bits == STOP_BITS_2)
g_sUartConfig.bTwoStopBits = true;
g_sUartConfig.ui32Parity = cfg->parity;
g_sUartConfig.ui32FlowCtrl = AM_HAL_UART_PARITY_NONE;
/* Configure the UART */
am_hal_uart_config(uart->uart_device, &g_sUartConfig);
/* Enable the UART */
am_hal_uart_enable(uart->uart_device);
return RT_EOK;
}
static rt_err_t am_control(struct rt_serial_device *serial, int cmd, void *arg)
{
struct am_uart* uart;
//rt_uint32_t ctrl_arg = (rt_uint32_t)(arg);
RT_ASSERT(serial != RT_NULL);
uart = (struct am_uart *)serial->parent.user_data;
RT_ASSERT(uart != RT_NULL);
switch (cmd)
{
/* disable interrupt */
case RT_DEVICE_CTRL_CLR_INT:
rt_hw_uart_disable(uart);
break;
/* enable interrupt */
case RT_DEVICE_CTRL_SET_INT:
rt_hw_uart_enable(uart);
break;
/* UART config */
case RT_DEVICE_CTRL_CONFIG :
break;
}
return RT_EOK;
}
static int am_putc(struct rt_serial_device *serial, char c)
{
struct am_uart* uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct am_uart *)serial->parent.user_data;
RT_ASSERT(uart != RT_NULL);
am_hal_uart_char_transmit_polled(uart->uart_device, c);
return 1;
}
static int am_getc(struct rt_serial_device *serial)
{
char c;
int ch;
struct am_uart* uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct am_uart *)serial->parent.user_data;
RT_ASSERT(uart != RT_NULL);
ch = -1;
if (am_hal_uart_flags_get(uart->uart_device) & AM_HAL_UART_FR_RX_FULL)
{
am_hal_uart_char_receive_polled(uart->uart_device, &c);
ch = c & 0xff;
}
return ch;
}
/**
* Uart common interrupt process. This need add to uart ISR.
*
* @param serial serial device
*/
static void uart_isr(struct rt_serial_device *serial)
{
uint32_t status;
RT_ASSERT(serial != RT_NULL);
struct am_uart *uart = (struct am_uart *) serial->parent.user_data;
RT_ASSERT(uart != RT_NULL);
/* Read the interrupt status */
status = am_hal_uart_int_status_get(uart->uart_device, false);
//rt_kprintf("status is %d\r\n", status);
/* Clear the UART interrupt */
am_hal_uart_int_clear(uart->uart_device, status);
if (status & (AM_HAL_UART_INT_RX_TMOUT))
{
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_TIMEOUT);
}
if (status & AM_HAL_UART_INT_RX)
{
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
}
if (status & AM_HAL_UART_INT_TX)
{
//rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
}
}
static const struct rt_uart_ops am_uart_ops =
{
am_configure,
am_control,
am_putc,
am_getc,
};
#if defined(RT_USING_UART0)
/* UART0 device driver structure */
struct am_uart uart0 =
{
AM_UART0_INST,
AM_HAL_INTERRUPT_UART0
};
static struct rt_serial_device serial0;
void am_uart0_isr(void)
{
/* enter interrupt */
rt_interrupt_enter();
uart_isr(&serial0);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* RT_USING_UART0 */
#if defined(RT_USING_UART1)
/* UART1 device driver structure */
struct am_uart uart1 =
{
AM_UART1_INST,
AM_HAL_INTERRUPT_UART1
};
static struct rt_serial_device serial1;
void am_uart1_isr(void)
{
/* enter interrupt */
rt_interrupt_enter();
uart_isr(&serial1);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* RT_USING_UART1 */
static void GPIO_Configuration(void)
{
#if defined(RT_USING_UART0)
/* Make sure the UART RX and TX pins are enabled */
am_hal_gpio_pin_config(UART0_GPIO_TX, UART0_GPIO_CFG_TX);
am_hal_gpio_pin_config(UART0_GPIO_RX, UART0_GPIO_CFG_RX | AM_HAL_GPIO_PULL12K);
#endif /* RT_USING_UART0 */
#if defined(RT_USING_UART1)
/* Make sure the UART RX and TX pins are enabled */
am_hal_gpio_pin_config(UART1_GPIO_TX, UART1_GPIO_CFG_TX);
am_hal_gpio_pin_config(UART1_GPIO_RX, UART1_GPIO_CFG_RX | AM_HAL_GPIO_PULL12K);
#endif /* RT_USING_UART1 */
}
static void RCC_Configuration(struct am_uart* uart)
{
/* Power on the selected UART */
am_hal_uart_pwrctrl_enable(uart->uart_device);
/* Start the UART interface, apply the desired configuration settings */
am_hal_uart_clock_enable(uart->uart_device);
/* Disable the UART before configuring it */
am_hal_uart_disable(uart->uart_device);
/* Configure the UART */
am_hal_uart_config(uart->uart_device, &g_sUartConfig);
/* Enable the UART */
am_hal_uart_enable(uart->uart_device);
/* Enable the UART FIFO */
//am_hal_uart_fifo_config(uart->uart_device, AM_HAL_UART_TX_FIFO_1_2 | AM_HAL_UART_RX_FIFO_1_2);
}
static void NVIC_Configuration(struct am_uart* uart)
{
/* Enable interrupts */
am_hal_uart_int_enable(uart->uart_device, AM_HAL_UART_INT_RX);
/* Enable the uart interrupt in the NVIC */
am_hal_interrupt_enable(uart->uart_interrupt);
am_hal_uart_int_clear(uart->uart_device, 0xFFFFFFFF);
}
/**
* @brief Initialize the UART
*
* This function initialize the UART
*
* @return None.
*/
void rt_hw_uart_init(void)
{
struct am_uart* uart;
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
GPIO_Configuration();
#if defined(RT_USING_UART0)
uart = &uart0;
config.baud_rate = BAUD_RATE_115200;
RCC_Configuration(uart);
NVIC_Configuration(uart);
serial0.ops = &am_uart_ops;
serial0.config = config;
/* register UART1 device */
rt_hw_serial_register(&serial0, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
RT_DEVICE_FLAG_INT_TX, uart);
#endif /* RT_USING_UART0 */
#if defined(RT_USING_UART1)
uart = &uart1;
config.baud_rate = BAUD_RATE_115200;
RCC_Configuration(uart);
NVIC_Configuration(uart);
serial1.ops = &am_uart_ops;
serial1.config = config;
/* register UART1 device */
rt_hw_serial_register(&serial1, "uart1",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
RT_DEVICE_FLAG_INT_TX, uart);
#endif /* RT_USING_UART1 */
}
/*@}*/
/*
* File : hw_uart.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2017-09-14 Haley the first version
*/
#ifndef __HW_UART_H_
#define __HW_UART_H_
#include <rtthread.h>
void rt_hw_uart_init(void);
void rt_hw_uart_send_string(char *pcString);
#endif // __HW_UART_H_
# for module compiling
import os
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
import rtconfig
Import('RTT_ROOT')
from building import *
# get current directory
cwd = GetCurrentDir()
src = Split("""
hal/am_hal_clkgen.c
hal/am_hal_debug.c
hal/am_hal_cachectrl.c
hal/am_hal_pwrctrl.c
hal/am_hal_sysctrl.c
hal/am_hal_stimer.c
hal/am_hal_ctimer.c
hal/am_hal_rtc.c
hal/am_hal_interrupt.c
hal/am_hal_queue.c
hal/am_hal_vcomp.c
hal/am_hal_flash.c
hal/am_hal_gpio.c
hal/am_hal_uart.c
""")
path = [cwd]
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path)
Return('group')
//*****************************************************************************
//
//! @file
//!
//! @brief Top Include for Apollo2 class devices.
//!
//! This file provides all the includes necessary for an apollo device.
//!
//! @addtogroup hal Hardware Abstraction Layer (HAL)
//
//! @defgroup apollo2hal HAL for Apollo2
//! @ingroup hal
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2017, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_MCU_APOLLO_H
#define AM_MCU_APOLLO_H
//*****************************************************************************
//
// C99
//
//*****************************************************************************
#include <stdarg.h>
#include <stdbool.h>
#include <stddef.h>
#include <stdint.h>
#ifdef __IAR_SYSTEMS_ICC__
#include "intrinsics.h" // __CLZ() and other intrinsics
#endif
//*****************************************************************************
//
// Registers
//
//*****************************************************************************
#include "regs/am_reg_base_addresses.h"
#include "regs/am_reg_macros.h"
#include "regs/am_reg_adc.h"
#include "regs/am_reg_cachectrl.h"
#include "regs/am_reg_clkgen.h"
#include "regs/am_reg_ctimer.h"
#include "regs/am_reg_gpio.h"
#include "regs/am_reg_iomstr.h"
#include "regs/am_reg_ioslave.h"
#include "regs/am_reg_itm.h"
#include "regs/am_reg_jedec.h"
#include "regs/am_reg_mcuctrl.h"
#include "regs/am_reg_nvic.h"
#include "regs/am_reg_pdm.h"
#include "regs/am_reg_pwrctrl.h"
#include "regs/am_reg_rstgen.h"
#include "regs/am_reg_rtc.h"
#include "regs/am_reg_sysctrl.h"
#include "regs/am_reg_systick.h"
#include "regs/am_reg_tpiu.h"
#include "regs/am_reg_uart.h"
#include "regs/am_reg_vcomp.h"
#include "regs/am_reg_wdt.h"
//*****************************************************************************
//
// HAL
//
//*****************************************************************************
#include "hal/am_hal_adc.h"
#include "hal/am_hal_cachectrl.h"
#include "hal/am_hal_clkgen.h"
#include "hal/am_hal_ctimer.h"
#include "hal/am_hal_debug.h"
#include "hal/am_hal_flash.h"
#include "hal/am_hal_global.h"
#include "hal/am_hal_gpio.h"
#include "hal/am_hal_i2c_bit_bang.h"
#include "hal/am_hal_interrupt.h"
#include "hal/am_hal_iom.h"
#include "hal/am_hal_ios.h"
#include "hal/am_hal_itm.h"
#include "hal/am_hal_mcuctrl.h"
#include "hal/am_hal_otp.h"
#include "hal/am_hal_pdm.h"
#include "hal/am_hal_pin.h"
#include "hal/am_hal_pwrctrl.h"
#include "hal/am_hal_queue.h"
#include "hal/am_hal_reset.h"
#include "hal/am_hal_rtc.h"
#include "hal/am_hal_stimer.h"
#include "hal/am_hal_sysctrl.h"
#include "hal/am_hal_systick.h"
#include "hal/am_hal_tpiu.h"
#include "hal/am_hal_uart.h"
#include "hal/am_hal_vcomp.h"
#include "hal/am_hal_wdt.h"
#endif // AM_MCU_APOLLO_H
//*****************************************************************************
//
// am_hal_adc.c
//! @file
//!
//! @brief Functions for interfacing with the Analog to Digital Converter.
//!
//! @addtogroup adc2 Analog-to-Digital Converter (ADC)
//! @ingroup apollo2hal
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2017, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include "am_mcu_apollo.h"
//*****************************************************************************
//
//! @brief Private SRAM view of temperature trims.
//!
//! This static SRAM union is private to the ADC HAL functions.
//
//*****************************************************************************
static union
{
//! These trim values are loaded as uint32_t values.
struct
{
//! Temperature of the package test head (in degrees Kelvin)
uint32_t ui32CalibrationTemperature;
//! Voltage corresponding to temperature measured on test head.
uint32_t ui32CalibrationVoltage;
//! ADC offset voltage measured on the package test head.
uint32_t ui32CalibrationOffset;
//! Flag if default (guess) or measured.
bool bMeasured;
} ui32;
//! These trim values are accessed as floats when used in temp calculations.
struct
{
//! Temperature of the package test head in degrees Kelvin
float fCalibrationTemperature;
//! Voltage corresponding to temperature measured on test head.
float fCalibrationVoltage;
//! ADC offset voltage measured on the package test head.
float fCalibrationOffset;
//! Flag if default (guess) or measured.
float fMeasuredFlag;
} flt;
} priv_temp_trims;
//*****************************************************************************
//
//! @brief Configure the ADC.
//!
//! @param psConfig - pointer to the configuration structure for the ADC.
//!
//! This function may be used to perform the initial setup of the ADC based on
//! setting found in a configuration structure.
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_adc_config(am_hal_adc_config_t *psConfig)
{
//
// Set general ADC configuration parameters.
//
AM_REG(ADC, CFG) = (psConfig->ui32Clock |
psConfig->ui32TriggerConfig |
psConfig->ui32Reference |
psConfig->ui32ClockMode |
psConfig->ui32PowerMode |
psConfig->ui32Repeat |
AM_REG_ADC_CFG_ADCEN(1));
//
// Grab the temperature trims.
//
priv_temp_trims.ui32.ui32CalibrationTemperature =
am_hal_flash_load_ui32(AM_HAL_ADC_CALIB_TEMP_ADDR);
priv_temp_trims.ui32.ui32CalibrationVoltage =
am_hal_flash_load_ui32(AM_HAL_ADC_CALIB_AMBIENT_ADDR);
priv_temp_trims.ui32.ui32CalibrationOffset =
am_hal_flash_load_ui32(AM_HAL_ADC_CALIB_ADC_OFFSET_ADDR);
if ( (priv_temp_trims.ui32.ui32CalibrationTemperature == 0xffffffff) ||
(priv_temp_trims.ui32.ui32CalibrationVoltage == 0xffffffff) ||
(priv_temp_trims.ui32.ui32CalibrationOffset == 0xffffffff) )
{
//
// Since the device has not been calibrated on the tester, we'll load
// default calibration values. These default values should result
// in worst-case temperature measurements of +-6 degress C.
//
priv_temp_trims.flt.fCalibrationTemperature = AM_HAL_ADC_CALIB_TEMP_DEFAULT;
priv_temp_trims.flt.fCalibrationVoltage = AM_HAL_ADC_CALIB_AMBIENT_DEFAULT;
priv_temp_trims.flt.fCalibrationOffset = AM_HAL_ADC_CALIB_ADC_OFFSET_DEFAULT;
priv_temp_trims.ui32.bMeasured = false;
}
else
{
priv_temp_trims.ui32.bMeasured = true;
}
}
//*****************************************************************************
//
//! @brief Get the temperature trim parameters after configuring the ADC.
//!
//! @param pfTemp - pointer to a location to store the calibration temperature.
//! @param pfVoltage - pointer to a location to store the calibration voltage.
//! @param pfOffsetV - pointer to a location to store the calibration offset.
//!
//! This function may be used to access the actual temperature sensor trim
//! values from the private structure.
//!
//! WARNING: only call this after the ADC has been configured with
//! am_hal_adc_config.
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_adc_temp_trims_get(float * pfTemp, float * pfVoltage, float * pfOffsetV)
{
//
// Return trim temperature as a float, if you can.
//
if ( pfTemp != NULL )
{
*pfTemp = priv_temp_trims.flt.fCalibrationTemperature;
}
//
// Return trim voltage as a float, if you can.
//
if ( pfVoltage != NULL )
{
*pfVoltage = priv_temp_trims.flt.fCalibrationVoltage;
}
//
// Return trim ADC offset voltage as a float, if you can.
//
if ( pfOffsetV != NULL )
{
*pfOffsetV = priv_temp_trims.flt.fCalibrationOffset;
}
}
//*****************************************************************************
//
//! @brief Set the ADC window parameters.
//!
//! @param ui32Upper - the upper limit for the ADC window.
//! @param ui32Upper - the lower limit for the ADC window.
//!
//! This function may be used to change the ADC window parameters. Please note
//! that the upper and lower limits are only 16-bits wide in the ADC hardware.
//! This function will ignore the upper 16 bits of these arguments.
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_adc_window_set(uint32_t ui32Upper, uint32_t ui32Lower)
{
//
// Set the window limits for the ADC.
//
AM_BFW(ADC, WULIM, ULIM, ui32Upper);
AM_BFW(ADC, WLLIM, LLIM, ui32Lower);
}
//*****************************************************************************
//
//! @brief Configure a single ADC slot.
//!
//! @param ui32SlotNumber - the number of the ADC slot to be configured.
//! @param ui32SlotConfig - contains slot-specific options.
//!
//! This function may be used to configure the settings for an individual ADC
//! slot. The parameter \b ui32SlotConfig should be the logical 'OR' of a slot
//! average macro, a slot hold-time macro, a slot channel macro, and
//! optionally, the slot window enable macro.
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_adc_slot_config(uint32_t ui32SlotNumber, uint32_t ui32SlotConfig)
{
uint32_t ui32RegOffset;
//
// Make sure we're accessing a real slot.
//
am_hal_debug_assert_msg((ui32SlotNumber & 0xFFFFFFFF0) == 0,
"Trying to configure an ADC slot that doesn't exist.");
//
// Locate the correct register for this ADC slot.
//
ui32RegOffset = (AM_REG_ADCn(0) + AM_REG_ADC_SL0CFG_O + (4 * ui32SlotNumber));
//
// Write the register with the caller's configuration value.
//
AM_REGVAL(ui32RegOffset) = ui32SlotConfig;
}
//*****************************************************************************
//
//! @brief Peek at the next fifo entry.
//!
//! This function reads the oldest value in the ADC sample fifo but doesn't
//! actually advance the fifo to the next entry. This function is useful when
//! you need information from the fifo but you don't want to also empty the
//! fifo. This could be helpful if you want to check the FIFO depth without
//! pulling any data out.
//!
//! The value returned by this function is the raw 32-bit value provided by the
//! ADC hardware. In order to interpret this value, you will need to use one of
//! the following macros.
//!
//! @return 32-bit FIFO entry.
//!
//
//*****************************************************************************
uint32_t
am_hal_adc_fifo_peek(void)
{
uint32_t ui32FIFOValue;
//
// Grab a value from the ADC FIFO.
//
ui32FIFOValue = AM_REG(ADC, FIFO);
//
// Return FIFO entry.
//
return ui32FIFOValue;
}
//*****************************************************************************
//
//! @brief
//!
//! This function reads the oldest value in the ADC fifo and then pops the
//! fifo. Use this function when you actually want to pull data out of the
//! fifo.
//!
//! @return 32-bit FIFO entry.
//!
//
//*****************************************************************************
uint32_t
am_hal_adc_fifo_pop(void)
{
uint32_t ui32FIFOValue;
//
// Grab a value from the ADC FIFO.
//
ui32FIFOValue = AM_REG(ADC, FIFO);
//
// Pop the FIFO.
//
AM_REG(ADC, FIFO) = 0;
//
// Return FIFO valid bits.
//
return ui32FIFOValue;
}
//*****************************************************************************
//
//! @brief Issue Software Trigger to the ADC.
//!
//! This function issues the software trigger to the ADC.
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_adc_trigger(void)
{
//
// Write to the Software trigger register in the ADC.
//
AM_REG(ADC, SWT) = 0x37;
}
//*****************************************************************************
//
//! @brief Enable the ADC.
//!
//! Use this function to enable the ADC.
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_adc_enable(void)
{
//
// Enable the ADC.
//
AM_BFW(ADC, CFG, ADCEN, 0x1);
}
//*****************************************************************************
//
//! @brief Disable the ADC.
//!
//! Use this function to disable the ADC.
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_adc_disable(void)
{
//
// Disable the ADC.
//
AM_BFW(ADC, CFG, ADCEN, 0x0);
}
//*****************************************************************************
//
//! @brief Enable selected ADC Interrupts.
//!
//! @param ui32Interrupt - Use the macro bit fields provided in am_hal_adc.h.
//!
//! Use this function to enable the ADC interrupts.
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_adc_int_enable(uint32_t ui32Interrupt)
{
//
// Enable the interrupts.
//
AM_REG(ADC, INTEN) |= ui32Interrupt;
}
//*****************************************************************************
//
//! @brief Return enabled ADC Interrupts.
//!
//! Use this function to get all enabled ADC interrupts.
//!
//! @return enabled ADC Interrupts.
//
//*****************************************************************************
uint32_t
am_hal_adc_int_enable_get(void)
{
//
// Return enabled interrupts.
//
return AM_REG(ADC, INTEN);
}
//*****************************************************************************
//
//! @brief Disable selected ADC Interrupts.
//!
//! @param ui32Interrupt - Use the macro bit fields provided in am_hal_adc.h.
//!
//! Use this function to disable the ADC interrupts.
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_adc_int_disable(uint32_t ui32Interrupt)
{
//
// Disable the interrupts.
//
AM_REG(ADC, INTEN) &= ~ui32Interrupt;
}
//*****************************************************************************
//
//! @brief Clear selected ADC Interrupts.
//!
//! @param ui32Interrupt - Use the macro bit fields provided in am_hal_adc.h.
//!
//! Use this function to clear the ADC interrupts.
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_adc_int_clear(uint32_t ui32Interrupt)
{
//
// Clear the interrupts.
//
AM_REG(ADC, INTCLR) = ui32Interrupt;
}
//*****************************************************************************
//
//! @brief Set selected ADC Interrupts.
//!
//! @param ui32Interrupt - Use the macro bit fields provided in am_hal_adc.h.
//!
//! Use this function to set the ADC interrupts.
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_adc_int_set(uint32_t ui32Interrupt)
{
//
// Set the interrupts.
//
AM_REG(ADC, INTSET) = ui32Interrupt;
}
//*****************************************************************************
//
//! @brief Return either enabled or raw selected ADC interrupt status.
//!
//! @param bEnabledOnly - return the status of only the enabled interrupts.
//!
//! Use this function to get the ADC interrupt status.
//!
//! @return enabled or raw ADC interrupt status.
//
//*****************************************************************************
uint32_t
am_hal_adc_int_status_get(bool bEnabledOnly)
{
//
// Return the status.
//
if (bEnabledOnly)
{
uint32_t u32RetVal = AM_REG(ADC, INTEN);
u32RetVal &= AM_REG(ADC, INTSTAT);
return u32RetVal;
}
else
{
return AM_REG(ADC, INTSTAT);
}
}
//*****************************************************************************
//
//! @brief Return temperature in degrees C of supplied voltage.
//!
//! @param fVoltage - return the temperature corresponding to this voltage.
//!
//! Use this function to convert volts from the temperature sensor into degrees
//! C. Caller converts ADC binary code to volts based on reference used.
//! This routine looks up the trim parameters and returns corrected temperature.
//!
//! The computation is based on a line running through 0 degrees K.
//! We find the slope from the trimmed temperature calibration point.
//!
//!
//! @return the temperature in degrees C.
//
//*****************************************************************************
float
am_hal_adc_volts_to_celsius(float fVoltage)
{
float fTemp;
//
// Get calibration temperature from trimmed values & convert to degrees K.
//
float fCalibration_temp = priv_temp_trims.flt.fCalibrationTemperature;
//
// Get remaining trimmed values.
//
float fCalibration_voltage = priv_temp_trims.flt.fCalibrationVoltage;
float fCalibration_offset = priv_temp_trims.flt.fCalibrationOffset;
//
// Compute the temperature.
//
fTemp = fCalibration_temp;
fTemp /= (fCalibration_voltage - fCalibration_offset);
fTemp *= (fVoltage - fCalibration_offset);
//
// Give it back to the caller in Celsius.
//
return fTemp - 273.15f;
}
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************
//*****************************************************************************
//
// am_hal_adc.h
//! @file
//!
//! @brief Functions for interfacing with the Analog to Digital Converter
//!
//! @addtogroup adc2 Analog-to-Digital Converter (ADC)
//! @ingroup apollo2hal
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2017, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_ADC_H
#define AM_HAL_ADC_H
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
//! @name Clock Selection
//! @brief These macros may be used to set the ADC module's clock source.
//! @{
//
//*****************************************************************************
#define AM_HAL_ADC_CLOCK_OFF AM_REG_ADC_CFG_CLKSEL_OFF
#define AM_HAL_ADC_CLOCK_HFRC AM_REG_ADC_CFG_CLKSEL_HFRC
#define AM_HAL_ADC_CLOCK_DIV2 AM_REG_ADC_CFG_CLKSEL_HFRC_DIV2
//! @}
//*****************************************************************************
//
//! @name Trigger Settings
//! @brief ADC trigger setting macros.
//!
//! These macros alter the ADC's trigger source and trigger polarity. Note that
//! the external trigger setting needs to be ORed with a POS or NEG option to
//! define the desired trigger polarity.
//! @{
//
//*****************************************************************************
#define AM_HAL_ADC_TRIGGER_SOFT AM_REG_ADC_CFG_TRIGSEL_SWT
#define AM_HAL_ADC_TRIGGER_VCOMP AM_REG_ADC_CFG_TRIGSEL_VCOMP
#define AM_HAL_ADC_TRIGGER_EXT0 AM_REG_ADC_CFG_TRIGSEL_EXT0
#define AM_HAL_ADC_TRIGGER_EXT1 AM_REG_ADC_CFG_TRIGSEL_EXT1
#define AM_HAL_ADC_TRIGGER_EXT2 AM_REG_ADC_CFG_TRIGSEL_EXT2
#define AM_HAL_ADC_TRIGGER_EXT3 AM_REG_ADC_CFG_TRIGSEL_EXT3
#define AM_HAL_ADC_TRIGGER_FALL AM_REG_ADC_CFG_TRIGPOL_FALLING_EDGE
#define AM_HAL_ADC_TRIGGER_RISE AM_REG_ADC_CFG_TRIGPOL_RISING_EDGE
//! @}
//*****************************************************************************
//
//! @name Reference Settings
//! @brief ADC reference voltage setting macros.
//!
//! These macros control the ADC reference voltage source.
//! @{
//
//*****************************************************************************
#define AM_HAL_ADC_REF_EXT_2P0 AM_REG_ADC_CFG_REFSEL_EXT2P0
#define AM_HAL_ADC_REF_EXT_1P5 AM_REG_ADC_CFG_REFSEL_EXT1P5
#define AM_HAL_ADC_REF_INT_2P0 AM_REG_ADC_CFG_REFSEL_INT2P0
#define AM_HAL_ADC_REF_INT_1P5 AM_REG_ADC_CFG_REFSEL_INT1P5
//! @}
//*****************************************************************************
//
//! @name Clock Mode
//! @brief ADC clock mode settings
//!
//! These macros determine whether the ADC shuts down its clock between
//! samples. Shutting down the clock will reduce power consumption, but
//! increase latency. This setting is only valid for LPMODE 0. For other modes,
//! it will be ignored.
//!
//! @{
//
//*****************************************************************************
#define AM_HAL_ADC_CK_LOW_POWER AM_REG_ADC_CFG_CKMODE_LPCKMODE
#define AM_HAL_ADC_CK_LOW_LATENCY AM_REG_ADC_CFG_CKMODE_LLCKMODE
//! @}
//*****************************************************************************
//
//! @name Low Power Mode
//! @brief ADC power conservation settings.
//!
//! These macros select the power state to enter between active scans. Each low
//! power mode has its own set of timing constraints. Please see the datasheet
//! for additional timing information on each power mode.
//! @{
//
//*****************************************************************************
#define AM_HAL_ADC_LPMODE_0 AM_REG_ADC_CFG_LPMODE_MODE0
#define AM_HAL_ADC_LPMODE_1 AM_REG_ADC_CFG_LPMODE_MODE1
//! @}
//*****************************************************************************
//
//! @name Repeat Mode
//! @brief Enable repeating scan mode.
//!
//! Use this macro to enable repeating scans using timer 3.
//!
//! @{
//
//*****************************************************************************
#define AM_HAL_ADC_REPEAT AM_REG_ADC_CFG_RPTEN(1)
#define AM_HAL_ADC_NO_REPEAT AM_REG_ADC_CFG_RPTEN(0)
//! @}
//*****************************************************************************
//
//! @name Slot configuration
//! @brief Slot configuration macros
//!
//! These macros may be used to configure an individual ADC slot.
//! @{
//
//*****************************************************************************
// Set number of samples to average.
#define AM_HAL_ADC_SLOT_AVG_1 AM_REG_ADC_SL0CFG_ADSEL0(0)
#define AM_HAL_ADC_SLOT_AVG_2 AM_REG_ADC_SL0CFG_ADSEL0(1)
#define AM_HAL_ADC_SLOT_AVG_4 AM_REG_ADC_SL0CFG_ADSEL0(2)
#define AM_HAL_ADC_SLOT_AVG_8 AM_REG_ADC_SL0CFG_ADSEL0(3)
#define AM_HAL_ADC_SLOT_AVG_16 AM_REG_ADC_SL0CFG_ADSEL0(4)
#define AM_HAL_ADC_SLOT_AVG_32 AM_REG_ADC_SL0CFG_ADSEL0(5)
#define AM_HAL_ADC_SLOT_AVG_64 AM_REG_ADC_SL0CFG_ADSEL0(6)
#define AM_HAL_ADC_SLOT_AVG_128 AM_REG_ADC_SL0CFG_ADSEL0(7)
// Set slot precision mode.
#define AM_HAL_ADC_SLOT_14BIT AM_REG_ADC_SL0CFG_PRMODE0_P14B
#define AM_HAL_ADC_SLOT_12BIT AM_REG_ADC_SL0CFG_PRMODE0_P14B
#define AM_HAL_ADC_SLOT_10BIT AM_REG_ADC_SL0CFG_PRMODE0_P14B
#define AM_HAL_ADC_SLOT_8BIT AM_REG_ADC_SL0CFG_PRMODE0_P14B
// Select a channel by number.
#define AM_HAL_ADC_SLOT_CHANNEL(n) AM_REG_ADC_SL0CFG_CHSEL0(n)
// Single-ended channels
#define AM_HAL_ADC_SLOT_CHSEL_SE0 AM_REG_ADC_SL0CFG_CHSEL0_SE0
#define AM_HAL_ADC_SLOT_CHSEL_SE1 AM_REG_ADC_SL0CFG_CHSEL0_SE1
#define AM_HAL_ADC_SLOT_CHSEL_SE2 AM_REG_ADC_SL0CFG_CHSEL0_SE2
#define AM_HAL_ADC_SLOT_CHSEL_SE3 AM_REG_ADC_SL0CFG_CHSEL0_SE3
#define AM_HAL_ADC_SLOT_CHSEL_SE4 AM_REG_ADC_SL0CFG_CHSEL0_SE4
#define AM_HAL_ADC_SLOT_CHSEL_SE5 AM_REG_ADC_SL0CFG_CHSEL0_SE5
#define AM_HAL_ADC_SLOT_CHSEL_SE6 AM_REG_ADC_SL0CFG_CHSEL0_SE6
#define AM_HAL_ADC_SLOT_CHSEL_SE7 AM_REG_ADC_SL0CFG_CHSEL0_SE7
#define AM_HAL_ADC_SLOT_CHSEL_SE8 AM_REG_ADC_SL0CFG_CHSEL0_SE8
#define AM_HAL_ADC_SLOT_CHSEL_SE9 AM_REG_ADC_SL0CFG_CHSEL0_SE9
// Differential channels.
#define AM_HAL_ADC_SLOT_CHSEL_DF0 AM_REG_ADC_SL0CFG_CHSEL0_DF0
#define AM_HAL_ADC_SLOT_CHSEL_DF1 AM_REG_ADC_SL0CFG_CHSEL0_DF1
// Miscellaneous other signals.
#define AM_HAL_ADC_SLOT_CHSEL_TEMP AM_REG_ADC_SL0CFG_CHSEL0_TEMP
#define AM_HAL_ADC_SLOT_CHSEL_VSS AM_REG_ADC_SL0CFG_CHSEL0_VSS
#define AM_HAL_ADC_SLOT_CHSEL_VBATT AM_REG_ADC_SL0CFG_CHSEL0_BATT
// Window enable.
#define AM_HAL_ADC_SLOT_WINDOW_EN AM_REG_ADC_SL0CFG_WCEN0(1)
// Enable the slot.
#define AM_HAL_ADC_SLOT_ENABLE AM_REG_ADC_SL0CFG_SLEN0(1)
//! @}
//*****************************************************************************
//
//! @name Interrupt Status Bits
//! @brief Interrupt Status Bits for enable/disble use
//!
//! These macros may be used to enable an individual ADC interrupt cause.
//! @{
//
//*****************************************************************************
#define AM_HAL_ADC_INT_WCINC AM_REG_ADC_INTEN_WCINC(1)
#define AM_HAL_ADC_INT_WCEXC AM_REG_ADC_INTEN_WCEXC(1)
#define AM_HAL_ADC_INT_FIFOOVR2 AM_REG_ADC_INTEN_FIFOOVR2(1)
#define AM_HAL_ADC_INT_FIFOOVR1 AM_REG_ADC_INTEN_FIFOOVR1(1)
#define AM_HAL_ADC_INT_SCNCMP AM_REG_ADC_INTEN_SCNCMP(1)
#define AM_HAL_ADC_INT_CNVCMP AM_REG_ADC_INTEN_CNVCMP(1)
//! @}
//*****************************************************************************
//
//! @name Temperature Trim Value Locations
//! @brief Temperature calibration cofficients are stored in readable space.
//!
//! These macros are used to access the temperature trim values in readable
//! space.
//! @{
//
//*****************************************************************************
#define AM_HAL_ADC_CALIB_TEMP_ADDR (0x50023010)
#define AM_HAL_ADC_CALIB_AMBIENT_ADDR (0x50023014)
#define AM_HAL_ADC_CALIB_ADC_OFFSET_ADDR (0x50023018)
//
// Default coefficients (used when trims not provided):
// TEMP_DEFAULT = Temperature in deg K (e.g. 299.5 - 273.15 = 26.35)
// AMBIENT_DEFAULT = Voltage measurement at default temperature.
// OFFSET_DEFAULT = Default ADC offset at 1v.
//
#define AM_HAL_ADC_CALIB_TEMP_DEFAULT (299.5F)
#define AM_HAL_ADC_CALIB_AMBIENT_DEFAULT (1.02809F)
#define AM_HAL_ADC_CALIB_ADC_OFFSET_DEFAULT (-0.004281F)
//! @}
//*****************************************************************************
//
//! @brief Configuration structure for the ADC.
//
//*****************************************************************************
typedef struct
{
//! Select the ADC Clock source using one of the clock source macros.
uint32_t ui32Clock;
//! Select the ADC trigger source using a trigger source macro.
uint32_t ui32TriggerConfig;
//! Use a macro to select the ADC reference voltage.
uint32_t ui32Reference;
//! Use a macro to decide whether to disable clocks between samples.
uint32_t ui32ClockMode;
//! Use a macro to select the ADC power mode.
uint32_t ui32PowerMode;
//! Select whether the ADC will re-trigger based on a signal from timer 3.
uint32_t ui32Repeat;
}
am_hal_adc_config_t;
//*****************************************************************************
//
//! @brief ADC Fifo Read macros
//!
//! These are helper macros for interpreting FIFO data. Each ADC FIFO entry
//! contains information about the slot number and the FIFO depth alongside the
//! current sample. These macros perform the correct masking and shifting to
//! read those values.
//!
//! The SAMPLE and FULL_SAMPLE options refer to the fractional part of averaged
//! samples. If you are not using hardware averaging or don't need the
//! fractional part of the ADC sample, you should just use
//! AM_HAL_ADC_FIFO_SAMPLE.
//!
//! If you do need the fractional part, use AM_HAL_ADC_FIFO_FULL_SAMPLE. This
//! macro will keep six bits of precision past the decimal point. Depending on
//! the number of averaged samples, anywhere between 1 and 6 of these bits will
//! be valid. Please consult the datasheet to find out how many bits of data
//! are valid for your chosen averaging settings.
//!
//! @{
//
//*****************************************************************************
#define AM_HAL_ADC_FIFO_SAMPLE(value) \
((((value) & AM_REG_ADC_FIFO_DATA_M) >> AM_REG_ADC_FIFO_DATA_S) >> 6)
#define AM_HAL_ADC_FIFO_FULL_SAMPLE(value) \
(((value) & AM_REG_ADC_FIFO_DATA_M) >> AM_REG_ADC_FIFO_DATA_S )
#define AM_HAL_ADC_FIFO_SLOT(value) \
(((value) & AM_REG_ADC_FIFO_SLOTNUM_M) >> AM_REG_ADC_FIFO_SLOTNUM_S)
#define AM_HAL_ADC_FIFO_COUNT(value) \
(((value) & AM_REG_ADC_FIFO_COUNT_M) >> AM_REG_ADC_FIFO_COUNT_S)
//! @}
//*****************************************************************************
//
// External function definitions
//
//*****************************************************************************
extern void am_hal_adc_config(am_hal_adc_config_t *psConfig);
extern void am_hal_adc_window_set(uint32_t ui32Upper, uint32_t ui32Lower);
extern void am_hal_adc_slot_config(uint32_t ui32SlotNumber,
uint32_t ui32SlotConfig);
extern uint32_t am_hal_adc_fifo_peek(void);
extern uint32_t am_hal_adc_fifo_pop(void);
extern void am_hal_adc_trigger(void);
extern void am_hal_adc_enable(void);
extern void am_hal_adc_disable(void);
extern void am_hal_adc_int_enable(uint32_t ui32Interrupt);
extern uint32_t am_hal_adc_int_enable_get(void);
extern void am_hal_adc_int_disable(uint32_t ui32Interrupt);
extern void am_hal_adc_int_clear(uint32_t ui32Interrupt);
extern void am_hal_adc_int_set(uint32_t ui32Interrupt);
extern uint32_t am_hal_adc_int_status_get(bool bEnabledOnly);
extern float am_hal_adc_volts_to_celsius(float fVoltage);
extern void am_hal_adc_temp_trims_get(float * pfTemp, float * pfVoltage, float * pfOffsetV);
#ifdef __cplusplus
}
#endif
#endif // AM_HAL_ADC_H
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************
此差异已折叠。
//*****************************************************************************
//
// am_hal_cachectrl.h
//! @file
//!
//! @brief Functions for accessing and configuring the CACHE controller.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2017, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_CACHECTRL_H
#define AM_HAL_CACHECTRL_H
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Cache configuration structure
//
//*****************************************************************************
typedef struct
{
//
//! Set to 1 to enable the cache.
//
uint8_t ui32EnableCache;
//
//! Set to 1 to enable the LRU cache replacement policy.
//! Set to 0 to enable the LRR (least recently used) replacement policy.
//! LEE minimizes writes to the TAG SRAM.
//
uint8_t ui32LRU;
//
//! Set to 3 to enable non-cachable region 1 and non-cachable region 0.
//! Set to 2 to enable non-cachable region 1.
//! Set to 1 to enable non-cachable region 0.
//! Set to 0 to make all regions cacheable.
//
uint8_t ui32EnableNCregions;
//
//! Set to:
//! AM_HAL_CACHECTRL_CACHECFG_CONFIG_DIRECT_256 for direct-mapped,
//! 128-bit linesize, 256 entries (2 SRAMs active)
//! AM_HAL_CACHECTRL_CACHECFG_CONFIG_2WAY_256 for two-way set associative,
//! 128-bit linesize, 256 entries (4 SRAMs active)
//! AM_HAL_CACHECTRL_CACHECFG_CONFIG_2WAY_512 for two-way set associative,
//! 128-bit linesize, 512 entries (8 SRAMs active)
//
uint8_t ui32Config;
//
//! Set to 1 to enable serial cache mode.
//
uint8_t ui32SerialCacheMode;
//
//! Set to 3 to enable flash data caching and flash instruction caching.
//! Set to 2 to enable flash data caching.
//! Set to 1 to enable flash instruction caching.
//! Set to 0 to disable flash data caching and flash instruction caching.
//
uint8_t ui32FlashCachingEnables;
//
//! Set to 1 to enable clock gating of cache RAMs.
//
uint8_t ui32EnableCacheClockGating;
//
//! Set to 1 to enable light sleep of cache RAMs.
//
uint8_t ui32EnableLightSleep;
//
//! Set Data RAM delay value (0x0 - 0xF).
//
uint8_t ui32Dly;
//
//! Set SM Data RAM delay value (0x0 - 0xF).
//
uint8_t ui32SMDly;
//
//! Set to 1 to enable clock gating of the entire data array.
//
uint8_t ui32EnableDataClockGating;
//
//! Set to 1 to enable cache monitor statistics.
//
uint8_t ui32EnableCacheMonitoring;
}
am_hal_cachectrl_config_t;
extern const am_hal_cachectrl_config_t am_hal_cachectrl_defaults;
//*****************************************************************************
//
//! @name Cache enables
//! @brief Configuration selection for the various cache enables.
//!
//! These macros may be used in conjunction with the
//! am_hal_cachectrl_cache_enable() function to enable various cache features.
//!
//! @{
//
//*****************************************************************************
#define AM_HAL_CACHECTRL_CACHECFG_ENABLE AM_REG_CACHECTRL_CACHECFG_ENABLE_M
#define AM_HAL_CACHECTRL_CACHECFG_LRU_ENABLE AM_REG_CACHECTRL_CACHECFG_LRU_M
#define AM_HAL_CACHECTRL_CACHECFG_NC0_ENABLE AM_REG_CACHECTRL_CACHECFG_ENABLE_NC0_M
#define AM_HAL_CACHECTRL_CACHECFG_NC1_ENABLE AM_REG_CACHECTRL_CACHECFG_ENABLE_NC1_M
#define AM_HAL_CACHECTRL_CACHECFG_SERIAL_ENABLE AM_REG_CACHECTRL_CACHECFG_SERIAL_M
#define AM_HAL_CACHECTRL_CACHECFG_ICACHE_ENABLE AM_REG_CACHECTRL_CACHECFG_ICACHE_ENABLE_M
#define AM_HAL_CACHECTRL_CACHECFG_DCACHE_ENABLE AM_REG_CACHECTRL_CACHECFG_DCACHE_ENABLE_M
#define AM_HAL_CACHECTRL_CACHECFG_CACHE_CLKGATE_ENABLE AM_REG_CACHECTRL_CACHECFG_CACHE_CLKGATE_M
#define AM_HAL_CACHECTRL_CACHECFG_LS_ENABLE AM_REG_CACHECTRL_CACHECFG_CACHE_LS_M
#define AM_HAL_CACHECTRL_CACHECFG_DATA_CLKGATE_ENABLE AM_REG_CACHECTRL_CACHECFG_DATA_CLKGATE_M
#define AM_HAL_CACHECTRL_CACHECFG_MONITOR_ENABLE AM_REG_CACHECTRL_CACHECFG_ENABLE_MONITOR_M
//! @}
//*****************************************************************************
//
//! @name Cache Config
//! @brief Configuration selection for the cache.
//!
//! These macros may be used in conjunction with the
//! am_hal_cachectrl_cache_config() function to select the cache type.
//!
//! @{
//
//*****************************************************************************
#define AM_HAL_CACHECTRL_CACHECFG_CONFIG_DIRECT_256 AM_REG_CACHECTRL_CACHECFG_CONFIG_W1_128B_256E
#define AM_HAL_CACHECTRL_CACHECFG_CONFIG_2WAY_256 AM_REG_CACHECTRL_CACHECFG_CONFIG_W2_128B_256E
#define AM_HAL_CACHECTRL_CACHECFG_CONFIG_2WAY_512 AM_REG_CACHECTRL_CACHECFG_CONFIG_W2_128B_512E
//! @}
//*****************************************************************************
//
// Default cache settings
//
//*****************************************************************************
#define AM_HAL_CACHECTRL_DEFAULTS \
(AM_HAL_CACHECTRL_CACHECFG_ICACHE_ENABLE | \
AM_HAL_CACHECTRL_CACHECFG_DCACHE_ENABLE | \
AM_HAL_CACHECTRL_CACHECFG_CACHE_CLKGATE_ENABLE | \
AM_HAL_CACHECTRL_CACHECFG_DATA_CLKGATE_ENABLE | \
AM_HAL_CACHECTRL_CACHECFG_CONFIG_2WAY_512)
//*****************************************************************************
//
// External function definitions
//
//*****************************************************************************
extern void am_hal_cachectrl_enable(const am_hal_cachectrl_config_t *psConfig);
extern void am_hal_cachectrl_disable(void);
extern void am_hal_cachectrl_config_default(void);
extern void am_hal_cachectrl_config(am_hal_cachectrl_config_t *psConfig);
extern uint32_t am_hal_cachectrl_cache_enables(uint32_t u32EnableMask,
uint32_t u32DisableMask);
extern void am_hal_cachectrl_cache_config(uint32_t ui32CacheConfig);
extern void am_hal_cachectrl_invalidate_flash_cache(void);
extern void am_hal_cachectrl_reset_statistics(void);
extern uint32_t am_hal_cachectrl_sleep_mode_status(void);
extern uint32_t am_hal_cachectrl_sleep_mode_enable(uint32_t ui32EnableMask,
uint32_t ui32DisableMask);
#ifdef __cplusplus
}
#endif
#endif // AM_HAL_CACHECTRL_H
//*****************************************************************************
//
// am_hal_clkgen.c
//! @file
//!
//! @brief Functions for interfacing with the CLKGEN.
//!
//! @addtogroup clkgen2 Clock Generator (CLKGEN)
//! @ingroup apollo2hal
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2017, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
#include <stdbool.h>
#include "am_mcu_apollo.h"
//*****************************************************************************
//
// CLKGEN HFADJ register
//
//*****************************************************************************
#define AM_REG_CLKGEN_HFADJ_HFXTADJ_DEFAULT 0x5B8
//*****************************************************************************
//
//! @brief Select the clock divisor for the main system clock.
//!
//! @param ui32ClockSetting - The divisor value for the system clock.
//!
//! This function can be used to select the frequency of the main system clock.
//! The \e ui32ClockSetting parameter should be set to one of the following
//! values:
//!
//! AM_HAL_CLKGEN_SYSCLK_MAX
//! AM_HAL_CLKGEN_SYSCLK_48MHZ
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_clkgen_sysclk_select(uint32_t ui32ClockSetting)
{
am_hal_debug_assert_msg(ui32ClockSetting == AM_HAL_CLKGEN_SYSCLK_48MHZ,
"am_hal_clkgen_sysclk_select(): invalid clock setting.");
//
// Unlock the clock control register.
//
AM_REG(CLKGEN, CLKKEY) = AM_REG_CLKGEN_CLKKEY_KEYVAL;
//
// Set the HFRC divisor to the user-selected value.
//
AM_REG(CLKGEN, CCTRL) = ui32ClockSetting;
//
// Lock the clock configuration registers.
//
AM_REG(CLKGEN, CLKKEY) = 0;
}
//*****************************************************************************
//
//! @brief Get the current system clock frequency.
//!
//! This function can be used to determine the frequency of the main system
//! clock. The return value is the system clock frequency measured in hertz.
//!
//! @return System clock frequency in Hz
//
//*****************************************************************************
uint32_t
am_hal_clkgen_sysclk_get(void)
{
uint32_t ui32ClockSetting;
//
// Read the value of the clock divider.
//
ui32ClockSetting = AM_REG(CLKGEN, CCTRL) & AM_REG_CLKGEN_CCTRL_CORESEL_M;
switch ( ui32ClockSetting )
{
case AM_REG_CLKGEN_CCTRL_CORESEL_HFRC:
return 48000000;
case AM_REG_CLKGEN_CCTRL_CORESEL_HFRC_DIV2:
return 24000000;
default:
return 0xFFFFFFFF;
}
}
//*****************************************************************************
//
//! @brief Enable selected CLKGEN Interrupts.
//!
//! Use this function to enable the interrupts.
//!
//! @param ui32Interrupt - Use the macro bit fields provided in am_hal_clkgen.h
//!
//! @return None
//
//*****************************************************************************
void
am_hal_clkgen_int_enable(uint32_t ui32Interrupt)
{
//
// Enable the interrupts.
//
AM_REG(CLKGEN, INTEN) |= ui32Interrupt;
}
//*****************************************************************************
//
//! @brief Return enabled CLKGEN Interrupts.
//!
//! Use this function to get all enabled CLKGEN interrupts.
//!
//! @return enabled CLKGEN interrupts.
//
//*****************************************************************************
uint32_t
am_hal_clkgen_int_enable_get(void)
{
//
// Return the enabled interrupts.
//
return AM_REG(CLKGEN, INTEN);
}
//*****************************************************************************
//
//! @brief Disable selected CLKGEN Interrupts.
//!
//! Use this function to disable the CLKGEN interrupts.
//!
//! @param ui32Interrupt - Use the macro bit fields provided in am_hal_clkgen.h
//!
//! @return None
//
//*****************************************************************************
void
am_hal_clkgen_int_disable(uint32_t ui32Interrupt)
{
//
// Disable the interrupts.
//
AM_REG(CLKGEN, INTEN) &= ~ui32Interrupt;
}
//*****************************************************************************
//
//! @brief Sets the interrupt status.
//!
//! @param ui32IntFlags interrupts to be enabled.
//!
//! This function sets the interrupts.
//!
//! Valid values for ui32IntFlags are:
//!
//! AM_HAL_CLKGEN_INT_RTC_ALARM
//! AM_HAL_CLKGEN_INT_XT_FAIL
//! AM_HAL_CLKGEN_INT_AUTOCAL_COMPLETE
//! AM_HAL_CLKGEN_INT AUTOCAL_FAIL
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_clkgen_int_set(uint32_t ui32Interrupt)
{
//
// Set the interrupt status.
//
AM_REG(CLKGEN, INTSET) = ui32Interrupt;
}
//*****************************************************************************
//
//! @brief Gets the interrupt configuration.
//!
//! @param bEnabledOnly - return the status of only the enabled interrupts.
//!
//! This function gets the currently configured interrupts.
//!
//! @return the configured interrupts.
//!
//! Possible values for the return are:
//!
//! AM_HAL_CLKGEN_INT_RTC_ALARM
//! AM_HAL_CLKGEN_INT_XT_FAIL
//! AM_HAL_CLKGEN_INT_AUTOCAL_COMPLETE
//! AM_HAL_CLKGEN_INT AUTOCAL_FAIL
//
//*****************************************************************************
uint32_t
am_hal_clkgen_int_status_get(bool bEnabledOnly)
{
//
// Return the status.
//
if ( bEnabledOnly )
{
uint32_t u32RetVal = AM_REG(CLKGEN, INTSTAT);
u32RetVal &= AM_REG(CLKGEN, INTEN);
return u32RetVal;
}
else
{
return AM_REG(CLKGEN, INTSTAT);
}
}
//*****************************************************************************
//
//! @brief Clears the interrupts.
//!
//! @param ui32IntFlags interrupts to be cleared.
//!
//! This function clears the interrupts.
//!
//! Valid values for ui32IntFlags are:
//!
//! AM_HAL_CLKGEN_INT_RTC_ALARM
//! AM_HAL_CLKGEN_INT_XT_FAIL
//! AM_HAL_CLKGEN_INT_AUTOCAL_COMPLETE
//! AM_HAL_CLKGEN_INT AUTOCAL_FAIL
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_clkgen_int_clear(uint32_t ui32Interrupt)
{
//
// Clear the interrupts.
//
AM_REG(CLKGEN, INTCLR) = ui32Interrupt;
}
//*****************************************************************************
//
//! @brief Starts the desired oscillator(s) (OSC).
//!
//! @param ui32OscFlags oscillator(s) to start.
//!
//! This function starts the desired oscillator(s) (OSC).
//!
//! Valid values for ui32OscFlags are:
//!
//! AM_HAL_CLKGEN_OSC_LFRC
//! AM_HAL_CLKGEN_OSC_XT
//!
//! @return 0 None.
//
//*****************************************************************************
void
am_hal_clkgen_osc_start(uint32_t ui32OscFlags)
{
//
// Start the oscillator(s).
//
AM_REG(CLKGEN, OCTRL) &= ~ui32OscFlags;
}
//*****************************************************************************
//
//! @brief Stops the desired oscillator(s) (OSC).
//!
//! @param ui32OscFlags oscillator(s) to stop.
//!
//! This function stops the desired oscillator(s) (OSC).
//!
//! Valid values for ui32OscFlags are:
//!
//! AM_HAL_CLKGEN_OSC_LFRC
//! AM_HAL_CLKGEN_OSC_XT
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_clkgen_osc_stop(uint32_t ui32OscFlags)
{
//
// Stop the oscillator(s).
//
AM_REG(CLKGEN, OCTRL) |= ui32OscFlags;
}
//*****************************************************************************
//
//! @brief Enables the clock out signal.
//!
//! @param ui32Signal desired location for the clock out signal.
//!
//! This function enables the clock out signal. See am_hal_clkgen.h for
//! available signals.
//!
//! e.g. AM_HAL_CLKGEN_CLKOUT_CKSEL_HFRC
//! AM_HAL_CLKGEN_CLKOUT_CKSEL_HFRC_DIV4
//! AM_HAL_CLKGEN_CLKOUT_CKSEL_LFRC
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_clkgen_clkout_enable(uint32_t ui32Signal)
{
//
// Enable the clock out on desired signal.
//
AM_REG(CLKGEN, CLKOUT) = AM_REG_CLKGEN_CLKOUT_CKEN_M | ui32Signal;
}
//*****************************************************************************
//
//! @brief Disables the clock out signal.
//!
//! This function disables the clock out signal.
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_clkgen_clkout_disable(void)
{
//
// Disable the clock out.
//
AM_REG(CLKGEN, CLKOUT) = 0;
}
//*****************************************************************************
//
//! @brief Enable UART system clock.
//!
//! This function enables or disables the UART system clock.
//!
//! @param ui32Module is 0 or 1 for Apollo2.
//! @param ui32UartEn is one of the following.
//! AM_HAL_CLKGEN_UARTEN_DIS
//! AM_HAL_CLKGEN_UARTEN_EN
//! AM_HAL_CLKGEN_UARTEN_REDUCE_FREQ
//! AM_HAL_CLKGEN_UARTEN_EN_POWER_SAV
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_clkgen_uarten_set(uint32_t ui32Module, uint32_t ui32UartEn)
{
uint32_t ui32Mask;
if ( (ui32Module >= AM_REG_UART_NUM_MODULES) ||
(ui32UartEn > AM_HAL_CLKGEN_UARTEN_EN_POWER_SAV) )
{
return;
}
ui32UartEn <<= (ui32Module * AM_HAL_CLKGEN_UARTEN_UARTENn_S(ui32Module));
ui32Mask = ~(AM_HAL_CLKGEN_UARTEN_UARTENn_M(ui32Module));
//
// Begin critical section.
//
AM_CRITICAL_BEGIN_ASM
//
// Set the UART clock
//
AM_REG(CLKGEN, UARTEN) &= ui32Mask;
AM_REG(CLKGEN, UARTEN) |= ui32UartEn;
//
// Begin critical section.
//
AM_CRITICAL_END_ASM
}
//*****************************************************************************
//
//! @brief Enables HFRC auto-adjustment at the specified interval.
//!
//! @param ui32Warmup - How long to give the HFRC to stabilize during each
//! calibration attempt.
//! @param ui32Frequency - How often the auto-adjustment should happen.
//!
//! This function enables HFRC auto-adjustment from an external crystal
//! oscillator even when the crystal is not normally being used.
//!
//! ui32Warmup should be one of the following values:
//!
//! AM_REG_CLKGEN_HFADJ_HFWARMUP_1SEC
//! AM_REG_CLKGEN_HFADJ_HFWARMUP_2SEC
//!
//! ui32Frequency should be one of the following values:
//!
//! AM_REG_CLKGEN_HFADJ_HFADJCK_4SEC
//! AM_REG_CLKGEN_HFADJ_HFADJCK_16SEC
//! AM_REG_CLKGEN_HFADJ_HFADJCK_32SEC
//! AM_REG_CLKGEN_HFADJ_HFADJCK_64SEC
//! AM_REG_CLKGEN_HFADJ_HFADJCK_128SEC
//! AM_REG_CLKGEN_HFADJ_HFADJCK_256SEC
//! AM_REG_CLKGEN_HFADJ_HFADJCK_512SEC
//! AM_REG_CLKGEN_HFADJ_HFADJCK_1024SEC
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_clkgen_hfrc_adjust_enable(uint32_t ui32Warmup, uint32_t ui32Frequency)
{
//
// Set the HFRC Auto-adjust register for the user's chosen settings. Assume
// that the HFRC should be calibrated to 48 MHz and that the crystal is
// running at 32.768 kHz.
//
AM_REG(CLKGEN, HFADJ) =
AM_REG_CLKGEN_HFADJ_HFADJ_GAIN_Gain_of_1_in_2 |
ui32Warmup |
AM_REG_CLKGEN_HFADJ_HFXTADJ(AM_REG_CLKGEN_HFADJ_HFXTADJ_DEFAULT) |
ui32Frequency |
AM_REG_CLKGEN_HFADJ_HFADJEN_EN;
}
//*****************************************************************************
//
//! @brief Disables HFRC auto-adjustment.
//!
//! This function disables HFRC auto-adjustment.
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_clkgen_hfrc_adjust_disable(void)
{
//
// Disable the clock out.
//
AM_REG(CLKGEN, HFADJ) =
AM_REG_CLKGEN_HFADJ_HFADJ_GAIN_Gain_of_1_in_2 |
AM_REG_CLKGEN_HFADJ_HFWARMUP_1SEC |
AM_REG_CLKGEN_HFADJ_HFXTADJ(AM_REG_CLKGEN_HFADJ_HFXTADJ_DEFAULT) |
AM_REG_CLKGEN_HFADJ_HFADJCK_4SEC |
AM_REG_CLKGEN_HFADJ_HFADJEN_DIS;
}
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************
//*****************************************************************************
//
// am_hal_clkgen.h
//! @file
//!
//! @brief Functions for accessing and configuring the CLKGEN.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2017, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_CLKGEN_H
#define AM_HAL_CLKGEN_H
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
//! @name System Clock max frequency
//! @brief Defines the maximum clock frequency for this device.
//!
//! These macros provide a definition of the maximum clock frequency.
//!
//! @{
//
//*****************************************************************************
#define AM_HAL_CLKGEN_FREQ_MAX_HZ 48000000
#define AM_HAL_CLKGEN_FREQ_MAX_MHZ (AM_HAL_CLKGEN_FREQ_MAX_HZ / 1000000)
//! @}
//*****************************************************************************
//
//! @name System Clock Selection
//! @brief Divisor selection for the main system clock.
//!
//! These macros may be used along with the am_hal_clkgen_sysctl_select()
//! function to select the frequency of the main system clock.
//!
//! @{
//
//*****************************************************************************
#define AM_HAL_CLKGEN_SYSCLK_MAX AM_REG_CLKGEN_CCTRL_CORESEL_HFRC
#define AM_HAL_CLKGEN_SYSCLK_48MHZ AM_REG_CLKGEN_CCTRL_CORESEL_HFRC
//! @}
//*****************************************************************************
//
//! @name Interrupt Status Bits
//! @brief Interrupt Status Bits for enable/disble use
//!
//! These macros may be used to set and clear interrupt bits.
//! @{
//
//*****************************************************************************
#define AM_HAL_CLKGEN_INT_ALM AM_REG_CLKGEN_INTEN_ALM_M
#define AM_HAL_CLKGEN_INT_OF AM_REG_CLKGEN_INTEN_OF_M
#define AM_HAL_CLKGEN_INT_ACC AM_REG_CLKGEN_INTEN_ACC_M
#define AM_HAL_CLKGEN_INT_ACF AM_REG_CLKGEN_INTEN_ACF_M
//! @}
//*****************************************************************************
//
//! @name OSC Start and Stop
//! @brief OSC Start and Stop defines.
//!
//! OSC Start and Stop defines to be used with \e am_hal_clkgen_osc_x().
//! @{
//
//*****************************************************************************
#define AM_HAL_CLKGEN_OSC_LFRC AM_REG_CLKGEN_OCTRL_STOPRC_M
#define AM_HAL_CLKGEN_OSC_XT AM_REG_CLKGEN_OCTRL_STOPXT_M
//! @}
//*****************************************************************************
//
// OSC Start, Stop, Select defines
//
//*****************************************************************************
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_LFRC AM_REG_CLKGEN_CLKOUT_CKSEL_LFRC
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_XT_DIV2 AM_REG_CLKGEN_CLKOUT_CKSEL_XT_DIV2
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_XT_DIV4 AM_REG_CLKGEN_CLKOUT_CKSEL_XT_DIV4
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_XT_DIV8 AM_REG_CLKGEN_CLKOUT_CKSEL_XT_DIV8
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_XT_DIV16 AM_REG_CLKGEN_CLKOUT_CKSEL_XT_DIV16
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_XT_DIV32 AM_REG_CLKGEN_CLKOUT_CKSEL_XT_DIV32
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_RTC_100Hz AM_REG_CLKGEN_CLKOUT_CKSEL_RTC_100Hz
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_XT_DIV2M AM_REG_CLKGEN_CLKOUT_CKSEL_XT_DIV2M
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_XT AM_REG_CLKGEN_CLKOUT_CKSEL_XT
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_CG_100Hz AM_REG_CLKGEN_CLKOUT_CKSEL_CG_100Hz
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_HFRC AM_REG_CLKGEN_CLKOUT_CKSEL_HFRC
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_HFRC_DIV4 AM_REG_CLKGEN_CLKOUT_CKSEL_HFRC_DIV4
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_HFRC_DIV8 AM_REG_CLKGEN_CLKOUT_CKSEL_HFRC_DIV8
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_HFRC_DIV32 AM_REG_CLKGEN_CLKOUT_CKSEL_HFRC_DIV32
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_HFRC_DIV64 AM_REG_CLKGEN_CLKOUT_CKSEL_HFRC_DIV64
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_HFRC_DIV128 AM_REG_CLKGEN_CLKOUT_CKSEL_HFRC_DIV128
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_HFRC_DIV256 AM_REG_CLKGEN_CLKOUT_CKSEL_HFRC_DIV256
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_CORE_CLK AM_REG_CLKGEN_CLKOUT_CKSEL_CORE_CLK
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_FLASH_CLK AM_REG_CLKGEN_CLKOUT_CKSEL_FLASH_CLK
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_LFRC_DIV2 AM_REG_CLKGEN_CLKOUT_CKSEL_LFRC_DIV2
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_LFRC_DIV32 AM_REG_CLKGEN_CLKOUT_CKSEL_LFRC_DIV32
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_LFRC_DIV512 AM_REG_CLKGEN_CLKOUT_CKSEL_LFRC_DIV512
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_LFRC_DIV32K AM_REG_CLKGEN_CLKOUT_CKSEL_LFRC_DIV32K
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_XT_DIV256 AM_REG_CLKGEN_CLKOUT_CKSEL_XT_DIV256
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_XT_DIV8K AM_REG_CLKGEN_CLKOUT_CKSEL_XT_DIV8K
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_XT_DIV64K AM_REG_CLKGEN_CLKOUT_CKSEL_XT_DIV64K
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_ULFRC_DIV16 AM_REG_CLKGEN_CLKOUT_CKSEL_ULFRC_DIV16
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_ULFRC_DIV128 AM_REG_CLKGEN_CLKOUT_CKSEL_ULFRC_DIV128
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_ULFRC_1Hz AM_REG_CLKGEN_CLKOUT_CKSEL_ULFRC_1Hz
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_ULFRC_DIV4K AM_REG_CLKGEN_CLKOUT_CKSEL_ULFRC_DIV4K
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_ULFRC_DIV1M AM_REG_CLKGEN_CLKOUT_CKSEL_ULFRC_DIV1M
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_HFRC_DIV64K AM_REG_CLKGEN_CLKOUT_CKSEL_HFRC_DIV64K
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_HFRC_DIV16M AM_REG_CLKGEN_CLKOUT_CKSEL_HFRC_DIV16M
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_LFRC_DIV2M AM_REG_CLKGEN_CLKOUT_CKSEL_LFRC_DIV2M
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_HFRCNE AM_REG_CLKGEN_CLKOUT_CKSEL_HFRCNE
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_HFRCNE_DIV8 AM_REG_CLKGEN_CLKOUT_CKSEL_HFRCNE_DIV8
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_CORE_CLKNE AM_REG_CLKGEN_CLKOUT_CKSEL_CORE_CLKNE
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_XTNE AM_REG_CLKGEN_CLKOUT_CKSEL_XTNE
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_XTNE_DIV16 AM_REG_CLKGEN_CLKOUT_CKSEL_XTNE_DIV16
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_LFRCNE_DIV32 AM_REG_CLKGEN_CLKOUT_CKSEL_LFRCNE_DIV32
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_FCLKNE AM_REG_CLKGEN_CLKOUT_CKSEL_FCLKNE
#define AM_HAL_CLKGEN_CLKOUT_CKSEL_LFRCNE AM_REG_CLKGEN_CLKOUT_CKSEL_LFRCNE
//*****************************************************************************
//
// UARTEN
//
//*****************************************************************************
#define AM_HAL_CLKGEN_UARTEN_DIS AM_REG_CLKGEN_UARTEN_UART0EN_DIS
#define AM_HAL_CLKGEN_UARTEN_EN AM_REG_CLKGEN_UARTEN_UART0EN_EN
#define AM_HAL_CLKGEN_UARTEN_REDUCE_FREQ AM_REG_CLKGEN_UARTEN_UART0EN_REDUCE_FREQ
#define AM_HAL_CLKGEN_UARTEN_EN_POWER_SAV AM_REG_CLKGEN_UARTEN_UART0EN_EN_POWER_SAV
#define AM_HAL_CLKGEN_UARTEN_UARTENn_S(module) \
((module) * \
(AM_REG_CLKGEN_UARTEN_UART1EN_S - AM_REG_CLKGEN_UARTEN_UART0EN_S))
#define AM_HAL_CLKGEN_UARTEN_UARTENn_M(module) \
(AM_REG_CLKGEN_UARTEN_UART0EN_M << AM_HAL_CLKGEN_UARTEN_UARTENn_S(module))
//
// UARTEN: entype is one of DIS, EN, REDUCE_FREQ, EN_POWER_SAV.
//
#define AM_HAL_CLKGEN_UARTEN_UARTENn(module, entype) \
(AM_REG_CLKGEN_UARTEN_UART0EN_##entype << \
AM_HAL_CLKGEN_UARTEN_UARTENn_S(module))
//*****************************************************************************
//
// External function definitions
//
//*****************************************************************************
extern void am_hal_clkgen_sysclk_select(uint32_t ui32ClockSetting);
extern uint32_t am_hal_clkgen_sysclk_get(void);
extern void am_hal_clkgen_osc_start(uint32_t ui32OscFlags);
extern void am_hal_clkgen_osc_stop(uint32_t ui32OscFlags);
extern void am_hal_clkgen_clkout_enable(uint32_t ui32Signal);
extern void am_hal_clkgen_clkout_disable(void);
extern void am_hal_clkgen_uarten_set(uint32_t ui32Module, uint32_t ui32UartEn);
extern void am_hal_clkgen_int_enable(uint32_t ui32Interrupt);
extern uint32_t am_hal_clkgen_int_enable_get(void);
extern void am_hal_clkgen_int_disable(uint32_t ui32Interrupt);
extern void am_hal_clkgen_int_clear(uint32_t ui32Interrupt);
extern void am_hal_clkgen_int_set(uint32_t ui32Interrupt);
extern uint32_t am_hal_clkgen_int_status_get(bool bEnabledOnly);
extern void am_hal_clkgen_hfrc_adjust_enable(uint32_t ui32Warmup, uint32_t ui32Frequency);
extern void am_hal_clkgen_hfrc_adjust_disable(void);
#ifdef __cplusplus
}
#endif
#endif // AM_HAL_CLKGEN_H
此差异已折叠。
//*****************************************************************************
//
// am_hal_ctimer.h
//! @file
//!
//! @brief Functions for accessing and configuring the CTIMER.
//!
//! @addtogroup ctimer2 Counter/Timer (CTIMER)
//! @ingroup apollo2hal
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2017, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_CTIMER_H
#define AM_HAL_CTIMER_H
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
//! Number of timers
//
//*****************************************************************************
#define AM_HAL_CTIMER_TIMERS_NUM 4
//*****************************************************************************
//
//! Timer offset value
//
//*****************************************************************************
#define AM_HAL_CTIMER_TIMER_OFFSET (AM_REG_CTIMER_TMR1_O - AM_REG_CTIMER_TMR0_O)
//*****************************************************************************
//
//! @name Interrupt Status Bits
//! @brief Interrupt Status Bits for enable/disble use
//!
//! These macros may be used to set and clear interrupt bits
//! @{
//
//*****************************************************************************
#define AM_HAL_CTIMER_INT_TIMERA0C0 AM_REG_CTIMER_INTEN_CTMRA0C0INT_M
#define AM_HAL_CTIMER_INT_TIMERA0C1 AM_REG_CTIMER_INTEN_CTMRA0C1INT_M
#define AM_HAL_CTIMER_INT_TIMERA1C0 AM_REG_CTIMER_INTEN_CTMRA1C0INT_M
#define AM_HAL_CTIMER_INT_TIMERA1C1 AM_REG_CTIMER_INTEN_CTMRA1C1INT_M
#define AM_HAL_CTIMER_INT_TIMERA2C0 AM_REG_CTIMER_INTEN_CTMRA2C0INT_M
#define AM_HAL_CTIMER_INT_TIMERA2C1 AM_REG_CTIMER_INTEN_CTMRA2C1INT_M
#define AM_HAL_CTIMER_INT_TIMERA3C0 AM_REG_CTIMER_INTEN_CTMRA3C0INT_M
#define AM_HAL_CTIMER_INT_TIMERA3C1 AM_REG_CTIMER_INTEN_CTMRA3C1INT_M
#define AM_HAL_CTIMER_INT_TIMERB0C0 AM_REG_CTIMER_INTEN_CTMRB0C0INT_M
#define AM_HAL_CTIMER_INT_TIMERB0C1 AM_REG_CTIMER_INTEN_CTMRB0C1INT_M
#define AM_HAL_CTIMER_INT_TIMERB1C0 AM_REG_CTIMER_INTEN_CTMRB1C0INT_M
#define AM_HAL_CTIMER_INT_TIMERB1C1 AM_REG_CTIMER_INTEN_CTMRB1C1INT_M
#define AM_HAL_CTIMER_INT_TIMERB2C0 AM_REG_CTIMER_INTEN_CTMRB2C0INT_M
#define AM_HAL_CTIMER_INT_TIMERB2C1 AM_REG_CTIMER_INTEN_CTMRB2C1INT_M
#define AM_HAL_CTIMER_INT_TIMERB3C0 AM_REG_CTIMER_INTEN_CTMRB3C0INT_M
#define AM_HAL_CTIMER_INT_TIMERB3C1 AM_REG_CTIMER_INTEN_CTMRB3C1INT_M
//
// Deprecated, use the newer macros above.
//
#define AM_HAL_CTIMER_INT_TIMERA0 AM_HAL_CTIMER_INT_TIMERA0C0
#define AM_HAL_CTIMER_INT_TIMERB0 AM_HAL_CTIMER_INT_TIMERB0C0
#define AM_HAL_CTIMER_INT_TIMERA1 AM_HAL_CTIMER_INT_TIMERA1C0
#define AM_HAL_CTIMER_INT_TIMERB1 AM_HAL_CTIMER_INT_TIMERB1C0
#define AM_HAL_CTIMER_INT_TIMERA2 AM_HAL_CTIMER_INT_TIMERA2C0
#define AM_HAL_CTIMER_INT_TIMERB2 AM_HAL_CTIMER_INT_TIMERB2C0
#define AM_HAL_CTIMER_INT_TIMERA3 AM_HAL_CTIMER_INT_TIMERA3C0
#define AM_HAL_CTIMER_INT_TIMERB3 AM_HAL_CTIMER_INT_TIMERB3C0
//! @}
//*****************************************************************************
//
//! @name Configuration options
//! @brief Configuration options for \e am_hal_ctimer_config_t
//!
//! These options are to be used with the \e am_hal_ctimer_config_t structure
//! used by \e am_hal_ctimer_config
//! @{
//
//*****************************************************************************
#define AM_HAL_CTIMER_CLK_PIN AM_REG_CTIMER_CTRL0_TMRA0CLK(0x0)
#define AM_HAL_CTIMER_HFRC_12MHZ AM_REG_CTIMER_CTRL0_TMRA0CLK(0x1)
#define AM_HAL_CTIMER_HFRC_3MHZ AM_REG_CTIMER_CTRL0_TMRA0CLK(0x2)
#define AM_HAL_CTIMER_HFRC_187_5KHZ AM_REG_CTIMER_CTRL0_TMRA0CLK(0x3)
#define AM_HAL_CTIMER_HFRC_47KHZ AM_REG_CTIMER_CTRL0_TMRA0CLK(0x4)
#define AM_HAL_CTIMER_HFRC_12KHZ AM_REG_CTIMER_CTRL0_TMRA0CLK(0x5)
#define AM_HAL_CTIMER_XT_32_768KHZ AM_REG_CTIMER_CTRL0_TMRA0CLK(0x6)
#define AM_HAL_CTIMER_XT_16_384KHZ AM_REG_CTIMER_CTRL0_TMRA0CLK(0x7)
#define AM_HAL_CTIMER_XT_2_048KHZ AM_REG_CTIMER_CTRL0_TMRA0CLK(0x8)
#define AM_HAL_CTIMER_XT_256HZ AM_REG_CTIMER_CTRL0_TMRA0CLK(0x9)
#define AM_HAL_CTIMER_LFRC_512HZ AM_REG_CTIMER_CTRL0_TMRA0CLK(0xA)
#define AM_HAL_CTIMER_LFRC_32HZ AM_REG_CTIMER_CTRL0_TMRA0CLK(0xB)
#define AM_HAL_CTIMER_LFRC_1HZ AM_REG_CTIMER_CTRL0_TMRA0CLK(0xC)
#define AM_HAL_CTIMER_LFRC_1_16HZ AM_REG_CTIMER_CTRL0_TMRA0CLK(0xD)
#define AM_HAL_CTIMER_RTC_100HZ AM_REG_CTIMER_CTRL0_TMRA0CLK(0xE)
#define AM_HAL_CTIMER_HCLK AM_REG_CTIMER_CTRL0_TMRA0CLK(0xF)
#define AM_HAL_CTIMER_BUCK AM_REG_CTIMER_CTRL0_TMRA0CLK(0x10)
//! @}
//*****************************************************************************
//
// Timer function macros.
//
//*****************************************************************************
#define AM_HAL_CTIMER_FN_ONCE AM_REG_CTIMER_CTRL0_TMRA0FN(0)
#define AM_HAL_CTIMER_FN_REPEAT AM_REG_CTIMER_CTRL0_TMRA0FN(1)
#define AM_HAL_CTIMER_FN_PWM_ONCE AM_REG_CTIMER_CTRL0_TMRA0FN(2)
#define AM_HAL_CTIMER_FN_PWM_REPEAT AM_REG_CTIMER_CTRL0_TMRA0FN(3)
#define AM_HAL_CTIMER_FN_CONTINUOUS AM_REG_CTIMER_CTRL0_TMRA0FN(4)
//*****************************************************************************
//
// Half-timer options.
//
//*****************************************************************************
#define AM_HAL_CTIMER_INT_ENABLE AM_REG_CTIMER_CTRL0_TMRA0IE0_M
#define AM_HAL_CTIMER_PIN_ENABLE AM_REG_CTIMER_CTRL0_TMRA0PE_M
#define AM_HAL_CTIMER_PIN_INVERT AM_REG_CTIMER_CTRL0_TMRA0POL_M
#define AM_HAL_CTIMER_CLEAR AM_REG_CTIMER_CTRL0_TMRA0CLR_M
//*****************************************************************************
//
// Additional timer options.
//
//*****************************************************************************
#define AM_HAL_CTIMER_LINK AM_REG_CTIMER_CTRL0_CTLINK0_M
#define AM_HAL_CTIMER_ADC_TRIG AM_REG_CTIMER_CTRL3_ADCEN_M
//*****************************************************************************
//
// Timer selection macros.
//
//*****************************************************************************
#define AM_HAL_CTIMER_TIMERA 0x0000FFFF
#define AM_HAL_CTIMER_TIMERB 0xFFFF0000
#define AM_HAL_CTIMER_BOTH 0xFFFFFFFF
//! @}
//*****************************************************************************
//
// Timer configuration structure
//
//*****************************************************************************
typedef struct
{
//
//! Set to 1 to operate this timer as a 32-bit timer instead of two 16-bit
//! timers.
//
uint32_t ui32Link;
//
//! Configuration options for TIMERA
//
uint32_t ui32TimerAConfig;
//
//! Configuration options for TIMERB
//
uint32_t ui32TimerBConfig;
}
am_hal_ctimer_config_t;
//*****************************************************************************
//
// Function pointer type for CTimer interrupt handlers.
//
//*****************************************************************************
typedef void (*am_hal_ctimer_handler_t)(void);
//*****************************************************************************
//
// External function definitions
//
//*****************************************************************************
extern void am_hal_ctimer_config(uint32_t ui32TimerNumber,
am_hal_ctimer_config_t *psConfig);
extern void am_hal_ctimer_config_single(uint32_t ui32TimerNumber,
uint32_t ui32TimerSegment,
uint32_t ui32ConfigVal);
extern void am_hal_ctimer_start(uint32_t ui32TimerNumber,
uint32_t ui32TimerSegment);
extern void am_hal_ctimer_stop(uint32_t ui32TimerNumber,
uint32_t ui32TimerSegment);
extern void am_hal_ctimer_clear(uint32_t ui32TimerNumber,
uint32_t ui32TimerSegment);
extern uint32_t am_hal_ctimer_read(uint32_t ui32TimerNumber,
uint32_t ui32TimerSegment);
extern void am_hal_ctimer_pin_enable(uint32_t ui32TimerNumber,
uint32_t ui32TimerSegment);
extern void am_hal_ctimer_pin_disable(uint32_t ui32TimerNumber,
uint32_t ui32TimerSegment);
extern void am_hal_ctimer_pin_invert(uint32_t ui32TimerNumber,
uint32_t ui32TimerSegment,
bool bInvertOutput);
extern void am_hal_ctimer_compare_set(uint32_t ui32TimerNumber,
uint32_t ui32TimerSegment,
uint32_t ui32CompareReg,
uint32_t ui32Value);
extern void am_hal_ctimer_period_set(uint32_t ui32TimerNumber,
uint32_t ui32TimerSegment,
uint32_t ui32Period,
uint32_t ui32OnTime);
extern void am_hal_ctimer_adc_trigger_enable(void);
extern void am_hal_ctimer_adc_trigger_disable(void);
extern void am_hal_ctimer_int_enable(uint32_t ui32Interrupt);
extern uint32_t am_hal_ctimer_int_enable_get(void);
extern void am_hal_ctimer_int_disable(uint32_t ui32Interrupt);
extern void am_hal_ctimer_int_set(uint32_t ui32Interrupt);
extern void am_hal_ctimer_int_clear(uint32_t ui32Interrupt);
extern uint32_t am_hal_ctimer_int_status_get(bool bEnabledOnly);
extern void am_hal_ctimer_int_register(uint32_t ui32Interrupt,
am_hal_ctimer_handler_t pfnHandler);
extern void am_hal_ctimer_int_service(uint32_t ui32Status);
#ifdef __cplusplus
}
#endif
#endif // AM_HAL_CTIMER_H
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************
//*****************************************************************************
//
// am_hal_debug.c
//! @file
//!
//! @brief Useful functions for debugging.
//!
//! These functions and macros were created to assist with debugging. They are
//! intended to be as unintrusive as possible and designed to be removed from
//! the compilation of a project when they are no longer needed.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2017, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
#include <stdbool.h>
#include "am_mcu_apollo.h"
//*****************************************************************************
//
//! @brief Default implementation of a failed ASSERT statement.
//!
//! @param pcFile is the name of the source file where the error occurred.
//! @param ui32Line is the line number where the error occurred.
//! @param pcMessage is an optional message describing the failure.
//!
//! This function is called by am_hal_debug_assert() macro when the supplied
//! condition is not true. The implementation here simply halts the application
//! for further analysis. Individual applications may define their own
//! implementations of am_hal_debug_error() to provide more detailed feedback
//! about the failed am_hal_debug_assert() statement.
//!
//! @return
//
//*****************************************************************************
#if defined (__IAR_SYSTEMS_ICC__)
__weak void
#else
void __attribute__((weak))
#endif
am_hal_debug_error(const char *pcFile, uint32_t ui32Line, const char *pcMessage)
{
//
// Halt for analysis.
//
while(1);
}
//*****************************************************************************
//
// am_hal_debug.h
//! @file
//!
//! @brief Useful macros for debugging.
//!
//! These functions and macros were created to assist with debugging. They are
//! intended to be as unintrusive as possible and designed to be removed from
//! the compilation of a project when they are no longer needed.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2017, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_DEBUG_H
#define AM_HAL_DEBUG_H
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Debug assert macros.
//
//*****************************************************************************
#ifndef AM_HAL_DEBUG_NO_ASSERT
#define am_hal_debug_assert_msg(bCondition, pcMessage) \
if ( !(bCondition)) am_hal_debug_error(__FILE__, __LINE__, pcMessage)
#define am_hal_debug_assert(bCondition) \
if ( !(bCondition)) am_hal_debug_error(__FILE__, __LINE__, 0)
#else
#define am_hal_debug_assert_msg(bCondition, pcMessage)
#define am_hal_debug_assert(bCondition)
#endif // AM_DEBUG_ASSERT
//*****************************************************************************
//
// External function prototypes.
//
//*****************************************************************************
extern void am_hal_debug_error(const char *pcFile, uint32_t ui32Line,
const char *pcMessage);
#ifdef __cplusplus
}
#endif
#endif // AM_HAL_DEBUG_H
此差异已折叠。
//*****************************************************************************
//
// am_hal_flash.h
//! @file
//!
//! @brief Functions for performing Flash operations.
//!
//! @addtogroup flash2 Flash
//! @ingroup apollo2hal
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2017, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_FLASH_H
#define AM_HAL_FLASH_H
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdint.h>
#include <stdbool.h>
//*****************************************************************************
//
// Flash Program keys.
//
//*****************************************************************************
#define AM_HAL_FLASH_PROGRAM_KEY 0x12344321
#define AM_HAL_FLASH_RECOVERY_KEY 0xA35C9B6D
#define AM_HAL_FLASH_INFO_KEY 0x12344321
#define AM_HAL_FLASH_OTP_KEY (AM_HAL_FLASH_INFO_KEY)
//*****************************************************************************
//
// Some helpful flash values and macros.
//
//*****************************************************************************
#define AM_HAL_FLASH_ADDR 0x00000000
#define AM_HAL_FLASH_PAGE_SIZE ( 8 * 1024 )
#define AM_HAL_FLASH_INFO_SIZE AM_HAL_FLASH_PAGE_SIZE
#define AM_HAL_FLASH_INSTANCE_SIZE ( 512 * 1024 )
#define AM_HAL_FLASH_INSTANCE_PAGES ( AM_HAL_FLASH_INSTANCE_SIZE / AM_HAL_FLASH_PAGE_SIZE )
#define AM_HAL_FLASH_TOTAL_SIZE ( AM_HAL_FLASH_INSTANCE_SIZE * 2 )
#define AM_HAL_FLASH_LARGEST_VALID_ADDR ( AM_HAL_FLASH_ADDR + AM_HAL_FLASH_TOTAL_SIZE - 1 )
//
// Convert an absolute flash address to a instance
//
#define AM_HAL_FLASH_ADDR2INST(addr) ( ( addr >> 19 ) & 1 )
//
// Convert an absolute flash address to a page number relative to the instance
//
#define AM_HAL_FLASH_ADDR2PAGE(addr) ( ( addr >> 13 ) & 0x3F )
//
// Convert an absolute flash address to an absolute page number
//
#define AM_HAL_FLASH_ADDR2ABSPAGE(addr) ( addr >> 13 )
//
// Given a number of microseconds, convert to a value representing the number of
// cycles that will give that delay. This macro is basically taking into account
// some of the call overhead.
// e.g. To provide a 2us delay:
// am_hal_flash_delay( FLASH_CYCLES_US(2) );
//
#define FLASH_CYCLES_US(n) ((n * (AM_HAL_CLKGEN_FREQ_MAX_MHZ / 3)) - 4)
//
// Backward compatibility
//
#define am_hal_flash_program_otp am_hal_flash_program_info
#define am_hal_flash_program_otp_sram am_hal_flash_program_info_sram
//*****************************************************************************
//
// Structure of function pointers to helper functions for invoking various
// flash operations. The functions we are pointing to here are in the Apollo 2
// integrated BOOTROM.
//
//*****************************************************************************
typedef struct am_hal_flash_helper_struct
{
//
// The basics.
//
int (*flash_mass_erase)(uint32_t, uint32_t);
int (*flash_page_erase)(uint32_t, uint32_t, uint32_t);
int (*flash_program_main)(uint32_t, uint32_t *,
uint32_t*, uint32_t);
int (*flash_program_info)(uint32_t, uint32_t,
uint32_t*, uint32_t, uint32_t);
//
// Non-blocking variants, but be careful these are not interrupt safe so
// mask interrupts while these very long operations proceed.
//
int (*flash_mass_erase_nb)(uint32_t, uint32_t);
int (*flash_page_erase_nb)(uint32_t, uint32_t, uint32_t);
bool (*flash_nb_operation_complete)(void);
//
// Essentially these are recovery options.
//
int (*flash_erase_info)(uint32_t, uint32_t);
int (*flash_erase_main_plus_info)(uint32_t, uint32_t);
int (*flash_erase_main_plus_info_both_instances)(uint32_t);
void (*flash_recovery)(uint32_t);
//
// Useful utilities.
//
uint32_t (*flash_util_read_word)(uint32_t*);
void (*flash_util_write_word)(uint32_t*, uint32_t);
void (*delay_cycles)(uint32_t);
//
// The following functions pointers will generally never be called from
// user programs. They are here primarily to document these entry points
// which are usable from a debugger or debugger script.
//
void (*flash_program_main_sram)(void);
void (*flash_program_info_sram)(void);
void (*flash_erase_main_pages_sram)(void);
void (*flash_mass_erase_sram)(void);
void (*flash_erase_info_sram)(void);
void (*flash_erase_main_plus_info_sram)(void);
} g_am_hal_flash_t;
extern g_am_hal_flash_t g_am_hal_flash;
//*****************************************************************************
//
// Define some FLASH INFO SPACE values and macros.
//
//*****************************************************************************
#define AM_HAL_FLASH_INFO_ADDR 0x50020000
#define AM_HAL_FLASH_INFO_SECURITY_O 0x10
#define AM_HAL_FLASH_INFO_WRITPROT_O 0x20
#define AM_HAL_FLASH_INFO_COPYPROT_O 0x30
#define AM_HAL_FLASH_INFO_SECURITY_ADDR (AM_HAL_FLASH_INFO_ADDR + AM_HAL_FLASH_INFO_SECURITY_O)
#define AM_HAL_FLASH_INFO_WRITPROT_ADDR (AM_HAL_FLASH_INFO_ADDR + AM_HAL_FLASH_INFO_WRITPROT_O)
#define AM_HAL_FLASH_INFO_COPYPROT_ADDR (AM_HAL_FLASH_INFO_ADDR + AM_HAL_FLASH_INFO_COPYPROT_O)
//
// Define the customer info signature data (at AM_HAL_FLASH_INFO_ADDR).
// These bits must exist in the customer info space in order for many of the
// security and protection functions to work.
//
#define AM_HAL_FLASH_INFO_SIGNATURE0 0x48EAAD88
#define AM_HAL_FLASH_INFO_SIGNATURE1 0xC9705737
#define AM_HAL_FLASH_INFO_SIGNATURE2 0x0A6B8458
#define AM_HAL_FLASH_INFO_SIGNATURE3 0xE41A9D74
//
// Define the customer security bits (at AM_HAL_FLASH_INFO_SECURITY_ADDR)
//
#define AM_HAL_FLASH_INFO_SECURITY_DEBUGGERPROT_S 0
#define AM_HAL_FLASH_INFO_SECURITY_SWOCTRL_S 1
#define AM_HAL_FLASH_INFO_SECURITY_SRAMWIPE_S 2
#define AM_HAL_FLASH_INFO_SECURITY_FLASHWIPE_S 3
#define AM_HAL_FLASH_INFO_SECURITY_ENINFOPRGM_S 4
#define AM_HAL_FLASH_INFO_SECURITY_ENINFOERASE_S 8
#define AM_HAL_FLASH_INFO_SECURITY_BOOTLOADERSPIN_S 9
#define AM_HAL_FLASH_INFO_SECURITY_DEBUGGERPROT_M ((uint32_t)(0x1 << AM_HAL_FLASH_INFO_SECURITY_DEBUGGERPROT_S))
#define AM_HAL_FLASH_INFO_SECURITY_SWOCTRL_M ((uint32_t)(0x1 << AM_HAL_FLASH_INFO_SECURITY_SWOCTRL_S))
#define AM_HAL_FLASH_INFO_SECURITY_SRAMWIPE_M ((uint32_t)(0x1 << AM_HAL_FLASH_INFO_SECURITY_SRAMWIPE_S))
#define AM_HAL_FLASH_INFO_SECURITY_FLASHWIPE_M ((uint32_t)(0x1 << AM_HAL_FLASH_INFO_SECURITY_FLASHWIPE_S))
#define AM_HAL_FLASH_INFO_SECURITY_ENINFOPRGM_M ((uint32_t)(0xF << AM_HAL_FLASH_INFO_SECURITY_ENINFOPRGM_S))
#define AM_HAL_FLASH_INFO_SECURITY_ENINFOERASE_M ((uint32_t)(0x1 << AM_HAL_FLASH_INFO_SECURITY_ENINFOERASE_S))
#define AM_HAL_FLASH_INFO_SECURITY_BOOTLOADERSPIN_M ((uint32_t)(0x1 << AM_HAL_FLASH_INFO_SECURITY_BOOTLOADERSPIN_S))
#define AM_HAL_FLASH_INFO_SECURITY_DEEPSLEEP_M ((uint32_t)(0x1 << AM_HAL_FLASH_INFO_SECURITY_BOOTLOADERSPIN_S))
#define AM_HAL_FLASH_INFO_SECURITY_DEEPSLEEP ((uint32_t)(0x0 << AM_HAL_FLASH_INFO_SECURITY_BOOTLOADERSPIN_S))
//
// Protection chunk macros
// AM_HAL_FLASH_INFO_CHUNK2ADDR: Convert a chunk number to an address
// AM_HAL_FLASH_INFO_CHUNK2INST: Convert a chunk number to an instance number
// AM_HAL_FLASH_INFO_ADDR2CHUNK: Convert an address to a chunk number
//
#define AM_HAL_FLASH_INFO_CHUNKSIZE (16*1024)
#define AM_HAL_FLASH_INFO_CHUNK2ADDR(n) (AM_HAL_FLASH_ADDR + (n << 14))
#define AM_HAL_FLASH_INFO_CHUNK2INST(n) ((n >> 5) & 1
#define AM_HAL_FLASH_INFO_ADDR2CHUNK(n) ((n) >> 14)
//*****************************************************************************
//
// Function prototypes for the helper functions
//
//*****************************************************************************
extern int am_hal_flash_mass_erase(uint32_t ui32Value, uint32_t ui32FlashInst);
extern int am_hal_flash_page_erase(uint32_t ui32Value, uint32_t ui32FlashInst,
uint32_t ui32PageNum);
extern int am_hal_flash_program_main(uint32_t value, uint32_t *pSrc,
uint32_t *pDst, uint32_t NumberOfWords);
extern int am_hal_flash_program_info(uint32_t ui32Value, uint32_t ui32InfoInst,
uint32_t *pui32Src, uint32_t ui32Offset,
uint32_t ui32NumWords);
//
// Recovery type functions for Customer INFO space.
//
extern int am_hal_flash_erase_info(uint32_t ui32ProgramKey,
uint32_t ui32Instance);
extern int am_hal_flash_erase_main_plus_info(uint32_t ui32ProgramKey,
uint32_t ui32Instance);
extern int am_hal_flash_erase_main_plus_info_both_instances(
uint32_t ui32ProgramKey);
extern void am_hal_flash_recovery(uint32_t ui32RecoveryKey);
//
// BOOTROM resident reader, writer and delay utility functions.
//
extern uint32_t am_hal_flash_load_ui32(uint32_t ui32Address);
extern void am_hal_flash_store_ui32(uint32_t ui32Address, uint32_t ui32Data);
extern void am_hal_flash_delay(uint32_t ui32Iterations);
//
// These functions update security/protection bits in the customer INFO blOCK.
//
extern bool am_hal_flash_customer_info_signature_check(void);
extern bool am_hal_flash_info_signature_set(void);
extern int32_t am_hal_flash_info_erase_disable(void);
extern bool am_hal_flash_info_erase_disable_check(void);
extern int32_t am_hal_flash_info_program_disable(uint32_t ui32Mask);
extern uint32_t am_hal_flash_info_program_disable_get(void);
extern int32_t am_hal_flash_wipe_flash_enable(void);
extern bool am_hal_flash_wipe_flash_enable_check(void);
extern int32_t am_hal_flash_wipe_sram_enable(void);
extern bool am_hal_flash_wipe_sram_enable_check(void);
extern int32_t am_hal_flash_swo_disable(void);
extern bool am_hal_flash_swo_disable_check(void);
extern int32_t am_hal_flash_debugger_disable(void);
extern bool am_hal_flash_debugger_disable_check(void);
extern int32_t am_hal_flash_copy_protect_set(uint32_t *pui32StartAddress,
uint32_t *pui32StopAddress);
extern bool am_hal_flash_copy_protect_check(uint32_t *pui32StartAddress,
uint32_t *pui32StopAddress);
extern int32_t am_hal_flash_write_protect_set(uint32_t *pui32StartAddress,
uint32_t *pui32StopAddress);
extern bool am_hal_flash_write_protect_check(uint32_t *pui32StartAddress,
uint32_t *pui32StopAddress);
#ifdef __cplusplus
}
#endif
#endif // AM_HAL_FLASH_H
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************
//*****************************************************************************
//
// am_hal_global.c
//! @file
//!
//! @brief Locate global variables here.
//!
//! This module contains global variables that are used throughout the HAL.
//!
//! One use in particular is that it uses a global HAL flags variable that
//! contains flags used in various parts of the HAL.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2017, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#include <stdint.h>
#include <stdbool.h>
#include "am_mcu_apollo.h"
//*****************************************************************************
//
// Global Variables
//
//*****************************************************************************
uint32_t volatile g_ui32HALflags = 0x00000000;
//*****************************************************************************
//
// am_hal_global.h
//! @file
//!
//! @brief Locate all HAL global variables here.
//!
//! This module contains global variables that are used throughout the HAL,
//! but not necessarily those designated as const (which typically end up in
//! flash). Consolidating globals here will make it easier to manage them.
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2017, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_GLOBAL_H
#define AM_HAL_GLOBAL_H
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Macro definitions
//
//*****************************************************************************
//******************************************************************************
//
// Macros used to access the bit fields in the flags variable.
//
//******************************************************************************
#define AM_HAL_FLAGS_BFR(flagnm) \
((g_ui32HALflags & AM_HAL_FLAGS_##flagnm##_M) >> AM_HAL_FLAGS_##flagnm##_S)
#define AM_HAL_FLAGS_BFW(flagnm, value) \
g_ui32HALflags = ((g_ui32HALflags & (~(AM_HAL_FLAGS_##flagnm##_M))) | \
((value << AM_HAL_FLAGS_##flagnm##_S) & (AM_HAL_FLAGS_##flagnm##_M)) )
//******************************************************************************
//
// ITMSKIPENABLEDISABLE - Set when the ITM is not to be disabled. This is
// typically needed by Keil debug.ini.
//
//******************************************************************************
#define AM_HAL_FLAGS_ITMSKIPENABLEDISABLE_S 0
#define AM_HAL_FLAGS_ITMSKIPENABLEDISABLE_M (1 << AM_HAL_FLAGS_ITMSKIPENABLEDISABLE_S)
#define AM_HAL_FLAGS_ITMSKIPENABLEDISABLE(n) (((n) << AM_HAL_FLAGS_ITMSKIPENABLEDISABLE_S) & AM_HAL_FLAGS_ITMSKIPENABLEDISABLE_M)
//******************************************************************************
//
// ITMBKPT - Breakpoint at the end of itm_enable(), which is needed by
// Keil debug.ini.
//
//******************************************************************************
#define AM_HAL_FLAGS_ITMBKPT_S 1
#define AM_HAL_FLAGS_ITMBKPT_M (1 << AM_HAL_FLAGS_ITMBKPT_S)
#define AM_HAL_FLAGS_ITMBKPT(n) (((n) << AM_HAL_FLAGS_ITMBKPT_S) & AM_HAL_FLAGS_ITMBKPT_M)
//******************************************************************************
//
// Next available flag or bit field.
//
//******************************************************************************
#define AM_HAL_FLAGS_NEXTBITFIELD_S 2
#define AM_HAL_FLAGS_NEXTBITFIELD_M (1 << AM_HAL_FLAGS_NEXTBITFIELD_S)
#define AM_HAL_FLAGS_NEXTBITFIELD(n) (((n) << AM_HAL_FLAGS_NEXTBITFIELD_S) & AM_HAL_FLAGS_NEXTBITFIELD_M)
//*****************************************************************************
//
// Global Variables extern declarations.
//
//*****************************************************************************
extern volatile uint32_t g_ui32HALflags;
#ifdef __cplusplus
}
#endif
#endif // AM_HAL_GLOBAL_H
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//*****************************************************************************
//
// am_hal_i2c_bit_bang.h
//! @file
//!
//! @brief I2C bit bang module.
//!
//! These functions implement the I2C bit bang utility
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2017, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_I2C_BIT_BANG_H
#define AM_HAL_I2C_BIT_BANG_H
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Enumerated return constants
//
//*****************************************************************************
typedef enum
{
AM_HAL_I2C_BIT_BANG_SUCCESS = 0,
AM_HAL_I2C_BIT_BANG_ADDRESS_NAKED,
AM_HAL_I2C_BIT_BANG_DATA_NAKED,
AM_HAL_I2C_BIT_BANG_CLOCK_TIMEOUT,
AM_HAL_I2C_BIT_BANG_DATA_TIMEOUT,
}am_hal_i2c_bit_bang_enum_t;
//*****************************************************************************
//
// External function definitions
//
//*****************************************************************************
extern am_hal_i2c_bit_bang_enum_t am_hal_i2c_bit_bang_init(uint32_t sck_gpio_number,
uint32_t sda_gpio_number);
extern am_hal_i2c_bit_bang_enum_t am_hal_i2c_bit_bang_send(uint8_t address,
uint32_t number_of_bytes,
uint8_t *pData,
uint8_t ui8Offset,
bool bUseOffset,
bool bNoStop);
extern am_hal_i2c_bit_bang_enum_t am_hal_i2c_bit_bang_receive(uint8_t address,
uint32_t number_of_bytes,
uint8_t *pData,
uint8_t ui8Offset,
bool bUseOffset,
bool bNoStop);
#ifdef __cplusplus
}
#endif
#endif //AM_HAL_I2C_BIT_BANG_H
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************
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//*****************************************************************************
//
// am_hal_interrupt.h
//! @file
//!
//! @brief Helper functions supporting interrupts and NVIC operation.
//!
//! These functions may be used for NVIC-level interrupt configuration.
//!
//! @addtogroup interrupt2 Interrupt (ARM NVIC support functions)
//! @ingroup apollo2hal
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2017, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_HAL_INTERRUPT_H
#define AM_HAL_INTERRUPT_H
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
//! @name ISR number macros.
//! @brief ISR macros.
//!
//! These macros are used for all ui32Interrupt arguments in this module.
//! @{
//
//*****************************************************************************
//
// Hardware interrupts
//
#define AM_HAL_INTERRUPT_RESET 1
#define AM_HAL_INTERRUPT_NMI 2
#define AM_HAL_INTERRUPT_HARDFAULT 3
#define AM_HAL_INTERRUPT_MPUFAULT 4
#define AM_HAL_INTERRUPT_BUSFAULT 5
#define AM_HAL_INTERRUPT_USAGEFAULT 6
#define AM_HAL_INTERRUPT_SVCALL 11
#define AM_HAL_INTERRUPT_DEBUGMON 12
#define AM_HAL_INTERRUPT_PENDSV 14
#define AM_HAL_INTERRUPT_SYSTICK 15
//
// Begin IRQs
//
#define AM_HAL_INTERRUPT_BROWNOUT 16
#define AM_HAL_INTERRUPT_WATCHDOG 17
#define AM_HAL_INTERRUPT_CLKGEN 18
#define AM_HAL_INTERRUPT_VCOMP 19
#define AM_HAL_INTERRUPT_IOSLAVE 20
#define AM_HAL_INTERRUPT_IOSACC 21
#define AM_HAL_INTERRUPT_IOMASTER0 22
#define AM_HAL_INTERRUPT_IOMASTER1 23
#define AM_HAL_INTERRUPT_IOMASTER2 24
#define AM_HAL_INTERRUPT_IOMASTER3 25
#define AM_HAL_INTERRUPT_IOMASTER4 26
#define AM_HAL_INTERRUPT_IOMASTER5 27
#define AM_HAL_INTERRUPT_GPIO 28
#define AM_HAL_INTERRUPT_CTIMER 29
#define AM_HAL_INTERRUPT_UART0 30
#define AM_HAL_INTERRUPT_UART1 31
#define AM_HAL_INTERRUPT_UART (AM_HAL_INTERRUPT_UART0)
#define AM_HAL_INTERRUPT_ADC 32
#define AM_HAL_INTERRUPT_PDM 33
#define AM_HAL_INTERRUPT_STIMER 34
#define AM_HAL_INTERRUPT_STIMER_CMPR0 35
#define AM_HAL_INTERRUPT_STIMER_CMPR1 36
#define AM_HAL_INTERRUPT_STIMER_CMPR2 37
#define AM_HAL_INTERRUPT_STIMER_CMPR3 38
#define AM_HAL_INTERRUPT_STIMER_CMPR4 39
#define AM_HAL_INTERRUPT_STIMER_CMPR5 40
#define AM_HAL_INTERRUPT_STIMER_CMPR6 41
#define AM_HAL_INTERRUPT_STIMER_CMPR7 42
#define AM_HAL_INTERRUPT_FLASH 43
#define AM_HAL_INTERRUPT_SOFTWARE0 44
#define AM_HAL_INTERRUPT_SOFTWARE1 45
#define AM_HAL_INTERRUPT_SOFTWARE2 46
#define AM_HAL_INTERRUPT_SOFTWARE3 47
//! @}
//*****************************************************************************
//
//! @brief Interrupt priority
//!
//! This macro is made to be used with the \e am_hal_interrupt_priority_set()
//! function. It converts a priority number to the format used by the ARM
//! standard priority register, where only the top 3 bits are used.
//!
//! For example, AM_HAL_INTERRUPT_PRIORITY(1) yields a value of 0x20.
//
//*****************************************************************************
#define AM_HAL_INTERRUPT_PRIORITY(n) (((uint32_t)(n) & 0x7) << 5)
//*****************************************************************************
//
// External function definitions
//
//*****************************************************************************
extern void am_hal_interrupt_enable(uint32_t ui32Interrupt);
extern void am_hal_interrupt_disable(uint32_t ui32Interrupt);
extern void am_hal_interrupt_pend_set(uint32_t ui32Interrupt);
extern void am_hal_interrupt_pend_clear(uint32_t ui32Interrupt);
extern void am_hal_interrupt_priority_set(uint32_t ui32Interrupt,
uint32_t ui32Priority);
extern uint32_t am_hal_interrupt_master_disable(void);
extern uint32_t am_hal_interrupt_master_enable(void);
extern void am_hal_interrupt_master_set(uint32_t ui32InterruptState);
#ifdef __cplusplus
}
#endif
#endif // AM_HAL_INTERRUPT_H
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************
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import rtconfig
Import('RTT_ROOT')
from building import *
# get current directory
cwd = GetCurrentDir()
src = Split("""
""")
# add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
src = src + ['gcc_ride7/' + 'startup_gcc.c']
elif rtconfig.CROSS_TOOL == 'keil':
src = src + ['arm/' + 'startup_keil.s']
elif rtconfig.CROSS_TOOL == 'iar':
src = src + ['iar/' + 'startup_iar.c']
path = [cwd]
CPPDEFINES = ['AM_PACKAGE_BGA', 'AM_PART_APOLLO2', 'keil']
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
Return('group')
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