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提交 8d90cfad 编写于 作者: W Wayne Lin
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Update nuvoton porting. 

1. Make up sources and bugfix.
2. Add nu_gpio_pin_get.
3. Add PM operator in USB host driver.
4. Support NUC980 stage 1 and add nk-980iot board.
上级 c9243304
展开全部 隐藏空白更改
内联 并排
Showing with 47822 addition and 356 deletion
bsp/nuvoton/README.md
浏览文件 @ 8d90cfad
......@@ -3,5 +3,6 @@ Current supported BSP shown in below table:
| **BSP folder** | **Board name** |
|:------------------------- |:-------------------------- |
| [numaker-iot-m487](numaker-iot-m487) | Nuvoton NuMaker-IoT-m487 |
| [numaker-pfm-m487](numaker-pfm-m487) | Nuvoton NuMaker-PFM-m487 |
| [numaker-iot-m487](numaker-iot-m487) | Nuvoton NuMaker-IoT-M487 |
| [numaker-pfm-m487](numaker-pfm-m487) | Nuvoton NuMaker-PFM-M487 |
| [nk-980iot](nk-980iot) | Nuvoton NK-980IOT |
bsp/nuvoton/libraries/m480/StdDriver/src/nu_can.c
浏览文件 @ 8d90cfad
......@@ -1148,11 +1148,11 @@ int32_t CAN_SetRxMsgAndMsk(CAN_T *tCAN, uint32_t u32MsgNum, uint32_t u32IDType,
int32_t CAN_SetMultiRxMsg(CAN_T *tCAN, uint32_t u32MsgNum, uint32_t u32MsgCount, uint32_t u32IDType, uint32_t u32ID)
{
int32_t rev = (int32_t)TRUE;
uint32_t i = 0ul;
uint32_t i;
uint32_t u32TimeOutCount;
uint32_t u32EOB_Flag = 0ul;
for(i = 1ul; i < u32MsgCount; i++)
for(i = 1ul; i <= u32MsgCount; i++)
{
u32TimeOutCount = 0ul;
......
bsp/nuvoton/libraries/m480/USBHostLib/inc/usbh_lib.h
浏览文件 @ 8d90cfad
......@@ -141,7 +141,7 @@ typedef int (UAC_CB_FUNC)(struct uac_dev_t *dev, uint8_t *data, int len); /*!
/* */
/*------------------------------------------------------------------*/
extern void usbh_core_init(void);
extern int usbh_pooling_root_hubs(void);
extern int usbh_polling_root_hubs(void);
extern void usbh_install_conn_callback(CONN_FUNC *conn_func, CONN_FUNC *disconn_func);
extern void usbh_suspend(void);
extern void usbh_resume(void);
......
bsp/nuvoton/libraries/m480/USBHostLib/src/usb_core.c
浏览文件 @ 8d90cfad
......@@ -80,7 +80,7 @@ void usbh_core_init()
* @retval 0 No any hub port status changes found.
* @retval 1 There's hub port status changes.
*/
int usbh_pooling_root_hubs(void)
int usbh_polling_root_hubs(void)
{
int ret, change = 0;
......
bsp/nuvoton/libraries/m480/rtt_port/Kconfig
浏览文件 @ 8d90cfad
......@@ -941,6 +941,13 @@ config SOC_SERIES_M480
select RT_USING_USB_HOST
select RT_USBH_MSTORAGE
if BSP_USING_USBH || BSP_USING_HSUSBH
config NU_USBHOST_HUB_POLLING_INTERVAL
int "USB Root Hub Polling Interval(in Mili-seconds)"
range 100 2000
default 100
endif
config BSP_USING_HSOTG
bool "Enable High-Speed USB On-The-Go(HSOTG)"
select BSP_USING_HSUSBH
......
bsp/nuvoton/libraries/m480/rtt_port/drv_bpwm_capture.c
浏览文件 @ 8d90cfad
......@@ -12,6 +12,7 @@
#include <rtconfig.h>
#if defined(BSP_USING_BPWM_CAPTURE)
#if ((BSP_USING_BPWM0_CAPTURE_CHMSK+BSP_USING_BPWM1_CAPTURE_CHMSK)!=0)
#include <rtdevice.h>
#include <NuMicro.h>
......@@ -211,7 +212,7 @@ static rt_err_t nu_bpwm_init(nu_capture_t *nu_capture)
/* Enable BPWM0 clock */
SYS_UnlockReg();
CLK_EnableModuleClock(BPWM0_MODULE);
CLK_SetModuleClock(BPWM0_MODULE, CLK_CLKSEL2_BPWM0SEL_PLL, (uint32_t)NULL);
CLK_SetModuleClock(BPWM0_MODULE, CLK_CLKSEL2_BPWM0SEL_PLL, 0);
SYS_LockReg();
bpwm_config(nu_capture);
bBPWM0Inited = RT_TRUE;
......@@ -225,7 +226,7 @@ static rt_err_t nu_bpwm_init(nu_capture_t *nu_capture)
/* Enable BPWM1 clock */
SYS_UnlockReg();
CLK_EnableModuleClock(BPWM1_MODULE);
CLK_SetModuleClock(BPWM1_MODULE, CLK_CLKSEL2_BPWM1SEL_PLL, (uint32_t)NULL);
CLK_SetModuleClock(BPWM1_MODULE, CLK_CLKSEL2_BPWM1SEL_PLL, 0);
SYS_LockReg();
bpwm_config(nu_capture);
bBPWM1Inited = RT_TRUE;
......@@ -330,4 +331,5 @@ static int nu_bpwm_capture_device_init(void)
}
INIT_DEVICE_EXPORT(nu_bpwm_capture_device_init);
#endif //#if ((BSP_USING_BPWM0_CAPTURE_CHMSK+BSP_USING_BPWM1_CAPTURE_CHMSK)!=0)
#endif //#if defined(BSP_USING_BPWM_CAPTURE)
bsp/nuvoton/libraries/m480/rtt_port/drv_can.c
浏览文件 @ 8d90cfad
......@@ -369,7 +369,7 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
/*set the filter message object*/
if (filter_cfg->items[i].mode == 1)
{
if (CAN_SetRxMsgObjAndMsk(can_base, MSG(i + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask, FALSE) == FALSE)
if (CAN_SetRxMsgObjAndMsk(can_base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask, FALSE) == FALSE)
{
return -(RT_ERROR);
}
......@@ -378,7 +378,7 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
{
/*set the filter message object*/
if (CAN_SetRxMsgAndMsk(can_base, MSG(i + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask) == FALSE)
if (CAN_SetRxMsgAndMsk(can_base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask) == FALSE)
{
return -(RT_ERROR);
}
......@@ -439,7 +439,7 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
}
break;
default:
return -(RT_EINVAL);
return -(RT_EINVAL);
}
......@@ -507,7 +507,8 @@ static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxn
#ifdef RT_CAN_USING_HDR
/* Hardware filter messages are valid */
can->hdr->connected = 1;
pmsg->hdr = boxno - RX_MSG_ID_INDEX;
can->hdr[pmsg->hdr].connected = 1;
#endif
/* Standard ID (11 bits)*/
......
bsp/nuvoton/libraries/m480/rtt_port/drv_clk.c
浏览文件 @ 8d90cfad
......@@ -89,64 +89,44 @@ static struct rt_pm_ops ops =
struct rt_device pm;
/* Sleep and power-down mapping */
const static uint32_t g_au32SleepingMode[PM_SLEEP_MODE_MAX] =
{
0,
0,
CONFIG_MODE_LIGHT,
CONFIG_MODE_DEEP,
CONFIG_MODE_STANDBY,
CONFIG_MODE_SHUTDOWN
};
/* pm sleep() entry */
static void pm_sleep(struct rt_pm *pm, rt_uint8_t mode)
{
SYS_UnlockReg();
RT_ASSERT(mode < PM_SLEEP_MODE_MAX);
if ((mode == PM_SLEEP_MODE_NONE) || (mode == PM_SLEEP_MODE_IDLE))
return;
switch (mode)
{
/* wake-up source: */
/* PM_SLEEP_MODE_LIGHT : TIMERn */
/* PM_SLEEP_MODE_DEEP : TIMERn */
/* PM_SLEEP_MODE_STANDBY : wake-up timer (optional) */
/* PM_SLEEP_MODE_SHUTDOWN : wake-up timer (optional) */
case PM_SLEEP_MODE_NONE:
case PM_SLEEP_MODE_IDLE:
break;
case PM_SLEEP_MODE_LIGHT:
CLK_SetPowerDownMode(CONFIG_MODE_LIGHT);
CLK_PowerDown();
break;
case PM_SLEEP_MODE_DEEP:
CLK_SetPowerDownMode(CONFIG_MODE_DEEP);
CLK_PowerDown();
break;
case PM_SLEEP_MODE_STANDBY:
#if defined (NU_CLK_INVOKE_WKTMR)
/* Enable wake-up timer with pre-defined interval if it is invoked */
CLK_SET_WKTMR_INTERVAL(WKTMR_INTERVAL);
CLK_ENABLE_WKTMR();
#endif
CLK_SetPowerDownMode(CONFIG_MODE_STANDBY);
CLK_PowerDown();
break;
case PM_SLEEP_MODE_SHUTDOWN:
SYS_UnlockReg();
#if defined (NU_CLK_INVOKE_WKTMR)
if ((mode == PM_SLEEP_MODE_SHUTDOWN) || (mode == PM_SLEEP_MODE_STANDBY))
{
/* Enable wake-up timer with pre-defined interval if it is invoked */
CLK_SET_WKTMR_INTERVAL(WKTMR_INTERVAL);
CLK_ENABLE_WKTMR();
}
#endif
CLK_SetPowerDownMode(CONFIG_MODE_SHUTDOWN);
CLK_PowerDown();
break;
default:
RT_ASSERT(0);
break;
}
CLK_SetPowerDownMode(g_au32SleepingMode[mode]);
CLK_PowerDown();
SYS_LockReg();
}
......
bsp/nuvoton/libraries/m480/rtt_port/drv_crc.c
浏览文件 @ 8d90cfad
......@@ -25,6 +25,11 @@
/* Private define ---------------------------------------------------------------*/
#define NU_CRYPTO_CRC_NAME "nu_CRC"
#define CRC_32_POLY 0x04C11DB7
#define CRC_CCITT_POLY 0x00001021
#define CRC_16_POLY 0x00008005
#define CRC_8_POLY 0x00000007
/* Private variables ------------------------------------------------------------*/
static struct rt_mutex s_CRC_mutex;
......@@ -85,7 +90,6 @@ static rt_uint32_t nu_crc_run(
return u32CalChecksum;
}
rt_err_t nu_crc_init(void)
{
SYS_ResetModule(CRC_RST);
......@@ -103,30 +107,29 @@ rt_uint32_t nu_crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_siz
//select CRC operation mode
switch (ctx->crc_cfg.poly)
{
case 0x04C11DB7:
case CRC_32_POLY:
u32OpMode = CRC_32;
break;
case 0x00001021:
case CRC_CCITT_POLY:
u32OpMode = CRC_CCITT;
break;
case 0x00008005:
case CRC_16_POLY:
u32OpMode = CRC_16;
break;
case 0x00000007:
case CRC_8_POLY:
u32OpMode = CRC_8;
break;
default:
return 0;
}
u32CRCAttr |= (ctx->crc_cfg.flags & CRC_FLAG_REFOUT) ? CRC_CHECKSUM_RVS : 0; //CRC Checksum Reverse
u32CRCAttr |= (ctx->crc_cfg.flags & CRC_FLAG_REFIN) ? CRC_WDATA_RVS : 0; //CRC Write Data Reverse
u32CRCAttr |= ctx->crc_cfg.flags & CRC_FLAG_REFOUT ? CRC_CHECKSUM_RVS : 0; //CRC Checksum Reverse
u32CRCAttr |= ctx->crc_cfg.flags & CRC_FLAG_REFIN ? CRC_WDATA_RVS : 0; //CRC Write Data Reverse
//Calcluate CRC checksum, using config's last value as CRC seed
//Calculate CRC checksum, using config's last value as CRC seed
crc_result = nu_crc_run(u32OpMode, ctx->crc_cfg.last_val, u32CRCAttr, (uint8_t *)in, length);
//update CRC result to config's last vaule
//update CRC result to config's last value
ctx->crc_cfg.last_val = crc_result;
return crc_result ^ 0x00 ^ ctx->crc_cfg.xorout;
}
......
bsp/nuvoton/libraries/m480/rtt_port/drv_crc.h
浏览文件 @ 8d90cfad
......@@ -17,5 +17,4 @@ rt_err_t nu_crc_init(void);
rt_uint32_t nu_crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_size_t length);
#endif
bsp/nuvoton/libraries/m480/rtt_port/drv_crypto.c
浏览文件 @ 8d90cfad
......@@ -15,10 +15,9 @@
#if ((defined(BSP_USING_CRYPTO) || defined(BSP_USING_TRNG) || defined(BSP_USING_CRC)) && defined(RT_USING_HWCRYPTO))
#include <string.h>
#include <rtdevice.h>
#include <rtdbg.h>
#include <board.h>
#include "NuMicro.h"
#include <nu_bitutil.h>
......@@ -32,6 +31,14 @@
/* Private typedef --------------------------------------------------------------*/
typedef struct
{
uint8_t *pu8SHATempBuf;
uint32_t u32SHATempBufLen;
uint32_t u32DMAMode;
uint32_t u32BlockSize;
} S_SHA_CONTEXT;
/* Private functions ------------------------------------------------------------*/
static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx);
static void nu_hwcrypto_destroy(struct rt_hwcrypto_ctx *ctx);
......@@ -50,9 +57,6 @@ static const struct rt_hwcrypto_ops nu_hwcrypto_ops =
/* Crypto engine operation ------------------------------------------------------------*/
#if defined(BSP_USING_CRYPTO)
//define NU_HWCRYPTO_NOT_ALIGN_CHECK to disable plain/cipher buffer address alignment checking
//#define NU_HWCRYPTO_NOT_ALIGN_CHECK
#define NU_HWCRYPTO_DES_3KEYS 1
#define NU_HWCRYPTO_DES_NO3KEYS 0
#define NU_HWCRYPTO_AES_NAME "nu_AES"
......@@ -102,6 +106,8 @@ void CRYPTO_IRQHandler()
{
if (AES_GET_INT_FLAG(CRPT))
{
if (CRPT->INTSTS & (CRPT_INTSTS_AESEIF_Msk) || (CRPT->AES_STS & (CRPT_AES_STS_BUSERR_Msk | CRPT_AES_STS_CNTERR_Msk | (0x1ul << 21))))
rt_kprintf("AES ERROR\n");
s_AES_done = 1;
AES_CLR_INT_FLAG(CRPT);
}
......@@ -114,6 +120,8 @@ void CRYPTO_IRQHandler()
if (SHA_GET_INT_FLAG(CRPT))
{
if (CRPT->INTSTS & (CRPT_INTSTS_HMACEIF_Msk) || (CRPT->HMAC_STS & (CRPT_HMAC_STS_DMAERR_Msk | (0x1ul << 9))))
rt_kprintf("SHA ERROR\n");
s_SHA_done = 1;
SHA_CLR_INT_FLAG(CRPT);
}
......@@ -218,8 +226,11 @@ static rt_err_t nu_aes_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
uint32_t u32AESOpMode;
uint32_t u32AESKeySize;
unsigned char *in, *out;
unsigned char in_align_flag = 0;
unsigned char out_align_flag = 0;
unsigned char iv_temp[16];
if ((symmetric_info->length % 16) != 0)
if ((symmetric_info->length % 4) != 0)
{
return -RT_EINVAL;
}
......@@ -267,12 +278,8 @@ static rt_err_t nu_aes_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
in = (unsigned char *)symmetric_info->in;
out = (unsigned char *)symmetric_info->out;
#if !defined(NU_HWCRYPTO_NOT_ALIGN_CHECK)
unsigned char in_align_flag = 0;
unsigned char out_align_flag = 0;
//Checking in/out data buffer address alignment or not
if (((rt_uint32_t)in % 4) != 0)
//Checking in/out data buffer address not alignment or out of SRAM
if (((rt_uint32_t)in % 4) != 0 || ((rt_uint32_t)in < SRAM_BASE) || ((rt_uint32_t)in > SRAM_END))
{
in = rt_malloc(symmetric_info->length);
if (in == RT_NULL)
......@@ -281,11 +288,11 @@ static rt_err_t nu_aes_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
return -RT_ENOMEM;
}
memcpy(in, symmetric_info->in, symmetric_info->length);
rt_memcpy(in, symmetric_info->in, symmetric_info->length);
in_align_flag = 1;
}
if (((rt_uint32_t)out % 4) != 0)
if (((rt_uint32_t)out % 4) != 0 || ((rt_uint32_t)out < SRAM_BASE) || ((rt_uint32_t)out > SRAM_END))
{
out = rt_malloc(symmetric_info->length);
if (out == RT_NULL)
......@@ -298,14 +305,35 @@ static rt_err_t nu_aes_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
out_align_flag = 1;
}
#endif
if ((u32AESOpMode == AES_MODE_CBC) && (symmetric_info->mode == HWCRYPTO_MODE_DECRYPT))
{
uint32_t loop;
loop = (symmetric_info->length - 1) / 16;
rt_memcpy(iv_temp, in + (loop * 16), 16);
}
nu_aes_crypt_run(symmetric_info->mode == HWCRYPTO_MODE_ENCRYPT ? TRUE : FALSE, u32AESOpMode, symmetric_ctx->key, u32AESKeySize, symmetric_ctx->iv, in, out, symmetric_info->length);
#if !defined(NU_HWCRYPTO_NOT_ALIGN_CHECK)
if (u32AESOpMode == AES_MODE_CBC)
{
if (symmetric_info->mode == HWCRYPTO_MODE_DECRYPT)
{
rt_memcpy(symmetric_ctx->iv, iv_temp, 16);
}
else
{
uint32_t loop;
loop = (symmetric_info->length - 1) / 16;
rt_memcpy(symmetric_ctx->iv, out + (loop * 16), 16);
}
}
if (out_align_flag)
{
memcpy(symmetric_info->out, out, symmetric_info->length);
rt_memcpy(symmetric_info->out, out, symmetric_info->length);
rt_free(out);
}
......@@ -313,7 +341,6 @@ static rt_err_t nu_aes_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
{
rt_free(in);
}
#endif
return RT_EOK;
}
......@@ -371,6 +398,8 @@ static rt_err_t nu_des_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
uint32_t u32DESOpMode;
uint32_t u32DESKeySize;
unsigned char *in, *out;
unsigned char in_align_flag = 0;
unsigned char out_align_flag = 0;
if ((symmetric_info->length % 8) != 0)
{
......@@ -413,12 +442,8 @@ static rt_err_t nu_des_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
in = (unsigned char *)symmetric_info->in;
out = (unsigned char *)symmetric_info->out;
#if !defined(NU_HWCRYPTO_NOT_ALIGN_CHECK)
unsigned char in_align_flag = 0;
unsigned char out_align_flag = 0;
//Checking in/out data buffer address alignment or not
if (((rt_uint32_t)in % 4) != 0)
//Checking in/out data buffer address not alignment or out of SRAM
if (((rt_uint32_t)in % 4) != 0 || ((rt_uint32_t)in < SRAM_BASE) || ((rt_uint32_t)in > SRAM_END))
{
in = rt_malloc(symmetric_info->length);
if (in == RT_NULL)
......@@ -427,11 +452,11 @@ static rt_err_t nu_des_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
return -RT_ENOMEM;
}
memcpy(in, symmetric_info->in, symmetric_info->length);
rt_memcpy(in, symmetric_info->in, symmetric_info->length);
in_align_flag = 1;
}
if (((rt_uint32_t)out % 4) != 0)
if (((rt_uint32_t)out % 4) != 0 || ((rt_uint32_t)out < SRAM_BASE) || ((rt_uint32_t)out > SRAM_END))
{
out = rt_malloc(symmetric_info->length);
if (out == RT_NULL)
......@@ -444,14 +469,12 @@ static rt_err_t nu_des_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
out_align_flag = 1;
}
#endif
nu_des_crypt_run(symmetric_info->mode == HWCRYPTO_MODE_ENCRYPT ? TRUE : FALSE, u32DESOpMode, symmetric_ctx->key, u32DESKeySize, symmetric_ctx->iv, in, out, symmetric_info->length);
#if !defined(NU_HWCRYPTO_NOT_ALIGN_CHECK)
if (out_align_flag)
{
memcpy(symmetric_info->out, out, symmetric_info->length);
rt_memcpy(symmetric_info->out, out, symmetric_info->length);
rt_free(out);
}
......@@ -459,12 +482,53 @@ static rt_err_t nu_des_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
{
rt_free(in);
}
#endif
return RT_EOK;
}
#define CRPT_HMAC_CTL_DMAFIRST_Pos (4) /*!< CRPT_T::HMAC_CTL: DMAFIRST Position */
#define CRPT_HMAC_CTL_DMAFIRST_Msk (0x1ul << CRPT_HMAC_CTL_DMAFIRST_Pos) /*!< CRPT_T::HMAC_CTL: DMAFIRST Mask */
static void SHABlockUpdate(uint32_t u32OpMode, uint32_t u32SrcAddr, uint32_t u32Len, uint32_t u32Mode)
{
SHA_Open(CRPT, u32OpMode, SHA_IN_OUT_SWAP, 0);
//Setup SHA DMA
SHA_SetDMATransfer(CRPT, u32SrcAddr, u32Len);
SHA_CLR_INT_FLAG(CRPT);
//Start SHA
s_SHA_done = 0;
if (u32Mode == CRYPTO_DMA_FIRST)
{
if ((SYS->CSERVER & SYS_CSERVER_VERSION_Msk) == 0x0)
{
//M480MD version
u32Mode = CRYPTO_DMA_CONTINUE;
}
else
{
//M480LD version
CRPT->HMAC_CTL |= CRPT_HMAC_CTL_DMAFIRST_Msk;
}
}
else
{
if ((SYS->CSERVER & SYS_CSERVER_VERSION_Msk) != 0x0)
{
//M480LD version
CRPT->HMAC_CTL &= ~CRPT_HMAC_CTL_DMAFIRST_Msk;
}
}
SHA_Start(CRPT, u32Mode);
while (!s_SHA_done) {};
}
static rt_err_t nu_sha_hash_run(
S_SHA_CONTEXT *psSHACtx,
uint32_t u32OpMode,
uint8_t *pu8InData,
uint32_t u32DataLen
......@@ -472,16 +536,82 @@ static rt_err_t nu_sha_hash_run(
{
rt_mutex_take(&s_SHA_mutex, RT_WAITING_FOREVER);
//Using SHA
SHA_Open(CRPT, u32OpMode, SHA_IN_OUT_SWAP, 0);
uint8_t *pu8SrcAddr = (uint8_t *)pu8InData;
uint32_t u32CopyLen = 0;
//Setup SHA DMA
SHA_SetDMATransfer(CRPT, (uint32_t)pu8InData, u32DataLen);
SHA_CLR_INT_FLAG(CRPT);
//Start SHA
s_SHA_done = 0;
SHA_Start(CRPT, CRYPTO_DMA_ONE_SHOT);
while (!s_SHA_done) {};
while ((psSHACtx->u32SHATempBufLen + u32DataLen) > psSHACtx->u32BlockSize)
{
if (psSHACtx->pu8SHATempBuf)
{
if (psSHACtx->u32SHATempBufLen == psSHACtx->u32BlockSize)
{
//Trigger SHA block update
SHABlockUpdate(u32OpMode, (uint32_t)psSHACtx->pu8SHATempBuf, psSHACtx->u32BlockSize, psSHACtx->u32DMAMode);
psSHACtx->u32DMAMode = CRYPTO_DMA_CONTINUE;
//free SHATempBuff
rt_free(psSHACtx->pu8SHATempBuf);
psSHACtx->pu8SHATempBuf = NULL;
psSHACtx->u32SHATempBufLen = 0;
continue;
}
else
{
u32CopyLen = psSHACtx->u32BlockSize - psSHACtx->u32SHATempBufLen;
if (u32DataLen < u32CopyLen)
u32CopyLen = u32DataLen;
rt_memcpy(psSHACtx->pu8SHATempBuf + psSHACtx->u32SHATempBufLen, pu8SrcAddr, u32CopyLen);
psSHACtx->u32SHATempBufLen += u32CopyLen;
pu8SrcAddr += u32CopyLen;
u32DataLen -= u32CopyLen;
continue;
}
}
if ((uint32_t) pu8SrcAddr & 3) //address not aligned 4
{
psSHACtx->pu8SHATempBuf = rt_malloc(psSHACtx->u32BlockSize);
if (psSHACtx->pu8SHATempBuf == RT_NULL)
{
LOG_E("fun[%s] memory allocate %d bytes failed!", __FUNCTION__, psSHACtx->u32BlockSize);
rt_mutex_release(&s_SHA_mutex);
return -RT_ENOMEM;
}
rt_memcpy(psSHACtx->pu8SHATempBuf, pu8SrcAddr, psSHACtx->u32BlockSize);
psSHACtx->u32SHATempBufLen = psSHACtx->u32BlockSize;
pu8SrcAddr += psSHACtx->u32BlockSize;
u32DataLen -= psSHACtx->u32BlockSize;
continue;
}
//Trigger SHA block update
SHABlockUpdate(u32OpMode, (uint32_t)pu8SrcAddr, psSHACtx->u32BlockSize, psSHACtx->u32DMAMode);
psSHACtx->u32DMAMode = CRYPTO_DMA_CONTINUE;
pu8SrcAddr += psSHACtx->u32BlockSize;
u32DataLen -= psSHACtx->u32BlockSize;
}
if (u32DataLen)
{
if (psSHACtx->pu8SHATempBuf == NULL)
{
psSHACtx->pu8SHATempBuf = rt_malloc(psSHACtx->u32BlockSize);
if (psSHACtx->pu8SHATempBuf == RT_NULL)
{
LOG_E("fun[%s] memory allocate %d bytes failed!", __FUNCTION__, psSHACtx->u32BlockSize);
rt_mutex_release(&s_SHA_mutex);
return -RT_ENOMEM;
}
psSHACtx->u32SHATempBufLen = 0;
}
rt_memcpy(psSHACtx->pu8SHATempBuf, pu8SrcAddr, u32DataLen);
psSHACtx->u32SHATempBufLen += u32DataLen;
}
rt_mutex_release(&s_SHA_mutex);
......@@ -492,6 +622,7 @@ static rt_err_t nu_sha_update(struct hwcrypto_hash *hash_ctx, const rt_uint8_t *
{
uint32_t u32SHAOpMode;
unsigned char *nu_in;
unsigned char in_align_flag = 0;
//Select SHA operation mode
switch (hash_ctx->parent.type & (HWCRYPTO_MAIN_TYPE_MASK | HWCRYPTO_SUB_TYPE_MASK))
......@@ -517,11 +648,8 @@ static rt_err_t nu_sha_update(struct hwcrypto_hash *hash_ctx, const rt_uint8_t *
nu_in = (unsigned char *)in;
#if !defined(NU_HWCRYPTO_NOT_ALIGN_CHECK)
unsigned char in_align_flag = 0;
//Checking in data buffer address alignment or not
if (((rt_uint32_t)nu_in % 4) != 0)
//Checking in data buffer address not alignment or out of SRAM
if (((rt_uint32_t)nu_in % 4) != 0 || ((rt_uint32_t)nu_in < SRAM_BASE) || ((rt_uint32_t)nu_in > SRAM_END))
{
nu_in = rt_malloc(length);
if (nu_in == RT_NULL)
......@@ -530,19 +658,16 @@ static rt_err_t nu_sha_update(struct hwcrypto_hash *hash_ctx, const rt_uint8_t *
return -RT_ENOMEM;
}
memcpy(nu_in, in, length);
rt_memcpy(nu_in, in, length);
in_align_flag = 1;
}
#endif
nu_sha_hash_run(u32SHAOpMode, nu_in, length);
nu_sha_hash_run(hash_ctx->parent.contex, u32SHAOpMode, nu_in, length);
#if !defined(NU_HWCRYPTO_NOT_ALIGN_CHECK)
if (in_align_flag)
{
rt_free(nu_in);
}
#endif
return RT_EOK;
}
......@@ -550,35 +675,43 @@ static rt_err_t nu_sha_update(struct hwcrypto_hash *hash_ctx, const rt_uint8_t *
static rt_err_t nu_sha_finish(struct hwcrypto_hash *hash_ctx, rt_uint8_t *out, rt_size_t length)
{
unsigned char *nu_out;
unsigned char out_align_flag = 0;
uint32_t u32SHAOpMode;
S_SHA_CONTEXT *psSHACtx = hash_ctx->parent.contex;
//Check SHA Hash value buffer length
switch (hash_ctx->parent.type & (HWCRYPTO_MAIN_TYPE_MASK | HWCRYPTO_SUB_TYPE_MASK))
{
case HWCRYPTO_TYPE_SHA1:
u32SHAOpMode = SHA_MODE_SHA1;
if (length < 5UL)
{
return -RT_EINVAL;
}
break;
case HWCRYPTO_TYPE_SHA224:
u32SHAOpMode = SHA_MODE_SHA224;
if (length < 7UL)
{
return -RT_EINVAL;
}
break;
case HWCRYPTO_TYPE_SHA256:
u32SHAOpMode = SHA_MODE_SHA256;
if (length < 8UL)
{
return -RT_EINVAL;
}
break;
case HWCRYPTO_TYPE_SHA384:
u32SHAOpMode = SHA_MODE_SHA384;
if (length < 12UL)
{
return -RT_EINVAL;
}
break;
case HWCRYPTO_TYPE_SHA512:
u32SHAOpMode = SHA_MODE_SHA512;
if (length < 16UL)
{
return -RT_EINVAL;
......@@ -590,9 +723,6 @@ static rt_err_t nu_sha_finish(struct hwcrypto_hash *hash_ctx, rt_uint8_t *out, r
nu_out = (unsigned char *)out;
#if !defined(NU_HWCRYPTO_NOT_ALIGN_CHECK)
unsigned char out_align_flag = 0;
//Checking out data buffer address alignment or not
if (((rt_uint32_t)nu_out % 4) != 0)
{
......@@ -605,17 +735,31 @@ static rt_err_t nu_sha_finish(struct hwcrypto_hash *hash_ctx, rt_uint8_t *out, r
out_align_flag = 1;
}
#endif
if (psSHACtx->pu8SHATempBuf)
{
if (psSHACtx->u32DMAMode == CRYPTO_DMA_FIRST)
SHABlockUpdate(u32SHAOpMode, (uint32_t)psSHACtx->pu8SHATempBuf, psSHACtx->u32SHATempBufLen, CRYPTO_DMA_ONE_SHOT);
else
SHABlockUpdate(u32SHAOpMode, (uint32_t)psSHACtx->pu8SHATempBuf, psSHACtx->u32SHATempBufLen, CRYPTO_DMA_LAST);
//free SHATempBuf
rt_free(psSHACtx->pu8SHATempBuf);
psSHACtx->pu8SHATempBuf = RT_NULL;
psSHACtx->u32SHATempBufLen = 0;
}
else
{
SHABlockUpdate(u32SHAOpMode, (uint32_t)NULL, 0, CRYPTO_DMA_LAST);
}
SHA_Read(CRPT, (uint32_t *)nu_out);
#if !defined(NU_HWCRYPTO_NOT_ALIGN_CHECK)
if (out_align_flag)
{
memcpy(out, out, length);
rt_free(out);
rt_memcpy(out, nu_out, length);
rt_free(nu_out);
}
#endif
return RT_EOK;
}
......@@ -728,7 +872,12 @@ static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx)
case HWCRYPTO_TYPE_SHA1:
{
ctx->contex = RT_NULL;
ctx->contex = rt_malloc(sizeof(S_SHA_CONTEXT));
if (ctx->contex == RT_NULL)
return -RT_ERROR;
rt_memset(ctx->contex, 0, sizeof(S_SHA_CONTEXT));
//Setup SHA1 operation
((struct hwcrypto_hash *)ctx)->ops = &nu_sha_ops;
break;
......@@ -736,7 +885,12 @@ static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx)
case HWCRYPTO_TYPE_SHA2:
{
ctx->contex = RT_NULL;
ctx->contex = rt_malloc(sizeof(S_SHA_CONTEXT));
if (ctx->contex == RT_NULL)
return -RT_ERROR;
rt_memset(ctx->contex, 0, sizeof(S_SHA_CONTEXT));
//Setup SHA2 operation
((struct hwcrypto_hash *)ctx)->ops = &nu_sha_ops;
break;
......@@ -758,7 +912,6 @@ static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx)
#endif /* BSP_USING_CRYPTO */
default:
res = -RT_ERROR;
break;
......@@ -801,6 +954,32 @@ static void nu_hwcrypto_reset(struct rt_hwcrypto_ctx *ctx)
break;
}
#endif /* !BSP_USING_TRNG */
#if defined(BSP_USING_CRYPTO)
case HWCRYPTO_TYPE_SHA1:
case HWCRYPTO_TYPE_SHA2:
{
S_SHA_CONTEXT *psSHACtx = (S_SHA_CONTEXT *)ctx->contex;
if (psSHACtx->pu8SHATempBuf)
{
rt_free(psSHACtx->pu8SHATempBuf);
}
psSHACtx->pu8SHATempBuf = RT_NULL;
psSHACtx->u32SHATempBufLen = 0;
psSHACtx->u32DMAMode = CRYPTO_DMA_FIRST;
if ((ctx->type == HWCRYPTO_TYPE_SHA384) || (ctx->type == HWCRYPTO_TYPE_SHA512))
{
psSHACtx->u32BlockSize = 128;
}
else
{
psSHACtx->u32BlockSize = 64;
}
break;
}
#endif
default:
break;
......
bsp/nuvoton/libraries/m480/rtt_port/drv_ecap.c
浏览文件 @ 8d90cfad
......@@ -12,6 +12,7 @@
#include <rtconfig.h>
#if defined(BSP_USING_ECAP)
#if ((BSP_USING_ECAP0_CHMSK+BSP_USING_ECAP1_CHMSK)!=0)
#include <rtdevice.h>
#include <NuMicro.h>
......@@ -262,7 +263,7 @@ static rt_err_t nu_capture_get_pulsewidth(struct rt_inputcapture_device *inputca
else /* Overrun case */
fTempCnt = nu_capture->u32CurrentCnt + ((0x1000000 - nu_capture->u32LastCnt) + 1);
*pulsewidth_us =(int)(fTempCnt * nu_capture->ecap_dev->fUsPerTick);
*pulsewidth_us = (int)(fTempCnt * nu_capture->ecap_dev->fUsPerTick);
nu_capture->u32LastCnt = nu_capture->u32CurrentCnt;
......@@ -430,7 +431,7 @@ static int nu_ecap_capture_device_init(void)
#if (BSP_USING_ECAP0_CHMSK!=0)
if (BSP_USING_ECAP0_CHMSK & (0x1 << i))
{
nu_ecap0_capture[i] = (nu_capture_t*)rt_malloc(sizeof(nu_capture_t));
nu_ecap0_capture[i] = (nu_capture_t *)rt_malloc(sizeof(nu_capture_t));
ecap_init(nu_ecap0_capture[i], i, &nu_ecap0_dev, nu_ecap0_device_name[i]);
}
#endif //#if (BSP_USING_ECAP0_CHMSK!=0)
......@@ -438,7 +439,7 @@ static int nu_ecap_capture_device_init(void)
#if (BSP_USING_ECAP1_CHMSK!=0)
if (BSP_USING_ECAP1_CHMSK & (0x1 << i))
{
nu_ecap1_capture[i] = (nu_capture_t*)rt_malloc(sizeof(nu_capture_t));
nu_ecap1_capture[i] = (nu_capture_t *)rt_malloc(sizeof(nu_capture_t));
ecap_init(nu_ecap1_capture[i], i, &nu_ecap1_dev, nu_ecap1_device_name[i]);
}
#endif //#if (BSP_USING_ECAP1_CHMSK!=0)
......@@ -447,5 +448,5 @@ static int nu_ecap_capture_device_init(void)
return 0;
}
INIT_DEVICE_EXPORT(nu_ecap_capture_device_init);
#endif //#if ((BSP_USING_ECAP0_CHMSK+BSP_USING_ECAP1_CHMSK)!=0)
#endif //#if defined(BSP_USING_ECAP)
bsp/nuvoton/libraries/m480/rtt_port/drv_epwm_capture.c
浏览文件 @ 8d90cfad
......@@ -12,6 +12,7 @@
#include <rtconfig.h>
#if defined(BSP_USING_EPWM_CAPTURE)
#if ((BSP_USING_EPWM0_CAPTURE_CHMSK+BSP_USING_EPWM1_CAPTURE_CHMSK)!=0)
#include <rtdevice.h>
#include <NuMicro.h>
......@@ -73,7 +74,7 @@ static rt_err_t CalPulseWidth(nu_capture_t *nu_capture)
bWrapAroundFlag = RT_TRUE;
}
/* Read the capture counter value if falling/risning edge */
/* Read the capture counter value if falling/rising edge */
if (EPWM_GetCaptureIntFlag(nu_capture->epwm, nu_capture->u8Channel) == 1)//Rising edge
{
EPWM_ClearCaptureIntFlag(nu_capture->epwm, nu_capture->u8Channel, EPWM_CAPTURE_INT_RISING_LATCH);
......@@ -294,7 +295,7 @@ void EPWM1P1_IRQHandler(void)
void EPWM1P2_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter()
rt_interrupt_enter();
/* Avoid excessive iteration by monitoring enabled channels */
#if (BSP_USING_EPWM1_CAPTURE_CHMSK&(0x1<<EPWM_CH4CH5_POS))
......@@ -366,7 +367,7 @@ static rt_err_t nu_epwm_init(nu_capture_t *nu_capture)
/* Enable EPWM0 clock */
SYS_UnlockReg();
CLK_EnableModuleClock(EPWM0_MODULE);
CLK_SetModuleClock(EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PLL, (uint32_t)NULL);
CLK_SetModuleClock(EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PLL, 0);
SYS_LockReg();
bEPWM0Inited = RT_TRUE;
}
......@@ -379,7 +380,7 @@ static rt_err_t nu_epwm_init(nu_capture_t *nu_capture)
/* Enable EPWM1 clock */
SYS_UnlockReg();
CLK_EnableModuleClock(EPWM1_MODULE);
CLK_SetModuleClock(EPWM1_MODULE, CLK_CLKSEL2_EPWM1SEL_PLL, (uint32_t)NULL);
CLK_SetModuleClock(EPWM1_MODULE, CLK_CLKSEL2_EPWM1SEL_PLL, 0);
SYS_LockReg();
bEPWM1Inited = RT_TRUE;
}
......@@ -416,7 +417,7 @@ static rt_err_t nu_capture_open(struct rt_inputcapture_device *inputcapture)
nu_capture = (nu_capture_t *) inputcapture;
/* Set capture time as 1000 nano second */
/* Set capture time as 1000 nanosecond */
EPWM_ConfigCaptureChannel(nu_capture->epwm, nu_capture->u8Channel, 1000, 0);
/* Enable capture rising/falling edge interrupt */
......@@ -500,10 +501,10 @@ int nu_epwm_capture_device_init(void)
rt_device_inputcapture_register(&nu_epwm1_capture[i].parent, nu_epwm1_device_name[i], &nu_epwm1_capture[i]);
}
}
#endif //#if (BSP_USING_EPWM1_CAPTURE_CHMSK!=0)
#endif //#if (BSP_USING_EPWM1_CAPTURE_CHMSK!=0)
return 0;
}
INIT_DEVICE_EXPORT(nu_epwm_capture_device_init);
#endif //#if ((BSP_USING_EPWM0_CAPTURE_CHMSK+BSP_USING_EPWM1_CAPTURE_CHMSK)!=0)
#endif //#if defined(BSP_USING_EPWM_CAPTURE)
bsp/nuvoton/libraries/m480/rtt_port/drv_fmc.c
浏览文件 @ 8d90cfad
......@@ -159,7 +159,7 @@ int nu_fmc_erase(long addr, size_t size)
uint32_t addr_end = addr + size;
#if defined(NU_SUPPORT_NONALIGN)
uint8_t *page_sdtemp = RT_NULL;
uint8_t *page_sdtemp = RT_NULL;
uint8_t *page_edtemp = RT_NULL;
......@@ -316,6 +316,11 @@ static int nu_fmc_init(void)
g_mutex_fmc = rt_mutex_create("nu_fmc_lock", RT_IPC_FLAG_FIFO);
/* PKG_USING_FAL */
#if defined(PKG_USING_FAL)
fal_init();
#endif
return (int)RT_EOK;
}
INIT_APP_EXPORT(nu_fmc_init);
......
bsp/nuvoton/libraries/m480/rtt_port/drv_gpio.c
浏览文件 @ 8d90cfad
......@@ -19,6 +19,7 @@
#include <NuMicro.h>
#include <nu_bitutil.h>
#include <drv_gpio.h>
#include <stdlib.h>
/* Private define ---------------------------------------------------------------*/
......@@ -34,6 +35,7 @@ static int nu_gpio_read(struct rt_device *device, rt_base_t pin);
static rt_err_t nu_gpio_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint32_t mode, void (*hdr)(void *args), void *args);
static rt_err_t nu_gpio_detach_irq(struct rt_device *device, rt_int32_t pin);
static rt_err_t nu_gpio_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled);
static rt_base_t nu_gpio_pin_get(const char *name);
/* Private variables ------------------------------------------------------------*/
static struct rt_pin_irq_hdr pin_irq_hdr_tab[IRQ_MAX_NUM];
......@@ -45,7 +47,7 @@ static struct rt_pin_ops nu_gpio_ops =
nu_gpio_attach_irq,
nu_gpio_detach_irq,
nu_gpio_irq_enable,
RT_NULL,
nu_gpio_pin_get,
};
static IRQn_Type au32GPIRQ[NU_PORT_CNT] = {GPA_IRQn, GPB_IRQn, GPC_IRQn, GPD_IRQn, GPE_IRQn, GPF_IRQn, GPG_IRQn, GPH_IRQn};
......@@ -102,6 +104,31 @@ static void pin_irq_hdr(rt_uint32_t irq_status, rt_uint32_t port_index)
}
}
static rt_base_t nu_gpio_pin_get(const char *name)
{
/* Get pin number by name,such as PA.0, PF12 */
if ((name[2] == '\0') || ((name[2] == '.') && (name[3] == '\0')))
return -(RT_EINVAL);
long number;
if ((name[2] == '.'))
number = atol(&name[3]);
else
number = atol(&name[2]);
if (number > 15)
return -(RT_EINVAL);
if (name[1] >= 'A' && name[1] <= 'H')
return ((name[1] - 'A') * 0x10) + number;
if (name[1] >= 'a' && name[1] <= 'h')
return ((name[1] - 'a') * 0x10) + number;
return -(RT_EINVAL);
}
static void nu_gpio_mode(struct rt_device *device, rt_base_t pin, rt_base_t mode)
{
GPIO_T *PORT;
......
bsp/nuvoton/libraries/m480/rtt_port/drv_i2c.c
浏览文件 @ 8d90cfad
......@@ -202,9 +202,9 @@ static rt_err_t nu_i2c_send_address(nu_i2c_bus_t *nu_i2c,
if (ret != RT_EOK) /* for timeout condition */
return -RT_EIO;
if ( (I2C_GET_STATUS(nu_i2c->I2C)
!= ((flags & RT_I2C_RD) ? u32I2C_MASTER_STATUS_RECEIVE_ADDRESS_ACK : u32I2C_MASTER_STATUS_TRANSMIT_ADDRESS_ACK))
&& !ignore_nack)
if ((I2C_GET_STATUS(nu_i2c->I2C)
!= ((flags & RT_I2C_RD) ? u32I2C_MASTER_STATUS_RECEIVE_ADDRESS_ACK : u32I2C_MASTER_STATUS_TRANSMIT_ADDRESS_ACK))
&& !ignore_nack)
{
LOG_E("sending address failed\n");
return -RT_EIO;
......
bsp/nuvoton/libraries/m480/rtt_port/drv_pdma.c
浏览文件 @ 8d90cfad
......@@ -54,7 +54,6 @@ struct nu_pdma_memfun_actor
{
int m_i32ChannID;
uint32_t m_u32Result;
uint32_t m_u32TrigTransferCnt;
rt_sem_t m_psSemMemFun;
} ;
typedef struct nu_pdma_memfun_actor *nu_pdma_memfun_actor_t;
......@@ -553,6 +552,8 @@ rt_err_t nu_pdma_desc_setup(int i32ChannID, nu_pdma_desc_t dma_desc, uint32_t u3
goto exit_nu_pdma_desc_setup;
else if ((u32AddrSrc % (u32DataWidth / 8)) || (u32AddrDst % (u32DataWidth / 8)))
goto exit_nu_pdma_desc_setup;
else if ( i32TransferCnt > NU_PDMA_MAX_TXCNT )
goto exit_nu_pdma_desc_setup;
psPeriphCtl = &nu_pdma_chn_arr[i32ChannID - NU_PDMA_CH_Pos].m_spPeripCtl;
......@@ -701,9 +702,10 @@ static rt_err_t nu_pdma_sgtbls_valid(nu_pdma_desc_t head)
node = (nu_pdma_desc_t)(node->NEXT + PDMA->SCATBA);
} while (((uint32_t)node != PDMA->SCATBA) && (node != head));
}
while (((uint32_t)node != PDMA->SCATBA) && (node != head));
return RT_EOK;
return RT_EOK;
}
static void _nu_pdma_transfer(int i32ChannID, uint32_t u32Peripheral, nu_pdma_desc_t head, uint32_t u32IdleTimeout_us)
......@@ -718,7 +720,7 @@ static void _nu_pdma_transfer(int i32ChannID, uint32_t u32Peripheral, nu_pdma_de
PDMA_SetTransferMode(PDMA,
i32ChannID,
u32Peripheral,
(head != NULL) ? 1 : 0,
(head->NEXT != 0) ? 1 : 0,
(uint32_t)head);
/* If peripheral is M2M, trigger it. */
......@@ -747,7 +749,7 @@ rt_err_t nu_pdma_transfer(int i32ChannID, uint32_t u32DataWidth, uint32_t u32Add
if (ret != RT_EOK)
goto exit_nu_pdma_transfer;
_nu_pdma_transfer(i32ChannID, psPeriphCtl->m_u32Peripheral, NULL, u32IdleTimeout_us);
_nu_pdma_transfer(i32ChannID, psPeriphCtl->m_u32Peripheral, &PDMA->DSCT[i32ChannID], u32IdleTimeout_us);
ret = RT_EOK;
......@@ -765,7 +767,7 @@ rt_err_t nu_pdma_sg_transfer(int i32ChannID, nu_pdma_desc_t head, uint32_t u32Id
goto exit_nu_pdma_sg_transfer;
else if (!(nu_pdma_chn_mask & (1 << i32ChannID)))
goto exit_nu_pdma_sg_transfer;
else if ( (ret=nu_pdma_sgtbls_valid(head)) != RT_EOK ) /* Check SG-tbls. */
else if ((ret = nu_pdma_sgtbls_valid(head)) != RT_EOK) /* Check SG-tbls. */
goto exit_nu_pdma_sg_transfer;
psPeriphCtl = &nu_pdma_chn_arr[i32ChannID - NU_PDMA_CH_Pos].m_spPeripCtl;
......@@ -912,11 +914,14 @@ static int nu_pdma_memfun_employ(void)
return idx;
}
static rt_size_t nu_pdma_memfun(void *dest, void *src, uint32_t u32DataWidth, unsigned int count, nu_pdma_memctrl_t eMemCtl)
static rt_size_t nu_pdma_memfun(void *dest, void *src, uint32_t u32DataWidth, unsigned int u32TransferCnt, nu_pdma_memctrl_t eMemCtl)
{
nu_pdma_memfun_actor_t psMemFunActor = NULL;
int idx;
rt_size_t ret = 0;
rt_uint32_t u32Offset = 0;
rt_uint32_t u32TxCnt = 0;
while (1)
{
/* Employ actor */
......@@ -925,37 +930,51 @@ static rt_size_t nu_pdma_memfun(void *dest, void *src, uint32_t u32DataWidth, un
psMemFunActor = &nu_pdma_memfun_actor_arr[idx];
psMemFunActor->m_u32TrigTransferCnt = count;
do
{
/* Set PDMA memory control to eMemCtl. */
nu_pdma_channel_memctrl_set(psMemFunActor->m_i32ChannID, eMemCtl);
u32TxCnt = (u32TransferCnt > NU_PDMA_MAX_TXCNT) ? NU_PDMA_MAX_TXCNT : u32TransferCnt;
/* Register ISR callback function */
nu_pdma_callback_register(psMemFunActor->m_i32ChannID, nu_pdma_memfun_cb, (void *)psMemFunActor, NU_PDMA_EVENT_ABORT | NU_PDMA_EVENT_TRANSFER_DONE);
/* Set PDMA memory control to eMemCtl. */
nu_pdma_channel_memctrl_set(psMemFunActor->m_i32ChannID, eMemCtl);
psMemFunActor->m_u32Result = 0;
/* Register ISR callback function */
nu_pdma_callback_register(psMemFunActor->m_i32ChannID, nu_pdma_memfun_cb, (void *)psMemFunActor, NU_PDMA_EVENT_ABORT | NU_PDMA_EVENT_TRANSFER_DONE);
/* Trigger it */
nu_pdma_transfer(psMemFunActor->m_i32ChannID, u32DataWidth, (uint32_t)src, (uint32_t)dest, count, 0);
psMemFunActor->m_u32Result = 0;
/* Wait it done. */
rt_sem_take(psMemFunActor->m_psSemMemFun, RT_WAITING_FOREVER);
/* Trigger it */
nu_pdma_transfer(psMemFunActor->m_i32ChannID,
u32DataWidth,
(eMemCtl & 0x2ul) ? (uint32_t)src + u32Offset : (uint32_t)src, /* Src address is Inc or not. */
(eMemCtl & 0x1ul) ? (uint32_t)dest + u32Offset : (uint32_t)dest, /* Dst address is Inc or not. */
u32TxCnt,
0);
/* Give result if get NU_PDMA_EVENT_TRANSFER_DONE.*/
if (psMemFunActor->m_u32Result & NU_PDMA_EVENT_TRANSFER_DONE)
{
ret = psMemFunActor->m_u32TrigTransferCnt;
}
else
{
ret = psMemFunActor->m_u32TrigTransferCnt - nu_pdma_non_transfer_count_get(psMemFunActor->m_i32ChannID);
}
/* Wait it done. */
rt_sem_take(psMemFunActor->m_psSemMemFun, RT_WAITING_FOREVER);
/* Terminate it if get ABORT event */
if (psMemFunActor->m_u32Result & NU_PDMA_EVENT_ABORT)
{
nu_pdma_channel_terminate(psMemFunActor->m_i32ChannID);
/* Give result if get NU_PDMA_EVENT_TRANSFER_DONE.*/
if (psMemFunActor->m_u32Result & NU_PDMA_EVENT_TRANSFER_DONE)
{
ret += u32TxCnt;
}
else
{
ret += (u32TxCnt - nu_pdma_non_transfer_count_get(psMemFunActor->m_i32ChannID));
}
/* Terminate it if get ABORT event */
if (psMemFunActor->m_u32Result & NU_PDMA_EVENT_ABORT)
{
nu_pdma_channel_terminate(psMemFunActor->m_i32ChannID);
break;
}
u32TransferCnt -= u32TxCnt;
u32Offset += u32TxCnt;
}
while (u32TransferCnt > 0);
rt_mutex_take(nu_pdma_memfun_actor_pool_lock, RT_WAITING_FOREVER);
nu_pdma_memfun_actor_mask &= ~(1 << idx);
......@@ -979,10 +998,34 @@ rt_size_t nu_pdma_mempush(void *dest, void *src, uint32_t data_width, unsigned i
void *nu_pdma_memcpy(void *dest, void *src, unsigned int count)
{
if (count == nu_pdma_memfun(dest, src, 8, count, eMemCtl_SrcInc_DstInc))
int i = 0;
uint32_t u32Offset = 0;
uint32_t u32Remaining = count;
for (i = 4; (i > 0) && (u32Remaining > 0) ; i >>= 1)
{
uint32_t u32src = (uint32_t)src + u32Offset;
uint32_t u32dest = (uint32_t)dest + u32Offset;
if (((u32src % i) == (u32dest % i)) &&
((u32src % i) == 0) &&
(RT_ALIGN_DOWN(u32Remaining, i) >= i))
{
uint32_t u32TXCnt = u32Remaining / i;
if (u32TXCnt != nu_pdma_memfun((void *)u32dest, (void *)u32src, i * 8, u32TXCnt, eMemCtl_SrcInc_DstInc))
goto exit_nu_pdma_memcpy;
u32Offset += (u32TXCnt * i);
u32Remaining -= (u32TXCnt * i);
}
}
if (count == u32Offset)
return dest;
else
return NULL;
exit_nu_pdma_memcpy:
return NULL;
}
/**
......
bsp/nuvoton/libraries/m480/rtt_port/drv_pdma.h
浏览文件 @ 8d90cfad
......@@ -31,6 +31,7 @@
#define NU_PDMA_UNUSED (-1)
#define NU_PDMA_SG_LIMITED_DISTANCE ((PDMA_DSCT_NEXT_NEXT_Msk>>PDMA_DSCT_NEXT_NEXT_Pos)+1)
#define NU_PDMA_MAX_TXCNT ((PDMA_DSCT_CTL_TXCNT_Msk>>PDMA_DSCT_CTL_TXCNT_Pos) + 1)
typedef enum
{
......
bsp/nuvoton/libraries/m480/rtt_port/drv_rtc.c
浏览文件 @ 8d90cfad
......@@ -52,21 +52,21 @@
static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args);
#if defined (NU_RTC_SUPPORT_IO_RW)
static rt_size_t nu_rtc_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size);
static rt_size_t nu_rtc_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size);
static rt_size_t nu_rtc_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size);
static rt_size_t nu_rtc_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size);
#endif
static rt_err_t nu_rtc_is_date_valid(const time_t *const t);
static void nu_rtc_init(void);
#if defined(RT_USING_ALARM)
static void nu_rtc_alarm_reset(void);
static void nu_rtc_alarm_reset(void);
#endif
/* Public functions -------------------------------------------------------------*/
#if defined (NU_RTC_SUPPORT_MSH_CMD)
extern rt_err_t set_date(rt_uint32_t year, rt_uint32_t month, rt_uint32_t day);
extern rt_err_t set_time(rt_uint32_t hour, rt_uint32_t minute, rt_uint32_t second);
extern rt_err_t set_date(rt_uint32_t year, rt_uint32_t month, rt_uint32_t day);
extern rt_err_t set_time(rt_uint32_t hour, rt_uint32_t minute, rt_uint32_t second);
#endif
/* Private variables ------------------------------------------------------------*/
......
bsp/nuvoton/libraries/m480/rtt_port/drv_spi.c
浏览文件 @ 8d90cfad
......@@ -342,25 +342,38 @@ exit_nu_pdma_spi_tx_config:
static rt_size_t nu_spi_pdma_transmit(struct nu_spi *spi_bus, const uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word)
{
rt_err_t result = RT_EOK;
rt_uint32_t u32Offset = 0;
rt_uint32_t u32TransferCnt = length / bytes_per_word;
rt_uint32_t u32TxCnt = 0;
/* Get base address of spi register */
SPI_T *spi_base = spi_bus->spi_base;
result = nu_pdma_spi_rx_config(spi_bus, recv_addr, length, bytes_per_word);
RT_ASSERT(result == RT_EOK);
result = nu_pdma_spi_tx_config(spi_bus, send_addr, length, bytes_per_word);
RT_ASSERT(result == RT_EOK);
do
{
u32TxCnt = (u32TransferCnt > NU_PDMA_MAX_TXCNT) ? NU_PDMA_MAX_TXCNT : u32TransferCnt;
result = nu_pdma_spi_rx_config(spi_bus, (recv_addr == RT_NULL) ? recv_addr : &recv_addr[u32Offset], (u32TxCnt * bytes_per_word), bytes_per_word);
RT_ASSERT(result == RT_EOK);
/* Trigger TX/RX PDMA transfer. */
SPI_TRIGGER_TX_RX_PDMA(spi_base);
result = nu_pdma_spi_tx_config(spi_bus, (send_addr == RT_NULL) ? send_addr : &send_addr[u32Offset], (u32TxCnt * bytes_per_word), bytes_per_word);
RT_ASSERT(result == RT_EOK);
/* Wait RX-PDMA transfer done */
rt_sem_take(spi_bus->m_psSemBus, RT_WAITING_FOREVER);
/* Trigger TX/RX PDMA transfer. */
SPI_TRIGGER_TX_RX_PDMA(spi_base);
/* Stop TX/RX DMA transfer. */
SPI_DISABLE_TX_RX_PDMA(spi_base);
/* Wait RX-PDMA transfer done */
rt_sem_take(spi_bus->m_psSemBus, RT_WAITING_FOREVER);
return result;
/* Stop TX/RX DMA transfer. */
SPI_DISABLE_TX_RX_PDMA(spi_base);
u32TransferCnt -= u32TxCnt;
u32Offset += u32TxCnt;
}
while (u32TransferCnt > 0);
return length;
}
rt_err_t nu_hw_spi_pdma_allocate(struct nu_spi *spi_bus)
......
bsp/nuvoton/libraries/m480/rtt_port/drv_timer_capture.c
浏览文件 @ 8d90cfad
......@@ -13,6 +13,10 @@
#include <rtconfig.h>
#if defined(BSP_USING_TIMER_CAPTURE)
#if defined(BSP_USING_TIMER0_CAPTURE)|| \
defined(BSP_USING_TIMER1_CAPTURE)|| \
defined(BSP_USING_TIMER2_CAPTURE)|| \
defined(BSP_USING_TIMER3_CAPTURE)
#include <rtdevice.h>
#include <NuMicro.h>
......@@ -150,8 +154,6 @@ static rt_err_t nu_capture_get_pulsewidth(struct rt_inputcapture_device *inputca
static rt_err_t nu_timer_init(nu_capture_t *nu_capture)
{
rt_err_t ret = RT_ERROR;
SYS_UnlockReg();
#if defined(BSP_USING_TIMER0_CAPTURE)
......@@ -160,8 +162,6 @@ static rt_err_t nu_timer_init(nu_capture_t *nu_capture)
/* Enable TIMER0 clock */
CLK_EnableModuleClock(TMR0_MODULE);
CLK_SetModuleClock(TMR0_MODULE, CLK_CLKSEL1_TMR0SEL_PCLK0, 0);
ret = RT_EOK;
goto exit_nu_timer_init;
}
#endif
......@@ -171,8 +171,6 @@ static rt_err_t nu_timer_init(nu_capture_t *nu_capture)
/* Enable TIMER1 clock */
CLK_EnableModuleClock(TMR1_MODULE);
CLK_SetModuleClock(TMR1_MODULE, CLK_CLKSEL1_TMR1SEL_PCLK0, 0);
ret = RT_EOK;
goto exit_nu_timer_init;
}
#endif
......@@ -182,8 +180,6 @@ static rt_err_t nu_timer_init(nu_capture_t *nu_capture)
/* Enable TIMER2 clock */
CLK_EnableModuleClock(TMR2_MODULE);
CLK_SetModuleClock(TMR2_MODULE, CLK_CLKSEL1_TMR2SEL_PCLK1, 0);
ret = RT_EOK;
goto exit_nu_timer_init;
}
#endif
......@@ -193,12 +189,17 @@ static rt_err_t nu_timer_init(nu_capture_t *nu_capture)
/* Enable TIMER3 clock */
CLK_EnableModuleClock(TMR3_MODULE);
CLK_SetModuleClock(TMR3_MODULE, CLK_CLKSEL1_TMR3SEL_PCLK1, 0);
goto exit_nu_timer_init;
}
#endif
SYS_LockReg();
return -(RT_ERROR);
exit_nu_timer_init:
SYS_LockReg();
return -(ret);
return RT_EOK;
}
static rt_err_t nu_capture_init(struct rt_inputcapture_device *inputcapture)
......@@ -241,6 +242,9 @@ static rt_err_t nu_capture_open(struct rt_inputcapture_device *inputcapture)
/* Enable Timer NVIC */
NVIC_EnableIRQ(nu_capture->irq);
/* Reset counter before openning. */
TIMER_ResetCounter(nu_capture->timer);
TIMER_Open(nu_capture->timer, TIMER_CONTINUOUS_MODE, 1);
TIMER_SET_PRESCALE_VALUE(nu_capture->timer, cal_time_prescale(nu_capture));
TIMER_SET_CMP_VALUE(nu_capture->timer, 0xFFFFFF);
......@@ -318,5 +322,5 @@ static int nu_timer_capture_device_init(void)
return 0;
}
INIT_DEVICE_EXPORT(nu_timer_capture_device_init);
#endif //#if defined(BSP_USING_TIMER*_CAPTURE)
#endif //#if defined(BSP_USING_TIMER_CAPTURE)
bsp/nuvoton/libraries/m480/rtt_port/drv_trng.c
浏览文件 @ 8d90cfad
......@@ -15,8 +15,8 @@
#if (defined(BSP_USING_TRNG) && defined(RT_HWCRYPTO_USING_RNG))
#include <rtdevice.h>
#include <stdlib.h>
#include "NuMicro.h"
#include <stdlib.h>
#define NU_CRYPTO_TRNG_NAME "nu_TRNG"
......
bsp/nuvoton/libraries/m480/rtt_port/drv_trng.h
浏览文件 @ 8d90cfad
......@@ -18,4 +18,3 @@ void nu_trng_open(void);
rt_uint32_t nu_trng_rand(struct hwcrypto_rng *ctx);
#endif
bsp/nuvoton/libraries/m480/rtt_port/drv_uart.c
浏览文件 @ 8d90cfad
......@@ -546,7 +546,7 @@ static rt_err_t nu_pdma_uart_rx_config(struct rt_serial_device *serial, uint8_t
nu_pdma_uart_rx_cb,
(void *)serial,
NU_PDMA_EVENT_TRANSFER_DONE | NU_PDMA_EVENT_TIMEOUT);
if ( result != RT_EOK )
if (result != RT_EOK)
{
goto exit_nu_pdma_uart_rx_config;
}
......@@ -557,7 +557,7 @@ static rt_err_t nu_pdma_uart_rx_config(struct rt_serial_device *serial, uint8_t
(uint32_t)pu8Buf,
i32TriggerLen,
1000); //Idle-timeout, 1ms
if ( result != RT_EOK )
if (result != RT_EOK)
{
goto exit_nu_pdma_uart_rx_config;
}
......
bsp/nuvoton/libraries/m480/rtt_port/drv_usbd.c
浏览文件 @ 8d90cfad
......@@ -364,7 +364,7 @@ __STATIC_INLINE void _USBD_IRQHandler(void)
/* Clear event flag */
USBD_CLR_INT_FLAG(USBD_INTSTS_EP0);
if ( (USBD_GET_ADDR() == 0)
if ((USBD_GET_ADDR() == 0)
&& (nu_usbd.address_tmp)
)
{
......
bsp/nuvoton/libraries/m480/rtt_port/drv_usbhost.c
浏览文件 @ 8d90cfad
......@@ -22,6 +22,10 @@
#include "usb.h"
#include "usbh_lib.h"
#if !defined(NU_USBHOST_HUB_POLLING_INTERVAL)
#define NU_USBHOST_HUB_POLLING_INTERVAL (100)
#endif
#define NU_MAX_USBH_PORT 2 //USB1.1 + USB2.0 port
#define NU_MAX_USBH_PIPE 16
#define NU_USBH_THREAD_STACK_SIZE 2048
......@@ -51,6 +55,7 @@ typedef struct nu_port_ctrl
struct nu_usbh_dev
{
uhcd_t uhcd;
rt_thread_t polling_thread;
S_NU_RH_PORT_CTRL asPortCtrl[NU_MAX_USBH_PORT];
};
......@@ -290,7 +295,6 @@ static rt_err_t nu_open_pipe(upipe_t pipe)
static rt_err_t nu_close_pipe(upipe_t pipe)
{
int i;
S_NU_RH_PORT_CTRL *psPortCtrl;
S_NU_PORT_DEV *psPortDev;
......@@ -309,6 +313,7 @@ static rt_err_t nu_close_pipe(upipe_t pipe)
{
if (psPortDev->pUDev)
{
int i;
for (i = 0; i < NU_MAX_USBH_PIPE; i++)
{
if (psPortDev->apsEPInfo[i] != NULL)
......@@ -320,7 +325,6 @@ static rt_err_t nu_close_pipe(upipe_t pipe)
free_device(psPortDev->pUDev);
psPortDev->pUDev = NULL;
}
psPortDev->port_num = 0;
}
}
......@@ -615,8 +619,8 @@ static void nu_usbh_rh_thread_entry(void *parameter)
{
while (1)
{
usbh_pooling_root_hubs();
rt_thread_delay(10);
usbh_polling_root_hubs();
rt_thread_mdelay(NU_USBHOST_HUB_POLLING_INTERVAL);
}
}
......@@ -674,6 +678,8 @@ static void nu_hcd_disconnect_callback(
return;
}
port_index = i + 1;
for (i = 0; i < NU_MAX_USBH_PIPE; i++)
{
if (psPortCtrl->sRHPortDev.apsEPInfo[i] != NULL)
......@@ -682,10 +688,9 @@ static void nu_hcd_disconnect_callback(
}
}
port_index = i + 1;
psPortCtrl->sRHPortDev.pUDev = NULL;
RT_DEBUG_LOG(RT_DEBUG_USB, ("usb disconnnect\n"));
RT_DEBUG_LOG(RT_DEBUG_USB, ("usb disconnect\n"));
rt_usbh_root_hub_disconnect_handler(s_sUSBHDev.uhcd, port_index);
}
......@@ -701,22 +706,21 @@ static struct uhcd_ops nu_uhcd_ops =
static rt_err_t nu_hcd_init(rt_device_t device)
{
rt_thread_t thread;
struct nu_usbh_dev * pNuUSBHDev = (struct nu_usbh_dev *)device;
usbh_core_init();
//install connect/disconnect callback
usbh_install_conn_callback(nu_hcd_connect_callback, nu_hcd_disconnect_callback);
usbh_pooling_root_hubs();
usbh_polling_root_hubs();
//create thread for polling usbh port status
/* create usb hub thread */
thread = rt_thread_create("usbh_drv", nu_usbh_rh_thread_entry, RT_NULL,
pNuUSBHDev->polling_thread = rt_thread_create("usbh_drv", nu_usbh_rh_thread_entry, RT_NULL,
NU_USBH_THREAD_STACK_SIZE, 8, 20);
if (thread != RT_NULL)
if ( pNuUSBHDev->polling_thread != RT_NULL)
{
/* startup usb host thread */
rt_thread_startup(thread);
rt_thread_startup( pNuUSBHDev->polling_thread );
}
else
{
......@@ -742,6 +746,54 @@ uint32_t usbh_tick_from_millisecond(uint32_t msec)
return rt_tick_from_millisecond(msec);
}
#if defined(RT_USING_PM)
/* device pm suspend() entry. */
static int usbhost_pm_suspend(const struct rt_device *device, rt_uint8_t mode)
{
struct nu_usbh_dev * pNuUSBHDev = (struct nu_usbh_dev *)device;
RT_ASSERT(pNuUSBHDev!=RT_NULL);
switch (mode)
{
case PM_SLEEP_MODE_LIGHT:
case PM_SLEEP_MODE_DEEP:
pNuUSBHDev->polling_thread->stat = RT_THREAD_READY;
rt_thread_suspend(pNuUSBHDev->polling_thread);
break;
default:
break;
}
return (int)RT_EOK;
}
/* device pm resume() entry. */
static void usbhost_pm_resume(const struct rt_device *device, rt_uint8_t mode)
{
struct nu_usbh_dev * pNuUSBHDev = (struct nu_usbh_dev *)device;
RT_ASSERT(pNuUSBHDev!=RT_NULL);
switch (mode)
{
case PM_SLEEP_MODE_LIGHT:
case PM_SLEEP_MODE_DEEP:
rt_thread_resume(pNuUSBHDev->polling_thread);
break;
default:
break;
}
}
static struct rt_device_pm_ops device_pm_ops =
{
.suspend = usbhost_pm_suspend,
.resume = usbhost_pm_resume,
.frequency_change = RT_NULL
};
#endif
int nu_usbh_register(void)
{
......@@ -760,9 +812,6 @@ int nu_usbh_register(void)
#endif
#if defined(BSP_USING_USBH)
/* Enable USBD and OTG clock */
CLK_EnableModuleClock(USBD_MODULE);
CLK_EnableModuleClock(OTG_MODULE);
/* Set USB Host role */
SYS->USBPHY = (SYS->USBPHY & ~SYS_USBPHY_USBROLE_Msk) | (0x1u << SYS_USBPHY_USBROLE_Pos);
SYS->USBPHY |= SYS_USBPHY_USBEN_Msk | SYS_USBPHY_SBO_Msk ;
......@@ -775,11 +824,7 @@ int nu_usbh_register(void)
rt_memset(&s_sUSBHDev, 0x0, sizeof(struct nu_usbh_dev));
uhcd_t uhcd = (uhcd_t)rt_malloc(sizeof(struct uhcd));
if (uhcd == RT_NULL)
{
rt_kprintf("uhcd malloc failed\r\n");
return -RT_ERROR;
}
RT_ASSERT(res != RT_NULL);
rt_memset((void *)uhcd, 0, sizeof(struct uhcd));
......@@ -792,23 +837,18 @@ int nu_usbh_register(void)
s_sUSBHDev.uhcd = uhcd;
res = rt_device_register(&uhcd->parent, "usbh", RT_DEVICE_FLAG_DEACTIVATE);
if (res != RT_EOK)
{
rt_kprintf("register usb host failed res = %d\r\n", res);
return -RT_ERROR;
}
RT_ASSERT(res == RT_EOK);
/*initialize the usb host functin */
/*initialize the usb host function */
res = rt_usb_host_init();
RT_ASSERT(res == RT_EOK);
#if defined(RT_USING_PM)
rt_pm_device_register(&uhcd->parent, &device_pm_ops);
#endif
return RT_EOK;
}
INIT_DEVICE_EXPORT(nu_usbh_register);
#endif
bsp/nuvoton/libraries/m480/rtt_port/drv_uspi.c
浏览文件 @ 8d90cfad
......@@ -493,7 +493,7 @@ static void nu_uspi_transfer(struct nu_uspi *uspi_bus, uint8_t *tx, uint8_t *rx,
/* DMA transfer constrains */
if ((uspi_bus->pdma_chanid_rx >= 0) &&
!((uint32_t)tx % bytes_per_word) &&
!((uint32_t)rx % bytes_per_word) )
!((uint32_t)rx % bytes_per_word))
nu_uspi_pdma_transmit(uspi_bus, tx, rx, length, bytes_per_word);
else
nu_uspi_transmission_with_poll(uspi_bus, tx, rx, length, bytes_per_word);
......
bsp/nuvoton/libraries/m480/rtt_port/drv_wdt.c
浏览文件 @ 8d90cfad
......@@ -91,16 +91,17 @@ typedef volatile struct soft_time_handle soft_time_handle_t;
/* Private functions ------------------------------------------------------------*/
static rt_err_t wdt_init(rt_watchdog_t *dev);
static rt_err_t wdt_control(rt_watchdog_t *dev, int cmd, void *args);
static uint32_t wdt_get_module_clock(void);
static uint32_t wdt_get_working_hz(void);
static void soft_time_init(soft_time_handle_t *const soft_time);
static void soft_time_setup(uint32_t wanted_sec, uint32_t hz, soft_time_handle_t *const soft_time);
static void soft_time_feed_dog(soft_time_handle_t *const soft_time);
#if defined(RT_USING_PM)
static int wdt_pm_suspend(const struct rt_device *device, rt_uint8_t mode);
static void wdt_pm_resume(const struct rt_device *device, rt_uint8_t mode);
static int wdt_pm_frequency_change(const struct rt_device *device, rt_uint8_t mode);
static void soft_time_freqeucy_change(uint32_t new_hz, soft_time_handle_t *const soft_time);
static int wdt_pm_suspend(const struct rt_device *device, rt_uint8_t mode);
static void wdt_pm_resume(const struct rt_device *device, rt_uint8_t mode);
static int wdt_pm_frequency_change(const struct rt_device *device, rt_uint8_t mode);
static void soft_time_freqeucy_change(uint32_t new_hz, soft_time_handle_t *const soft_time);
#endif
/* Public functions -------------------------------------------------------------*/
......@@ -118,7 +119,6 @@ static struct rt_watchdog_ops ops_wdt =
static struct rt_device_pm_ops device_pm_ops =
{
.suspend = wdt_pm_suspend,
.resume = wdt_pm_resume,
.frequency_change = wdt_pm_frequency_change
......@@ -180,12 +180,6 @@ static void wdt_pm_resume(const struct rt_device *device, rt_uint8_t mode)
}
static uint32_t wdt_get_module_clock(void)
{
return (CLK_GetModuleClockSource(WDT_MODULE) << CLK_CLKSEL1_WDTSEL_Pos);
}
/* device pm frequency_change() entry. */
static int wdt_pm_frequency_change(const struct rt_device *device, rt_uint8_t mode)
{
......@@ -288,6 +282,12 @@ static rt_err_t wdt_init(rt_watchdog_t *dev)
}
static uint32_t wdt_get_module_clock(void)
{
return (CLK_GetModuleClockSource(WDT_MODULE) << CLK_CLKSEL1_WDTSEL_Pos);
}
static uint32_t wdt_get_working_hz(void)
{
uint32_t clk, hz = 0;
......@@ -408,6 +408,7 @@ static rt_err_t wdt_control(rt_watchdog_t *dev, int cmd, void *args)
case RT_DEVICE_CTRL_WDT_START:
WDT_RESET_COUNTER();
WDT_Open(MIN_TOUTSEL, WDT_RESET_DELAY_1026CLK, TRUE, TRUE);
WDT_EnableInt();
break;
......
bsp/nuvoton/libraries/nu_packages/Demo/SConscript
浏览文件 @ 8d90cfad
......@@ -5,6 +5,7 @@ group = []
if GetDepend('NU_PKG_USING_DEMO'):
src = Split("""
usbd_hid_dance_mouse.c
slcd_show_tick.c
""")
CPPPATH = [cwd]
group = DefineGroup('nu_pkgs_demo', src, depend = [''], CPPPATH = CPPPATH)
......
bsp/nuvoton/libraries/nu_packages/Demo/usbd_hid_dance_mouse.c
浏览文件 @ 8d90cfad
......@@ -23,13 +23,12 @@
static struct rt_thread usb_thread;
ALIGN(RT_ALIGN_SIZE)
static char usb_thread_stack[512];
static char usb_thread_stack[1024];
static struct rt_semaphore tx_sem_complete;
static rt_err_t event_hid_in(rt_device_t dev, void *buffer)
{
rt_sem_release(&tx_sem_complete);
return RT_EOK;
return rt_sem_release(&tx_sem_complete);
}
static void usb_thread_entry(void *parameter)
......@@ -38,6 +37,7 @@ static void usb_thread_entry(void *parameter)
uint8_t u8MouseIdx = 0;
uint8_t u8MoveLen=0, u8MouseMode = 1;
uint8_t pu8Buf[4];
rt_err_t result = RT_EOK;
rt_device_t device = (rt_device_t)parameter;
......@@ -78,7 +78,8 @@ static void usb_thread_entry(void *parameter)
else
{
/* Wait it done. */
rt_sem_take(&tx_sem_complete, RT_WAITING_FOREVER);
result = rt_sem_take(&tx_sem_complete, RT_WAITING_FOREVER);
RT_ASSERT( result== RT_EOK );
}
} // while(1)
......@@ -86,29 +87,27 @@ static void usb_thread_entry(void *parameter)
static int dance_mouse_init(void)
{
int err = 0;
rt_err_t ret = RT_EOK;
rt_device_t device = rt_device_find("hidd");
RT_ASSERT(device != RT_NULL);
err = rt_device_open(device, RT_DEVICE_FLAG_WRONLY);
ret = rt_device_open(device, RT_DEVICE_FLAG_WRONLY);
RT_ASSERT(ret == RT_EOK);
if (err != RT_EOK)
{
LOG_E("open dev failed!\n");
return -1;
}
rt_thread_init(&usb_thread,
ret = rt_thread_init(&usb_thread,
"hidd",
usb_thread_entry, device,
usb_thread_stack, sizeof(usb_thread_stack),
10, 20);
RT_ASSERT(ret == RT_EOK);
rt_thread_startup(&usb_thread);
ret = rt_thread_startup(&usb_thread);
RT_ASSERT(ret == RT_EOK);
return 0;
}
INIT_APP_EXPORT(dance_mouse_init);
#endif /* #if defined(RT_USB_DEVICE_HID) && (defined(BSP_USING_USBD) || defined(BSP_USING_HSUSBD)) */
bsp/nuvoton/libraries/nu_packages/ILI9341/ili9341_ebi.c
浏览文件 @ 8d90cfad
......@@ -42,6 +42,15 @@ void ili9341_send_pixel_data(rt_uint16_t color)
ili9341_write_data(color);
}
void ili9341_send_pixels(rt_uint16_t *pixels, int len)
{
int i = 0;
int size = len / sizeof(rt_uint16_t);
while (i < size)
ili9341_write_data(pixels[i]);
}
void ili9341_set_column(uint16_t StartCol, uint16_t EndCol)
{
ili9341_send_cmd(0x2A);
......
bsp/nuvoton/libraries/nu_packages/ILI9341/ili9341_spi.c
浏览文件 @ 8d90cfad
......@@ -54,9 +54,15 @@ static void ili9341_write_data_16bit(uint16_t data)
rt_spi_transfer(&ili9341_spi_device, (const void *)&data, NULL, 2);
}
void ili9341_send_pixel_data(rt_uint16_t color)
void ili9341_send_pixel_data(rt_uint16_t pixel)
{
ili9341_write_data_16bit(color);
ili9341_write_data_16bit(pixel);
}
void ili9341_send_pixels(rt_uint16_t *pixels, int len)
{
ili9341_change_datawidth(16);
rt_spi_transfer(&ili9341_spi_device, (const void *)pixels, NULL, len);
}
static rt_err_t ili9341_spi_send_then_recv(struct rt_spi_device *device,
......
bsp/nuvoton/libraries/nu_packages/ILI9341/lcd_ili9341.c
浏览文件 @ 8d90cfad
......@@ -17,6 +17,15 @@
#include <rtdevice.h>
#include <lcd_ili9341.h>
static struct rt_device_graphic_info g_Ili9341Info =
{
.bits_per_pixel = 16,
.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565,
.framebuffer = RT_NULL,
.width = XSIZE_PHYS,
.height = YSIZE_PHYS
};
static void ili9341_delay_ms(rt_uint32_t nms)
{
rt_thread_mdelay(nms);
......@@ -92,7 +101,11 @@ static rt_err_t ili9341_lcd_init(rt_device_t dev)
ili9341_send_cmd_parameter(0x86);
ili9341_send_cmd(0x36);
ili9341_send_cmd_parameter(0x48); // for 240x320
if (g_Ili9341Info.width == 240)
ili9341_send_cmd_parameter(0x48); // for 240x320
else
ili9341_send_cmd_parameter(0xE8); // for 320x240
ili9341_send_cmd(0x3A);
ili9341_send_cmd_parameter(0x55);
......@@ -157,14 +170,37 @@ static rt_err_t ili9341_lcd_init(rt_device_t dev)
return RT_EOK;
}
static void ili9341_fillscreen(uint16_t color)
#if defined(NU_PKG_ILI9341_WITH_OFFSCREEN_FRAMEBUFFER)
static void ili9341_fillrect(uint16_t *pixels, struct rt_device_rect_info *pRectInfo)
{
ili9341_set_column(pRectInfo->x, pRectInfo->x + pRectInfo->width);
ili9341_set_page(pRectInfo->y, pRectInfo->y + pRectInfo->height);
ili9341_send_cmd(0x2c);
ili9341_send_pixels(pixels, pRectInfo->height * pRectInfo->width * 2);
}
#endif
static void ili9341_fillscreen(rt_uint16_t color)
{
#if defined(NU_PKG_ILI9341_WITH_OFFSCREEN_FRAMEBUFFER)
struct rt_device_rect_info rectinfo = { 0, 0, XSIZE_PHYS, YSIZE_PHYS };
int pixel_count = XSIZE_PHYS * YSIZE_PHYS;
rt_uint16_t *pu16ShadowBuf = (rt_uint16_t *)g_Ili9341Info.framebuffer;
while (pixel_count--)
{
*pu16ShadowBuf++ = color;
}
ili9341_fillrect((uint16_t *)g_Ili9341Info.framebuffer, &rectinfo);
#else
ili9341_set_column(0, (XSIZE_PHYS - 1));
ili9341_set_page(0, (YSIZE_PHYS - 1));
ili9341_send_cmd(0x2c);
for (int i = 0; i < (XSIZE_PHYS * YSIZE_PHYS); i++)
ili9341_send_pixel_data(color);
#endif
}
static void ili9341_lcd_set_pixel(const char *color, int x, int y)
......@@ -227,19 +263,20 @@ static rt_err_t ili9341_lcd_control(rt_device_t dev, int cmd, void *args)
info = (struct rt_device_graphic_info *) args;
RT_ASSERT(info != RT_NULL);
info->bits_per_pixel = 16;
info->pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565;
info->framebuffer = RT_NULL;
info->width = XSIZE_PHYS;
info->height = YSIZE_PHYS;
rt_memcpy(args, (void *)&g_Ili9341Info, sizeof(struct rt_device_graphic_info));
}
break;
case RTGRAPHIC_CTRL_RECT_UPDATE:
{
#if defined(NU_PKG_ILI9341_WITH_OFFSCREEN_FRAMEBUFFER)
RT_ASSERT(args != RT_NULL);
ili9341_fillrect((uint16_t *)g_Ili9341Info.framebuffer, (struct rt_device_rect_info *) args);
#else
/* nothong to be done */
break;
#endif
}
break;
default:
break;
}
......@@ -272,6 +309,11 @@ int rt_hw_lcd_ili9341_init(void)
lcd_device.user_data = &ili9341_ops;
#if defined(NU_PKG_ILI9341_WITH_OFFSCREEN_FRAMEBUFFER)
g_Ili9341Info.framebuffer = rt_malloc_align(g_Ili9341Info.bits_per_pixel / 2 * g_Ili9341Info.height * g_Ili9341Info.width, 32);
RT_ASSERT(g_Ili9341Info.framebuffer != RT_NULL);
#endif
/* register graphic device driver */
rt_device_register(&lcd_device, "lcd", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STANDALONE);
......
bsp/nuvoton/libraries/nu_packages/ILI9341/lcd_ili9341.h
浏览文件 @ 8d90cfad
......@@ -28,8 +28,13 @@
//
// Physical display size
//
#define XSIZE_PHYS 240
#define YSIZE_PHYS 320
#if defined(NU_PKG_ILI9341_HORIZONTAL)
#define XSIZE_PHYS 320
#define YSIZE_PHYS 240
#else
#define XSIZE_PHYS 240
#define YSIZE_PHYS 320
#endif
int rt_hw_lcd_ili9341_init(void);
void ili9341_send_cmd(rt_uint8_t cmd);
......@@ -38,6 +43,7 @@ void ili9341_set_column(rt_uint16_t StartCol, rt_uint16_t EndCol);
void ili9341_set_page(rt_uint16_t StartPage, rt_uint16_t EndPage);
void ili9341_send_pixel_data(rt_uint16_t color);
void ili9341_lcd_get_pixel(char *color, int x, int y);
void ili9341_send_pixels(rt_uint16_t *pixels, int len);
#if defined(NU_PKG_USING_ILI9341_SPI)
rt_err_t rt_hw_lcd_ili9341_spi_init(const char *spibusname);
......
bsp/nuvoton/libraries/nu_packages/Kconfig
浏览文件 @ 8d90cfad
......@@ -47,6 +47,14 @@ menu "Nuvoton Packages Config"
Choose this option if you the ili9341 device is with EBI interface.
endchoice
config NU_PKG_ILI9341_WITH_OFFSCREEN_FRAMEBUFFER
bool "Create an offscreen framebuffer."
default n
config NU_PKG_ILI9341_HORIZONTAL
bool "Set horizontal view. (320x240)"
default n
endif
endmenu
bsp/nuvoton/libraries/nu_packages/NuUtils/inc/nu_bitutil.h
浏览文件 @ 8d90cfad
......@@ -43,7 +43,7 @@ extern "C" {
*/
__STATIC_INLINE int nu_clz(uint32_t x)
{
return __CLZ(x);
return x ? __CLZ(x):32;
}
/* Count Leading Ones in word - Find Highest Zero
......@@ -65,7 +65,9 @@ __STATIC_INLINE int nu_clo(uint32_t x)
*/
__STATIC_INLINE int nu_ctz(uint32_t x)
{
int c = __CLZ(x & -x);
int c = 32;
if (x)
c = __CLZ(x & -x);
return x ? 31 - c : c;
}
......
bsp/nuvoton/libraries/nuc980/Driver/Include/NuMicro.h 0 → 100644
浏览文件 @ 8d90cfad
/**************************************************************************//**
* @file NuMicro.h
* @version V1.00
* @brief NuMicro peripheral access layer header file.
*
* SPDX-License-Identifier: Apache-2.0
* @copyright (C) 2017-2020 Nuvoton Technology Corp. All rights reserved.
*****************************************************************************/
#ifndef __NUMICRO_H__
#define __NUMICRO_H__
#include "nuc980.h"
#include "nu_adc.h"
#include "nu_uart.h"
#include "nu_spi.h"
#include "nu_qspi.h"
#include "nu_i2c.h"
#include "nu_pdma.h"
#include "nu_etimer.h"
#include "nu_emac.h"
#include "nu_sdh.h"
#include "nu_gpio.h"
#include "nu_rtc.h"
#include "nu_wdt.h"
#include "nu_ebi.h"
#include "nu_scuart.h"
#include "nu_pwm.h"
#include "nu_crypto.h"
#include "nu_can.h"
#include "nu_sys.h"
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static __inline
#endif
#ifndef __CLZ
#if defined(__CC_ARM)
#define __CLZ __clz
#else
#define __CLZ __builtin_clz
#endif
#endif
#endif /* __NUMICRO_H__ */
bsp/nuvoton/libraries/nuc980/Driver/Include/emac_reg.h 0 → 100644
浏览文件 @ 8d90cfad
此差异已折叠。
bsp/nuvoton/libraries/nuc980/Driver/Include/nu_adc.h 0 → 100644
浏览文件 @ 8d90cfad
/**************************************************************************//**
* @file adc.h
* @version V1.00
* $Revision: 6 $
* $Date: 15/10/05 7:00p $
* @brief NUC980 ADC driver header file
*
* @note
* SPDX-License-Identifier: Apache-2.0
* Copyright (C) 2018 Nuvoton Technology Corp. All rights reserved.
*****************************************************************************/
#ifndef __NU_ADC_H__
#define __NU_ADC_H__
#ifdef __cplusplus
extern "C"
{
#endif
/** @addtogroup Standard_Driver Standard Driver
@{
*/
/** @addtogroup ADC_Driver ADC Driver
@{
*/
/** @addtogroup ADC_EXPORTED_CONSTANTS ADC Exported Constants
@{
*/
#define ADC_ERR_ARGS 1 /*!< The arguments is wrong */
#define ADC_ERR_CMD 2 /*!< The command is wrong */
/// @cond HIDDEN_SYMBOLS
typedef INT32(*ADC_CALLBACK)(UINT32 status, UINT32 userData);
/// @endcond HIDDEN_SYMBOLS
/*---------------------------------------------------------------------------------------------------------*/
/* ADC_CTL constant definitions */
/*---------------------------------------------------------------------------------------------------------*/
#define ADC_CTL_ADEN 0x00000001 /*!< ADC Power Control */
#define ADC_CTL_VBGEN 0x00000002 /*!< ADC Internal Bandgap Power Control */
#define ADC_CTL_MST 0x00000100 /*!< Menu Start Conversion */
/*---------------------------------------------------------------------------------------------------------*/
/* ADC_CONF constant definitions */
/*---------------------------------------------------------------------------------------------------------*/
#define ADC_CONF_NACEN 0x00000004 /*!< Normal AD Conversion Enable */
#define ADC_CONF_SELFTEN 0x00000400 /*!< Selft Test Enable */
#define ADC_CONF_HSPEED (1<<22) /*!< High Speed Enable */
#define ADC_CONF_CHSEL_Pos 12 /*!< Channel Selection Position */
#define ADC_CONF_CHSEL_Msk (0xF<<ADC_CONF_CHSEL_Pos) /*!< Channel Selection Mask */
#define ADC_CONF_REFSEL_Pos 6 /*!< Reference Selection Position */
#define ADC_CONF_REFSEL_Msk (3<<6) /*!< Reference Selection Mask */
#define ADC_CONF_REFSEL_VREF (0<<6) /*!< ADC reference select VREF input */
#define ADC_CONF_REFSEL_AVDD33 (3<<6) /*!< ADC reference select AGND33 vs AVDD33 */
/*---------------------------------------------------------------------------------------------------------*/
/* ADC_IER constant definitions */
/*---------------------------------------------------------------------------------------------------------*/
#define ADC_IER_MIEN 0x00000001 /*!< Menu Interrupt Enable */
/*---------------------------------------------------------------------------------------------------------*/
/* ADC_ISR constant definitions */
/*---------------------------------------------------------------------------------------------------------*/
#define ADC_ISR_MF 0x00000001 /*!< Menu Complete Flag */
#define ADC_ISR_NACF 0x00000400 /*!< Normal AD Conversion Finish */
/** \brief Structure type of ADC_CMD
*/
typedef enum
{
START_MST, /*!<Menu Start Conversion */
VBPOWER_ON, /*!<Enable ADC Internal Bandgap Power */
VBPOWER_OFF, /*!<Disable ADC Internal Bandgap Power */
NAC_ON, /*!<Enable Normal AD Conversion */
NAC_OFF, /*!<Disable Normal AD Conversion */
SWITCH_CH, /*!<Switch Channel */
} ADC_CMD;
/*@}*/ /* end of group ADC_EXPORTED_CONSTANTS */
/** @addtogroup ADC_EXPORTED_FUNCTIONS ADC Exported Functions
@{
*/
int adcOpen(void);
int adcOpen2(uint32_t freq);
int adcClose(void);
int adcReadXY(short *bufX, short *bufY, int dataCnt);
int adcReadZ(short *bufZ1, short *bufZ2, int dataCnt);
int adcIoctl(ADC_CMD cmd, int arg1, int arg2);
int adcChangeChannel(int channel);
/*@}*/ /* end of group ADC_EXPORTED_FUNCTIONS */
/*@}*/ /* end of group ADC_Driver */
/*@}*/ /* end of group Standard_Driver */
#ifdef __cplusplus
}
#endif
#endif //__NU_ADC_H__
bsp/nuvoton/libraries/nuc980/Driver/Include/nu_can.h 0 → 100644
浏览文件 @ 8d90cfad
此差异已折叠。
bsp/nuvoton/libraries/nuc980/Driver/Include/nu_cap.h 0 → 100644
浏览文件 @ 8d90cfad
此差异已折叠。
bsp/nuvoton/libraries/nuc980/Driver/Include/nu_crypto.h 0 → 100644
浏览文件 @ 8d90cfad
此差异已折叠。
bsp/nuvoton/libraries/nuc980/Driver/Include/nu_ebi.h 0 → 100644
浏览文件 @ 8d90cfad
/**************************************************************************//**
* @file ebi.h
* @brief EBI driver header file
*
* SPDX-License-Identifier: Apache-2.0
* @copyright (C) 2018 Nuvoton Technology Corp. All rights reserved.
*****************************************************************************/
#ifndef __NU_EBI_H__
#define __NU_EBI_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include "nuc980.h"
/** @addtogroup Standard_Driver Standard Driver
@{
*/
/** @addtogroup EBI_Driver EBI Driver
@{
*/
/** @addtogroup EBI_EXPORTED_CONSTANTS EBI Exported Constants
@{
*/
#define EBI ((EBI_T *) EBI_BA)
/*---------------------- External Bus Interface Controller -------------------------*/
/**
@addtogroup EBI External Bus Interface Controller(EBI)
Memory Mapped Structure for EBI Controller
@{ */
typedef struct
{
__IO uint32_t CTL0; /* Offset: 0x00 External Bus Interface Bank0 Control Register */
__IO uint32_t TCTL0; /* Offset: 0x04 External Bus Interface Bank0 Timing Control Register */
__I uint32_t RESERVE0[2];
__IO uint32_t CTL1; /* Offset: 0x10 External Bus Interface Bank1 Control Register */
__IO uint32_t TCTL1; /* Offset: 0x14 External Bus Interface Bank1 Timing Control Register */
__I uint32_t RESERVE1[2];
__IO uint32_t CTL2; /* Offset: 0x20 External Bus Interface Bank1 Control Register */
__IO uint32_t TCTL2; /* Offset: 0x24 External Bus Interface Bank1 Timing Control Register */
} EBI_T;
/**
@addtogroup EBI_CONST EBI Bit Field Definition
Constant Definitions for EBI Controller
@{ */
#define EBI_CTL_EN_Pos (0) /*!< EBI_T::CTL: EN Position \hideinitializer */
#define EBI_CTL_EN_Msk (0x1ul << EBI_CTL_EN_Pos) /*!< EBI_T::CTL: EN Mask \hideinitializer */
#define EBI_CTL_DW16_Pos (1) /*!< EBI_T::CTL: DW16 Position \hideinitializer */
#define EBI_CTL_DW16_Msk (0x1ul << EBI_CTL_DW16_Pos) /*!< EBI_T::CTL: DW16 Mask \hideinitializer */
#define EBI_CTL_CSPOLINV_Pos (2) /*!< EBI_T::CTL: CSPOLINV Position \hideinitializer */
#define EBI_CTL_CSPOLINV_Msk (0x1ul << EBI_CTL_CSPOLINV_Pos) /*!< EBI_T::CTL: CSPOLINV Mask \hideinitializer */
#define EBI_CTL_CACCESS_Pos (4) /*!< EBI EBICON: CS_PINV Position \hideinitializer */
#define EBI_CTL_CACCESS_Msk (1ul << EBI_CTL_CACCESS_Pos) /*!< EBI EBICON: CS_PINV Mask \hideinitializer */
#define EBI_CTL_MCLKDIV_Pos (8) /*!< EBI_T::CTL: MCLKDIV Position \hideinitializer */
#define EBI_CTL_MCLKDIV_Msk (0x7ul << EBI_CTL_MCLKDIV_Pos) /*!< EBI_T::CTL: MCLKDIV Mask \hideinitializer */
#define EBI_CTL_WBUFEN_Pos (24) /*!< EBI_T::CTL: WBUFEN Position \hideinitializer */
#define EBI_CTL_WBUFEN_Msk (0x1ul << EBI_CTL_WBUFEN_Pos) /*!< EBI_T::CTL: WBUFEN Mask \hideinitializer */
#define EBI_TCTL_TACC_Pos (3) /*!< EBI_T::TCTL: TACC Position \hideinitializer */
#define EBI_TCTL_TACC_Msk (0x1ful << EBI_TCTL_TACC_Pos) /*!< EBI_T::TCTL: TACC Mask \hideinitializer */
#define EBI_TCTL_TAHD_Pos (8) /*!< EBI_T::TCTL: TAHD Position \hideinitializer */
#define EBI_TCTL_TAHD_Msk (0x7ul << EBI_TCTL_TAHD_Pos) /*!< EBI_T::TCTL: TAHD Mask \hideinitializer */
#define EBI_TCTL_W2X_Pos (12) /*!< EBI_T::TCTL: W2X Position \hideinitializer */
#define EBI_TCTL_W2X_Msk (0xful << EBI_TCTL_W2X_Pos) /*!< EBI_T::TCTL: W2X Mask \hideinitializer */
#define EBI_TCTL_RAHDOFF_Pos (22) /*!< EBI_T::TCTL: RAHDOFF Position \hideinitializer */
#define EBI_TCTL_RAHDOFF_Msk (0x1ul << EBI_TCTL_RAHDOFF_Pos) /*!< EBI_T::TCTL: RAHDOFF Mask \hideinitializer */
#define EBI_TCTL_WAHDOFF_Pos (23) /*!< EBI_T::TCTL: WAHDOFF Position \hideinitializer */
#define EBI_TCTL_WAHDOFF_Msk (0x1ul << EBI_TCTL_WAHDOFF_Pos) /*!< EBI_T::TCTL: WAHDOFF Mask \hideinitializer */
#define EBI_TCTL_R2R_Pos (24) /*!< EBI_T::TCTL: R2R Position \hideinitializer */
#define EBI_TCTL_R2R_Msk (0xful << EBI_TCTL_R2R_Pos) /*!< EBI_T::TCTL: R2R Mask \hideinitializer */
/**@}*/ /* EBI_CONST */
/**@}*/ /* end of EBI register group */
/*---------------------------------------------------------------------------------------------------------*/
/* Miscellaneous Constant Definitions */
/*---------------------------------------------------------------------------------------------------------*/
#define EBI_BANK0_BASE_ADDR 0x60000000UL /*!< EBI bank0 base address \hideinitializer */
#define EBI_BANK1_BASE_ADDR 0x60100000UL /*!< EBI bank1 base address \hideinitializer */
#define EBI_BANK2_BASE_ADDR 0x60200000UL /*!< EBI bank2 base address \hideinitializer */
#define EBI_MAX_SIZE 0x00100000UL /*!< Maximum EBI size for each bank is 1 MB \hideinitializer */
/*---------------------------------------------------------------------------------------------------------*/
/* Constants for EBI bank number */
/*---------------------------------------------------------------------------------------------------------*/
#define EBI_BANK0 0UL /*!< EBI bank 0 \hideinitializer */
#define EBI_BANK1 1UL /*!< EBI bank 1 \hideinitializer */
#define EBI_BANK2 2UL /*!< EBI bank 2 \hideinitializer */
/*---------------------------------------------------------------------------------------------------------*/
/* Constants for EBI data bus width */
/*---------------------------------------------------------------------------------------------------------*/
#define EBI_BUSWIDTH_8BIT 8UL /*!< EBI bus width is 8-bit \hideinitializer */
#define EBI_BUSWIDTH_16BIT 16UL /*!< EBI bus width is 16-bit \hideinitializer */
/*---------------------------------------------------------------------------------------------------------*/
/* Constants for EBI CS Active Level */
/*---------------------------------------------------------------------------------------------------------*/
#define EBI_CS_ACTIVE_LOW 0UL /*!< EBI CS active level is low \hideinitializer */
#define EBI_CS_ACTIVE_HIGH 1UL /*!< EBI CS active level is high \hideinitializer */
/*---------------------------------------------------------------------------------------------------------*/
/* Constants for EBI MCLK divider and Timing */
/*---------------------------------------------------------------------------------------------------------*/
#define EBI_MCLKDIV_1 0x0UL /*!< EBI output clock(MCLK) is HCLK/1 \hideinitializer */
#define EBI_MCLKDIV_2 0x1UL /*!< EBI output clock(MCLK) is HCLK/2 \hideinitializer */
#define EBI_MCLKDIV_4 0x2UL /*!< EBI output clock(MCLK) is HCLK/4 \hideinitializer */
#define EBI_MCLKDIV_8 0x3UL /*!< EBI output clock(MCLK) is HCLK/8 \hideinitializer */
#define EBI_MCLKDIV_16 0x4UL /*!< EBI output clock(MCLK) is HCLK/16 \hideinitializer */
#define EBI_MCLKDIV_32 0x5UL /*!< EBI output clock(MCLK) is HCLK/32 \hideinitializer */
#define EBI_MCLKDIV_64 0x6UL /*!< EBI output clock(MCLK) is HCLK/64 \hideinitializer */
#define EBI_MCLKDIV_128 0x7UL /*!< EBI output clock(MCLK) is HCLK/128 \hideinitializer */
#define EBI_TIMING_FASTEST 0x0UL /*!< EBI timing is the fastest \hideinitializer */
#define EBI_TIMING_VERYFAST 0x1UL /*!< EBI timing is very fast \hideinitializer */
#define EBI_TIMING_FAST 0x2UL /*!< EBI timing is fast \hideinitializer */
#define EBI_TIMING_NORMAL 0x3UL /*!< EBI timing is normal \hideinitializer */
#define EBI_TIMING_SLOW 0x4UL /*!< EBI timing is slow \hideinitializer */
#define EBI_TIMING_VERYSLOW 0x5UL /*!< EBI timing is very slow \hideinitializer */
#define EBI_TIMING_SLOWEST 0x6UL /*!< EBI timing is the slowest \hideinitializer */
#define EBI_OPMODE_NORMAL 0x0UL /*!< EBI bus operate in normal mode \hideinitializer */
#define EBI_OPMODE_CACCESS (0x1UL << 4) /*!< EBI bus operate in Continuous Data Access mode \hideinitializer */
/*@}*/ /* end of group EBI_EXPORTED_CONSTANTS */
/** @addtogroup EBI_EXPORTED_FUNCTIONS EBI Exported Functions
@{
*/
/**
* @brief Read 8-bit data on EBI bank0
*
* @param[in] u32Addr The data address on EBI bank0.
*
* @return 8-bit Data
*
* @details This macro is used to read 8-bit data from specify address on EBI bank0.
* \hideinitializer
*/
#define EBI0_READ_DATA8(u32Addr) (*((volatile unsigned char *)(EBI_BANK0_BASE_ADDR+(u32Addr))))
/**
* @brief Write 8-bit data to EBI bank0
*
* @param[in] u32Addr The data address on EBI bank0.
* @param[in] u32Data Specify data to be written.
*
* @return None
*
* @details This macro is used to write 8-bit data to specify address on EBI bank0.
* \hideinitializer
*/
#define EBI0_WRITE_DATA8(u32Addr, u32Data) (*((volatile unsigned char *)(EBI_BANK0_BASE_ADDR+(u32Addr))) = (u32Data))
/**
* @brief Read 16-bit data on EBI bank0
*
* @param[in] u32Addr The data address on EBI bank0.
*
* @return 16-bit Data
*
* @details This macro is used to read 16-bit data from specify address on EBI bank0.
* \hideinitializer
*/
#define EBI0_READ_DATA16(u32Addr) (*((volatile unsigned short *)(EBI_BANK0_BASE_ADDR+(u32Addr))))
/**
* @brief Write 16-bit data to EBI bank0
*
* @param[in] u32Addr The data address on EBI bank0.
* @param[in] u32Data Specify data to be written.
*
* @return None
*
* @details This macro is used to write 16-bit data to specify address on EBI bank0.
* \hideinitializer
*/
#define EBI0_WRITE_DATA16(u32Addr, u32Data) (*((volatile unsigned short *)(EBI_BANK0_BASE_ADDR+(u32Addr))) = (u32Data))
/**
* @brief Read 32-bit data on EBI bank0
*
* @param[in] u32Addr The data address on EBI bank0.
*
* @return 32-bit Data
*
* @details This macro is used to read 32-bit data from specify address on EBI bank0.
* \hideinitializer
*/
#define EBI0_READ_DATA32(u32Addr) (*((volatile unsigned int *)(EBI_BANK0_BASE_ADDR+(u32Addr))))
/**
* @brief Write 32-bit data to EBI bank0
*
* @param[in] u32Addr The data address on EBI bank0.
* @param[in] u32Data Specify data to be written.
*
* @return None
*
* @details This macro is used to write 32-bit data to specify address on EBI bank0.
* \hideinitializer
*/
#define EBI0_WRITE_DATA32(u32Addr, u32Data) (*((volatile unsigned int *)(EBI_BANK0_BASE_ADDR+(u32Addr))) = (u32Data))
/**
* @brief Read 8-bit data on EBI bank1
*
* @param[in] u32Addr The data address on EBI bank1.
*
* @return 8-bit Data
*
* @details This macro is used to read 8-bit data from specify address on EBI bank1.
* \hideinitializer
*/
#define EBI1_READ_DATA8(u32Addr) (*((volatile unsigned char *)(EBI_BANK1_BASE_ADDR+(u32Addr))))
/**
* @brief Write 8-bit data to EBI bank1
*
* @param[in] u32Addr The data address on EBI bank1.
* @param[in] u32Data Specify data to be written.
*
* @return None
*
* @details This macro is used to write 8-bit data to specify address on EBI bank1.
* \hideinitializer
*/
#define EBI1_WRITE_DATA8(u32Addr, u32Data) (*((volatile unsigned char *)(EBI_BANK1_BASE_ADDR+(u32Addr))) = (u32Data))
/**
* @brief Read 16-bit data on EBI bank1
*
* @param[in] u32Addr The data address on EBI bank1.
*
* @return 16-bit Data
*
* @details This macro is used to read 16-bit data from specify address on EBI bank1.
* \hideinitializer
*/
#define EBI1_READ_DATA16(u32Addr) (*((volatile unsigned short *)(EBI_BANK1_BASE_ADDR+(u32Addr))))
/**
* @brief Write 16-bit data to EBI bank1
*
* @param[in] u32Addr The data address on EBI bank1.
* @param[in] u32Data Specify data to be written.
*
* @return None
*
* @details This macro is used to write 16-bit data to specify address on EBI bank1.
* \hideinitializer
*/
#define EBI1_WRITE_DATA16(u32Addr, u32Data) (*((volatile unsigned short *)(EBI_BANK1_BASE_ADDR+(u32Addr))) = (u32Data))
/**
* @brief Read 32-bit data on EBI bank1
*
* @param[in] u32Addr The data address on EBI bank1.
*
* @return 32-bit Data
*
* @details This macro is used to read 32-bit data from specify address on EBI bank1.
* \hideinitializer
*/
#define EBI1_READ_DATA32(u32Addr) (*((volatile unsigned int *)(EBI_BANK1_BASE_ADDR+(u32Addr))))
/**
* @brief Write 32-bit data to EBI bank1
*
* @param[in] u32Addr The data address on EBI bank1.
* @param[in] u32Data Specify data to be written.
*
* @return None
*
* @details This macro is used to write 32-bit data to specify address on EBI bank1.
* \hideinitializer
*/
#define EBI1_WRITE_DATA32(u32Addr, u32Data) (*((volatile unsigned int *)(EBI_BANK1_BASE_ADDR+(u32Addr))) = (u32Data))
/**
* @brief Read 8-bit data on EBI bank2
*
* @param[in] u32Addr The data address on EBI bank2.
*
* @return 8-bit Data
*
* @details This macro is used to read 8-bit data from specify address on EBI bank2.
* \hideinitializer
*/
#define EBI2_READ_DATA8(u32Addr) (*((volatile unsigned char *)(EBI_BANK2_BASE_ADDR+(u32Addr))))
/**
* @brief Write 8-bit data to EBI bank2
*
* @param[in] u32Addr The data address on EBI bank2.
* @param[in] u32Data Specify data to be written.
*
* @return None
*
* @details This macro is used to write 8-bit data to specify address on EBI bank2.
* \hideinitializer
*/
#define EBI2_WRITE_DATA8(u32Addr, u32Data) (*((volatile unsigned char *)(EBI_BANK2_BASE_ADDR+(u32Addr))) = (u32Data))
/**
* @brief Read 16-bit data on EBI bank2
*
* @param[in] u32Addr The data address on EBI bank2.
*
* @return 16-bit Data
*
* @details This macro is used to read 16-bit data from specify address on EBI bank2.
* \hideinitializer
*/
#define EBI2_READ_DATA16(u32Addr) (*((volatile unsigned short *)(EBI_BANK2_BASE_ADDR+(u32Addr))))
/**
* @brief Write 16-bit data to EBI bank2
*
* @param[in] u32Addr The data address on EBI bank2.
* @param[in] u32Data Specify data to be written.
*
* @return None
*
* @details This macro is used to write 16-bit data to specify address on EBI bank2.
* \hideinitializer
*/
#define EBI2_WRITE_DATA16(u32Addr, u32Data) (*((volatile unsigned short *)(EBI_BANK2_BASE_ADDR+(u32Addr))) = (u32Data))
/**
* @brief Read 32-bit data on EBI bank2
*
* @param[in] u32Addr The data address on EBI bank2.
*
* @return 32-bit Data
*
* @details This macro is used to read 32-bit data from specify address on EBI bank2.
* \hideinitializer
*/
#define EBI2_READ_DATA32(u32Addr) (*((volatile unsigned int *)(EBI_BANK2_BASE_ADDR+(u32Addr))))
/**
* @brief Write 32-bit data to EBI bank2
*
* @param[in] u32Addr The data address on EBI bank2.
* @param[in] u32Data Specify data to be written.
*
* @return None
*
* @details This macro is used to write 32-bit data to specify address on EBI bank2.
* \hideinitializer
*/
#define EBI2_WRITE_DATA32(u32Addr, u32Data) (*((volatile unsigned int *)(EBI_BANK2_BASE_ADDR+(u32Addr))) = (u32Data))
/**
* @brief Enable EBI Write Buffer
*
* @return None
*
* @details This macro is used to improve EBI write operation for EBI all banks.
* \hideinitializer
*/
#define EBI_ENABLE_WRITE_BUFFER() outpw(REG_EBI_CTL0, inpw(REG_EBI_CTL0) | (0x1UL << 24))
/**
* @brief Disable EBI Write Buffer
*
* @return None
*
* @details This macro is used to disable EBI write buffer function.
* \hideinitializer
*/
#define EBI_DISABLE_WRITE_BUFFER() outpw(REG_EBI_CTL0, (inpw(REG_EBI_CTL0) & ~(0x1UL << 24)) | (0x1UL << 24))
void EBI_Open(uint32_t u32Bank, uint32_t u32DataWidth, uint32_t u32TimingClass, uint32_t u32BusMode, uint32_t u32CSActiveLevel);
void EBI_Close(uint32_t u32Bank);
void EBI_SetBusTiming(uint32_t u32Bank, uint32_t u32TimingConfig, uint32_t u32MclkDiv);
/*@}*/ /* end of group EBI_EXPORTED_FUNCTIONS */
/*@}*/ /* end of group EBI_Driver */
/*@}*/ /* end of group Standard_Driver */
#ifdef __cplusplus
}
#endif
#endif //__NU_EBI_H__
/*** (C) COPYRIGHT 2018 Nuvoton Technology Corp. ***/
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# RT-Thread building script for component
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
libs = []
src = Glob('Source/*.c') + Glob('Source/*.cpp')
cpppath = [cwd + '/Include']
libpath = [cwd + '/Library']
if not GetDepend('BSP_USE_STDDRIVER_SOURCE'):
if rtconfig.CROSS_TOOL == 'keil':
if GetOption('target') == 'mdk4' and os.path.isfile('./Library/libstddriver_keil4.lib'):
libs += ['libstddriver_keil4']
if GetOption('target') == 'mdk5' and os.path.isfile('./Library/libstddriver_keil.lib'):
libs += ['libstddriver_keil']
elif rtconfig.CROSS_TOOL == 'gcc' and os.path.isfile('./Library/libstddriver_gcc.a'):
libs += ['libstddriver_gcc']
if not libs:
group = DefineGroup('nuc980_driver', src, depend = [''], CPPPATH = cpppath)
else:
src = []
group = DefineGroup('nuc980_driver', src, depend = [''], CPPPATH = cpppath, LIBS = libs, LIBPATH = libpath)
Return('group')
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