Merge pull request #1815 from xuzhuoyi/stm32f429-disco

Add LCD and guiengine support for stm32f429-disco

bsp/stm32f429-disco/.config

@@ -13,13 +13,22 @@ CONFIG_RT_THREAD_PRIORITY_32=y
 # CONFIG_RT_THREAD_PRIORITY_256 is not set
 CONFIG_RT_THREAD_PRIORITY_MAX=32
 CONFIG_RT_TICK_PER_SECOND=100
-CONFIG_RT_DEBUG=y
 CONFIG_RT_USING_OVERFLOW_CHECK=y
-CONFIG_RT_DEBUG_INIT=1
-CONFIG_RT_DEBUG_THREAD=0
 CONFIG_RT_USING_HOOK=y
+CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
 CONFIG_IDLE_THREAD_STACK_SIZE=1024
 # CONFIG_RT_USING_TIMER_SOFT is not set
+CONFIG_RT_DEBUG=y
+# CONFIG_RT_DEBUG_INIT_CONFIG is not set
+# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
+# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
+# CONFIG_RT_DEBUG_IPC_CONFIG is not set
+# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
+# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
+# CONFIG_RT_DEBUG_MEM_CONFIG is not set
+# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
+# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
+# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
 
 #
 # Inter-Thread communication
@@ -47,11 +56,11 @@ CONFIG_RT_USING_HEAP=y
 # Kernel Device Object
 #
 CONFIG_RT_USING_DEVICE=y
+# CONFIG_RT_USING_DEVICE_OPS is not set
 # CONFIG_RT_USING_INTERRUPT_INFO is not set
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
-# CONFIG_RT_USING_MODULE is not set
 
 #
 # RT-Thread Components
@@ -73,6 +82,7 @@ CONFIG_FINSH_USING_HISTORY=y
 CONFIG_FINSH_HISTORY_LINES=5
 CONFIG_FINSH_USING_SYMTAB=y
 CONFIG_FINSH_USING_DESCRIPTION=y
+# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
 CONFIG_FINSH_THREAD_PRIORITY=20
 CONFIG_FINSH_THREAD_STACK_SIZE=4096
 CONFIG_FINSH_CMD_SIZE=80
@@ -80,26 +90,36 @@ CONFIG_FINSH_CMD_SIZE=80
 CONFIG_FINSH_USING_MSH=y
 CONFIG_FINSH_USING_MSH_DEFAULT=y
 # CONFIG_FINSH_USING_MSH_ONLY is not set
+CONFIG_FINSH_ARG_MAX=10
 
 #
 # Device virtual file system
 #
-# CONFIG_RT_USING_DFS is not set
-# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
-# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
-# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
-# CONFIG_RT_DFS_ELM_USE_LFN_3 is not set
+CONFIG_RT_USING_DFS=y
+CONFIG_DFS_USING_WORKDIR=y
+CONFIG_DFS_FILESYSTEMS_MAX=2
+CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
+CONFIG_DFS_FD_MAX=16
+# CONFIG_RT_USING_DFS_MNTTABLE is not set
+# CONFIG_RT_USING_DFS_ELMFAT is not set
+CONFIG_RT_USING_DFS_DEVFS=y
+# CONFIG_RT_USING_DFS_ROMFS is not set
+# CONFIG_RT_USING_DFS_RAMFS is not set
+# CONFIG_RT_USING_DFS_UFFS is not set
+# CONFIG_RT_USING_DFS_JFFS2 is not set
 
 #
 # Device Drivers
 #
 CONFIG_RT_USING_DEVICE_IPC=y
+CONFIG_RT_PIPE_BUFSZ=512
 CONFIG_RT_USING_SERIAL=y
 # CONFIG_RT_USING_CAN is not set
 # CONFIG_RT_USING_HWTIMER is not set
 # CONFIG_RT_USING_CPUTIME is not set
 # CONFIG_RT_USING_I2C is not set
 CONFIG_RT_USING_PIN=y
+# CONFIG_RT_USING_PWM is not set
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
 # CONFIG_RT_USING_RTC is not set
@@ -107,6 +127,7 @@ CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_SPI is not set
 # CONFIG_RT_USING_WDT is not set
 # CONFIG_RT_USING_WIFI is not set
+# CONFIG_RT_USING_AUDIO is not set
 
 #
 # Using USB
@@ -117,13 +138,17 @@ CONFIG_RT_USING_PIN=y
 #
 # POSIX layer and C standard library
 #
-CONFIG_RT_USING_LIBC=y
-CONFIG_RT_USING_PTHREADS=y
-# CONFIG_HAVE_SYS_SIGNALS is not set
+# CONFIG_RT_USING_LIBC is not set
+# CONFIG_RT_USING_PTHREADS is not set
+
+#
+# Network
+#
 
 #
-# Network stack
+# Socket abstraction layer
 #
+# CONFIG_RT_USING_SAL is not set
 
 #
 # light weight TCP/IP stack
@@ -135,6 +160,11 @@ CONFIG_RT_USING_PTHREADS=y
 #
 # CONFIG_RT_USING_MODBUS is not set
 
+#
+# AT commands
+#
+# CONFIG_RT_USING_AT is not set
+
 #
 # VBUS(Virtual Software BUS)
 #
@@ -150,19 +180,6 @@ CONFIG_RT_USING_PTHREADS=y
 # RT-Thread online packages
 #
 
-#
-# system packages
-#
-
-#
-# RT-Thread GUI Engine
-#
-# CONFIG_PKG_USING_GUIENGINE is not set
-# CONFIG_PKG_USING_LWEXT4 is not set
-# CONFIG_PKG_USING_PARTITION is not set
-# CONFIG_PKG_USING_SQLITE is not set
-# CONFIG_PKG_USING_RTI is not set
-
 #
 # IoT - internet of things
 #
@@ -171,10 +188,10 @@ CONFIG_RT_USING_PTHREADS=y
 # CONFIG_PKG_USING_MONGOOSE is not set
 # CONFIG_PKG_USING_WEBTERMINAL is not set
 # CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
 # CONFIG_PKG_USING_LJSON is not set
 # CONFIG_PKG_USING_EZXML is not set
 # CONFIG_PKG_USING_NANOPB is not set
-# CONFIG_PKG_USING_GAGENT_CLOUD is not set
 
 #
 # Wi-Fi
@@ -192,6 +209,15 @@ CONFIG_RT_USING_PTHREADS=y
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_AT_DEVICE is not set
+
+#
+# IoT Cloud
+#
+# CONFIG_PKG_USING_ONENET is not set
+# CONFIG_PKG_USING_GAGENT_CLOUD is not set
+# CONFIG_PKG_USING_ALI_IOTKIT is not set
+# CONFIG_PKG_USING_AZURE is not set
 
 #
 # security packages
@@ -203,6 +229,7 @@ CONFIG_RT_USING_PTHREADS=y
 #
 # language packages
 #
+# CONFIG_PKG_USING_LUA is not set
 # CONFIG_PKG_USING_JERRYSCRIPT is not set
 # CONFIG_PKG_USING_MICROPYTHON is not set
 
@@ -210,27 +237,72 @@ CONFIG_RT_USING_PTHREADS=y
 # multimedia packages
 #
 # CONFIG_PKG_USING_OPENMV is not set
+# CONFIG_PKG_USING_MUPDF is not set
 
 #
 # tools packages
 #
 # CONFIG_PKG_USING_CMBACKTRACE is not set
+# CONFIG_PKG_USING_EASYFLASH is not set
 # CONFIG_PKG_USING_EASYLOGGER is not set
 # CONFIG_PKG_USING_SYSTEMVIEW is not set
-# CONFIG_PKG_USING_IPERF is not set
+
+#
+# system packages
+#
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_GUIENGINE_V200 is not set
+# CONFIG_PKG_USING_GUIENGINE_LATEST_VERSION is not set
+# CONFIG_PKG_USING_CAIRO is not set
+# CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
+# CONFIG_PKG_USING_PARTITION is not set
+# CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_SQLITE is not set
+# CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+
+#
+# peripheral libraries and drivers
+#
+# CONFIG_PKG_USING_STM32F4_HAL is not set
+# CONFIG_PKG_USING_STM32F4_DRIVERS is not set
+# CONFIG_PKG_USING_REALTEK_AMEBA is not set
+# CONFIG_PKG_USING_SHT2X is not set
+# CONFIG_PKG_USING_AHT10 is not set
+# CONFIG_PKG_USING_AP3216C is not set
+# CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_ICM20608 is not set
 
 #
 # miscellaneous packages
 #
+# CONFIG_PKG_USING_LIBCSV is not set
+# CONFIG_PKG_USING_OPTPARSE is not set
 # CONFIG_PKG_USING_FASTLZ is not set
 # CONFIG_PKG_USING_MINILZO is not set
 # CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_CANFESTIVAL is not set
+# CONFIG_PKG_USING_ZLIB is not set
+# CONFIG_PKG_USING_DSTR is not set
+
+#
+# sample package
+#
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
 
 #
 # example package: hello
 #
 # CONFIG_PKG_USING_HELLO is not set
-# CONFIG_PKG_USING_MULTIBUTTON is not set
 CONFIG_RT_USING_EXT_SDRAM=y
 CONFIG_RT_USING_UART1=y
 # CONFIG_RT_USING_UART2 is not set

bsp/stm32f429-disco/applications/application.c

@@ -55,10 +55,9 @@ void rt_init_thread_entry(void* parameter)
         rt_kprintf("TCP/IP initialized!\n");
     }
 #endif
+    
+    rt_components_init();
 
-#ifdef RT_USING_FINSH
-    finsh_system_init();
-#endif
 }
 
 int rt_application_init()

bsp/stm32f429-disco/drivers/SConscript

@@ -10,6 +10,7 @@ board.c
 stm32f4xx_it.c
 usart.c
 drv_sdram.c
+drv_lcd.c
 """)
 
 CPPPATH = [cwd]

bsp/stm32f429-disco/drivers/board.c

@@ -15,11 +15,16 @@
 #include <rthw.h>
 #include <rtthread.h>
 
+#ifdef PKG_USING_GUIENGINE
+#include <rtgui/driver.h>
+#endif
+
 #include "stm32f4xx.h"
 #include "board.h"
 #include "usart.h"
 #include "stm32f4xx_hal.h"
 
+
 void _init(void)
 {
 
@@ -133,6 +138,10 @@ void HAL_Delay(__IO uint32_t Delay)
  */
 void rt_hw_board_init()
 {
+#ifdef PKG_USING_GUIENGINE
+    rt_device_t lcd;
+#endif
+
     HAL_Init();
 
     SystemClock_Config();
@@ -142,10 +151,16 @@ void rt_hw_board_init()
 #else
     stm32_hw_usart_init();
 #endif
-
+	
 #ifdef RT_USING_CONSOLE
     rt_console_set_device(CONSOLE_DEVICE);
 #endif
+	
+#ifdef PKG_USING_GUIENGINE
+    lcd = rt_device_find("lcd");
+    rtgui_graphic_set_device(lcd);
+#endif
+	
 }
 
 /*@}*/

bsp/stm32f429-disco/drivers/drv_lcd.h

+#ifndef __DRV_LCD_H__
+#define __DRV_LCD_H__		
+
+#include <rtdevice.h>
+#include "stm32f4xx_hal.h"
+
+#define  ILI9341_HSYNC            ((uint32_t)9)   /* Horizontal synchronization */
+#define  ILI9341_HBP              ((uint32_t)29)    /* Horizontal back porch      */ 
+#define  ILI9341_HFP              ((uint32_t)2)    /* Horizontal front porch     */
+#define  ILI9341_VSYNC            ((uint32_t)1)   /* Vertical synchronization   */
+#define  ILI9341_VBP              ((uint32_t)3)    /* Vertical back porch        */
+#define  ILI9341_VFP              ((uint32_t)2)    /* Vertical front porch       */
+
+
+/** 
+  * @brief  ILI9341 Registers  
+  */
+
+/* Level 1 Commands */
+#define LCD_SWRESET             0x01   /* Software Reset */
+#define LCD_READ_DISPLAY_ID     0x04   /* Read display identification information */
+#define LCD_RDDST               0x09   /* Read Display Status */
+#define LCD_RDDPM               0x0A   /* Read Display Power Mode */
+#define LCD_RDDMADCTL           0x0B   /* Read Display MADCTL */
+#define LCD_RDDCOLMOD           0x0C   /* Read Display Pixel Format */
+#define LCD_RDDIM               0x0D   /* Read Display Image Format */
+#define LCD_RDDSM               0x0E   /* Read Display Signal Mode */
+#define LCD_RDDSDR              0x0F   /* Read Display Self-Diagnostic Result */
+#define LCD_SPLIN               0x10   /* Enter Sleep Mode */
+#define LCD_SLEEP_OUT           0x11   /* Sleep out register */
+#define LCD_PTLON               0x12   /* Partial Mode ON */
+#define LCD_NORMAL_MODE_ON      0x13   /* Normal Display Mode ON */
+#define LCD_DINVOFF             0x20   /* Display Inversion OFF */
+#define LCD_DINVON              0x21   /* Display Inversion ON */
+#define LCD_GAMMA               0x26   /* Gamma register */
+#define LCD_DISPLAY_OFF         0x28   /* Display off register */
+#define LCD_DISPLAY_ON          0x29   /* Display on register */
+#define LCD_COLUMN_ADDR         0x2A   /* Colomn address register */ 
+#define LCD_PAGE_ADDR           0x2B   /* Page address register */ 
+#define LCD_GRAM                0x2C   /* GRAM register */   
+#define LCD_RGBSET              0x2D   /* Color SET */   
+#define LCD_RAMRD               0x2E   /* Memory Read */   
+#define LCD_PLTAR               0x30   /* Partial Area */   
+#define LCD_VSCRDEF             0x33   /* Vertical Scrolling Definition */   
+#define LCD_TEOFF               0x34   /* Tearing Effect Line OFF */   
+#define LCD_TEON                0x35   /* Tearing Effect Line ON */   
+#define LCD_MAC                 0x36   /* Memory Access Control register*/
+#define LCD_VSCRSADD            0x37   /* Vertical Scrolling Start Address */   
+#define LCD_IDMOFF              0x38   /* Idle Mode OFF */   
+#define LCD_IDMON               0x39   /* Idle Mode ON */   
+#define LCD_PIXEL_FORMAT        0x3A   /* Pixel Format register */
+#define LCD_WRITE_MEM_CONTINUE  0x3C   /* Write Memory Continue */   
+#define LCD_READ_MEM_CONTINUE   0x3E   /* Read Memory Continue */   
+#define LCD_SET_TEAR_SCANLINE   0x44   /* Set Tear Scanline */   
+#define LCD_GET_SCANLINE        0x45   /* Get Scanline */   
+#define LCD_WDB                 0x51   /* Write Brightness Display register */
+#define LCD_RDDISBV             0x52   /* Read Display Brightness */   
+#define LCD_WCD                 0x53   /* Write Control Display register*/
+#define LCD_RDCTRLD             0x54   /* Read CTRL Display */   
+#define LCD_WRCABC              0x55   /* Write Content Adaptive Brightness Control */   
+#define LCD_RDCABC              0x56   /* Read Content Adaptive Brightness Control */   
+#define LCD_WRITE_CABC          0x5E   /* Write CABC Minimum Brightness */   
+#define LCD_READ_CABC           0x5F   /* Read CABC Minimum Brightness */   
+#define LCD_READ_ID1            0xDA   /* Read ID1 */
+#define LCD_READ_ID2            0xDB   /* Read ID2 */
+#define LCD_READ_ID3            0xDC   /* Read ID3 */
+
+/* Level 2 Commands */
+#define LCD_RGB_INTERFACE       0xB0   /* RGB Interface Signal Control */
+#define LCD_FRMCTR1             0xB1   /* Frame Rate Control (In Normal Mode) */
+#define LCD_FRMCTR2             0xB2   /* Frame Rate Control (In Idle Mode) */
+#define LCD_FRMCTR3             0xB3   /* Frame Rate Control (In Partial Mode) */
+#define LCD_INVTR               0xB4   /* Display Inversion Control */
+#define LCD_BPC                 0xB5   /* Blanking Porch Control register */
+#define LCD_DFC                 0xB6   /* Display Function Control register */
+#define LCD_ETMOD               0xB7   /* Entry Mode Set */
+#define LCD_BACKLIGHT1          0xB8   /* Backlight Control 1 */
+#define LCD_BACKLIGHT2          0xB9   /* Backlight Control 2 */
+#define LCD_BACKLIGHT3          0xBA   /* Backlight Control 3 */
+#define LCD_BACKLIGHT4          0xBB   /* Backlight Control 4 */
+#define LCD_BACKLIGHT5          0xBC   /* Backlight Control 5 */
+#define LCD_BACKLIGHT7          0xBE   /* Backlight Control 7 */
+#define LCD_BACKLIGHT8          0xBF   /* Backlight Control 8 */
+#define LCD_POWER1              0xC0   /* Power Control 1 register */
+#define LCD_POWER2              0xC1   /* Power Control 2 register */
+#define LCD_VCOM1               0xC5   /* VCOM Control 1 register */
+#define LCD_VCOM2               0xC7   /* VCOM Control 2 register */
+#define LCD_NVMWR               0xD0   /* NV Memory Write */
+#define LCD_NVMPKEY             0xD1   /* NV Memory Protection Key */
+#define LCD_RDNVM               0xD2   /* NV Memory Status Read */
+#define LCD_READ_ID4            0xD3   /* Read ID4 */
+#define LCD_PGAMMA              0xE0   /* Positive Gamma Correction register */
+#define LCD_NGAMMA              0xE1   /* Negative Gamma Correction register */
+#define LCD_DGAMCTRL1           0xE2   /* Digital Gamma Control 1 */
+#define LCD_DGAMCTRL2           0xE3   /* Digital Gamma Control 2 */
+#define LCD_INTERFACE           0xF6   /* Interface control register */
+
+/* Extend register commands */
+#define LCD_POWERA               0xCB   /* Power control A register */
+#define LCD_POWERB               0xCF   /* Power control B register */
+#define LCD_DTCA                 0xE8   /* Driver timing control A */
+#define LCD_DTCB                 0xEA   /* Driver timing control B */
+#define LCD_POWER_SEQ            0xED   /* Power on sequence register */
+#define LCD_3GAMMA_EN            0xF2   /* 3 Gamma enable register */
+#define LCD_PRC                  0xF7   /* Pump ratio control register */
+
+/* Size of read registers */
+#define LCD_READ_ID4_SIZE        3      /* Size of Read ID4 */
+
+#define ABS(X)  ((X) > 0 ? (X) : -(X))
+
+#define CSX_Pin GPIO_PIN_2
+#define CSX_GPIO_Port GPIOC
+#define RDX_Pin GPIO_PIN_12
+#define RDX_GPIO_Port GPIOD
+#define WRX_DCX_Pin GPIO_PIN_13
+#define WRX_DCX_GPIO_Port GPIOD
+
+/* Chip Select macro definition */
+#define LCD_CS_LOW()       HAL_GPIO_WritePin(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, GPIO_PIN_RESET)
+#define LCD_CS_HIGH()      HAL_GPIO_WritePin(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, GPIO_PIN_SET)
+
+/* Set WRX High to send data */
+#define LCD_WRX_LOW()      HAL_GPIO_WritePin(LCD_WRX_GPIO_PORT, LCD_WRX_PIN, GPIO_PIN_RESET)
+#define LCD_WRX_HIGH()     HAL_GPIO_WritePin(LCD_WRX_GPIO_PORT, LCD_WRX_PIN, GPIO_PIN_SET)
+
+/* Set WRX High to send data */
+#define LCD_RDX_LOW()      HAL_GPIO_WritePin(LCD_RDX_GPIO_PORT, LCD_RDX_PIN, GPIO_PIN_RESET)
+#define LCD_RDX_HIGH()     HAL_GPIO_WritePin(LCD_RDX_GPIO_PORT, LCD_RDX_PIN, GPIO_PIN_SET)
+
+/** 
+  * @brief  LCD Control pin  
+  */ 
+#define LCD_NCS_PIN                             GPIO_PIN_2
+#define LCD_NCS_GPIO_PORT                       GPIOC
+#define LCD_NCS_GPIO_CLK_ENABLE()               __HAL_RCC_GPIOC_CLK_ENABLE()
+#define LCD_NCS_GPIO_CLK_DISABLE()              __HAL_RCC_GPIOC_CLK_DISABLE()
+/**             
+  * @}
+  */ 
+/** 
+  * @brief  LCD Command/data pin  
+  */
+#define LCD_WRX_PIN                             GPIO_PIN_13
+#define LCD_WRX_GPIO_PORT                       GPIOD
+#define LCD_WRX_GPIO_CLK_ENABLE()               __HAL_RCC_GPIOD_CLK_ENABLE()
+#define LCD_WRX_GPIO_CLK_DISABLE()              __HAL_RCC_GPIOD_CLK_DISABLE()
+  
+#define LCD_RDX_PIN                             GPIO_PIN_12
+#define LCD_RDX_GPIO_PORT                       GPIOD
+#define LCD_RDX_GPIO_CLK_ENABLE()               __HAL_RCC_GPIOD_CLK_ENABLE()
+#define LCD_RDX_GPIO_CLK_DISABLE()              __HAL_RCC_GPIOD_CLK_DISABLE()
+
+/*############################### SPIx #######################################*/
+#define DISCOVERY_SPIx                          SPI5
+#define DISCOVERY_SPIx_CLK_ENABLE()             __HAL_RCC_SPI5_CLK_ENABLE()
+#define DISCOVERY_SPIx_GPIO_PORT                GPIOF                      /* GPIOF */
+#define DISCOVERY_SPIx_AF                       GPIO_AF5_SPI5
+#define DISCOVERY_SPIx_GPIO_CLK_ENABLE()        __HAL_RCC_GPIOF_CLK_ENABLE()
+#define DISCOVERY_SPIx_GPIO_CLK_DISABLE()       __HAL_RCC_GPIOF_CLK_DISABLE()
+#define DISCOVERY_SPIx_SCK_PIN                  GPIO_PIN_7                 /* PF.07 */
+#define DISCOVERY_SPIx_MISO_PIN                 GPIO_PIN_8                 /* PF.08 */
+#define DISCOVERY_SPIx_MOSI_PIN                 GPIO_PIN_9                 /* PF.09 */
+/* Maximum Timeout values for flags waiting loops. These timeouts are not based
+   on accurate values, they just guarantee that the application will not remain
+   stuck if the SPI communication is corrupted.
+   You may modify these timeout values depending on CPU frequency and application
+   conditions (interrupts routines ...). */   
+#define SPIx_TIMEOUT_MAX              ((uint32_t)0x1000)
+
+int rt_lcd_init(void);
+
+#endif  
+	 
+	 
+
+
+

bsp/stm32f429-disco/drivers/drv_sdram.h

@@ -25,7 +25,7 @@
 #include <board.h>
 
 
-#define SDRAM_BANK_ADDR                 ((uint32_t)0xD0000000)
+#define SDRAM_BANK_ADDR                 ((uint32_t)0xD0030000)    /*0xD0000000-0xD002FFFF used for LCD framebuffer*/
 
 /* #define SDRAM_MEMORY_WIDTH            FMC_SDRAM_MEM_BUS_WIDTH_8 */
 #define SDRAM_MEMORY_WIDTH            FMC_SDRAM_MEM_BUS_WIDTH_16

bsp/stm32f429-disco/drivers/stm32f4xx_hal_conf.h

@@ -68,12 +68,12 @@
 /* #define HAL_I2C_MODULE_ENABLED   */
 /* #define HAL_I2S_MODULE_ENABLED   */
 /* #define HAL_IWDG_MODULE_ENABLED   */
-/* #define HAL_LTDC_MODULE_ENABLED   */
+#define HAL_LTDC_MODULE_ENABLED
 /* #define HAL_RNG_MODULE_ENABLED   */
 /* #define HAL_RTC_MODULE_ENABLED   */
 /* #define HAL_SAI_MODULE_ENABLED   */
 /* #define HAL_SD_MODULE_ENABLED   */
-/* #define HAL_SPI_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
 /* #define HAL_TIM_MODULE_ENABLED   */
 #define HAL_UART_MODULE_ENABLED
 /* #define HAL_USART_MODULE_ENABLED   */

bsp/stm32f429-disco/readme.md

-board info:
-STM32F429I-DISC1
-http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-discovery-kits/32f429idiscovery.html
+# STM32F429-DISCO
 
-note:
-in drivers/stm32f4xx_conf.h
- /* Redefine the HSE value; it's equal to 8 MHz on the STM32F429I-DISC1 Kit */
- #define HSE_VALUE    ((uint32_t)8000000)
+## 1. 简介
 
+STM32F429I-DISCOVERY 开发板使用高性能 MCU STM32F429，可以用于实现高级图形用户界面。  
+本 BSP 兼容 STM32F429I-DISCO 和 STM32F429I-DISC1 两个版本的 DISCOVERY 开发板。
 
- **TODO**
- auto add *.icf by scons script
+核心板板载主要资源如下：
+
+| 硬件 | 描述 |
+| -- | -- |
+|芯片型号| STM32F429ZIT6 |
+|CPU| ARM Cortex-M4F |
+|主频| 180MHz |
+|片内 SRAM| 256KB |
+|片外 SDRAM| 64-Mbit SDRAM |
+|片内 Flash| 2MB |
+|显示设备| 2.4" QVGA TFT LCD|
+|‎运动传感器‎| L3GD20 |
+|LED| 6 个 |
+|按键| 2 个 |
+
+## 2. 编译说明
+
+STM32F429-DISCO 板级包支持 MDK4﹑MDK5﹑IAR 开发环境和 GCC 编译器，以下是具体版本信息：
+
+| IDE/编译器 | 已测试版本                   |
+| ---------- | ---------------------------- |
+| MDK4       | MDK4.74                      |
+| MDK5       | MDK V5.25.2.0                |
+| IAR        | 未测试                        |
+| GCC        | GCC 5.4.1 20160919 (release) |
+
+## 3. 烧写及执行
+
+供电方式：使用 Mini USB 线连接电脑和板子的 USB ST-LINK 口。
+
+串口连接：STM32F429I-DISC1 版本的开发板的板载调试器为 ST-LINK/V2-B，支持 VCP 虚拟串口，所以可以直接使用虚拟串口输出默认控制台设备 USART1。 
+
+老版本的 STM32F429I-DISCO 开发板需要从板子上的引脚外接串口，并更改控制台设备到相应 USART。 
+
+在PC上使用终端软件以115200-N-8-1的配置方式连接到对应的COM设备上。
+
+STM32F429-DISCO/DISC1 使用板载编程器下载程序。
+
+### 3.1 运行结果
+
+如果编译 & 烧写无误，当复位设备后，会在串口上看到 RT-Thread 的启动 logo 信息：
+
+```bash
+ \ | /
+- RT -     Thread Operating System
+ / | \     3.1.0 build Aug 31 2018
+ 2006 - 2018 Copyright by rt-thread team
+finsh />
+
+```
+
+## 4. 驱动支持情况及计划
+
+| 驱动 | 支持情况  |  备注  |
+| ------ | ----  | :------:  |
+| USART | 支持 | USART1/2/3 |
+| SPI | 支持 |  |
+| LCD | 支持 | 支持 FrameBuffer 模式 LCD 显示 |
+| SDRAM | 支持 | |
+| GPIO | 未支持 |  |
+| IIC | 未支持 |  |
+| L3GD20 | 未支持 | |
+| USB OTG | 未支持 | |
+
+
+## 5. 联系人信息
+
+维护人：[xuzhuoyi](https://github.com/xuzhuoyi)
+
+## 6. 参考
+
+* [板子相关资料](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-discovery-kits/32f429idiscovery.html)

bsp/stm32f429-disco/rtconfig.h

@@ -8,18 +8,14 @@
 
 #define RT_NAME_MAX 8
 #define RT_ALIGN_SIZE 4
-/* RT_THREAD_PRIORITY_8 is not set */
 #define RT_THREAD_PRIORITY_32
-/* RT_THREAD_PRIORITY_256 is not set */
 #define RT_THREAD_PRIORITY_MAX 32
 #define RT_TICK_PER_SECOND 100
-#define RT_DEBUG
 #define RT_USING_OVERFLOW_CHECK
-#define RT_DEBUG_INIT 1
-#define RT_DEBUG_THREAD 0
 #define RT_USING_HOOK
+#define RT_IDEL_HOOK_LIST_SIZE 4
 #define IDLE_THREAD_STACK_SIZE 1024
-/* RT_USING_TIMER_SOFT is not set */
+#define RT_DEBUG
 
 /* Inter-Thread communication */
 
@@ -28,36 +24,27 @@
 #define RT_USING_EVENT
 #define RT_USING_MAILBOX
 #define RT_USING_MESSAGEQUEUE
-/* RT_USING_SIGNALS is not set */
 
 /* Memory Management */
 
 #define RT_USING_MEMPOOL
 #define RT_USING_MEMHEAP
-/* RT_USING_NOHEAP is not set */
 #define RT_USING_SMALL_MEM
-/* RT_USING_SLAB is not set */
-/* RT_USING_MEMHEAP_AS_HEAP is not set */
-/* RT_USING_MEMTRACE is not set */
 #define RT_USING_HEAP
 
 /* Kernel Device Object */
 
 #define RT_USING_DEVICE
-/* RT_USING_INTERRUPT_INFO is not set */
 #define RT_USING_CONSOLE
 #define RT_CONSOLEBUF_SIZE 128
 #define RT_CONSOLE_DEVICE_NAME "uart1"
-/* RT_USING_MODULE is not set */
 
 /* RT-Thread Components */
 
 #define RT_USING_COMPONENTS_INIT
-/* RT_USING_USER_MAIN is not set */
 
 /* C++ features */
 
-/* RT_USING_CPLUSPLUS is not set */
 
 /* Command shell */
 
@@ -70,139 +57,97 @@
 #define FINSH_THREAD_PRIORITY 20
 #define FINSH_THREAD_STACK_SIZE 4096
 #define FINSH_CMD_SIZE 80
-/* FINSH_USING_AUTH is not set */
 #define FINSH_USING_MSH
 #define FINSH_USING_MSH_DEFAULT
-/* FINSH_USING_MSH_ONLY is not set */
+#define FINSH_ARG_MAX 10
 
 /* Device virtual file system */
 
-/* RT_USING_DFS is not set */
-/* RT_DFS_ELM_USE_LFN_0 is not set */
-/* RT_DFS_ELM_USE_LFN_1 is not set */
-/* RT_DFS_ELM_USE_LFN_2 is not set */
-/* RT_DFS_ELM_USE_LFN_3 is not set */
+#define RT_USING_DFS
+#define DFS_USING_WORKDIR
+#define DFS_FILESYSTEMS_MAX 2
+#define DFS_FILESYSTEM_TYPES_MAX 2
+#define DFS_FD_MAX 16
+#define RT_USING_DFS_DEVFS
 
 /* Device Drivers */
 
 #define RT_USING_DEVICE_IPC
+#define RT_PIPE_BUFSZ 512
 #define RT_USING_SERIAL
-/* RT_USING_CAN is not set */
-/* RT_USING_HWTIMER is not set */
-/* RT_USING_CPUTIME is not set */
-/* RT_USING_I2C is not set */
 #define RT_USING_PIN
-/* RT_USING_MTD_NOR is not set */
-/* RT_USING_MTD_NAND is not set */
-/* RT_USING_RTC is not set */
-/* RT_USING_SDIO is not set */
-/* RT_USING_SPI is not set */
-/* RT_USING_WDT is not set */
-/* RT_USING_WIFI is not set */
 
 /* Using USB */
 
-/* RT_USING_USB_HOST is not set */
-/* RT_USING_USB_DEVICE is not set */
 
 /* POSIX layer and C standard library */
 
-#define RT_USING_LIBC
-#define RT_USING_PTHREADS
-/* HAVE_SYS_SIGNALS is not set */
 
-/* Network stack */
+/* Network */
+
+/* Socket abstraction layer */
+
 
 /* light weight TCP/IP stack */
 
-/* RT_USING_LWIP is not set */
 
 /* Modbus master and slave stack */
 
-/* RT_USING_MODBUS is not set */
+
+/* AT commands */
+
 
 /* VBUS(Virtual Software BUS) */
 
-/* RT_USING_VBUS is not set */
 
 /* Utilities */
 
-/* RT_USING_LOGTRACE is not set */
-/* RT_USING_RYM is not set */
 
 /* RT-Thread online packages */
 
-/* system packages */
-
-/* RT-Thread GUI Engine */
-
-/* PKG_USING_GUIENGINE is not set */
-/* PKG_USING_LWEXT4 is not set */
-/* PKG_USING_PARTITION is not set */
-/* PKG_USING_SQLITE is not set */
-/* PKG_USING_RTI is not set */
-
 /* IoT - internet of things */
 
-/* PKG_USING_PAHOMQTT is not set */
-/* PKG_USING_WEBCLIENT is not set */
-/* PKG_USING_MONGOOSE is not set */
-/* PKG_USING_WEBTERMINAL is not set */
-/* PKG_USING_CJSON is not set */
-/* PKG_USING_LJSON is not set */
-/* PKG_USING_EZXML is not set */
-/* PKG_USING_NANOPB is not set */
-/* PKG_USING_GAGENT_CLOUD is not set */
 
 /* Wi-Fi */
 
 /* Marvell WiFi */
 
-/* PKG_USING_WLANMARVELL is not set */
 
 /* Wiced WiFi */
 
-/* PKG_USING_WLAN_WICED is not set */
-/* PKG_USING_COAP is not set */
-/* PKG_USING_NOPOLL is not set */
-/* PKG_USING_NETUTILS is not set */
+
+/* IoT Cloud */
+
 
 /* security packages */
 
-/* PKG_USING_MBEDTLS is not set */
-/* PKG_USING_libsodium is not set */
-/* PKG_USING_TINYCRYPT is not set */
 
 /* language packages */
 
-/* PKG_USING_JERRYSCRIPT is not set */
-/* PKG_USING_MICROPYTHON is not set */
 
 /* multimedia packages */
 
-/* PKG_USING_OPENMV is not set */
 
 /* tools packages */
 
-/* PKG_USING_CMBACKTRACE is not set */
-/* PKG_USING_EASYLOGGER is not set */
-/* PKG_USING_SYSTEMVIEW is not set */
-/* PKG_USING_IPERF is not set */
+
+/* system packages */
+
+
+/* peripheral libraries and drivers */
+
 
 /* miscellaneous packages */
 
-/* PKG_USING_FASTLZ is not set */
-/* PKG_USING_MINILZO is not set */
-/* PKG_USING_QUICKLZ is not set */
+
+/* sample package */
+
+/* samples: kernel and components samples */
+
 
 /* example package: hello */
 
-/* PKG_USING_HELLO is not set */
-/* PKG_USING_MULTIBUTTON is not set */
 #define RT_USING_EXT_SDRAM
 #define RT_USING_UART1
-/* RT_USING_UART2 is not set */
-/* RT_USING_UART3 is not set */
-/* RT_USING_SPI5 is not set */
 
 #endif