[BSP]Add more drivers and fix some problem

bsp/apollo2/board/adc.c

+/*
+ * File      : adc.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-12-04     Haley        the first version
+ */
+
+#include <rtdevice.h>
+#include "am_mcu_apollo.h"
+#include "board.h"
+
+#ifdef RT_USING_ADC
+
+/* sem define */
+rt_sem_t adcsem = RT_NULL;
+
+#define BATTERY_GPIO            29                        /* Battery */
+#define BATTERY_ADC_PIN         AM_HAL_PIN_29_ADCSE1 
+#define BATTERY_ADC_CHANNEL     AM_HAL_ADC_SLOT_CHSEL_SE1 /* BATTERY ADC采集通道 */
+#define BATTERY_ADC_CHANNELNUM  1                         /* BATTERY ADC采集通道号 */
+
+#define ADC_CTIMER_NUM          3                         /* ADC使用定时器 */
+
+#define ADC_CHANNEL_NUM         1                         /* ADC采集通道个数 */
+#define ADC_SAMPLE_NUM          8                         /* ADC采样个数, NE_OF_OUTPUT */
+
+rt_uint8_t bat_adc_cnt = (ADC_CHANNEL_NUM + 1)*ADC_SAMPLE_NUM;
+rt_int16_t am_adc_buffer_pool[64];
+
+rt_uint8_t am_adc_data_get(rt_int16_t *buff, rt_uint16_t size)
+{
+    /* wait adc interrupt release sem forever */	
+    rt_sem_take(adcsem, RT_WAITING_FOREVER);
+
+    /* copy the data */
+    rt_memcpy(buff, am_adc_buffer_pool, size*sizeof(rt_int16_t));
+
+    return 0;
+}
+
+void am_adc_start(void)
+{
+    /* adcsem create */
+    adcsem = rt_sem_create("adcsem", 0, RT_IPC_FLAG_FIFO);
+
+    /* Start the ctimer */
+    am_hal_ctimer_start(ADC_CTIMER_NUM, AM_HAL_CTIMER_TIMERA);
+
+    /* Trigger the ADC once */
+    am_hal_adc_trigger();
+}
+
+void am_adc_stop(void)
+{
+    /* Stop the ctimer */
+    am_hal_ctimer_stop(ADC_CTIMER_NUM, AM_HAL_CTIMER_TIMERA);
+
+    /* adcsem delete */
+    rt_sem_delete(adcsem);
+}
+
+/**
+ * @brief Interrupt handler for the ADC
+ *
+ * This function is Interrupt handler for the ADC
+ *
+ * @return None.
+ */
+void am_adc_isr(void)
+{
+    uint32_t ui32Status, ui32FifoData;
+
+    /* Read the interrupt status */
+    ui32Status = am_hal_adc_int_status_get(true);
+
+    /* Clear the ADC interrupt */
+    am_hal_adc_int_clear(ui32Status);
+
+    /* If we got a FIFO 75% full (which should be our only ADC interrupt), go ahead and read the data */
+    if (ui32Status & AM_HAL_ADC_INT_FIFOOVR1)
+    {
+        do
+        {
+            /* Read the value from the FIFO into the circular buffer */
+            ui32FifoData = am_hal_adc_fifo_pop();
+
+            if(AM_HAL_ADC_FIFO_SLOT(ui32FifoData) == BATTERY_ADC_CHANNELNUM)
+                am_adc_buffer_pool[bat_adc_cnt++] = AM_HAL_ADC_FIFO_SAMPLE(ui32FifoData);
+
+            if(bat_adc_cnt > (ADC_CHANNEL_NUM + 1)*ADC_SAMPLE_NUM - 1)
+            {
+                /* shift data */
+                rt_memmove(am_adc_buffer_pool, am_adc_buffer_pool + ADC_CHANNEL_NUM*ADC_SAMPLE_NUM, ADC_CHANNEL_NUM*ADC_SAMPLE_NUM*sizeof(rt_int16_t));
+                bat_adc_cnt = (ADC_CHANNEL_NUM + 1)*ADC_SAMPLE_NUM;
+
+                /* release adcsem */
+                rt_sem_release(adcsem);
+            }
+        } while (AM_HAL_ADC_FIFO_COUNT(ui32FifoData) > 0);
+    }
+}
+
+static void timerA3_for_adc_init(void)
+{
+    /* Start a timer to trigger the ADC periodically (1 second) */
+    am_hal_ctimer_config_single(ADC_CTIMER_NUM, AM_HAL_CTIMER_TIMERA,
+                                   AM_HAL_CTIMER_XT_2_048KHZ |
+                                   AM_HAL_CTIMER_FN_REPEAT |
+                                   AM_HAL_CTIMER_INT_ENABLE |
+                                   AM_HAL_CTIMER_PIN_ENABLE);
+
+    am_hal_ctimer_int_enable(AM_HAL_CTIMER_INT_TIMERA3);
+
+    /* Set 512 sample rate */
+    am_hal_ctimer_period_set(ADC_CTIMER_NUM, AM_HAL_CTIMER_TIMERA, 3, 1);
+
+    /* Enable the timer A3 to trigger the ADC directly */
+    am_hal_ctimer_adc_trigger_enable();
+
+    /* Start the timer */
+    //am_hal_ctimer_start(ADC_CTIMER_NUM, AM_HAL_CTIMER_TIMERA);
+}
+
+/**
+ * @brief Initialize the ADC
+ *
+ * This function initialize the ADC
+ *
+ * @return None.
+ */
+int rt_hw_adc_init(void)
+{
+    am_hal_adc_config_t sADCConfig;
+
+    /* timer for adc init*/
+    timerA3_for_adc_init();
+
+    /* Set a pin to act as our ADC input */
+    am_hal_gpio_pin_config(BATTERY_GPIO, BATTERY_ADC_PIN);
+
+    /* Enable interrupts */
+    am_hal_interrupt_enable(AM_HAL_INTERRUPT_ADC);
+
+    /* Enable the ADC power domain */
+    am_hal_pwrctrl_periph_enable(AM_HAL_PWRCTRL_ADC);
+
+    /* Set up the ADC configuration parameters. These settings are reasonable
+       for accurate measurements at a low sample rate */
+    sADCConfig.ui32Clock = AM_HAL_ADC_CLOCK_HFRC;
+    sADCConfig.ui32TriggerConfig = AM_HAL_ADC_TRIGGER_SOFT;
+    sADCConfig.ui32Reference = AM_HAL_ADC_REF_INT_2P0;
+    sADCConfig.ui32ClockMode = AM_HAL_ADC_CK_LOW_POWER;
+    sADCConfig.ui32PowerMode = AM_HAL_ADC_LPMODE_0;
+    sADCConfig.ui32Repeat = AM_HAL_ADC_REPEAT;
+    am_hal_adc_config(&sADCConfig);
+
+    /* For this example, the samples will be coming in slowly. This means we
+       can afford to wake up for every conversion */
+    am_hal_adc_int_enable(AM_HAL_ADC_INT_FIFOOVR1);
+
+    /* Set up an ADC slot */
+    am_hal_adc_slot_config(BATTERY_ADC_CHANNELNUM, AM_HAL_ADC_SLOT_AVG_1 |
+                              AM_HAL_ADC_SLOT_14BIT |
+                              BATTERY_ADC_CHANNEL |
+                              AM_HAL_ADC_SLOT_ENABLE);
+
+    /* Enable the ADC */
+    am_hal_adc_enable();
+
+    rt_kprintf("adc_init!\n");
+
+    return 0;
+}
+#ifdef RT_USING_COMPONENTS_INIT
+INIT_BOARD_EXPORT(rt_hw_adc_init);
+#endif
+
+#endif
+/*@}*/

bsp/apollo2/board/adc.h

+/*
+ * File      : adc.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-09-18     Haley        the first version
+ */
+
+#ifndef __ADC_H_
+#define __ADC_H_
+
+#include <rtthread.h>
+
+/**
+ * @brief External function definitions
+ *
+ */
+int rt_hw_adc_init(void);
+rt_uint8_t am_adc_data_get(rt_int16_t *buff, rt_uint16_t size);
+void am_adc_start(void);
+void am_adc_stop(void);
+
+#endif // __ADC_H_

bsp/apollo2/board/board.c

@@ -30,7 +30,6 @@
 #include "hal/am_hal_clkgen.h"
 #include "hal/am_hal_cachectrl.h"
 #include "uart.h"
-#include "led.h"
 
 #ifdef __CC_ARM
 extern int Image$$RW_IRAM1$$ZI$$Limit;

bsp/apollo2/board/board.h

@@ -35,12 +35,32 @@
 #define RT_USING_UART0
 //#define RT_USING_UART1
 
+/* ADC driver select. */
+#define RT_USING_ADC
+
+/* I2C driver select. */
+#define RT_USING_I2C0
+//#define RT_USING_I2C2
+//#define RT_USING_I2C4
+
+/* SMBUS driver select. */
+//#define RT_USING_SMBUS
+
+/* SPI driver select. */
+#define RT_USING_SPI1
+
 /* LED driver select. */
 #define RT_USING_LED0
 //#define RT_USING_LED1
 //#define RT_USING_LED2
 //#define RT_USING_LED3
 
+/* PWM driver select. */
+//#define RT_USING_PWM
+
+/* PDM driver select. */
+//#define RT_USING_PDM
+
 void rt_hw_board_init(void);
 
 #endif /* __BOARD_H__ */

bsp/apollo2/board/flash.c

+/*
+ * File      : flash.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-12-04     Haley        the first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include "am_mcu_apollo.h"
+#include "flash.h"
+
+/* RT-Thread device interface */
+static rt_err_t rt_flash_init(rt_device_t dev)
+{
+    return RT_EOK;
+}
+
+static rt_err_t rt_flash_open(rt_device_t dev, rt_uint16_t oflag)
+{
+    return RT_EOK;
+}
+
+static rt_err_t rt_flash_close(rt_device_t dev)
+{
+    return RT_EOK;
+}
+
+static rt_err_t rt_flash_control(rt_device_t dev, int cmd, void *args)
+{
+    uint32_t ui32Critical, i;
+    uint32_t ui32CurrentPage, ui32CurrentBlock;
+
+    if (cmd == RT_DEVICE_CTRL_BLK_GETGEOME)
+    {
+        struct rt_device_blk_geometry *geometry;
+
+        geometry = (struct rt_device_blk_geometry *)args;
+        if (geometry == RT_NULL)
+            return -RT_ERROR;
+
+        geometry->bytes_per_sector = 8192;
+        geometry->sector_count = 8192;
+        geometry->block_size = 8192;
+    }
+
+    else if(cmd == RT_DEVICE_CTRL_BLK_ERASE)
+    {
+        struct rom_control_erase *erase;
+        erase = (struct rom_control_erase *)args;
+
+        // Start a critical section.
+        ui32Critical = am_hal_interrupt_master_disable();
+
+        if (erase->type == 0x01)
+        {
+            for(i = 0; i < erase->pagenums; i++)
+            {
+                // Figure out what page and block we're working on.
+                ui32CurrentPage =  AM_HAL_FLASH_ADDR2PAGE(erase->addrstart);
+                ui32CurrentBlock = AM_HAL_FLASH_ADDR2INST(erase->addrstart);
+
+                am_hal_flash_page_erase(AM_HAL_FLASH_PROGRAM_KEY, ui32CurrentBlock, ui32CurrentPage); //
+                erase->addrstart += 8192;
+            }
+        }
+
+        // Exit the critical section.
+        am_hal_interrupt_master_set(ui32Critical);
+    }
+
+    return RT_EOK;
+}
+
+static rt_size_t rt_flash_read(rt_device_t dev,
+                                   rt_off_t pos,
+                                   void* buffer,
+                                   rt_size_t size)
+{
+    rt_memcpy((uint8_t *)buffer, (uint8_t *)pos, size);
+
+    return size;
+}
+
+static rt_size_t rt_flash_write(rt_device_t dev,
+                                    rt_off_t pos,
+                                    const void* buffer,
+                                    rt_size_t size)
+{
+    uint32_t ui32Critical;
+    uint32_t ui32WordsInBuffer;
+
+    ui32WordsInBuffer = (size + 3)/ 4;
+
+    // Start a critical section.
+    ui32Critical = am_hal_interrupt_master_disable();
+
+    // Program the flash page with the data we just received.
+    am_hal_flash_program_main(AM_HAL_FLASH_PROGRAM_KEY, (uint32_t *)buffer, (uint32_t *)pos, ui32WordsInBuffer);
+
+    // Exit the critical section.
+    am_hal_interrupt_master_set(ui32Critical);
+
+    return size;
+}
+
+int rt_hw_rom_init(void)
+{
+    static struct rt_device device;
+
+    /* register device */
+    device.type        = RT_Device_Class_Block;
+    device.init        = rt_flash_init;
+    device.open        = rt_flash_open;
+    device.close       = rt_flash_close;
+    device.read        = rt_flash_read;
+    device.write       = rt_flash_write;
+    device.control     = rt_flash_control;
+
+    /* no private */
+    device.user_data = RT_NULL;
+
+    /* register the device */
+    rt_device_register(&device, "rom", RT_DEVICE_FLAG_RDWR);
+
+    rt_kprintf("register device rom!\r\n");
+
+    return 0;
+}
+#ifdef RT_USING_COMPONENTS_INIT
+INIT_DEVICE_EXPORT(rt_hw_rom_init);
+#endif
+
+/*@}*/

bsp/apollo2/board/flash.h

+/*
+ * File      : flash.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-12-04     Haley        the first version
+ */
+
+#ifndef __FLASH_H_
+#define __FLASH_H_
+
+#include <rtthread.h>
+
+/* Erase feature struct define */
+struct rom_control_erase
+{
+    rt_uint8_t        type;
+    rt_uint32_t       addrstart;
+    rt_uint32_t       pagenums;
+};
+
+/**
+ * @brief External function definitions
+ *
+ */
+int rt_hw_rom_init(void);
+
+#endif // __FLASH_H_

bsp/apollo2/board/gpio.c

@@ -87,13 +87,16 @@ const static struct rt_pin_ops _am_pin_ops =
     am_pin_read,
 };
 
-int hw_pin_init(void)
+int rt_hw_pin_init(void)
 {
     rt_device_pin_register("pin", &_am_pin_ops, RT_NULL);
+
+    rt_kprintf("pin_init!\n");
+
     return 0;
 }
 
-INIT_BOARD_EXPORT(hw_pin_init);
+INIT_BOARD_EXPORT(rt_hw_pin_init);
 #endif
 
 /*@}*/

bsp/apollo2/board/gpio.h

@@ -25,6 +25,10 @@
 #ifndef __GPIO_H
 #define __GPIO_H
 
-int hw_pin_init(void);
+/**
+ * @brief External function definitions
+ *
+ */
+int rt_hw_pin_init(void);
 
 #endif // __GPIO_H

bsp/apollo2/board/i2c.c

+/*
+ * File      :_i2c.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-12-04     Haley        the first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include "am_mcu_apollo.h"
+#include "board.h"
+
+/* I2C0 */
+#define AM_I2C0_IOM_INST    0
+
+#define I2C0_GPIO_SCL       5
+#define I2C0_GPIO_CFG_SCK   AM_HAL_PIN_5_M0SCL
+#define I2C0_GPIO_SDA       6
+#define I2C0_GPIO_CFG_SDA   AM_HAL_PIN_6_M0SDA
+
+/* I2C2 */
+#define AM_I2C2_IOM_INST    2
+
+#define I2C2_GPIO_SCL       27
+#define I2C2_GPIO_CFG_SCK   AM_HAL_PIN_27_M2SCL
+#define I2C2_GPIO_SDA       25
+#define I2C2_GPIO_CFG_SDA   AM_HAL_PIN_25_M2SDA
+
+/* I2C4 */
+#define AM_I2C4_IOM_INST    4
+
+#define I2C4_GPIO_SCL       39
+#define I2C4_GPIO_CFG_SCK   AM_HAL_PIN_39_M4SCL
+#define I2C4_GPIO_SDA       40
+#define I2C4_GPIO_CFG_SDA   AM_HAL_PIN_40_M4SDA
+
+static am_hal_iom_config_t g_sIOMConfig =
+{
+    AM_HAL_IOM_I2CMODE, // ui32InterfaceMode
+    AM_HAL_IOM_100KHZ, // ui32ClockFrequency
+    0, // bSPHA
+    0, // bSPOL
+    4, // ui8WriteThreshold
+    60, // ui8ReadThreshold
+};
+
+/* AM i2c driver */
+struct am_i2c_bus
+{
+    struct rt_i2c_bus_device parent;
+    rt_uint32_t u32Module;
+};
+
+//connect am drv to rt drv.
+rt_size_t rt_i2c_master_xfer(struct rt_i2c_bus_device *bus,
+                          struct rt_i2c_msg         *msgs,
+                          rt_uint32_t               num)
+{
+    struct am_i2c_bus * am_i2c_bus = (struct am_i2c_bus *)bus;
+    struct rt_i2c_msg *msg;
+    int i;
+    rt_int32_t ret = RT_EOK;
+
+    for (i = 0; i < num; i++)
+    {
+        msg = &msgs[i];
+        if (msg->flags == RT_I2C_RD)
+        {
+            am_hal_iom_i2c_read(am_i2c_bus->u32Module, msg->addr, (uint32_t *)msg->buf, msg->len, AM_HAL_IOM_RAW);
+        }
+        else if(msg->flags == RT_I2C_WR)
+        {
+            am_hal_iom_i2c_write(am_i2c_bus->u32Module, msg->addr, (uint32_t *)msg->buf, msg->len, AM_HAL_IOM_RAW);
+        }
+
+        ret++;
+    }
+
+    return ret;
+}
+
+rt_err_t rt_i2c_bus_control(struct rt_i2c_bus_device *bus,
+                          rt_uint32_t               cmd,
+                          rt_uint32_t               arg)
+{
+    struct am_i2c_bus * am_i2c_bus = (struct am_i2c_bus *)bus;
+    //rt_uint32_t ctrl_arg = (rt_uint32_t)(arg);
+
+    RT_ASSERT(bus != RT_NULL);
+    am_i2c_bus = (struct am_i2c_bus *)bus->parent.user_data;
+
+    RT_ASSERT(am_i2c_bus != RT_NULL);
+
+    switch (cmd)
+    {
+        /* I2C config */
+        case RT_DEVICE_CTRL_CONFIG :
+            break;
+    }
+
+    return RT_EOK;
+}
+
+static const struct rt_i2c_bus_device_ops am_i2c_ops =
+{
+    rt_i2c_master_xfer,
+    RT_NULL,
+    rt_i2c_bus_control
+};
+
+#ifdef RT_USING_I2C0
+static struct am_i2c_bus am_i2c_bus_0 = 
+{
+    {0},
+    AM_I2C0_IOM_INST
+};
+#endif
+
+#ifdef RT_USING_I2C1
+static struct am_i2c_bus am_i2c_bus_1 = 
+{
+    {0},
+    AM_I2C1_IOM_INST
+};
+#endif
+
+#ifdef RT_USING_I2C2
+static struct am_i2c_bus am_i2c_bus_2 = 
+{
+    {1},
+    AM_I2C2_IOM_INST
+};
+#endif
+
+#ifdef RT_USING_I2C3
+static struct am_i2c_bus am_i2c_bus_3 = 
+{
+    {2},
+    AM_I2C3_IOM_INST
+};
+#endif
+
+#ifdef RT_USING_I2C4
+static struct am_i2c_bus am_i2c_bus_4 = 
+{
+    {3},
+    AM_I2C4_IOM_INST
+};
+#endif
+
+int rt_i2c_init(void)
+{
+    struct am_i2c_bus* am_i2c;
+
+#ifdef RT_USING_I2C0
+    /* init i2c gpio */
+    am_hal_gpio_pin_config(I2C0_GPIO_SCL, I2C0_GPIO_CFG_SCK | AM_HAL_GPIO_PULL6K);
+    am_hal_gpio_pin_config(I2C0_GPIO_SDA, I2C0_GPIO_CFG_SDA | AM_HAL_GPIO_PULL6K);
+
+    /* Initialize IOM 0 in I2C mode at 100KHz */
+    am_hal_iom_pwrctrl_enable(AM_I2C0_IOM_INST);
+    g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_100KHZ;
+    am_hal_iom_config(AM_I2C0_IOM_INST, &g_sIOMConfig);
+    am_hal_iom_enable(AM_I2C0_IOM_INST);
+
+    /* init i2c bus device */
+    am_i2c = &am_i2c_bus_0;
+    am_i2c->parent.ops = &am_i2c_ops;
+    rt_i2c_bus_device_register(&am_i2c->parent, "i2c0");
+#endif
+
+#ifdef RT_USING_I2C2
+    /* init i2c gpio */
+    am_hal_gpio_pin_config(I2C2_GPIO_SCL, I2C2_GPIO_CFG_SCK | AM_HAL_GPIO_PULL6K);
+    am_hal_gpio_pin_config(I2C2_GPIO_SDA, I2C2_GPIO_CFG_SDA | AM_HAL_GPIO_PULL6K);
+
+    /* Initialize IOM 2 in I2C mode at 400KHz */
+    am_hal_iom_pwrctrl_enable(AM_I2C2_IOM_INST);
+    g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_400KHZ;
+    am_hal_iom_config(AM_I2C2_IOM_INST, &g_sIOMConfig);
+    am_hal_iom_enable(AM_I2C2_IOM_INST);
+
+    /* init i2c bus device */
+    am_i2c = &am_i2c_bus_2;
+    am_i2c->parent.ops = &am_i2c_ops;
+    rt_i2c_bus_device_register(&am_i2c->parent, "i2c2");
+#endif
+
+#ifdef RT_USING_I2C4
+    /* init i2c gpio */
+    am_hal_gpio_pin_config(I2C4_GPIO_SCL, I2C4_GPIO_CFG_SCK | AM_HAL_GPIO_PULL6K);
+    am_hal_gpio_pin_config(I2C4_GPIO_SDA, I2C4_GPIO_CFG_SDA | AM_HAL_GPIO_PULL6K);
+
+    /* Initialize IOM 4 in I2C mode at 400KHz */
+    am_hal_iom_pwrctrl_enable(AM_I2C4_IOM_INST);
+    g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_400KHZ;
+    am_hal_iom_config(AM_I2C4_IOM_INST, &g_sIOMConfig);
+    am_hal_iom_enable(AM_I2C4_IOM_INST);
+
+    /* init i2c bus device */
+    am_i2c = &am_i2c_bus_4;
+    am_i2c->parent.ops = &am_i2c_ops;
+    rt_i2c_bus_device_register(&am_i2c->parent, "i2c4");
+#endif
+
+    rt_kprintf("i2c_init!\n");
+
+    return 0;
+}
+#ifdef RT_USING_COMPONENTS_INIT
+INIT_BOARD_EXPORT(rt_i2c_init);
+#endif
+
+/*@}*/

bsp/apollo2/board/i2c.h

+/*
+ * File      : i2c.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-12-04     Haley        the first version
+ */
+
+#ifndef __I2C_H_
+#define __I2C_H_
+
+#include <rtthread.h>
+
+/**
+ * @brief External function definitions
+ *
+ */
+int rt_hw_i2c_init(void);
+
+#endif // __I2C_H_

bsp/apollo2/board/led.c

@@ -24,7 +24,6 @@
 
 #include <rtthread.h>
 #include <rtdevice.h>
-#include "am_mcu_apollo.h"
 #include "board.h"
 
 #define AM_GPIO_LED0                46
@@ -128,14 +127,18 @@ int rt_hw_led_init(void)
     rt_hw_led_off(3);
 #endif /* RT_USING_LED1 */
 #endif
+
+    rt_kprintf("led_init!\n");
+
     return 0;
 }
 #ifdef RT_USING_COMPONENTS_INIT
-INIT_BOARD_EXPORT(rt_hw_led_init);
+INIT_DEVICE_EXPORT(rt_hw_led_init);
 #endif
 
 #ifdef RT_USING_FINSH
 #include <finsh.h>
+
 void led(rt_uint32_t led, rt_uint32_t state)
 {
     /* set led status */

bsp/apollo2/board/led.h

@@ -21,9 +21,9 @@
  * Date           Author       Notes
  * 2017-09-14     Haley        the first version
  */
- 
-#ifndef __HW_LED_H
-#define __HW_LED_H
+
+#ifndef __LED_H
+#define __LED_H
 
 #include <rtthread.h>
 
@@ -35,4 +35,4 @@ void rt_hw_led_init(void);
 void rt_hw_led_on(rt_uint8_t LEDNum);
 void rt_hw_led_off(rt_uint8_t LEDNum);
 
-#endif // __HW_LED_H
+#endif // __LED_H

bsp/apollo2/board/pdm.c

+/*
+ * File      :_pdm.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-12-04     Haley        the first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include "am_mcu_apollo.h"
+#include "board.h"
+
+#ifdef RT_USING_PDM
+
+/* sem define */
+rt_sem_t pdmsem = RT_NULL;
+
+#define NWA_FRAME_MS 10
+#define NWA_FRAME_SAMPLES (16*NWA_FRAME_MS)    /* 16k, 16bit, mono audio data */
+#define PDM_FIFO_THRESHOLD  NWA_FRAME_SAMPLES
+
+#define PDM_GPIO_CLK        22
+#define PDM_GPIO_CFG_CLK    AM_HAL_PIN_22_PDM_CLK
+#define PDM_GPIO_DATA       23
+#define PDM_GPIO_CFG_DATA   AM_HAL_PIN_23_PDM_DATA
+
+#define PING_PONG_BUF_SIZE	8000*NWA_FRAME_MS
+static rt_uint16_t am_pdm_buffer_pool[PING_PONG_BUF_SIZE];
+static rt_uint8_t pdm_flag = 0;
+static rt_uint16_t pdm_cnt = 0;
+
+
+static am_hal_pdm_config_t g_sPDMConfig =
+{
+    AM_HAL_PDM_PCFG_LRSWAP_DISABLE | AM_HAL_PDM_PCFG_RIGHT_PGA_P105DB | AM_HAL_PDM_PCFG_LEFT_PGA_P105DB
+           | AM_HAL_PDM_PCFG_MCLKDIV_DIV1 | AM_HAL_PDM_PCFG_SINC_RATE(48) | AM_HAL_PDM_PCFG_ADCHPD_ENABLE
+           | AM_HAL_PDM_PCFG_HPCUTOFF(0xB) | AM_HAL_PDM_PCFG_CYCLES(0x1) | AM_HAL_PDM_PCFG_SOFTMUTE_DISABLE
+           | AM_HAL_PDM_PCFG_PDMCORE_ENABLE, /* Set the PDM configuration */
+    AM_REG_PDM_VCFG_IOCLKEN_EN | AM_HAL_PDM_VCFG_RSTB_NORMAL | AM_REG_PDM_VCFG_PDMCLKSEL_750KHz
+           | AM_HAL_PDM_VCFG_PDMCLK_ENABLE | AM_HAL_PDM_VCFG_I2SMODE_DISABLE | AM_HAL_PDM_VCFG_BCLKINV_DISABLE
+           | AM_HAL_PDM_VCFG_DMICDEL_DISABLE | AM_HAL_PDM_VCFG_SELAP_INTERNAL | AM_HAL_PDM_VCFG_PACK_DISABLE
+           | AM_HAL_PDM_VCFG_CHANNEL_RIGHT, /* Set the Voice Configuration */
+    PDM_FIFO_THRESHOLD, /* Select the FIFO PCM sample threshold */
+};
+
+/**
+ * @brief Get the pdm data.
+ *
+ * @param None.
+ *
+ * This function Get the pdm data.
+ *
+ * @return None.
+ */
+rt_uint8_t am_pdm_data_get(rt_uint8_t *buff, rt_uint16_t size)
+{
+    uint8_t temp;
+    int i;
+
+    /* wait adc interrupt release sem forever */
+    rt_sem_take(pdmsem, RT_WAITING_FOREVER);
+
+    for(i = 0; i < PING_PONG_BUF_SIZE; i++)
+    {
+        temp = (uint8_t)(am_pdm_buffer_pool[i] & 0xFF);
+        /* lower byte */
+        while ( AM_BFRn(UART, 0, FR, TXFF) );
+        AM_REGn(UART, 0, DR) = temp;
+
+        temp = (uint8_t)((am_pdm_buffer_pool[i] & 0xFF00)>>8);
+        /* higher byte */
+        while ( AM_BFRn(UART, 0, FR, TXFF) );
+        AM_REGn(UART, 0, DR) = temp;
+    }
+    /* copy the data */
+    //rt_memcpy(buff, am_pdm_buffer_pool, size*sizeof(rt_uint16_t));
+
+    pdm_flag = 0;
+
+    return 0;
+}
+
+/**
+ * @brief Start the pdm.
+ *
+ * @param None.
+ *
+ * This function Start the pdm.
+ *
+ * @return None.
+ */
+void am_pdm_start(void)
+{
+    /* adcsem create */
+    pdmsem = rt_sem_create("pdmsem", 0, RT_IPC_FLAG_FIFO);
+
+    /* Enable PDM */
+    am_hal_pdm_enable();
+    am_hal_interrupt_enable(AM_HAL_INTERRUPT_PDM);
+}
+
+/**
+ * @brief Stop the pdm.
+ *
+ * @param None.
+ *
+ * This function Stop the pdm.
+ *
+ * @return None.
+ */
+void am_pdm_stop(void)
+{
+    /* Disable PDM */
+    am_hal_pdm_disable();
+    am_hal_interrupt_disable(AM_HAL_INTERRUPT_PDM);
+
+    /* adcsem delete */
+    rt_sem_delete(pdmsem);
+}
+
+/**
+ * @brief Get the pdm left gain.
+ *
+ * @param None.
+ *
+ * This function Get the pdm left gain.
+ *
+ * @return gain_val.
+ */
+uint8_t am_pdm_left_gain_get(void)
+{
+    /* get the left gain */
+    return am_hal_pdm_left_gain_get();
+}
+
+/**
+ * @brief Set the pdm left gain.
+ *
+ * @param None.
+ *
+ * This function Set the pdm left gain.
+ *
+ * @return None.
+ */
+void am_pdm_left_gain_set(uint8_t gain_val)
+{
+    /* set the left gain */
+    am_hal_pdm_left_gain_set(gain_val);
+}
+
+/**
+ * @brief Get the pdm right gain.
+ *
+ * @param None.
+ *
+ * This function Get the pdm right gain.
+ *
+ * @return gain_val.
+ */
+uint8_t am_pdm_right_gain_get(void)
+{
+    /* get the right gain */
+    return am_hal_pdm_right_gain_get();
+}
+
+/**
+ * @brief Set the pdm right gain.
+ *
+ * @param None.
+ *
+ * This function Set the pdm right gain.
+ *
+ * @return None.
+ */
+void am_pdm_right_gain_set(uint8_t gain_val)
+{
+    /* set the right gain */
+    am_hal_pdm_right_gain_set(gain_val);
+}
+
+/**
+ * @brief Interrupt handler for the PDM
+ *
+ * This function is Interrupt handler for the PDM
+ *
+ * @return None.
+ */
+void am_pdm_isr (void)
+{
+    uint32_t ui32FifoData;
+    int i;
+
+    /* Clear the PDM interrupt */
+    am_hal_pdm_int_clear(AM_HAL_PDM_INT_UNDFL | AM_HAL_PDM_INT_OVF | AM_HAL_PDM_INT_FIFO);
+
+    for (i = 0; i < PDM_FIFO_THRESHOLD; i++)  /* adjust as needed */
+    {
+        ui32FifoData = am_hal_pdm_fifo_data_read();
+
+        if(pdm_flag == 0)
+        {
+            am_pdm_buffer_pool[pdm_cnt * PDM_FIFO_THRESHOLD + i] = (uint16_t)ui32FifoData;
+        }
+    }
+
+    if(pdm_flag == 0)
+        pdm_cnt ++;
+
+    if(pdm_cnt == PING_PONG_BUF_SIZE/PDM_FIFO_THRESHOLD)	/* 500 means 10 second logging under 8k sampling rate */
+    {
+        pdm_cnt = 0;
+        pdm_flag = 1;
+
+        /* release pdmsem */
+        rt_sem_release(pdmsem);
+    }
+}
+
+/**
+ * @brief Initialize the PDM
+ *
+ * This function initialize the PDM
+ *
+ * @return None.
+ */
+int rt_hw_pdm_init(void)
+{
+    /* Enable power to modules used */
+    am_hal_pwrctrl_periph_enable(AM_HAL_PWRCTRL_PDM);
+
+    /* Enable the PDM clock and data */
+    am_hal_gpio_pin_config(PDM_GPIO_CLK, PDM_GPIO_CFG_CLK | AM_HAL_GPIO_HIGH_DRIVE);
+    am_hal_gpio_pin_config(PDM_GPIO_DATA, PDM_GPIO_CFG_DATA );
+
+    /* PDM setting */
+    am_hal_pdm_config(&g_sPDMConfig);
+
+    /* Enable PDM interrupts */
+    am_hal_pdm_int_enable(AM_HAL_PDM_INT_FIFO);
+
+    /* Clear PDM interrupts */
+    am_hal_pdm_int_clear(AM_HAL_PDM_INT_UNDFL | AM_HAL_PDM_INT_OVF | AM_HAL_PDM_INT_FIFO);
+
+    rt_kprintf("pdm_init!\n");
+
+    return 0;
+}
+#ifdef RT_USING_COMPONENTS_INIT
+INIT_BOARD_EXPORT(rt_hw_pdm_init);
+#endif
+
+#endif
+
+/*@}*/

bsp/apollo2/board/pdm.h

+/*
+ * File      : pdm.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-12-04     Haley        the first version
+ */
+
+#ifndef __PDM_H_
+#define __PDM_H_
+
+#include <rtthread.h>
+
+/**
+ * @brief External function definitions
+ *
+ */
+int rt_hw_pdm_init(void);
+rt_uint8_t am_pdm_data_get(rt_uint8_t *buff, rt_uint16_t size);
+void am_pdm_start(void);
+void am_pdm_stop(void);
+
+#endif // __PDM_H_

bsp/apollo2/board/pwm.c

+/*
+ * File      :_pwm.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-12-04     Haley        the first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include "am_mcu_apollo.h"
+#include "board.h"
+
+#ifdef RT_USING_PWM
+
+// LED3 is pin 19
+#define AM_BSP_GPIO_PWM_LED                 19
+#define AM_BSP_GPIO_CFG_PWM_LED             AM_HAL_PIN_19_TCTB1
+
+#define AM_BSP_PWM_LED_TIMER                1
+#define AM_BSP_PWM_LED_TIMER_SEG            AM_HAL_CTIMER_TIMERB
+#define AM_BSP_PWM_LED_TIMER_INT            AM_HAL_CTIMER_INT_TIMERB1
+
+/**
+ * @brief LED brightness profile
+ *
+ * This function define LED brightness profile
+ *
+ * @return None.
+ */
+volatile uint32_t g_ui32Index = 0;
+const uint32_t g_pui32Brightness[64] =
+{
+    1, 1, 1, 2, 3, 4, 6, 8,
+    10, 12, 14, 17, 20, 23, 25, 28,
+    31, 35, 38, 40, 43, 46, 49, 51,
+    53, 55, 57, 59, 60, 61, 62, 62,
+    63, 62, 62, 61, 60, 59, 57, 55,
+    53, 51, 49, 46, 43, 40, 38, 35,
+    32, 28, 25, 23, 20, 17, 14, 12,
+    10, 8, 6, 4, 3, 2, 1, 1
+};
+
+/**
+ * @brief Interrupt handler for the Timer
+ *
+ * This function is Interrupt handler for the Timer
+ *
+ * @return None.
+ */
+void am_ctimer_isr(void)
+{
+    /* Clear the interrupt that got us here */
+    am_hal_ctimer_int_clear(AM_BSP_PWM_LED_TIMER_INT);
+
+    /* Now set new PWM half-period for the LED */
+    am_hal_ctimer_period_set(AM_BSP_PWM_LED_TIMER, AM_BSP_PWM_LED_TIMER_SEG,
+                             64, g_pui32Brightness[g_ui32Index]);
+
+    /* Set up the LED duty cycle for the next pulse */
+    g_ui32Index = (g_ui32Index + 1) % 64;
+}
+
+/**
+ * @brief Initialize the PWM
+ *
+ * This function initialize the PWM
+ *
+ * @return 0.
+ */
+int rt_hw_pwm_init(void)
+{
+    /* init pwm gpio */
+    am_hal_gpio_pin_config(AM_BSP_GPIO_PWM_LED, AM_BSP_GPIO_CFG_PWM_LED);
+
+    /* Configure a timer to drive the LED */
+    am_hal_ctimer_config_single(AM_BSP_PWM_LED_TIMER, AM_BSP_PWM_LED_TIMER_SEG,
+                                (AM_HAL_CTIMER_FN_PWM_REPEAT |
+                                 AM_HAL_CTIMER_XT_2_048KHZ |
+                                 AM_HAL_CTIMER_INT_ENABLE |
+                                 AM_HAL_CTIMER_PIN_ENABLE));
+
+    /* Set up initial timer period */
+    am_hal_ctimer_period_set(AM_BSP_PWM_LED_TIMER, AM_BSP_PWM_LED_TIMER_SEG,
+                             64, 32);
+
+    /* Enable interrupts for the Timer we are using on this board */
+    am_hal_ctimer_int_enable(AM_BSP_PWM_LED_TIMER_INT);
+    am_hal_interrupt_enable(AM_HAL_INTERRUPT_CTIMER);
+
+    /* Start the timer */
+    am_hal_ctimer_start(AM_BSP_PWM_LED_TIMER, AM_BSP_PWM_LED_TIMER_SEG);
+
+    rt_kprintf("pwm_init!\n");
+
+    return 0;
+}
+#ifdef RT_USING_COMPONENTS_INIT
+INIT_BOARD_EXPORT(rt_hw_pwm_init);
+#endif
+
+#endif
+
+/*@}*/

bsp/apollo2/board/pwm.h

+/*
+ * File      : pwm.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-12-04     Haley        the first version
+ */
+
+#ifndef __PWM_H_
+#define __PWM_H_
+
+#include <rtthread.h>
+
+/**
+ * @brief External function definitions
+ *
+ */
+int rt_hw_pwm_init(void);
+
+#endif // __PWM_H_

bsp/apollo2/board/rtc.c

+/*
+ * File      :_rtc.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-11-06     Haley        the first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include "am_mcu_apollo.h"
+
+#define XT              1
+#define LFRC            2
+
+#define RTC_CLK_SRC     XT
+
+//connect am drv to rt drv.
+static rt_err_t rt_rtc_open(rt_device_t dev, rt_uint16_t oflag)
+{
+    if (dev->rx_indicate != RT_NULL)
+    {
+        /* Open Interrupt */
+    }
+
+    return RT_EOK;
+}
+
+static rt_size_t rt_rtc_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
+{
+    return 0;
+}
+
+static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
+{
+    time_t *time;
+    struct tm time_temp;
+    struct tm* time_new;
+    am_hal_rtc_time_t hal_time;
+
+    RT_ASSERT(dev != RT_NULL);
+    rt_memset(&time_temp, 0, sizeof(struct tm));
+
+    switch (cmd)
+    {
+        case RT_DEVICE_CTRL_RTC_GET_TIME:
+            time = (time_t *)args;
+
+            /* Get the current Time */
+            am_hal_rtc_time_get(&hal_time);
+
+            /* Years since 1900 : 0-99 range */
+            time_temp.tm_year = hal_time.ui32Year + 2000 - 1900;
+            /* Months *since* january 0-11 : RTC_Month_Date_Definitions 1 - 12 */
+            time_temp.tm_mon = hal_time.ui32Month - 1;
+            /* Day of the month 1-31 : 1-31 range */
+            time_temp.tm_mday = hal_time.ui32DayOfMonth;
+            /* Hours since midnight 0-23 : 0-23 range */
+            time_temp.tm_hour = hal_time.ui32Hour;
+            /* Minutes 0-59 : the 0-59 range */
+            time_temp.tm_min = hal_time.ui32Minute;
+            /* Seconds 0-59 : the 0-59 range */
+            time_temp.tm_sec = hal_time.ui32Second;
+
+            *time = mktime(&time_temp);
+
+            break;
+
+        case RT_DEVICE_CTRL_RTC_SET_TIME:
+            time = (time_t *)args;
+            time_new = localtime(time);
+
+            hal_time.ui32Hour = time_new->tm_hour;
+            hal_time.ui32Minute = time_new->tm_min;
+            hal_time.ui32Second = time_new->tm_sec;
+            hal_time.ui32Hundredths = 00;
+            hal_time.ui32Weekday = time_new->tm_wday;
+            hal_time.ui32DayOfMonth = time_new->tm_mday;
+            hal_time.ui32Month = time_new->tm_mon + 1;
+            hal_time.ui32Year = time_new->tm_year + 1900 - 2000;
+            hal_time.ui32Century = 0;
+
+            am_hal_rtc_time_set(&hal_time);
+
+            break;
+    }
+
+    return RT_EOK;
+}
+
+int rt_hw_rtc_init(void)
+{
+    static struct rt_device rtc;
+
+#if RTC_CLK_SRC == LFRC
+    /* Enable the LFRC for the RTC */
+    am_hal_clkgen_osc_start(AM_HAL_CLKGEN_OSC_LFRC);
+
+    /* Select LFRC for RTC clock source */
+    am_hal_rtc_osc_select(AM_HAL_RTC_OSC_LFRC);
+#endif
+  
+#if RTC_CLK_SRC == XT
+    /* Enable the XT for the RTC */
+    //am_hal_clkgen_osc_start(AM_HAL_CLKGEN_OSC_LFRC);
+    am_hal_clkgen_osc_start(AM_HAL_CLKGEN_OSC_XT);
+
+    /* Select XT for RTC clock source */
+    am_hal_rtc_osc_select(AM_HAL_RTC_OSC_XT);
+#endif
+
+    /* Enable the RTC */
+    am_hal_rtc_osc_enable();
+
+    /* register rtc device */
+    rtc.type	= RT_Device_Class_RTC;
+    rtc.init 	= RT_NULL;
+    rtc.open 	= rt_rtc_open;
+    rtc.close	= RT_NULL;
+    rtc.read 	= rt_rtc_read;
+    rtc.write	= RT_NULL;
+    rtc.control = rt_rtc_control;
+
+    /* no private */
+    rtc.user_data = RT_NULL;
+
+    rt_device_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
+
+    return 0;
+}
+#ifdef RT_USING_COMPONENTS_INIT
+INIT_BOARD_EXPORT(rt_hw_rtc_init);
+#endif
+
+/*@}*/

bsp/apollo2/board/rtc.h

+/*
+ * File      : rtc.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-09-14     Haley        the first version
+ */
+ 
+#ifndef __RTC_H
+#define __RTC_H
+
+#include <rtthread.h>
+
+/**
+ * @brief External function definitions
+ *
+ */
+int rt_hw_rtc_init(void);
+
+#endif // __RTC_H

bsp/apollo2/board/smbus.c

+/*
+ * File      : smbus.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-12-04     Haley        the first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include "am_mcu_apollo.h"
+#include "board.h"
+
+#ifdef RT_USING_SMBUS
+
+#define SMBUS_GPIO_SDA    5
+#define SMBUS_GPIO_SCL    6
+
+#define mSDA_LOW()        am_hal_gpio_out_bit_clear(SMBUS_GPIO_SCL)    /* Clear SDA line */
+#define mSDA_HIGH()       am_hal_gpio_out_bit_set(SMBUS_GPIO_SCL)      /* Set SDA line */
+#define mSCL_LOW()        am_hal_gpio_out_bit_clear(SMBUS_GPIO_SDA)    /* Clear SCL line */
+#define mSCL_HIGH()       am_hal_gpio_out_bit_set(SMBUS_GPIO_SDA)      /* Set SCL line */
+
+#define mSDA_READ()       am_hal_gpio_input_bit_read(SMBUS_GPIO_SCL)   /* Read SCL line */
+
+#define mSDA_IN()         am_hal_gpio_pin_config(SMBUS_GPIO_SCL, AM_HAL_GPIO_INPUT | AM_HAL_GPIO_PULL6K)  /* Set SDA as Input */
+#define mSDA_OUT()        am_hal_gpio_pin_config(SMBUS_GPIO_SCL, AM_HAL_GPIO_OUTPUT)                      /* Set SDA as Output */
+#define mSCL_OUT()        am_hal_gpio_pin_config(SMBUS_GPIO_SDA, AM_HAL_GPIO_OUTPUT)                      /* Set SCL as Output */
+
+#define ACK	      0
+#define	NACK      1
+
+/* SCL keep time */
+static void keep_delay(void)
+{
+    int i;
+    for(i = 0; i < 30; i++)
+       __nop();
+}
+
+static void few_delay(void)
+{
+    __nop();
+    __nop();
+}
+
+static rt_uint8_t am_smbus_send_bit(rt_uint8_t send_bit)
+{       
+    mSDA_OUT();
+    few_delay();
+
+    if(send_bit)        /* Send a bit */
+        mSDA_HIGH();
+    else
+        mSDA_LOW();
+
+    mSCL_HIGH();        /* High Level of Clock Pulse */
+    keep_delay();
+
+    mSCL_LOW();
+    keep_delay();
+
+    return 0;
+}
+
+static rt_uint8_t am_smbus_read_bit(void)
+{
+    rt_uint8_t read_bit;
+
+    mSDA_IN();
+    few_delay();
+
+    mSCL_HIGH();             /* High Level of Clock Pulse */
+    keep_delay();
+
+    read_bit = mSDA_READ();  /* Read a bit, save it in Read_bit */
+
+    mSCL_LOW();
+    keep_delay();
+
+    return read_bit;
+}
+
+static void am_smbus_start_bit(void)
+{
+    mSDA_OUT();
+    mSDA_HIGH();     /* Generate bus free time between Stop */
+    keep_delay();
+    mSCL_HIGH();
+    keep_delay();
+
+    mSDA_LOW();      /* Hold time after (Repeated) Start */
+    keep_delay();
+
+    mSCL_LOW();
+    keep_delay();
+}
+
+static void am_smbus_stop_bit(void)
+{
+    mSDA_OUT();
+    mSDA_HIGH();     /* Generate bus free time between Stop */
+    keep_delay();
+    mSCL_LOW();
+    keep_delay();
+
+    mSDA_LOW();      /* Hold time after Stop */
+    keep_delay();
+
+    mSCL_HIGH();     /* For sleep mode(SCL needs to be high during Sleep.) */
+    keep_delay();
+}
+
+static rt_uint8_t am_smbus_tx_byte(rt_uint8_t tx_byte)
+{
+    int	i;
+    rt_uint8_t ack_bit;
+    rt_uint8_t bit_out;
+
+    for(i = 0; i < 8; i++)
+    {
+        if(tx_byte&0x80)
+            bit_out = 1;             /* If the current bit of Tx_buffer is 1 set bit_out */
+        else
+            bit_out = 0;             /* else clear bit_out */
+
+        am_smbus_send_bit(bit_out);  /* Send the current bit on SDA */
+        tx_byte <<= 1;               /* Get next bit for checking */
+    }
+
+    ack_bit = am_smbus_read_bit();   /* Get acknowledgment bit */
+
+    return ack_bit;
+}
+
+static rt_uint8_t am_smbus_rx_byte(rt_uint8_t ack_nack)
+{
+    int i;
+    rt_uint8_t rx_byte;
+
+    for(i = 0; i < 8; i++)
+    {
+        if(am_smbus_read_bit())   /* Get a bit from the SDA line */
+        {
+            rx_byte <<= 1;        /* If the bit is HIGH save 1  in RX_buffer */
+            rx_byte |=0x01;
+        }
+        else
+        {
+            rx_byte <<= 1;        /* If the bit is LOW save 0 in RX_buffer */
+            rx_byte &=0xfe;
+        }
+    }
+    am_smbus_send_bit(ack_nack);  /* Sends acknowledgment bit */
+
+    return rx_byte;
+}
+
+rt_uint8_t am_smbus_tx_then_tx(rt_uint8_t SlaveAddress, rt_uint8_t command, rt_uint8_t* pBuffer, rt_uint16_t bytesNumber)
+{
+    int i;
+
+    am_smbus_start_bit();                      /* Start condition */
+		
+    if(am_smbus_tx_byte(SlaveAddress))         /* Send SlaveAddress and write */
+        return 1;
+
+    if(am_smbus_tx_byte(command))              /* Send command */
+        return 1;
+
+    for(i = 0; i < bytesNumber; i++)
+    {
+        am_smbus_tx_byte(pBuffer[i]);          /* Write data, slave must send ACK */
+    }
+
+    am_smbus_stop_bit();                       /* Stop condition */
+
+    return 0;
+}
+
+rt_uint8_t am_smbus_tx_then_rx(rt_uint8_t SlaveAddress, rt_uint8_t command, rt_uint8_t* pBuffer, rt_uint16_t bytesNumber)
+{
+    int i;
+
+    am_smbus_start_bit();                      /* Start condition */
+
+    if(am_smbus_tx_byte(SlaveAddress))         /* Send SlaveAddress and write */
+        return 1;
+
+    if(am_smbus_tx_byte(command))              /* Send command */
+        return 1;
+
+    am_smbus_start_bit();                      /* Repeated Start condition */
+
+    if(am_smbus_tx_byte(SlaveAddress | 0x01))  /* Send SlaveAddress and read */
+        return 1;
+
+    for(i = 0; i < bytesNumber; i++)
+    {
+        pBuffer[i] = am_smbus_rx_byte(ACK);    /* Read data, master must send ACK */
+    }
+
+    am_smbus_stop_bit();                       /* Stop condition */
+
+    return 0;
+}
+
+void am_smbus_scl_high(void)
+{
+    mSCL_HIGH();     /* For sleep mode(SCL needs to be high during Sleep.) */
+    keep_delay();
+}
+
+void am_smbus_scl_low(void)
+{
+    mSCL_LOW();     /* For sleep mode(SCL needs to be high during Sleep.) */
+    keep_delay();
+}
+
+int rt_hw_smbus_init(void)
+{
+    mSDA_OUT();
+    mSCL_OUT();
+    mSDA_HIGH();   /* bus free */
+    mSCL_HIGH();
+
+    return 0;
+}
+#ifdef RT_USING_COMPONENTS_INIT
+INIT_BOARD_EXPORT(rt_hw_smbus_init);
+#endif
+
+#endif
+
+/*@}*/

bsp/apollo2/board/smbus.h

+/*
+ * File      : smbus.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-12-04     Haley        the first version
+ */
+
+#ifndef __SMBUS_H_
+#define __SMBUS_H_
+
+#include <rtthread.h>
+
+/**
+ * @brief External function definitions
+ *
+ */
+int rt_hw_smbus_init(void);
+rt_uint8_t am_smbus_tx_then_tx(rt_uint8_t SlaveAddress, rt_uint8_t command, rt_uint8_t* pBuffer, rt_uint16_t bytesNumber);
+rt_uint8_t am_smbus_tx_then_rx(rt_uint8_t SlaveAddress, rt_uint8_t command, rt_uint8_t* pBuffer, rt_uint16_t bytesNumber);
+void am_smbus_scl_high(void);
+void am_smbus_scl_low(void);
+
+#endif // __SMBUS_H_

bsp/apollo2/board/spi.c

+/*
+ * File      : spi.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-12-04     Haley        the first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include "am_mcu_apollo.h"
+#include "board.h"
+#include "spi.h"
+
+/* SPI1 */
+#define AM_SPI0_IOM_INST    0
+
+#define SPI0_GPIO_SCK       5
+#define SPI0_GPIO_CFG_SCK   AM_HAL_PIN_5_M0SCK
+#define SPI0_GPIO_MISO      6
+#define SPI0_GPIO_CFG_MISO  AM_HAL_PIN_6_M0MISO
+#define SPI0_GPIO_MOSI      7
+#define SPI0_GPIO_CFG_MOSI  AM_HAL_PIN_7_M0MOSI
+
+/* SPI2 */
+#define AM_SPI1_IOM_INST    1
+
+static am_hal_iom_config_t g_sIOMConfig =
+{
+    AM_HAL_IOM_SPIMODE, // ui32InterfaceMode
+    AM_HAL_IOM_8MHZ, // ui32ClockFrequency
+    0, // bSPHA
+    0, // bSPOL
+    4, // ui8WriteThreshold
+    60, // ui8ReadThreshold
+};
+
+/* AM spi driver */
+struct am_spi_bus
+{
+    struct rt_spi_bus parent;
+    rt_uint32_t u32Module;
+};
+
+//connect am drv to rt drv.
+static rt_err_t configure(struct rt_spi_device* device, struct rt_spi_configuration* configuration)
+{
+    struct am_spi_bus * am_spi_bus = (struct am_spi_bus *)device->bus;
+    rt_uint32_t max_hz = configuration->max_hz;
+
+    if(max_hz >= 8000000)
+    {
+        g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_8MHZ;
+    }
+    else if(max_hz >= 6000000)
+    {
+        g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_6MHZ;
+    }
+    else if(max_hz >= 4000000)
+    {
+        g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_4MHZ;
+    }
+    else if(max_hz >= 3000000)
+    {
+        g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_3MHZ;
+    }
+    else if(max_hz >= 2000000)
+    {
+        g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_2MHZ;
+    }
+    else if(max_hz >= 1500000)
+    {
+        g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_1_5MHZ;
+    }
+    else if(max_hz >= 1000000)
+    {
+        g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_1MHZ;
+    }
+    else if(max_hz >= 750000)
+    {
+        g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_750KHZ;
+    }
+    else if(max_hz >= 500000)
+    {
+        g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_500KHZ;
+    }
+    else if(max_hz >= 400000)
+    {
+        g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_400KHZ;
+    }
+    else if(max_hz >= 375000)
+    {
+        g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_375KHZ;
+    }
+    else if(max_hz >= 250000)
+    {
+        g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_250KHZ;
+    }
+    else if(max_hz >= 100000)
+    {
+        g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_100KHZ;
+    }
+    else if(max_hz >= 50000)
+    {
+        g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_50KHZ;
+    }
+    else
+    {
+        g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_10KHZ;
+    }
+
+    /* CPOL */
+    if(configuration->mode & RT_SPI_CPOL)
+    {
+        g_sIOMConfig.bSPOL = 1;
+    }
+    else
+    {
+        g_sIOMConfig.bSPOL = 0;
+    }
+
+    /* CPHA */
+    if(configuration->mode & RT_SPI_CPHA)
+    {
+        g_sIOMConfig.bSPHA= 1;
+    }
+    else
+    {
+        g_sIOMConfig.bSPHA= 0;
+    }
+
+    /* init SPI */
+    am_hal_iom_disable(am_spi_bus->u32Module);
+    am_hal_iom_pwrctrl_enable(am_spi_bus->u32Module);
+    am_hal_iom_config(am_spi_bus->u32Module, &g_sIOMConfig);
+    am_hal_iom_enable(am_spi_bus->u32Module);
+
+    return RT_EOK;
+};
+
+static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message* message)
+{
+    struct am_spi_bus * am_spi_bus = (struct am_spi_bus *)device->bus;
+    //struct rt_spi_configuration * config = &device->config;
+    struct am_spi_cs * am_spi_cs = device->parent.user_data;
+    rt_uint32_t * send_ptr = (rt_uint32_t *)message->send_buf;
+    rt_uint32_t * recv_ptr = message->recv_buf;
+    rt_uint32_t u32BytesRemaining = message->length;
+    rt_uint32_t u32TransferSize = 0;
+
+    /* take CS */
+    if (message->cs_take)
+    {
+        ;
+    }
+
+    // 
+    if (recv_ptr != RT_NULL)
+    {
+        u32TransferSize = u32BytesRemaining;
+
+        while (u32BytesRemaining)
+        {
+            /* Set the transfer size to either 64, or the number of remaining
+               bytes, whichever is smaller */
+            if (u32BytesRemaining > 64)
+            {
+                u32TransferSize = 64;
+                am_hal_iom_spi_read(am_spi_bus->u32Module, am_spi_cs->chip_select,
+                                   (uint32_t *)recv_ptr, u32TransferSize, AM_HAL_IOM_CS_LOW | AM_HAL_IOM_RAW);
+            }
+            else
+            {
+                u32TransferSize = u32BytesRemaining;
+                /* release CS */
+                if(message->cs_release)
+                {
+                    am_hal_iom_spi_read(am_spi_bus->u32Module, am_spi_cs->chip_select,
+                                   (uint32_t *)recv_ptr, u32TransferSize, AM_HAL_IOM_RAW);
+                }
+                else
+                {
+                    am_hal_iom_spi_read(am_spi_bus->u32Module, am_spi_cs->chip_select,
+                                   (uint32_t *)recv_ptr, u32TransferSize, AM_HAL_IOM_CS_LOW | AM_HAL_IOM_RAW);
+                }
+            }
+
+            u32BytesRemaining -= u32TransferSize;
+            recv_ptr = (rt_uint32_t *)((rt_uint32_t)recv_ptr + u32TransferSize);
+        }
+    }
+
+    // д
+    else if (send_ptr != RT_NULL)
+    {
+        while (u32BytesRemaining)
+        {
+            /* Set the transfer size to either 32, or the number of remaining
+               bytes, whichever is smaller */
+            if (u32BytesRemaining > 32)
+            {
+                u32TransferSize = 32;
+                am_hal_iom_spi_write(am_spi_bus->u32Module, am_spi_cs->chip_select,
+                                    (uint32_t *)send_ptr, u32TransferSize, AM_HAL_IOM_CS_LOW | AM_HAL_IOM_RAW);
+        
+            }
+            else
+            {
+                u32TransferSize = u32BytesRemaining;
+                /* release CS */
+                if (message->cs_release)
+                {
+                    am_hal_iom_spi_write(am_spi_bus->u32Module, am_spi_cs->chip_select,
+                              (uint32_t *)send_ptr, u32TransferSize, AM_HAL_IOM_RAW);
+                }
+                else
+                {
+                    am_hal_iom_spi_write(am_spi_bus->u32Module, am_spi_cs->chip_select,
+                              (uint32_t *)send_ptr, u32TransferSize, AM_HAL_IOM_CS_LOW | AM_HAL_IOM_RAW);
+                }
+            }
+
+            u32BytesRemaining -= u32TransferSize;
+            send_ptr = (rt_uint32_t *)((rt_uint32_t)send_ptr + u32TransferSize);
+        }
+    }
+
+    return message->length;
+}
+
+static const struct rt_spi_ops am_spi_ops =
+{
+    configure,
+    xfer
+};
+
+#ifdef RT_USING_SPI1
+static struct am_spi_bus am_spi_bus_1 = 
+{
+    {0},
+    AM_SPI0_IOM_INST
+};
+#endif /* #ifdef RT_USING_SPI1 */
+
+#ifdef RT_USING_SPI2
+static struct ambiq_spi_bus ambiq_spi_bus_2 =
+{
+    {1},
+    AM_SPI1_IOM_INST
+};
+#endif /* #ifdef RT_USING_SPI2 */
+
+int yr_hw_spi_init(void)
+{
+    struct am_spi_bus* am_spi;
+
+#ifdef RT_USING_SPI1
+    /* init spi gpio */
+    am_hal_gpio_pin_config(SPI0_GPIO_SCK, SPI0_GPIO_CFG_SCK);
+    am_hal_gpio_pin_config(SPI0_GPIO_MISO, SPI0_GPIO_CFG_MISO);
+    am_hal_gpio_pin_config(SPI0_GPIO_MOSI, SPI0_GPIO_CFG_MOSI);
+
+    /* Initialize IOM 0 in SPI mode at 100KHz */
+    am_hal_iom_pwrctrl_enable(AM_SPI0_IOM_INST);
+    am_hal_iom_config(AM_SPI0_IOM_INST, &g_sIOMConfig);
+    am_hal_iom_enable(AM_SPI0_IOM_INST);
+
+    //init spi bus device
+    am_spi = &am_spi_bus_1;
+    rt_spi_bus_register(&am_spi->parent, "spi1", &am_spi_ops);
+#endif
+
+    rt_kprintf("spi init!\n");
+
+    return 0;
+}
+#ifdef RT_USING_COMPONENTS_INIT
+INIT_BOARD_EXPORT(yr_hw_spi_init);
+#endif
+
+/*@}*/

bsp/apollo2/board/spi.h

+/*
+ * File      : spi.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-12-04     Haley        the first version
+ */
+
+#ifndef __SPI_H_
+#define __SPI_H_
+
+#include <rtthread.h>
+
+/* ƬѡÐźŽṹÉùÃ÷ */
+struct am_spi_cs
+{
+    rt_uint32_t chip_select;
+};
+
+/**
+ * @brief External function definitions
+ *
+ */
+int yr_hw_spi_init(void);
+
+#endif // __SPI_H_

bsp/apollo2/board/uart.c

@@ -21,7 +21,8 @@
  * Date           Author       Notes
  * 2017-09-15     Haley        the first version
  */
- 
+
+#include <rtthread.h>
 #include <rtdevice.h>
 #include "am_mcu_apollo.h"
 #include "board.h"
@@ -42,6 +43,10 @@
 #define UART1_GPIO_TX         8
 #define UART1_GPIO_CFG_TX     AM_HAL_PIN_8_UART1TX
 
+#define UART_BUFFER_SIZE    256
+uint8_t UartRxBuffer[UART_BUFFER_SIZE];
+uint8_t UartTxBuffer[UART_BUFFER_SIZE];
+
 /* AM uart driver */
 struct am_uart
 {
@@ -49,19 +54,6 @@ struct am_uart
     uint32_t uart_interrupt;
 };
 
-/**
- * @brief UART configuration settings
- *
- */
-am_hal_uart_config_t g_sUartConfig =
-{
-    115200, // ui32BaudRate
-    AM_HAL_UART_DATA_BITS_8, // ui32DataBits
-    false, // bTwoStopBits
-    AM_HAL_UART_PARITY_NONE, // ui32Parity
-    AM_HAL_UART_FLOW_CTRL_NONE, // ui32FlowCtrl
-};
-
 /**
  * @brief Enable the UART
  *
@@ -81,14 +73,14 @@ static void rt_hw_uart_enable(struct am_uart* uart)
 
 #if defined(RT_USING_UART0)
     /* Make sure the UART RX and TX pins are enabled */
-    am_hal_gpio_pin_config(UART0_GPIO_TX, UART0_GPIO_CFG_TX);
-    am_hal_gpio_pin_config(UART0_GPIO_RX, UART0_GPIO_CFG_RX | AM_HAL_GPIO_PULL12K);
+    am_hal_gpio_pin_config(UART0_GPIO_TX, UART0_GPIO_CFG_TX | AM_HAL_GPIO_PULL24K);
+    am_hal_gpio_pin_config(UART0_GPIO_RX, UART0_GPIO_CFG_RX | AM_HAL_GPIO_PULL24K);
 #endif /* RT_USING_UART0 */
 
 #if defined(RT_USING_UART1)
     /* Make sure the UART RX and TX pins are enabled */
-    am_hal_gpio_pin_config(UART1_GPIO_TX, UART1_GPIO_CFG_TX);
-    am_hal_gpio_pin_config(UART1_GPIO_RX, UART1_GPIO_CFG_RX | AM_HAL_GPIO_PULL12K);
+    am_hal_gpio_pin_config(UART1_GPIO_TX, UART1_GPIO_CFG_TX | AM_HAL_GPIO_PULL24K);
+    am_hal_gpio_pin_config(UART1_GPIO_RX, UART1_GPIO_CFG_RX | AM_HAL_GPIO_PULL24K);
 #endif /* RT_USING_UART1 */
 }
 
@@ -143,9 +135,11 @@ void rt_hw_uart_send_string(char *pcString)
     while ( am_hal_uart_flags_get(AM_UART0_INST) & AM_HAL_UART_FR_BUSY );
 }
 
+//connect am drv to rt drv.
 static rt_err_t am_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
 {
     struct am_uart* uart;
+    am_hal_uart_config_t uart_cfg;
 
     RT_ASSERT(serial != RT_NULL);
     RT_ASSERT(cfg != RT_NULL);
@@ -155,23 +149,43 @@ static rt_err_t am_configure(struct rt_serial_device *serial, struct serial_conf
     RT_ASSERT(uart != RT_NULL);
 
     /* Get the configure */
-    g_sUartConfig.ui32BaudRate = cfg->baud_rate;
-    g_sUartConfig.ui32DataBits = cfg->data_bits;
+    uart_cfg.ui32BaudRate = cfg->baud_rate;
+
+    if (cfg->data_bits == DATA_BITS_5)
+        uart_cfg.ui32DataBits = AM_HAL_UART_DATA_BITS_5;
+    else if (cfg->data_bits == DATA_BITS_6)
+        uart_cfg.ui32DataBits = AM_HAL_UART_DATA_BITS_6;
+    else if (cfg->data_bits == DATA_BITS_7)
+        uart_cfg.ui32DataBits = AM_HAL_UART_DATA_BITS_7;
+    else if (cfg->data_bits == DATA_BITS_8)
+        uart_cfg.ui32DataBits = AM_HAL_UART_DATA_BITS_8;
 
     if (cfg->stop_bits == STOP_BITS_1)
-        g_sUartConfig.bTwoStopBits = false;
+        uart_cfg.bTwoStopBits = false;
     else if (cfg->stop_bits == STOP_BITS_2)
-        g_sUartConfig.bTwoStopBits = true;
+        uart_cfg.bTwoStopBits = true;
 
-    g_sUartConfig.ui32Parity = cfg->parity;
-    g_sUartConfig.ui32FlowCtrl = AM_HAL_UART_PARITY_NONE;
+    uart_cfg.ui32Parity = cfg->parity;
+    uart_cfg.ui32FlowCtrl = AM_HAL_UART_PARITY_NONE;
 
-    /* Configure the UART */
-    am_hal_uart_config(uart->uart_device, &g_sUartConfig);
+    /* UART Config */
+    am_hal_uart_config(uart->uart_device, &uart_cfg);
+
+    /* Enable the UART FIFO */
+    am_hal_uart_fifo_config(uart->uart_device, AM_HAL_UART_RX_FIFO_7_8 | AM_HAL_UART_RX_FIFO_7_8);
+
+    /* Initialize the UART queues */
+    am_hal_uart_init_buffered(uart->uart_device, UartRxBuffer, UART_BUFFER_SIZE, UartTxBuffer, UART_BUFFER_SIZE);
 
     /* Enable the UART */
     am_hal_uart_enable(uart->uart_device);
 
+    /* Enable interrupts */
+    am_hal_uart_int_enable(uart->uart_device, AM_HAL_UART_INT_RX_TMOUT | AM_HAL_UART_INT_RX | AM_HAL_UART_INT_TX);
+
+    /* Enable the uart interrupt in the NVIC */
+    am_hal_interrupt_enable(uart->uart_interrupt);
+
     return RT_EOK;
 }
 
@@ -205,6 +219,7 @@ static rt_err_t am_control(struct rt_serial_device *serial, int cmd, void *arg)
 
 static int am_putc(struct rt_serial_device *serial, char c)
 {
+    uint32_t rxsize, txsize;
     struct am_uart* uart;
 
     RT_ASSERT(serial != RT_NULL);
@@ -212,7 +227,14 @@ static int am_putc(struct rt_serial_device *serial, char c)
 
     RT_ASSERT(uart != RT_NULL);
 
-    am_hal_uart_char_transmit_polled(uart->uart_device, c);
+    am_hal_uart_get_status_buffered(uart->uart_device, &rxsize, &txsize);
+    //if (txsize > 0)
+    {
+        am_hal_uart_char_transmit_buffered(uart->uart_device, c);
+		}
+
+    /* Wait until busy bit clears to make sure UART fully transmitted last byte */
+    while ( am_hal_uart_flags_get(uart->uart_device) & AM_HAL_UART_FR_BUSY );
 
     return 1;
 }
@@ -221,6 +243,7 @@ static int am_getc(struct rt_serial_device *serial)
 {
     char c;
     int ch;
+    uint32_t rxsize, txsize;
     struct am_uart* uart;
 
     RT_ASSERT(serial != RT_NULL);
@@ -229,9 +252,10 @@ static int am_getc(struct rt_serial_device *serial)
     RT_ASSERT(uart != RT_NULL);
 
     ch = -1;
-    if ((am_hal_uart_flags_get(uart->uart_device) & AM_HAL_UART_FR_RX_EMPTY) == 0)
+    am_hal_uart_get_status_buffered(uart->uart_device, &rxsize, &txsize);
+    if (rxsize > 0)
     {
-        am_hal_uart_char_receive_polled(uart->uart_device, &c);
+        am_hal_uart_char_receive_buffered(uart->uart_device, &c, 1);
         ch = c & 0xff;
     }
 
@@ -261,6 +285,11 @@ static void uart_isr(struct rt_serial_device *serial)
     /* Clear the UART interrupt */
     am_hal_uart_int_clear(uart->uart_device, status);
 
+    if (status & (AM_HAL_UART_INT_RX_TMOUT | AM_HAL_UART_INT_TX | AM_HAL_UART_INT_RX))
+    {
+        am_hal_uart_service_buffered_timeout_save(uart->uart_device, status);
+    }
+
     if (status & (AM_HAL_UART_INT_RX_TMOUT))
     {
         rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
@@ -273,7 +302,7 @@ static void uart_isr(struct rt_serial_device *serial)
 
     if (status & AM_HAL_UART_INT_TX)
     {
-        // rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
+        rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
     }
 }
 
@@ -331,14 +360,14 @@ static void GPIO_Configuration(void)
 {
 #if defined(RT_USING_UART0)
     /* Make sure the UART RX and TX pins are enabled */
-    am_hal_gpio_pin_config(UART0_GPIO_TX, UART0_GPIO_CFG_TX);
-    am_hal_gpio_pin_config(UART0_GPIO_RX, UART0_GPIO_CFG_RX | AM_HAL_GPIO_PULL12K);
+    am_hal_gpio_pin_config(UART0_GPIO_TX, UART0_GPIO_CFG_TX | AM_HAL_GPIO_PULL24K);
+    am_hal_gpio_pin_config(UART0_GPIO_RX, UART0_GPIO_CFG_RX | AM_HAL_GPIO_PULL24K);
 #endif /* RT_USING_UART0 */
 
 #if defined(RT_USING_UART1)
     /* Make sure the UART RX and TX pins are enabled */
-    am_hal_gpio_pin_config(UART1_GPIO_TX, UART1_GPIO_CFG_TX);
-    am_hal_gpio_pin_config(UART1_GPIO_RX, UART1_GPIO_CFG_RX | AM_HAL_GPIO_PULL12K);
+    am_hal_gpio_pin_config(UART1_GPIO_TX, UART1_GPIO_CFG_TX | AM_HAL_GPIO_PULL24K);
+    am_hal_gpio_pin_config(UART1_GPIO_RX, UART1_GPIO_CFG_RX | AM_HAL_GPIO_PULL24K);
 #endif /* RT_USING_UART1 */
 }
 
@@ -352,24 +381,6 @@ static void RCC_Configuration(struct am_uart* uart)
 
     /* Disable the UART before configuring it */
     am_hal_uart_disable(uart->uart_device);
-
-    /* Configure the UART */
-    am_hal_uart_config(uart->uart_device, &g_sUartConfig);
-
-    /* Enable the UART */
-    am_hal_uart_enable(uart->uart_device);
-
-    /* Enable the UART FIFO */
-    am_hal_uart_fifo_config(uart->uart_device, AM_HAL_UART_TX_FIFO_1_2 | AM_HAL_UART_RX_FIFO_1_2);
-}
-
-static void NVIC_Configuration(struct am_uart* uart)
-{
-    /* Enable interrupts */
-    am_hal_uart_int_enable(uart->uart_device, AM_HAL_UART_INT_RX_TMOUT | AM_HAL_UART_INT_RX);
-
-    /* Enable the uart interrupt in the NVIC */
-    am_hal_interrupt_enable(uart->uart_interrupt);
 }
 
 /**
@@ -379,7 +390,7 @@ static void NVIC_Configuration(struct am_uart* uart)
  *
  * @return None.
  */
-void rt_hw_uart_init(void)
+int rt_hw_uart_init(void)
 {
     struct am_uart* uart;
     struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
@@ -389,14 +400,16 @@ void rt_hw_uart_init(void)
 #if defined(RT_USING_UART0)
     uart = &uart0;
     config.baud_rate = BAUD_RATE_115200;
+    config.data_bits = DATA_BITS_8;
+    config.stop_bits = STOP_BITS_1;
+    config.parity = PARITY_NONE;
 
     RCC_Configuration(uart);
-    NVIC_Configuration(uart);
 
     serial0.ops    = &am_uart_ops;
     serial0.config = config;
 
-    /* register UART1 device */
+    /* register UART0 device */
     rt_hw_serial_register(&serial0, "uart0",
                           RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
                           RT_DEVICE_FLAG_INT_TX, uart);
@@ -405,9 +418,11 @@ void rt_hw_uart_init(void)
 #if defined(RT_USING_UART1)
     uart = &uart1;
     config.baud_rate = BAUD_RATE_115200;
+    config.data_bits = DATA_BITS_8;
+    config.stop_bits = STOP_BITS_1;
+    config.parity = PARITY_NONE;
 
     RCC_Configuration(uart);
-    NVIC_Configuration(uart);
 
     serial1.ops    = &am_uart_ops;
     serial1.config = config;
@@ -417,6 +432,8 @@ void rt_hw_uart_init(void)
                           RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
                           RT_DEVICE_FLAG_INT_TX, uart);
 #endif /* RT_USING_UART1 */
+
+    return 0;
 }
 
 /*@}*/

bsp/apollo2/board/uart.h

@@ -21,10 +21,16 @@
  * Date           Author       Notes
  * 2017-09-14     Haley        the first version
  */
- 
+
 #ifndef __UART_H_
 #define __UART_H_
 
-void rt_hw_uart_init(void);
+#include <rtthread.h>
+
+/**
+ * @brief External function definitions
+ *
+ */
+int rt_hw_uart_init(void);
 
 #endif // __UART_H_

bsp/apollo2/libraries/drivers/SConscript

@@ -11,15 +11,21 @@ hal/am_hal_debug.c
 hal/am_hal_cachectrl.c
 hal/am_hal_pwrctrl.c
 hal/am_hal_sysctrl.c
+hal/am_hal_reset.c
 hal/am_hal_stimer.c
 hal/am_hal_ctimer.c
 hal/am_hal_rtc.c
 hal/am_hal_interrupt.c
 hal/am_hal_queue.c
+hal/am_hal_iom.c
+hal/am_hal_ios.c
 hal/am_hal_vcomp.c
 hal/am_hal_flash.c
 hal/am_hal_gpio.c
 hal/am_hal_uart.c
+hal/am_hal_adc.c
+hal/am_hal_pdm.c
+hal/am_hal_i2c_bit_bang.c
 """)
 
 path = [cwd]

bsp/apollo2/libraries/drivers/hal/am_hal_i2c_bit_bang.c

@@ -49,7 +49,7 @@
 #include <stdbool.h>
 
 #include "am_mcu_apollo.h"
-#include "am_util.h"
+//#include "am_util.h"
 #include "am_hal_i2c_bit_bang.h"
 
 // Max number of clock cycles to wait for clock stretch
@@ -133,7 +133,7 @@ static am_hal_i2c_bit_bang_priv_t am_hal_i2c_bit_bang_priv;
 // Wait for any stretched clock to go high
 // If it times out - return failure
 //
-static inline bool
+static bool
 i2c_pull_and_wait_scl_hi(void)
 {
     // Maximum time to wait for clock stretching
@@ -284,7 +284,7 @@ am_hal_i2c_bit_bang_init(uint32_t sck_gpio_number,
 //! returns the byte received
 //
 //*****************************************************************************
-static inline am_hal_i2c_bit_bang_enum_t
+static am_hal_i2c_bit_bang_enum_t
 i2c_receive_byte(uint8_t *pRxByte, bool bNack)
 {
     int i;
@@ -389,7 +389,7 @@ i2c_receive_byte(uint8_t *pRxByte, bool bNack)
 //!     }
 //
 //*****************************************************************************
-static inline am_hal_i2c_bit_bang_enum_t
+static am_hal_i2c_bit_bang_enum_t
 i2c_send_byte(uint8_t one_byte)
 {
     int i;

bsp/apollo2/libraries/drivers/hal/am_hal_iom.c

@@ -49,7 +49,7 @@
 #include <stdint.h>
 #include <stdbool.h>
 #include "am_mcu_apollo.h"
-#include "am_util_delay.h"
+//#include "am_util_delay.h"
 
 #ifdef __IAR_SYSTEMS_ICC__
 #define AM_INSTR_CLZ(n)                     __CLZ(n)
@@ -62,6 +62,22 @@
 #define AM_ASSERT_INVALID_THRESHOLD    (1)
 #endif
 
+uint32_t am_util_wait_status_change(uint32_t ui32Iterations, uint32_t ui32Address, uint32_t ui32Mask, uint32_t ui32Value)
+{
+    int i;
+		for (i = 0; i < ui32Iterations; i++)
+		{
+				// Check the status
+				if (((*(uint32_t *)ui32Address) & ui32Mask) == ui32Value)
+				{
+					return 1;
+				}
+				// Call the BOOTROM cycle delay function to get about 1 usec @ 48MHz
+				am_hal_flash_delay(16);
+		}
+		return 0;
+}
+
 //*****************************************************************************
 //
 // Forcing optimizations

bsp/apollo2/rtconfig.h

-/* RT-Thread config file */
-#ifndef __RTTHREAD_CFG_H__
-#define __RTTHREAD_CFG_H__
+#ifndef RT_CONFIG_H__
+#define RT_CONFIG_H__
 
-/* RT_NAME_MAX*/
-#define RT_NAME_MAX	   6
+/* Automatically generated file; DO NOT EDIT. */
+/* RT-Thread Configuration */
 
-/* RT_ALIGN_SIZE*/
-#define RT_ALIGN_SIZE	4
+/* RT-Thread Kernel */
 
-/* PRIORITY_MAX */
-#define RT_THREAD_PRIORITY_MAX	8
+#define RT_NAME_MAX 8
+#define RT_ALIGN_SIZE 4
+#define RT_THREAD_PRIORITY_MAX 32
+#define RT_TICK_PER_SECOND 500
+#define RT_DEBUG
+#define RT_USING_OVERFLOW_CHECK
+#define RT_DEBUG_INIT 0
+#define RT_DEBUG_THREAD 0
+#define RT_USING_HOOK
+#define IDLE_THREAD_STACK_SIZE 256
+/* RT_USING_TIMER_SOFT is not set */
 
-/* Tick per Second */
-#define RT_TICK_PER_SECOND	200
+/* Inter-Thread communication */
 
-/* SECTION: RT_DEBUG */
-/* Thread Debug */
-//#define RT_DEBUG
-//#define RT_DEBUG_INIT 1
-//#define RT_USING_OVERFLOW_CHECK
+#define RT_USING_SEMAPHORE
+#define RT_USING_MUTEX
+#define RT_USING_EVENT
+#define RT_USING_MAILBOX
+#define RT_USING_MESSAGEQUEUE
+/* RT_USING_SIGNALS is not set */
 
-/* Using Hook */
-//#define RT_USING_HOOK
+/* Memory Management */
 
-#define RT_USING_IDLE_HOOK
+#define RT_USING_MEMPOOL
+/* RT_USING_MEMHEAP is not set */
+#define RT_USING_HEAP
+#define RT_USING_SMALL_MEM
+/* RT_USING_SLAB is not set */
 
-#define IDLE_THREAD_STACK_SIZE	384
+/* Kernel Device Object */
 
-/* Using Software Timer */
-//#define RT_USING_TIMER_SOFT
-#define RT_TIMER_THREAD_PRIO		1
-#define RT_TIMER_THREAD_STACK_SIZE	512
-#define RT_TIMER_TICK_PER_SECOND	200
+#define RT_USING_DEVICE
+/* RT_USING_INTERRUPT_INFO is not set */
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLE_DEVICE_NAME "uart0"
+/* RT_USING_MODULE is not set */
 
-/* SECTION: IPC */
-/* Using Semaphore*/
-#define RT_USING_SEMAPHORE
+/* RT-Thread Components */
 
-/* Using Mutex */
-#define RT_USING_MUTEX
+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
 
-/* Using Event */
-#define RT_USING_EVENT
+/* C++ features */
 
-/* Using MailBox */
-/* #define RT_USING_MAILBOX */
+/* RT_USING_CPLUSPLUS is not set */
 
-/* Using Message Queue */
-#define RT_USING_MESSAGEQUEUE
+/* Command shell */
 
-/* SECTION: Memory Management */
-/* Using Memory Pool Management*/
-/* #define RT_USING_MEMPOOL */
+#define RT_USING_FINSH
+#define FINSH_USING_HISTORY
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_STACK_SIZE 4096
+#define FINSH_CMD_SIZE 80
+/* FINSH_USING_AUTH is not set */
+#define FINSH_USING_MSH
+//#define FINSH_USING_MSH_DEFAULT
+/* FINSH_USING_MSH_ONLY is not set */
+
+/* Device virtual file system */
+
+#define RT_USING_DFS
+#define DFS_USING_WORKDIR
+#define DFS_FILESYSTEMS_MAX 2
+#define DFS_FD_MAX 4
+//#define RT_USING_DFS_ELMFAT
+
+/* elm-chan's FatFs, Generic FAT Filesystem Module */
+
+#define RT_DFS_ELM_CODE_PAGE 437
+#define RT_DFS_ELM_WORD_ACCESS
+#define RT_DFS_ELM_USE_LFN_0
+/* RT_DFS_ELM_USE_LFN_1 is not set */
+/* RT_DFS_ELM_USE_LFN_2 is not set */
+/* RT_DFS_ELM_USE_LFN_3 is not set */
+#define RT_DFS_ELM_USE_LFN 0
+#define RT_DFS_ELM_MAX_LFN 255
+#define RT_DFS_ELM_DRIVES 2
+#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
+/* RT_DFS_ELM_USE_ERASE is not set */
+#define RT_DFS_ELM_REENTRANT
+#define RT_USING_DFS_DEVFS
+/* RT_USING_DFS_NET is not set */
+/* RT_USING_DFS_ROMFS is not set */
+/* RT_USING_DFS_RAMFS is not set */
+/* RT_USING_DFS_UFFS is not set */
+
+/* Device Drivers */
 
-/* Using Dynamic Heap Management */
-#define RT_USING_HEAP
+#define RT_USING_DEVICE_IPC
+#define RT_USING_SERIAL
+/* RT_USING_CAN is not set */
+/* RT_USING_HWTIMER is not set */
+#define RT_USING_I2C
+/* RT_USING_I2C_BITOPS is not set */
+#define RT_USING_PIN
+/* RT_USING_MTD_NOR is not set */
+/* RT_USING_MTD_NAND is not set */
+#define RT_USING_RTC
+/* RT_USING_SDIO is not set */
+#define RT_USING_SPI
+/* RT_USING_SFUD is not set */
+/* RT_USING_W25QXX is not set */
+/* RT_USING_GD is not set */
+/* RT_USING_ENC28J60 is not set */
+/* RT_USING_SPI_WIFI is not set */
+/* RT_USING_WDT is not set */
+/* RT_USING_USB_HOST is not set */
+/* RT_USING_USB_DEVICE is not set */
 
-/* Using Small MM */
-#define RT_USING_SMALL_MEM
-#define RT_USING_TINY_SIZE
+/* POSIX layer and C standard library */
 
-/* Using USER MAIN */
-#define RT_USING_USER_MAIN
+#define RT_USING_LIBC
+/* RT_USING_PTHREADS is not set */
+#define RT_USING_POSIX
+/* RT_USING_POSIX_MMAP is not set */
+/* RT_USING_POSIX_TERMIOS is not set */
 
-// <bool name="RT_USING_COMPONENTS_INIT" description="Using RT-Thread components initialization" default="true" />
-#define RT_USING_COMPONENTS_INIT
+/* Network stack */
 
-/* SECTION: Device System */
-/* Using Device System */
-#define RT_USING_DEVICE
-// <bool name="RT_USING_DEVICE_IPC" description="Using device communication" default="true" />
-#define RT_USING_DEVICE_IPC
-// <bool name="RT_USING_SERIAL" description="Using Serial" default="true" />
-#define RT_USING_SERIAL
+/* light weight TCP/IP stack */
 
-/* SECTION: Console options */
-#define RT_USING_CONSOLE
-/* the buffer size of console*/
-#define RT_CONSOLEBUF_SIZE	128
-// <string name="RT_CONSOLE_DEVICE_NAME" description="The device name for console" default="uart1" />
-#define RT_CONSOLE_DEVICE_NAME	    "uart0"
+/* RT_USING_LWIP is not set */
 
-/* Using GPIO pin framework */
-#define RT_USING_PIN
+/* Modbus master and slave stack */
 
-// #define RT_USING_SPI
+/* RT_USING_MODBUS is not set */
 
-/* SECTION: finsh, a C-Express shell */
-#define RT_USING_FINSH
-/* configure finsh parameters */
-#define FINSH_THREAD_PRIORITY 6
-#define FINSH_THREAD_STACK_SIZE	1024
-#define FINSH_HISTORY_LINES	1
-/* Using symbol table */
-#define FINSH_USING_SYMTAB
-#define FINSH_USING_DESCRIPTION
+/* RT-Thread UI Engine */
+
+/* RT_USING_GUIENGINE is not set */
+
+/* VBUS(Virtual Software BUS) */
+
+/* RT_USING_VBUS is not set */
+
+/* RT-Thread online packages */
+
+/* system packages */
+
+/* PKG_USING_PARTITION is not set */
+/* PKG_USING_SQLITE is not set */
+
+/* IoT - internet of things */
+
+/* PKG_USING_PAHOMQTT is not set */
+/* PKG_USING_WEBCLIENT is not set */
+/* PKG_USING_MONGOOSE is not set */
+/* PKG_USING_WEBTERMINAL is not set */
+/* PKG_USING_CJSON is not set */
+/* PKG_USING_EZXML is not set */
+
+/* Marvell WiFi */
+
+/* PKG_USING_MARVELLWIFI is not set */
+
+/* security packages */
+
+/* PKG_USING_MBEDTLS is not set */
+
+/* language packages */
+
+/* PKG_USING_JERRYSCRIPT is not set */
+
+/* multimedia packages */
+
+/* PKG_USING_FASTLZ is not set */
+
+/* tools packages */
+
+/* PKG_USING_CMBACKTRACE is not set */
+/* PKG_USING_EASYLOGGER is not set */
+/* PKG_USING_SYSTEMVIEW is not set */
+
+/* miscellaneous packages */
+
+/* PKG_USING_HELLO is not set */
+
+/* BSP_SPECIAL CONFIG */
+
+/* RT_USING_UART1 is not set */
 
 #endif

bsp/apollo2/rtconfig.py

@@ -43,7 +43,7 @@ if PLATFORM == 'gcc':
     DEVICE = ' -mcpu=cortex-m4 -mthumb -ffunction-sections -fdata-sections'
     CFLAGS = DEVICE
     AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
-    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-nrf52832.map,-cref,-u,Reset_Handler -T nrf52_xxaa.ld'
+    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-apollo2.map,-cref,-u,Reset_Handler -T'
 
     CPATH = ''
     LPATH = ''
@@ -67,7 +67,7 @@ elif PLATFORM == 'armcc':
     DEVICE = ' --device DARMSTM'
     CFLAGS = DEVICE + ' --apcs=interwork'
     AFLAGS = DEVICE
-    LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-nrf52832.map --scatter rtthread-nrf52832.sct'
+    LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-apollo2.map --scatter rtthread-apollo2.sct'
 
     CFLAGS += ' --c99'
     CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'

bsp/apollo2/template.uvoptx

@@ -117,7 +117,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>JL2CM3</Key>
-          <Name>-U4294967295 -O78 -S0 -ZTIFSpeedSel20000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD10000000 -FC4000 -FN1 -FF0Apollo2.FLM -FS00 -FL010000 -FP0($$Device:AMAPH1KK-KBR$Flash\Apollo2.FLM)</Name>
+          <Name>-U4294967295 -O78 -S0 -ZTIFSpeedSel20000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD10000000 -FC4000 -FN1 -FF0Apollo2 -FS00 -FL0100000 -FP0($$Device:AMAPH1KK-KBR$Flash\Apollo2.FLM)</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>