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1d1f272f
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体验新版 GitCode,发现更多精彩内容 >>
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1d1f272f
编写于
2月 20, 2019
作者:
B
Bernard Xiong
提交者:
GitHub
2月 20, 2019
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差异文件
Merge pull request #2340 from jinsheng20/stm32f746_disco
Stm32f746 disco
上级
6a150c09
a2ed7ec6
变更
14
隐藏空白更改
内联
并排
Showing
14 changed file
with
1005 addition
and
105 deletion
+1005
-105
bsp/stm32/stm32f746-st-disco/.config
bsp/stm32/stm32f746-st-disco/.config
+7
-1
bsp/stm32/stm32f746-st-disco/README.md
bsp/stm32/stm32f746-st-disco/README.md
+5
-5
bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/.mxproject
bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/.mxproject
+2
-2
bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/CubeMX_Config.ioc
.../stm32f746-st-disco/board/CubeMX_Config/CubeMX_Config.ioc
+264
-74
bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Inc/stm32f7xx_hal_conf.h
...746-st-disco/board/CubeMX_Config/Inc/stm32f7xx_hal_conf.h
+10
-7
bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Src/main.c
bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Src/main.c
+139
-14
bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Src/stm32f7xx_hal_msp.c
...f746-st-disco/board/CubeMX_Config/Src/stm32f7xx_hal_msp.c
+387
-0
bsp/stm32/stm32f746-st-disco/board/Kconfig
bsp/stm32/stm32f746-st-disco/board/Kconfig
+27
-0
bsp/stm32/stm32f746-st-disco/board/SConscript
bsp/stm32/stm32f746-st-disco/board/SConscript
+8
-0
bsp/stm32/stm32f746-st-disco/board/ports/drv_qspi_flash.c
bsp/stm32/stm32f746-st-disco/board/ports/drv_qspi_flash.c
+1
-1
bsp/stm32/stm32f746-st-disco/board/ports/phy_reset.c
bsp/stm32/stm32f746-st-disco/board/ports/phy_reset.c
+24
-0
bsp/stm32/stm32f746-st-disco/board/ports/sdcard_port.c
bsp/stm32/stm32f746-st-disco/board/ports/sdcard_port.c
+65
-0
bsp/stm32/stm32f746-st-disco/board/ports/sdram_port.h
bsp/stm32/stm32f746-st-disco/board/ports/sdram_port.h
+64
-0
bsp/stm32/stm32f746-st-disco/rtconfig.h
bsp/stm32/stm32f746-st-disco/rtconfig.h
+2
-1
未找到文件。
bsp/stm32/stm32f746-st-disco/.config
浏览文件 @
1d1f272f
...
...
@@ -62,7 +62,7 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE
=
y
CONFIG_RT_CONSOLEBUF_SIZE
=
128
CONFIG_RT_CONSOLE_DEVICE_NAME
=
"uart1"
CONFIG_RT_VER_NUM
=
0
x4000
0
CONFIG_RT_VER_NUM
=
0
x4000
1
CONFIG_ARCH_ARM
=
y
CONFIG_ARCH_ARM_CORTEX_M
=
y
CONFIG_ARCH_ARM_CORTEX_M7
=
y
...
...
@@ -112,6 +112,7 @@ CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ
=
512
CONFIG_RT_USING_SERIAL
=
y
CONFIG_RT_SERIAL_USING_DMA
=
y
CONFIG_RT_SERIAL_RB_BUFSZ
=
64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
...
...
@@ -128,6 +129,7 @@ CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
#
# Using WiFi
...
...
@@ -306,7 +308,10 @@ CONFIG_SOC_STM32F746NG=y
# Onboard Peripheral Drivers
#
CONFIG_BSP_USING_USB_TO_USART
=
y
# CONFIG_BSP_USING_SDRAM is not set
# CONFIG_BSP_USING_QSPI_FLASH is not set
# CONFIG_BSP_USING_ETH is not set
# CONFIG_BSP_USING_SDCARD is not set
#
# On-chip Peripheral Drivers
...
...
@@ -316,6 +321,7 @@ CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART1
=
y
# CONFIG_BSP_UART1_RX_USING_DMA is not set
# CONFIG_BSP_USING_QSPI is not set
# CONFIG_BSP_USING_SDIO is not set
#
# Board extended module Drivers
...
...
bsp/stm32/stm32f746-st-disco/README.md
浏览文件 @
1d1f272f
...
...
@@ -39,10 +39,10 @@ STM32F746-disco 是 ST 推出的一款基于 ARM Cortex-M7 内核的开发板,
|
**板载外设**
|
**支持情况**
|
**备注**
|
| :----------------- | :----------: | :------------------------------------- |
| USB 转串口 | 支持 | UART1 |
| QSPI Flash | 支持 | |
| 以太网 |
暂不支持 |
|
| SDRAM |
暂不支持 |
|
| SD卡 |
暂不支持 |
|
| QSPI Flash | 支持 |
QSPI1
|
| 以太网 |
支持 | RMII
|
| SDRAM |
支持 | SDRAM1
|
| SD卡 |
支持 | SD 4bits
|
| 4.3寸电容屏 | 暂不支持 | |
| MEMS麦克风 | 暂不支持 | |
...
...
@@ -55,7 +55,7 @@ STM32F746-disco 是 ST 推出的一款基于 ARM Cortex-M7 内核的开发板,
| I2C | 暂不支持 | 即将支持 |
| FLASH | 暂不支持 | 即将支持 |
| WDT | 暂不支持 | 即将支持 |
| SDIO |
暂不支持 | 即将
支持 |
| SDIO |
支持 |
支持 |
| USB Device | 暂不支持 | 即将支持 |
| USB Host | 暂不支持 | 即将支持 |
| SAI | 暂不支持 | 即将支持 |
...
...
bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/.mxproject
浏览文件 @
1d1f272f
...
...
@@ -5,9 +5,9 @@ SourcePath=E:/rt-thread/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Src
SourceFiles=stm32f7xx_it.c;stm32f7xx_hal_msp.c;main.c;
[PreviousLibFiles]
LibFiles=Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_
qspi.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_qspi
.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;
LibFiles=Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_
eth.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_qspi.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_qspi.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd
.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;
[PreviousUsedKeilFiles]
SourceFiles=..\Src\main.c;..\Src\stm32f7xx_it.c;..\Src\stm32f7xx_hal_msp.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_
qspi.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;../\Src/system_stm32f7xx.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi
.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;../\Src/system_stm32f7xx.c;../Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;null;
SourceFiles=..\Src\main.c;..\Src\stm32f7xx_it.c;..\Src\stm32f7xx_hal_msp.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_
eth.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;../\Src/system_stm32f7xx.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd
.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;../\Src/system_stm32f7xx.c;../Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;null;
HeaderPath=..\Drivers\STM32F7xx_HAL_Driver\Inc;..\Drivers\STM32F7xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F7xx\Include;..\Drivers\CMSIS\Include;..\Inc;
bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/CubeMX_Config.ioc
浏览文件 @
1d1f272f
#MicroXplorer Configuration settings - do not modify
ETH.IPParameters=MediaInterface
ETH.MediaInterface=ETH_MEDIA_INTERFACE_RMII
File.Version=6
KeepUserPlacement=false
Mcu.Family=STM32F7
Mcu.IP0=CORTEX_M7
Mcu.IP1=NVIC
Mcu.IP2=QUADSPI
Mcu.IP3=RCC
Mcu.IP4=SYS
Mcu.IP5=USART1
Mcu.IPNb=6
Mcu.IP1=ETH
Mcu.IP2=FMC
Mcu.IP3=NVIC
Mcu.IP4=QUADSPI
Mcu.IP5=RCC
Mcu.IP6=SDMMC1
Mcu.IP7=SYS
Mcu.IP8=USART1
Mcu.IPNb=9
Mcu.Name=STM32F746NGHx
Mcu.Package=TFBGA216
Mcu.Pin0=PE2
Mcu.Pin1=PA14
Mcu.Pin10=PH1/OSC_OUT
Mcu.Pin11=PJ8
Mcu.Pin12=PB2
Mcu.Pin13=PD12
Mcu.Pin14=PD13
Mcu.Pin15=PD11
Mcu.Pin16=VP_SYS_VS_Systick
Mcu.Pin2=PA13
Mcu.Pin3=PB7
Mcu.Pin4=PB6
Mcu.Pin5=PC14/OSC32_IN
Mcu.Pin6=PA9
Mcu.Pin7=PC15/OSC32_OUT
Mcu.Pin8=PK1
Mcu.Pin9=PH0/OSC_IN
Mcu.PinsNb=17
Mcu.Pin1=PG14
Mcu.Pin10=PD0
Mcu.Pin11=PC11
Mcu.Pin12=PC10
Mcu.Pin13=PD1
Mcu.Pin14=PF0
Mcu.Pin15=PD2
Mcu.Pin16=PC14/OSC32_IN
Mcu.Pin17=PF1
Mcu.Pin18=PA9
Mcu.Pin19=PC15/OSC32_OUT
Mcu.Pin2=PC12
Mcu.Pin20=PK1
Mcu.Pin21=PC9
Mcu.Pin22=PH0/OSC_IN
Mcu.Pin23=PF2
Mcu.Pin24=PC8
Mcu.Pin25=PH1/OSC_OUT
Mcu.Pin26=PF3
Mcu.Pin27=PJ8
Mcu.Pin28=PG8
Mcu.Pin29=PF4
Mcu.Pin3=PA14
Mcu.Pin30=PH5
Mcu.Pin31=PH3
Mcu.Pin32=PF5
Mcu.Pin33=PD15
Mcu.Pin34=PD10
Mcu.Pin35=PC3
Mcu.Pin36=PD14
Mcu.Pin37=PD9
Mcu.Pin38=PD8
Mcu.Pin39=PC1
Mcu.Pin4=PA13
Mcu.Pin40=PB2
Mcu.Pin41=PF12
Mcu.Pin42=PF15
Mcu.Pin43=PD12
Mcu.Pin44=PD13
Mcu.Pin45=PA1
Mcu.Pin46=PC4
Mcu.Pin47=PF13
Mcu.Pin48=PG0
Mcu.Pin49=PE8
Mcu.Pin5=PG13
Mcu.Pin50=PD11
Mcu.Pin51=PG5
Mcu.Pin52=PG4
Mcu.Pin53=PA2
Mcu.Pin54=PC5
Mcu.Pin55=PF14
Mcu.Pin56=PF11
Mcu.Pin57=PE9
Mcu.Pin58=PE11
Mcu.Pin59=PE14
Mcu.Pin6=PB7
Mcu.Pin60=PA7
Mcu.Pin61=PE7
Mcu.Pin62=PE10
Mcu.Pin63=PE12
Mcu.Pin64=PE15
Mcu.Pin65=PE13
Mcu.Pin66=VP_SYS_VS_Systick
Mcu.Pin7=PB6
Mcu.Pin8=PG15
Mcu.Pin9=PG11
Mcu.PinsNb=67
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F746NGHx
...
...
@@ -44,10 +99,16 @@ NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false
PA1.Mode=RMII
PA1.Signal=ETH_REF_CLK
PA13.Mode=Serial_Wire
PA13.Signal=SYS_JTMS-SWDIO
PA14.Mode=Serial_Wire
PA14.Signal=SYS_JTCK-SWCLK
PA2.Mode=RMII
PA2.Signal=ETH_MDIO
PA7.Mode=RMII
PA7.Signal=ETH_CRS_DV
PA9.Locked=true
PA9.Mode=Asynchronous
PA9.Signal=USART1_TX
...
...
@@ -57,10 +118,29 @@ PB6.Mode=Single Bank 1
PB6.Signal=QUADSPI_BK1_NCS
PB7.Mode=Asynchronous
PB7.Signal=USART1_RX
PC1.Mode=RMII
PC1.Signal=ETH_MDC
PC10.Mode=SD_4_bits_Wide_bus
PC10.Signal=SDMMC1_D2
PC11.Mode=SD_4_bits_Wide_bus
PC11.Signal=SDMMC1_D3
PC12.Mode=SD_4_bits_Wide_bus
PC12.Signal=SDMMC1_CK
PC14/OSC32_IN.Mode=LSE-External-Oscillator
PC14/OSC32_IN.Signal=RCC_OSC32_IN
PC15/OSC32_OUT.Mode=LSE-External-Oscillator
PC15/OSC32_OUT.Signal=RCC_OSC32_OUT
PC3.Locked=true
PC3.Mode=SdramChipSelect1_1
PC3.Signal=FMC_SDCKE0
PC4.Mode=RMII
PC4.Signal=ETH_RXD0
PC5.Mode=RMII
PC5.Signal=ETH_RXD1
PC8.Mode=SD_4_bits_Wide_bus
PC8.Signal=SDMMC1_D0
PC9.Mode=SD_4_bits_Wide_bus
PC9.Signal=SDMMC1_D1
PCC.Checker=false
PCC.Line=STM32F7x6
PCC.MCU=STM32F746NGHx
...
...
@@ -69,6 +149,9 @@ PCC.Seq0=0
PCC.Series=STM32F7
PCC.Temperature=25
PCC.Vdd=3.3
PD0.Signal=FMC_D2_DA2
PD1.Signal=FMC_D3_DA3
PD10.Signal=FMC_D15_DA15
PD11.Locked=true
PD11.Mode=Single Bank 1
PD11.Signal=QUADSPI_BK1_IO0
...
...
@@ -78,13 +161,53 @@ PD12.Signal=QUADSPI_BK1_IO1
PD13.Locked=true
PD13.Mode=Single Bank 1
PD13.Signal=QUADSPI_BK1_IO3
PD14.Signal=FMC_D0_DA0
PD15.Signal=FMC_D1_DA1
PD2.Mode=SD_4_bits_Wide_bus
PD2.Signal=SDMMC1_CMD
PD8.Signal=FMC_D13_DA13
PD9.Signal=FMC_D14_DA14
PE10.Signal=FMC_D7_DA7
PE11.Signal=FMC_D8_DA8
PE12.Signal=FMC_D9_DA9
PE13.Signal=FMC_D10_DA10
PE14.Signal=FMC_D11_DA11
PE15.Signal=FMC_D12_DA12
PE2.Locked=true
PE2.Mode=Single Bank 1
PE2.Signal=QUADSPI_BK1_IO2
PE7.Signal=FMC_D4_DA4
PE8.Signal=FMC_D5_DA5
PE9.Signal=FMC_D6_DA6
PF0.Signal=FMC_A0
PF1.Signal=FMC_A1
PF11.Signal=FMC_SDNRAS
PF12.Signal=FMC_A6
PF13.Signal=FMC_A7
PF14.Signal=FMC_A8
PF15.Signal=FMC_A9
PF2.Signal=FMC_A2
PF3.Signal=FMC_A3
PF4.Signal=FMC_A4
PF5.Signal=FMC_A5
PG0.Signal=FMC_A10
PG11.Mode=RMII
PG11.Signal=ETH_TX_EN
PG13.Mode=RMII
PG13.Signal=ETH_TXD0
PG14.Mode=RMII
PG14.Signal=ETH_TXD1
PG15.Signal=FMC_SDNCAS
PG4.Signal=FMC_A14_BA0
PG5.Signal=FMC_A15_BA1
PG8.Signal=FMC_SDCLK
PH0/OSC_IN.Mode=HSE-External-Oscillator
PH0/OSC_IN.Signal=RCC_OSC_IN
PH1/OSC_OUT.Mode=HSE-External-Oscillator
PH1/OSC_OUT.Signal=RCC_OSC_OUT
PH3.Mode=SdramChipSelect1_1
PH3.Signal=FMC_SDNE0
PH5.Signal=FMC_SDNWE
PJ8.Locked=true
PJ8.Signal=GPXTI8
PK1.Locked=true
...
...
@@ -117,71 +240,138 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=MDK-ARM V5
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_QUADSPI_Init-QUADSPI-false-HAL-true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_QUADSPI_Init-QUADSPI-false-HAL-true
,6-MX_ETH_Init-ETH-false-HAL-true,7-MX_FMC_Init-FMC-false-HAL-true,8-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true
QUADSPI.ChipSelectHighTime=QSPI_CS_HIGH_TIME_6_CYCLE
QUADSPI.ClockPrescaler=1
QUADSPI.FifoThreshold=4
QUADSPI.IPParameters=ClockPrescaler,FifoThreshold,SampleShifting,ChipSelectHighTime
QUADSPI.SampleShifting=QSPI_SAMPLE_SHIFTING_HALFCYCLE
RCC.AHBFreq_Value=
216
000000
RCC.AHBFreq_Value=
50
000000
RCC.APB1CLKDivider=RCC_HCLK_DIV4
RCC.APB1Freq_Value=
540
00000
RCC.APB1TimFreq_Value=
108
000000
RCC.APB1Freq_Value=
125
00000
RCC.APB1TimFreq_Value=
25
000000
RCC.APB2CLKDivider=RCC_HCLK_DIV2
RCC.APB2Freq_Value=
108
000000
RCC.APB2TimFreq_Value=
216
000000
RCC.APB2Freq_Value=
25
000000
RCC.APB2TimFreq_Value=
50
000000
RCC.CECFreq_Value=32786.88524590164
RCC.CortexFreq_Value=
216
000000
RCC.EthernetFreq_Value=
216
000000
RCC.FCLKCortexFreq_Value=
216
000000
RCC.CortexFreq_Value=
50
000000
RCC.EthernetFreq_Value=
50
000000
RCC.FCLKCortexFreq_Value=
50
000000
RCC.FamilyName=M
RCC.HCLKFreq_Value=
216
000000
RCC.HCLKFreq_Value=
50
000000
RCC.HSE_VALUE=25000000
RCC.HSI_VALUE=16000000
RCC.I2C1Freq_Value=
540
00000
RCC.I2C2Freq_Value=
540
00000
RCC.I2C3Freq_Value=
540
00000
RCC.I2C4Freq_Value=
540
00000
RCC.I2SFreq_Value=
96
000000
RCC.IPParameters=AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LCDTFToutputFreq_Value,LPTIM1Freq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLI2SRoutputFreq_Value,PLLM,PLLN,PLLQCLKFreq_Value,PLLQoutputFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIRCLKFreq_Value,PLLSAIoutputFreq_Value,PLLSourceVirtual,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value
RCC.LCDTFToutputFreq_Value=
48
000000
RCC.LPTIM1Freq_Value=
540
00000
RCC.I2C1Freq_Value=
125
00000
RCC.I2C2Freq_Value=
125
00000
RCC.I2C3Freq_Value=
125
00000
RCC.I2C4Freq_Value=
125
00000
RCC.I2SFreq_Value=
200
000000
RCC.IPParameters=AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LCDTFToutputFreq_Value,LPTIM1Freq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLI2SRoutputFreq_Value,PLLM,PLLN,PLL
P,PLL
QCLKFreq_Value,PLLQoutputFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIRCLKFreq_Value,PLLSAIoutputFreq_Value,PLLSourceVirtual,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value
RCC.LCDTFToutputFreq_Value=
100
000000
RCC.LPTIM1Freq_Value=
125
00000
RCC.LSI_VALUE=32000
RCC.MCO2PinFreq_Value=216000000
RCC.PLLCLKFreq_Value=216000000
RCC.PLLI2SPCLKFreq_Value=96000000
RCC.PLLI2SQCLKFreq_Value=96000000
RCC.PLLI2SRCLKFreq_Value=96000000
RCC.PLLI2SRoutputFreq_Value=96000000
RCC.PLLM=25
RCC.PLLN=432
RCC.PLLQCLKFreq_Value=216000000
RCC.PLLQoutputFreq_Value=216000000
RCC.PLLSAIPCLKFreq_Value=96000000
RCC.PLLSAIQCLKFreq_Value=96000000
RCC.PLLSAIRCLKFreq_Value=96000000
RCC.PLLSAIoutputFreq_Value=96000000
RCC.MCO2PinFreq_Value=50000000
RCC.PLLCLKFreq_Value=50000000
RCC.PLLI2SPCLKFreq_Value=200000000
RCC.PLLI2SQCLKFreq_Value=200000000
RCC.PLLI2SRCLKFreq_Value=200000000
RCC.PLLI2SRoutputFreq_Value=200000000
RCC.PLLM=12
RCC.PLLN=96
RCC.PLLP=RCC_PLLP_DIV4
RCC.PLLQCLKFreq_Value=100000000
RCC.PLLQoutputFreq_Value=100000000
RCC.PLLSAIPCLKFreq_Value=200000000
RCC.PLLSAIQCLKFreq_Value=200000000
RCC.PLLSAIRCLKFreq_Value=200000000
RCC.PLLSAIoutputFreq_Value=200000000
RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
RCC.RNGFreq_Value=
216
000000
RCC.SAI1Freq_Value=
96
000000
RCC.SAI2Freq_Value=
96
000000
RCC.SDMMCFreq_Value=
216
000000
RCC.SPDIFRXFreq_Value=
96
000000
RCC.SYSCLKFreq_VALUE=
216
000000
RCC.RNGFreq_Value=
100
000000
RCC.SAI1Freq_Value=
200
000000
RCC.SAI2Freq_Value=
200
000000
RCC.SDMMCFreq_Value=
50
000000
RCC.SPDIFRXFreq_Value=
200
000000
RCC.SYSCLKFreq_VALUE=
50
000000
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
RCC.UART4Freq_Value=54000000
RCC.UART5Freq_Value=54000000
RCC.UART7Freq_Value=54000000
RCC.UART8Freq_Value=54000000
RCC.USART1Freq_Value=108000000
RCC.USART2Freq_Value=54000000
RCC.USART3Freq_Value=54000000
RCC.USART6Freq_Value=108000000
RCC.USBFreq_Value=216000000
RCC.VCOI2SOutputFreq_Value=192000000
RCC.VCOInputFreq_Value=1000000
RCC.VCOOutputFreq_Value=432000000
RCC.VCOSAIOutputFreq_Value=192000000
RCC.UART4Freq_Value=12500000
RCC.UART5Freq_Value=12500000
RCC.UART7Freq_Value=12500000
RCC.UART8Freq_Value=12500000
RCC.USART1Freq_Value=25000000
RCC.USART2Freq_Value=12500000
RCC.USART3Freq_Value=12500000
RCC.USART6Freq_Value=25000000
RCC.USBFreq_Value=100000000
RCC.VCOI2SOutputFreq_Value=400000000
RCC.VCOInputFreq_Value=2083333.3333333333
RCC.VCOOutputFreq_Value=200000000
RCC.VCOSAIOutputFreq_Value=400000000
SH.FMC_A0.0=FMC_A0,11b-sda1
SH.FMC_A0.ConfNb=1
SH.FMC_A1.0=FMC_A1,11b-sda1
SH.FMC_A1.ConfNb=1
SH.FMC_A10.0=FMC_A10,11b-sda1
SH.FMC_A10.ConfNb=1
SH.FMC_A14_BA0.0=FMC_BA0,FourSdramBanks1
SH.FMC_A14_BA0.ConfNb=1
SH.FMC_A15_BA1.0=FMC_BA1,FourSdramBanks1
SH.FMC_A15_BA1.ConfNb=1
SH.FMC_A2.0=FMC_A2,11b-sda1
SH.FMC_A2.ConfNb=1
SH.FMC_A3.0=FMC_A3,11b-sda1
SH.FMC_A3.ConfNb=1
SH.FMC_A4.0=FMC_A4,11b-sda1
SH.FMC_A4.ConfNb=1
SH.FMC_A5.0=FMC_A5,11b-sda1
SH.FMC_A5.ConfNb=1
SH.FMC_A6.0=FMC_A6,11b-sda1
SH.FMC_A6.ConfNb=1
SH.FMC_A7.0=FMC_A7,11b-sda1
SH.FMC_A7.ConfNb=1
SH.FMC_A8.0=FMC_A8,11b-sda1
SH.FMC_A8.ConfNb=1
SH.FMC_A9.0=FMC_A9,11b-sda1
SH.FMC_A9.ConfNb=1
SH.FMC_D0_DA0.0=FMC_D0,sd-16b-d1
SH.FMC_D0_DA0.ConfNb=1
SH.FMC_D10_DA10.0=FMC_D10,sd-16b-d1
SH.FMC_D10_DA10.ConfNb=1
SH.FMC_D11_DA11.0=FMC_D11,sd-16b-d1
SH.FMC_D11_DA11.ConfNb=1
SH.FMC_D12_DA12.0=FMC_D12,sd-16b-d1
SH.FMC_D12_DA12.ConfNb=1
SH.FMC_D13_DA13.0=FMC_D13,sd-16b-d1
SH.FMC_D13_DA13.ConfNb=1
SH.FMC_D14_DA14.0=FMC_D14,sd-16b-d1
SH.FMC_D14_DA14.ConfNb=1
SH.FMC_D15_DA15.0=FMC_D15,sd-16b-d1
SH.FMC_D15_DA15.ConfNb=1
SH.FMC_D1_DA1.0=FMC_D1,sd-16b-d1
SH.FMC_D1_DA1.ConfNb=1
SH.FMC_D2_DA2.0=FMC_D2,sd-16b-d1
SH.FMC_D2_DA2.ConfNb=1
SH.FMC_D3_DA3.0=FMC_D3,sd-16b-d1
SH.FMC_D3_DA3.ConfNb=1
SH.FMC_D4_DA4.0=FMC_D4,sd-16b-d1
SH.FMC_D4_DA4.ConfNb=1
SH.FMC_D5_DA5.0=FMC_D5,sd-16b-d1
SH.FMC_D5_DA5.ConfNb=1
SH.FMC_D6_DA6.0=FMC_D6,sd-16b-d1
SH.FMC_D6_DA6.ConfNb=1
SH.FMC_D7_DA7.0=FMC_D7,sd-16b-d1
SH.FMC_D7_DA7.ConfNb=1
SH.FMC_D8_DA8.0=FMC_D8,sd-16b-d1
SH.FMC_D8_DA8.ConfNb=1
SH.FMC_D9_DA9.0=FMC_D9,sd-16b-d1
SH.FMC_D9_DA9.ConfNb=1
SH.FMC_SDCLK.0=FMC_SDCLK,11b-sda1
SH.FMC_SDCLK.ConfNb=1
SH.FMC_SDNCAS.0=FMC_SDNCAS,11b-sda1
SH.FMC_SDNCAS.ConfNb=1
SH.FMC_SDNRAS.0=FMC_SDNRAS,11b-sda1
SH.FMC_SDNRAS.ConfNb=1
SH.FMC_SDNWE.0=FMC_SDNWE,11b-sda1
SH.FMC_SDNWE.ConfNb=1
SH.GPXTI8.0=GPIO_EXTI8
SH.GPXTI8.ConfNb=1
USART1.IPParameters=VirtualMode-Asynchronous
...
...
bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Inc/stm32f7xx_hal_conf.h
浏览文件 @
1d1f272f
...
...
@@ -58,11 +58,11 @@
/* #define HAL_DAC_MODULE_ENABLED */
/* #define HAL_DCMI_MODULE_ENABLED */
/* #define HAL_DMA2D_MODULE_ENABLED */
/* #define HAL_ETH_MODULE_ENABLED */
#define HAL_ETH_MODULE_ENABLED
/* #define HAL_NAND_MODULE_ENABLED */
/* #define HAL_NOR_MODULE_ENABLED */
/* #define HAL_SRAM_MODULE_ENABLED */
/* #define HAL_SDRAM_MODULE_ENABLED */
#define HAL_SDRAM_MODULE_ENABLED
/* #define HAL_HASH_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_IWDG_MODULE_ENABLED */
...
...
@@ -72,7 +72,7 @@
/* #define HAL_RNG_MODULE_ENABLED */
/* #define HAL_RTC_MODULE_ENABLED */
/* #define HAL_SAI_MODULE_ENABLED */
/* #define HAL_SD_MODULE_ENABLED */
#define HAL_SD_MODULE_ENABLED
/* #define HAL_MMC_MODULE_ENABLED */
/* #define HAL_SPDIFRX_MODULE_ENABLED */
/* #define HAL_SPI_MODULE_ENABLED */
...
...
@@ -190,8 +190,8 @@
/* Section 2: PHY configuration section */
/*
DP83848
_PHY_ADDRESS Address*/
#define
DP83848_PHY_ADDRESS 0x01U
/*
LAN8742A
_PHY_ADDRESS Address*/
#define
LAN8742A_PHY_ADDRESS 1
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
#define PHY_RESET_DELAY ((uint32_t)0x000000FFU)
/* PHY Configuration delay */
...
...
@@ -202,8 +202,8 @@
/* Section 3: Common PHY Registers */
#define PHY_BCR ((uint16_t)0x00
00
U)
/*!< Transceiver Basic Control Register */
#define PHY_BSR ((uint16_t)0x0
00
1U)
/*!< Transceiver Basic Status Register */
#define PHY_BCR ((uint16_t)0x00U)
/*!< Transceiver Basic Control Register */
#define PHY_BSR ((uint16_t)0x01U)
/*!< Transceiver Basic Status Register */
#define PHY_RESET ((uint16_t)0x8000U)
/*!< PHY Reset */
#define PHY_LOOPBACK ((uint16_t)0x4000U)
/*!< Select loop-back mode */
...
...
@@ -226,6 +226,9 @@
#define PHY_SPEED_STATUS ((uint16_t)0x0002U)
/*!< PHY Speed mask */
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U)
/*!< PHY Duplex mask */
#define PHY_ISFR ((uint16_t)0x000BU)
/*!< PHY Interrupt Source Flag register Offset */
#define PHY_ISFR_INT4 ((uint16_t)0x000BU)
/*!< PHY Link down inturrupt */
/* ################## SPI peripheral configuration ########################## */
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
...
...
bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Src/main.c
浏览文件 @
1d1f272f
...
...
@@ -63,10 +63,16 @@
/* Private variables ---------------------------------------------------------*/
ETH_HandleTypeDef
heth
;
QSPI_HandleTypeDef
hqspi
;
SD_HandleTypeDef
hsd1
;
UART_HandleTypeDef
huart1
;
SDRAM_HandleTypeDef
hsdram1
;
/* USER CODE BEGIN PV */
/* USER CODE END PV */
...
...
@@ -76,6 +82,9 @@ void SystemClock_Config(void);
static
void
MX_GPIO_Init
(
void
);
static
void
MX_USART1_UART_Init
(
void
);
static
void
MX_QUADSPI_Init
(
void
);
static
void
MX_ETH_Init
(
void
);
static
void
MX_FMC_Init
(
void
);
static
void
MX_SDMMC1_SD_Init
(
void
);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
...
...
@@ -115,6 +124,9 @@ int main(void)
MX_GPIO_Init
();
MX_USART1_UART_Init
();
MX_QUADSPI_Init
();
MX_ETH_Init
();
MX_FMC_Init
();
MX_SDMMC1_SD_Init
();
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
...
...
@@ -146,27 +158,21 @@ void SystemClock_Config(void)
/**Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE
();
__HAL_PWR_VOLTAGESCALING_CONFIG
(
PWR_REGULATOR_VOLTAGE_SCALE
1
);
__HAL_PWR_VOLTAGESCALING_CONFIG
(
PWR_REGULATOR_VOLTAGE_SCALE
3
);
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct
.
OscillatorType
=
RCC_OSCILLATORTYPE_HSE
;
RCC_OscInitStruct
.
HSEState
=
RCC_HSE_ON
;
RCC_OscInitStruct
.
PLL
.
PLLState
=
RCC_PLL_ON
;
RCC_OscInitStruct
.
PLL
.
PLLSource
=
RCC_PLLSOURCE_HSE
;
RCC_OscInitStruct
.
PLL
.
PLLM
=
25
;
RCC_OscInitStruct
.
PLL
.
PLLN
=
432
;
RCC_OscInitStruct
.
PLL
.
PLLP
=
RCC_PLLP_DIV
2
;
RCC_OscInitStruct
.
PLL
.
PLLM
=
12
;
RCC_OscInitStruct
.
PLL
.
PLLN
=
96
;
RCC_OscInitStruct
.
PLL
.
PLLP
=
RCC_PLLP_DIV
4
;
RCC_OscInitStruct
.
PLL
.
PLLQ
=
2
;
if
(
HAL_RCC_OscConfig
(
&
RCC_OscInitStruct
)
!=
HAL_OK
)
{
Error_Handler
();
}
/**Activate the Over-Drive mode
*/
if
(
HAL_PWREx_EnableOverDrive
()
!=
HAL_OK
)
{
Error_Handler
();
}
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_ClkInitStruct
.
ClockType
=
RCC_CLOCKTYPE_HCLK
|
RCC_CLOCKTYPE_SYSCLK
...
...
@@ -176,18 +182,64 @@ void SystemClock_Config(void)
RCC_ClkInitStruct
.
APB1CLKDivider
=
RCC_HCLK_DIV4
;
RCC_ClkInitStruct
.
APB2CLKDivider
=
RCC_HCLK_DIV2
;
if
(
HAL_RCC_ClockConfig
(
&
RCC_ClkInitStruct
,
FLASH_LATENCY_
7
)
!=
HAL_OK
)
if
(
HAL_RCC_ClockConfig
(
&
RCC_ClkInitStruct
,
FLASH_LATENCY_
1
)
!=
HAL_OK
)
{
Error_Handler
();
}
PeriphClkInitStruct
.
PeriphClockSelection
=
RCC_PERIPHCLK_USART1
;
PeriphClkInitStruct
.
PeriphClockSelection
=
RCC_PERIPHCLK_USART1
|
RCC_PERIPHCLK_SDMMC1
;
PeriphClkInitStruct
.
Usart1ClockSelection
=
RCC_USART1CLKSOURCE_PCLK2
;
PeriphClkInitStruct
.
Sdmmc1ClockSelection
=
RCC_SDMMC1CLKSOURCE_SYSCLK
;
if
(
HAL_RCCEx_PeriphCLKConfig
(
&
PeriphClkInitStruct
)
!=
HAL_OK
)
{
Error_Handler
();
}
}
/**
* @brief ETH Initialization Function
* @param None
* @retval None
*/
static
void
MX_ETH_Init
(
void
)
{
/* USER CODE BEGIN ETH_Init 0 */
/* USER CODE END ETH_Init 0 */
uint8_t
MACAddr
[
6
]
;
/* USER CODE BEGIN ETH_Init 1 */
/* USER CODE END ETH_Init 1 */
heth
.
Instance
=
ETH
;
heth
.
Init
.
AutoNegotiation
=
ETH_AUTONEGOTIATION_ENABLE
;
heth
.
Init
.
PhyAddress
=
LAN8742A_PHY_ADDRESS
;
MACAddr
[
0
]
=
0x00
;
MACAddr
[
1
]
=
0x80
;
MACAddr
[
2
]
=
0xE1
;
MACAddr
[
3
]
=
0x00
;
MACAddr
[
4
]
=
0x00
;
MACAddr
[
5
]
=
0x00
;
heth
.
Init
.
MACAddr
=
&
MACAddr
[
0
];
heth
.
Init
.
RxMode
=
ETH_RXPOLLING_MODE
;
heth
.
Init
.
ChecksumMode
=
ETH_CHECKSUM_BY_HARDWARE
;
heth
.
Init
.
MediaInterface
=
ETH_MEDIA_INTERFACE_RMII
;
/* USER CODE BEGIN MACADDRESS */
/* USER CODE END MACADDRESS */
if
(
HAL_ETH_Init
(
&
heth
)
!=
HAL_OK
)
{
Error_Handler
();
}
/* USER CODE BEGIN ETH_Init 2 */
/* USER CODE END ETH_Init 2 */
}
/**
* @brief QUADSPI Initialization Function
* @param None
...
...
@@ -223,6 +275,42 @@ static void MX_QUADSPI_Init(void)
}
/**
* @brief SDMMC1 Initialization Function
* @param None
* @retval None
*/
static
void
MX_SDMMC1_SD_Init
(
void
)
{
/* USER CODE BEGIN SDMMC1_Init 0 */
/* USER CODE END SDMMC1_Init 0 */
/* USER CODE BEGIN SDMMC1_Init 1 */
/* USER CODE END SDMMC1_Init 1 */
hsd1
.
Instance
=
SDMMC1
;
hsd1
.
Init
.
ClockEdge
=
SDMMC_CLOCK_EDGE_RISING
;
hsd1
.
Init
.
ClockBypass
=
SDMMC_CLOCK_BYPASS_DISABLE
;
hsd1
.
Init
.
ClockPowerSave
=
SDMMC_CLOCK_POWER_SAVE_DISABLE
;
hsd1
.
Init
.
BusWide
=
SDMMC_BUS_WIDE_1B
;
hsd1
.
Init
.
HardwareFlowControl
=
SDMMC_HARDWARE_FLOW_CONTROL_DISABLE
;
hsd1
.
Init
.
ClockDiv
=
0
;
if
(
HAL_SD_Init
(
&
hsd1
)
!=
HAL_OK
)
{
Error_Handler
();
}
if
(
HAL_SD_ConfigWideBusOperation
(
&
hsd1
,
SDMMC_BUS_WIDE_4B
)
!=
HAL_OK
)
{
Error_Handler
();
}
/* USER CODE BEGIN SDMMC1_Init 2 */
/* USER CODE END SDMMC1_Init 2 */
}
/**
* @brief USART1 Initialization Function
* @param None
...
...
@@ -258,6 +346,41 @@ static void MX_USART1_UART_Init(void)
}
/* FMC initialization function */
static
void
MX_FMC_Init
(
void
)
{
FMC_SDRAM_TimingTypeDef
SdramTiming
;
/** Perform the SDRAM1 memory initialization sequence
*/
hsdram1
.
Instance
=
FMC_SDRAM_DEVICE
;
/* hsdram1.Init */
hsdram1
.
Init
.
SDBank
=
FMC_SDRAM_BANK1
;
hsdram1
.
Init
.
ColumnBitsNumber
=
FMC_SDRAM_COLUMN_BITS_NUM_8
;
hsdram1
.
Init
.
RowBitsNumber
=
FMC_SDRAM_ROW_BITS_NUM_11
;
hsdram1
.
Init
.
MemoryDataWidth
=
FMC_SDRAM_MEM_BUS_WIDTH_16
;
hsdram1
.
Init
.
InternalBankNumber
=
FMC_SDRAM_INTERN_BANKS_NUM_4
;
hsdram1
.
Init
.
CASLatency
=
FMC_SDRAM_CAS_LATENCY_1
;
hsdram1
.
Init
.
WriteProtection
=
FMC_SDRAM_WRITE_PROTECTION_DISABLE
;
hsdram1
.
Init
.
SDClockPeriod
=
FMC_SDRAM_CLOCK_DISABLE
;
hsdram1
.
Init
.
ReadBurst
=
FMC_SDRAM_RBURST_DISABLE
;
hsdram1
.
Init
.
ReadPipeDelay
=
FMC_SDRAM_RPIPE_DELAY_0
;
/* SdramTiming */
SdramTiming
.
LoadToActiveDelay
=
16
;
SdramTiming
.
ExitSelfRefreshDelay
=
16
;
SdramTiming
.
SelfRefreshTime
=
16
;
SdramTiming
.
RowCycleDelay
=
16
;
SdramTiming
.
WriteRecoveryTime
=
16
;
SdramTiming
.
RPDelay
=
16
;
SdramTiming
.
RCDDelay
=
16
;
if
(
HAL_SDRAM_Init
(
&
hsdram1
,
&
SdramTiming
)
!=
HAL_OK
)
{
Error_Handler
(
);
}
}
/**
* @brief GPIO Initialization Function
* @param None
...
...
@@ -269,13 +392,15 @@ static void MX_GPIO_Init(void)
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOE_CLK_ENABLE
();
__HAL_RCC_GPIOG_CLK_ENABLE
();
__HAL_RCC_GPIOC_CLK_ENABLE
();
__HAL_RCC_GPIOA_CLK_ENABLE
();
__HAL_RCC_GPIOB_CLK_ENABLE
();
__HAL_RCC_GPIOC_CLK_ENABLE
();
__HAL_RCC_GPIOD_CLK_ENABLE
();
__HAL_RCC_GPIOF_CLK_ENABLE
();
__HAL_RCC_GPIOK_CLK_ENABLE
();
__HAL_RCC_GPIOH_CLK_ENABLE
();
__HAL_RCC_GPIOJ_CLK_ENABLE
();
__HAL_RCC_GPIOD_CLK_ENABLE
();
/*Configure GPIO pin : PK1 */
GPIO_InitStruct
.
Pin
=
GPIO_PIN_1
;
...
...
bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Src/stm32f7xx_hal_msp.c
浏览文件 @
1d1f272f
...
...
@@ -97,6 +97,108 @@ void HAL_MspInit(void)
/* USER CODE END MspInit 1 */
}
/**
* @brief ETH MSP Initialization
* This function configures the hardware resources used in this example
* @param heth: ETH handle pointer
* @retval None
*/
void
HAL_ETH_MspInit
(
ETH_HandleTypeDef
*
heth
)
{
GPIO_InitTypeDef
GPIO_InitStruct
=
{
0
};
if
(
heth
->
Instance
==
ETH
)
{
/* USER CODE BEGIN ETH_MspInit 0 */
/* USER CODE END ETH_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ETH_CLK_ENABLE
();
__HAL_RCC_GPIOG_CLK_ENABLE
();
__HAL_RCC_GPIOC_CLK_ENABLE
();
__HAL_RCC_GPIOA_CLK_ENABLE
();
/**ETH GPIO Configuration
PG14 ------> ETH_TXD1
PG13 ------> ETH_TXD0
PG11 ------> ETH_TX_EN
PC1 ------> ETH_MDC
PA1 ------> ETH_REF_CLK
PC4 ------> ETH_RXD0
PA2 ------> ETH_MDIO
PC5 ------> ETH_RXD1
PA7 ------> ETH_CRS_DV
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_14
|
GPIO_PIN_13
|
GPIO_PIN_11
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF11_ETH
;
HAL_GPIO_Init
(
GPIOG
,
&
GPIO_InitStruct
);
GPIO_InitStruct
.
Pin
=
GPIO_PIN_1
|
GPIO_PIN_4
|
GPIO_PIN_5
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF11_ETH
;
HAL_GPIO_Init
(
GPIOC
,
&
GPIO_InitStruct
);
GPIO_InitStruct
.
Pin
=
GPIO_PIN_1
|
GPIO_PIN_2
|
GPIO_PIN_7
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF11_ETH
;
HAL_GPIO_Init
(
GPIOA
,
&
GPIO_InitStruct
);
/* USER CODE BEGIN ETH_MspInit 1 */
/* USER CODE END ETH_MspInit 1 */
}
}
/**
* @brief ETH MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param heth: ETH handle pointer
* @retval None
*/
void
HAL_ETH_MspDeInit
(
ETH_HandleTypeDef
*
heth
)
{
if
(
heth
->
Instance
==
ETH
)
{
/* USER CODE BEGIN ETH_MspDeInit 0 */
/* USER CODE END ETH_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_ETH_CLK_DISABLE
();
/**ETH GPIO Configuration
PG14 ------> ETH_TXD1
PG13 ------> ETH_TXD0
PG11 ------> ETH_TX_EN
PC1 ------> ETH_MDC
PA1 ------> ETH_REF_CLK
PC4 ------> ETH_RXD0
PA2 ------> ETH_MDIO
PC5 ------> ETH_RXD1
PA7 ------> ETH_CRS_DV
*/
HAL_GPIO_DeInit
(
GPIOG
,
GPIO_PIN_14
|
GPIO_PIN_13
|
GPIO_PIN_11
);
HAL_GPIO_DeInit
(
GPIOC
,
GPIO_PIN_1
|
GPIO_PIN_4
|
GPIO_PIN_5
);
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_1
|
GPIO_PIN_2
|
GPIO_PIN_7
);
/* USER CODE BEGIN ETH_MspDeInit 1 */
/* USER CODE END ETH_MspDeInit 1 */
}
}
/**
* @brief QSPI MSP Initialization
* This function configures the hardware resources used in this example
...
...
@@ -200,6 +302,94 @@ void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* hqspi)
}
/**
* @brief SD MSP Initialization
* This function configures the hardware resources used in this example
* @param hsd: SD handle pointer
* @retval None
*/
void
HAL_SD_MspInit
(
SD_HandleTypeDef
*
hsd
)
{
GPIO_InitTypeDef
GPIO_InitStruct
=
{
0
};
if
(
hsd
->
Instance
==
SDMMC1
)
{
/* USER CODE BEGIN SDMMC1_MspInit 0 */
/* USER CODE END SDMMC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_SDMMC1_CLK_ENABLE
();
__HAL_RCC_GPIOC_CLK_ENABLE
();
__HAL_RCC_GPIOD_CLK_ENABLE
();
/**SDMMC1 GPIO Configuration
PC12 ------> SDMMC1_CK
PC11 ------> SDMMC1_D3
PC10 ------> SDMMC1_D2
PD2 ------> SDMMC1_CMD
PC9 ------> SDMMC1_D1
PC8 ------> SDMMC1_D0
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_12
|
GPIO_PIN_11
|
GPIO_PIN_10
|
GPIO_PIN_9
|
GPIO_PIN_8
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF12_SDMMC1
;
HAL_GPIO_Init
(
GPIOC
,
&
GPIO_InitStruct
);
GPIO_InitStruct
.
Pin
=
GPIO_PIN_2
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF12_SDMMC1
;
HAL_GPIO_Init
(
GPIOD
,
&
GPIO_InitStruct
);
/* USER CODE BEGIN SDMMC1_MspInit 1 */
/* USER CODE END SDMMC1_MspInit 1 */
}
}
/**
* @brief SD MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hsd: SD handle pointer
* @retval None
*/
void
HAL_SD_MspDeInit
(
SD_HandleTypeDef
*
hsd
)
{
if
(
hsd
->
Instance
==
SDMMC1
)
{
/* USER CODE BEGIN SDMMC1_MspDeInit 0 */
/* USER CODE END SDMMC1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_SDMMC1_CLK_DISABLE
();
/**SDMMC1 GPIO Configuration
PC12 ------> SDMMC1_CK
PC11 ------> SDMMC1_D3
PC10 ------> SDMMC1_D2
PD2 ------> SDMMC1_CMD
PC9 ------> SDMMC1_D1
PC8 ------> SDMMC1_D0
*/
HAL_GPIO_DeInit
(
GPIOC
,
GPIO_PIN_12
|
GPIO_PIN_11
|
GPIO_PIN_10
|
GPIO_PIN_9
|
GPIO_PIN_8
);
HAL_GPIO_DeInit
(
GPIOD
,
GPIO_PIN_2
);
/* USER CODE BEGIN SDMMC1_MspDeInit 1 */
/* USER CODE END SDMMC1_MspDeInit 1 */
}
}
/**
* @brief UART MSP Initialization
* This function configures the hardware resources used in this example
...
...
@@ -278,6 +468,203 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
}
static
uint32_t
FMC_Initialized
=
0
;
static
void
HAL_FMC_MspInit
(
void
){
/* USER CODE BEGIN FMC_MspInit 0 */
/* USER CODE END FMC_MspInit 0 */
GPIO_InitTypeDef
GPIO_InitStruct
;
if
(
FMC_Initialized
)
{
return
;
}
FMC_Initialized
=
1
;
/* Peripheral clock enable */
__HAL_RCC_FMC_CLK_ENABLE
();
/** FMC GPIO Configuration
PG15 ------> FMC_SDNCAS
PD0 ------> FMC_D2
PD1 ------> FMC_D3
PF0 ------> FMC_A0
PF1 ------> FMC_A1
PF2 ------> FMC_A2
PF3 ------> FMC_A3
PG8 ------> FMC_SDCLK
PF4 ------> FMC_A4
PH5 ------> FMC_SDNWE
PH3 ------> FMC_SDNE0
PF5 ------> FMC_A5
PD15 ------> FMC_D1
PD10 ------> FMC_D15
PC3 ------> FMC_SDCKE0
PD14 ------> FMC_D0
PD9 ------> FMC_D14
PD8 ------> FMC_D13
PF12 ------> FMC_A6
PF15 ------> FMC_A9
PF13 ------> FMC_A7
PG0 ------> FMC_A10
PE8 ------> FMC_D5
PG5 ------> FMC_BA1
PG4 ------> FMC_BA0
PF14 ------> FMC_A8
PF11 ------> FMC_SDNRAS
PE9 ------> FMC_D6
PE11 ------> FMC_D8
PE14 ------> FMC_D11
PE7 ------> FMC_D4
PE10 ------> FMC_D7
PE12 ------> FMC_D9
PE15 ------> FMC_D12
PE13 ------> FMC_D10
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_15
|
GPIO_PIN_8
|
GPIO_PIN_0
|
GPIO_PIN_5
|
GPIO_PIN_4
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF12_FMC
;
HAL_GPIO_Init
(
GPIOG
,
&
GPIO_InitStruct
);
GPIO_InitStruct
.
Pin
=
GPIO_PIN_0
|
GPIO_PIN_1
|
GPIO_PIN_15
|
GPIO_PIN_10
|
GPIO_PIN_14
|
GPIO_PIN_9
|
GPIO_PIN_8
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF12_FMC
;
HAL_GPIO_Init
(
GPIOD
,
&
GPIO_InitStruct
);
GPIO_InitStruct
.
Pin
=
GPIO_PIN_0
|
GPIO_PIN_1
|
GPIO_PIN_2
|
GPIO_PIN_3
|
GPIO_PIN_4
|
GPIO_PIN_5
|
GPIO_PIN_12
|
GPIO_PIN_15
|
GPIO_PIN_13
|
GPIO_PIN_14
|
GPIO_PIN_11
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF12_FMC
;
HAL_GPIO_Init
(
GPIOF
,
&
GPIO_InitStruct
);
GPIO_InitStruct
.
Pin
=
GPIO_PIN_5
|
GPIO_PIN_3
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF12_FMC
;
HAL_GPIO_Init
(
GPIOH
,
&
GPIO_InitStruct
);
GPIO_InitStruct
.
Pin
=
GPIO_PIN_3
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF12_FMC
;
HAL_GPIO_Init
(
GPIOC
,
&
GPIO_InitStruct
);
GPIO_InitStruct
.
Pin
=
GPIO_PIN_8
|
GPIO_PIN_9
|
GPIO_PIN_11
|
GPIO_PIN_14
|
GPIO_PIN_7
|
GPIO_PIN_10
|
GPIO_PIN_12
|
GPIO_PIN_15
|
GPIO_PIN_13
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_VERY_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF12_FMC
;
HAL_GPIO_Init
(
GPIOE
,
&
GPIO_InitStruct
);
/* USER CODE BEGIN FMC_MspInit 1 */
/* USER CODE END FMC_MspInit 1 */
}
void
HAL_SDRAM_MspInit
(
SDRAM_HandleTypeDef
*
hsdram
){
/* USER CODE BEGIN SDRAM_MspInit 0 */
/* USER CODE END SDRAM_MspInit 0 */
HAL_FMC_MspInit
();
/* USER CODE BEGIN SDRAM_MspInit 1 */
/* USER CODE END SDRAM_MspInit 1 */
}
static
uint32_t
FMC_DeInitialized
=
0
;
static
void
HAL_FMC_MspDeInit
(
void
){
/* USER CODE BEGIN FMC_MspDeInit 0 */
/* USER CODE END FMC_MspDeInit 0 */
if
(
FMC_DeInitialized
)
{
return
;
}
FMC_DeInitialized
=
1
;
/* Peripheral clock enable */
__HAL_RCC_FMC_CLK_DISABLE
();
/** FMC GPIO Configuration
PG15 ------> FMC_SDNCAS
PD0 ------> FMC_D2
PD1 ------> FMC_D3
PF0 ------> FMC_A0
PF1 ------> FMC_A1
PF2 ------> FMC_A2
PF3 ------> FMC_A3
PG8 ------> FMC_SDCLK
PF4 ------> FMC_A4
PH5 ------> FMC_SDNWE
PH3 ------> FMC_SDNE0
PF5 ------> FMC_A5
PD15 ------> FMC_D1
PD10 ------> FMC_D15
PC3 ------> FMC_SDCKE0
PD14 ------> FMC_D0
PD9 ------> FMC_D14
PD8 ------> FMC_D13
PF12 ------> FMC_A6
PF15 ------> FMC_A9
PF13 ------> FMC_A7
PG0 ------> FMC_A10
PE8 ------> FMC_D5
PG5 ------> FMC_BA1
PG4 ------> FMC_BA0
PF14 ------> FMC_A8
PF11 ------> FMC_SDNRAS
PE9 ------> FMC_D6
PE11 ------> FMC_D8
PE14 ------> FMC_D11
PE7 ------> FMC_D4
PE10 ------> FMC_D7
PE12 ------> FMC_D9
PE15 ------> FMC_D12
PE13 ------> FMC_D10
*/
HAL_GPIO_DeInit
(
GPIOG
,
GPIO_PIN_15
|
GPIO_PIN_8
|
GPIO_PIN_0
|
GPIO_PIN_5
|
GPIO_PIN_4
);
HAL_GPIO_DeInit
(
GPIOD
,
GPIO_PIN_0
|
GPIO_PIN_1
|
GPIO_PIN_15
|
GPIO_PIN_10
|
GPIO_PIN_14
|
GPIO_PIN_9
|
GPIO_PIN_8
);
HAL_GPIO_DeInit
(
GPIOF
,
GPIO_PIN_0
|
GPIO_PIN_1
|
GPIO_PIN_2
|
GPIO_PIN_3
|
GPIO_PIN_4
|
GPIO_PIN_5
|
GPIO_PIN_12
|
GPIO_PIN_15
|
GPIO_PIN_13
|
GPIO_PIN_14
|
GPIO_PIN_11
);
HAL_GPIO_DeInit
(
GPIOH
,
GPIO_PIN_5
|
GPIO_PIN_3
);
HAL_GPIO_DeInit
(
GPIOC
,
GPIO_PIN_3
);
HAL_GPIO_DeInit
(
GPIOE
,
GPIO_PIN_8
|
GPIO_PIN_9
|
GPIO_PIN_11
|
GPIO_PIN_14
|
GPIO_PIN_7
|
GPIO_PIN_10
|
GPIO_PIN_12
|
GPIO_PIN_15
|
GPIO_PIN_13
);
/* USER CODE BEGIN FMC_MspDeInit 1 */
/* USER CODE END FMC_MspDeInit 1 */
}
void
HAL_SDRAM_MspDeInit
(
SDRAM_HandleTypeDef
*
hsdram
){
/* USER CODE BEGIN SDRAM_MspDeInit 0 */
/* USER CODE END SDRAM_MspDeInit 0 */
HAL_FMC_MspDeInit
();
/* USER CODE BEGIN SDRAM_MspDeInit 1 */
/* USER CODE END SDRAM_MspDeInit 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
...
...
bsp/stm32/stm32f746-st-disco/board/Kconfig
浏览文件 @
1d1f272f
...
...
@@ -11,6 +11,11 @@ menu "Onboard Peripheral Drivers"
select BSP_USING_UART
select BSP_USING_UART1
default y
config BSP_USING_SDRAM
bool "Enable SDRAM"
default n
config BSP_USING_QSPI_FLASH
bool "Enable QSPI FLASH (N25Q256 qspi1)"
select BSP_USING_QSPI
...
...
@@ -18,6 +23,22 @@ menu "Onboard Peripheral Drivers"
select RT_SFUD_USING_QSPI
default n
config PHY_USING_LAN8720A
bool
config BSP_USING_ETH
bool "Enable Ethernet"
select RT_USING_LWIP
select PHY_USING_LAN8720A
default n
config BSP_USING_SDCARD
bool "Enable SDCARD (sdio)"
select BSP_USING_SDIO
select RT_USING_DFS
select RT_USING_DFS_ELMFAT
default n
endmenu
menu "On-chip Peripheral Drivers"
...
...
@@ -46,6 +67,12 @@ menu "On-chip Peripheral Drivers"
select RT_USING_SPI
default n
config BSP_USING_SDIO
bool "Enable SDIO"
select RT_USING_SDIO
select RT_USING_DFS
default n
endmenu
menu "Board extended module Drivers"
...
...
bsp/stm32/stm32f746-st-disco/board/SConscript
浏览文件 @
1d1f272f
...
...
@@ -7,8 +7,16 @@ cwd = GetCurrentDir()
src
=
Glob
(
'board.c'
)
src
+=
Glob
(
'CubeMX_Config/Src/stm32f7xx_hal_msp.c'
)
if
GetDepend
([
'BSP_USING_ETH'
]):
src
+=
Glob
(
'ports/phy_reset.c'
)
if
GetDepend
([
'BSP_USING_QSPI_FLASH'
]):
src
+=
Glob
(
'ports/drv_qspi_flash.c'
)
if
GetDepend
([
'BSP_USING_SDCARD'
]):
src
+=
Glob
(
'ports/sdcard_port.c'
)
path
=
[
cwd
]
path
+=
[
cwd
+
'/CubeMX_Config/Inc'
]
path
+=
[
cwd
+
'/ports'
]
...
...
bsp/stm32/stm32f746-st-disco/board/ports/drv_qspi_flash.c
浏览文件 @
1d1f272f
...
...
@@ -5,7 +5,7 @@
*
* Change Logs:
* Date Author Notes
* 2019-01-26 jinsheng first version
* 2019-01-26 jinsheng
first version
*/
#include <board.h>
...
...
bsp/stm32/stm32f746-st-disco/board/ports/phy_reset.c
0 → 100644
浏览文件 @
1d1f272f
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-02-16 jinsheng first version
*/
#include <rtthread.h>
//#define DRV_DEBUG
#define LOG_TAG "drv.phy_reset"
#include <drv_log.h>
//PHY RESET PIN link system reset
/* phy reset */
void
phy_reset
(
void
)
{
}
bsp/stm32/stm32f746-st-disco/board/ports/sdcard_port.c
0 → 100644
浏览文件 @
1d1f272f
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-02-17 jinsheng add sdcard port file
*/
#include <rtthread.h>
#ifdef BSP_USING_SDCARD
#include <dfs_elm.h>
#include <dfs_fs.h>
#include <dfs_posix.h>
#define DBG_ENABLE
#define DBG_SECTION_NAME "app.card"
#define DBG_COLOR
#define DBG_LEVEL DBG_INFO
#include <rtdbg.h>
void
sd_mount
(
void
*
parameter
)
{
while
(
1
)
{
rt_thread_mdelay
(
500
);
if
(
rt_device_find
(
"sd0"
)
!=
RT_NULL
)
{
if
(
dfs_mount
(
"sd0"
,
"/"
,
"elm"
,
0
,
0
)
==
RT_EOK
)
{
LOG_I
(
"sd card mount to '/'"
);
break
;
}
else
{
LOG_W
(
"sd card mount to '/' failed!"
);
}
}
}
}
int
stm32_sdcard_mount
(
void
)
{
rt_thread_t
tid
;
tid
=
rt_thread_create
(
"sd_mount"
,
sd_mount
,
RT_NULL
,
1024
,
RT_THREAD_PRIORITY_MAX
-
2
,
20
);
if
(
tid
!=
RT_NULL
)
{
rt_thread_startup
(
tid
);
}
else
{
LOG_E
(
"create sd_mount thread err!"
);
}
return
RT_EOK
;
}
INIT_APP_EXPORT
(
stm32_sdcard_mount
);
#endif
/* BSP_USING_SDCARD */
bsp/stm32/stm32f746-st-disco/board/ports/sdram_port.h
0 → 100644
浏览文件 @
1d1f272f
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-02-16 jinsheng The first version for STM32F7xx
*/
#ifndef __SDRAM_PORT_H__
#define __SDRAM_PORT_H__
/* parameters for sdram peripheral */
/* Bank1 or Bank2 */
#define SDRAM_TARGET_BANK 1
/* stm32f7 Bank1:0XC0000000 Bank2:0XD0000000 */
#define SDRAM_BANK_ADDR ((uint32_t)0XC0000000)
/* data width: 8, 16, 32 */
#define SDRAM_DATA_WIDTH 16
/* column bit numbers: 8, 9, 10, 11 */
#define SDRAM_COLUMN_BITS 9
/* row bit numbers: 11, 12, 13 */
#define SDRAM_ROW_BITS 13
/* cas latency clock number: 1, 2, 3 */
#define SDRAM_CAS_LATENCY 3
/* read pipe delay: 0, 1, 2 */
#define SDRAM_RPIPE_DELAY 1
/* clock divid: 2, 3 */
#define SDCLOCK_PERIOD 2
/* refresh rate counter */
#define SDRAM_REFRESH_COUNT ((uint32_t)0x02AB)
#define SDRAM_SIZE ((uint32_t)0x1000000)
/* Timing configuration for MT48LC4M32B2B5-6A */
/* TMRD: 2 Clock cycles */
#define LOADTOACTIVEDELAY 2
/* TXSR: 7x11.90ns */
#define EXITSELFREFRESHDELAY 8
/* TRAS: 4x11.90ns */
#define SELFREFRESHTIME 6
/* TRC: 7x11.90ns */
#define ROWCYCLEDELAY 6
/* TWR: 2 Clock cycles */
#define WRITERECOVERYTIME 2
/* TRP: 2x11.90ns */
#define RPDELAY 2
/* TRCD: 2x11.90ns */
#define RCDDELAY 2
/* memory mode register */
#define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000)
#define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001)
#define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002)
#define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004)
#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000)
#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008)
#define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020)
#define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030)
#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000)
#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200)
#endif
bsp/stm32/stm32f746-st-disco/rtconfig.h
浏览文件 @
1d1f272f
...
...
@@ -38,7 +38,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x4000
0
#define RT_VER_NUM 0x4000
1
#define ARCH_ARM
#define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M7
...
...
@@ -78,6 +78,7 @@
#define RT_PIPE_BUFSZ 512
#define RT_USING_SERIAL
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
/* Using WiFi */
...
...
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