stm32l4p5xx_sram.icf

/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__    = 0x20000000;
define symbol __ICFEDIT_region_ROM_end__      = 0x20017FFF;
define symbol __ICFEDIT_region_RAM_start__    = 0x20018000;
define symbol __ICFEDIT_region_RAM_end__      = 0x2001FFFF;

/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__   = 0x000;
/**** End of ICF editor section. ###ICF###*/

define symbol __region_SRAM1_start__  = 0x20018000;
define symbol __region_SRAM1_end__    = 0x2001FFFF;
define symbol __region_SRAM2_start__  = 0x20020000;
define symbol __region_SRAM2_end__    = 0x2002FFFF;
define symbol __region_SRAM3_start__  = 0x20030000;
define symbol __region_SRAM3_end__    = 0x2004FFFF;

define memory mem with size = 4G;
define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
define region SRAM1_region    = mem:[from __region_SRAM1_start__   to __region_SRAM1_end__];
define region SRAM2_region    = mem:[from __region_SRAM2_start__   to __region_SRAM2_end__];
define region SRAM3_region    = mem:[from __region_SRAM3_start__   to __region_SRAM3_end__];

define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

initialize by copy { readwrite };
do not initialize  { section .noinit };

place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };

place in ROM_region   { readonly };
place in RAM_region   { readwrite,
                        block CSTACK, block HEAP };
place in SRAM1_region { };
place in SRAM2_region { };
place in SRAM3_region { };