From 97e80a164c9854199ccfefe307a66e8da4abcb95 Mon Sep 17 00:00:00 2001 From: wuyangyong Date: Tue, 24 May 2011 02:27:03 +0000 Subject: [PATCH] add PIC32 Ethernet Starter Kit demo git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1433 bbd45198-f89e-11dd-88c7-29a3b14d5316 --- bsp/pic32ethernet/application.c | 50 +++++++++++ bsp/pic32ethernet/board.c | 63 ++++++++++++++ bsp/pic32ethernet/console.c | 39 +++++++++ bsp/pic32ethernet/project.cbp | 109 ++++++++++++++++++++++++ bsp/pic32ethernet/project.mcp | 134 ++++++++++++++++++++++++++++++ bsp/pic32ethernet/project.mcw | Bin 0 -> 29696 bytes bsp/pic32ethernet/readme.txt | 10 +++ bsp/pic32ethernet/rtconfig.h | 143 ++++++++++++++++++++++++++++++++ bsp/pic32ethernet/startup.c | 107 ++++++++++++++++++++++++ 9 files changed, 655 insertions(+) create mode 100644 bsp/pic32ethernet/application.c create mode 100644 bsp/pic32ethernet/board.c create mode 100644 bsp/pic32ethernet/console.c create mode 100644 bsp/pic32ethernet/project.cbp create mode 100644 bsp/pic32ethernet/project.mcp create mode 100644 bsp/pic32ethernet/project.mcw create mode 100644 bsp/pic32ethernet/readme.txt create mode 100644 bsp/pic32ethernet/rtconfig.h create mode 100644 bsp/pic32ethernet/startup.c diff --git a/bsp/pic32ethernet/application.c b/bsp/pic32ethernet/application.c new file mode 100644 index 0000000000..f0d6e3c3b8 --- /dev/null +++ b/bsp/pic32ethernet/application.c @@ -0,0 +1,50 @@ +/* + * File : application.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2011-05-23 aozima first implementation for PIC32. + */ + +// Adds support for PIC32 Peripheral library functions and macros +#include + +static void delay(void) +{ + volatile unsigned long i; + for(i=0;i<500000;i++); +} + +int rt_application_init(void) +{ + PORTSetPinsDigitalOut(IOPORT_D, BIT_0); + + while(1) + { + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + delay(); + PORTSetBits(IOPORT_D, BIT_0); + delay(); + PORTClearBits(IOPORT_D, BIT_0); + } + + return 0; +} diff --git a/bsp/pic32ethernet/board.c b/bsp/pic32ethernet/board.c new file mode 100644 index 0000000000..b247c9c54b --- /dev/null +++ b/bsp/pic32ethernet/board.c @@ -0,0 +1,63 @@ +/* + * File : board.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006-2011, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2011-05-23 aozima first implementation for PIC32. + */ + +// Adds support for PIC32 Peripheral library functions and macros +#include + +// Configuration Bits +#pragma config FNOSC = PRIPLL // Oscillator Selection +#pragma config FPLLIDIV = DIV_2 // PLL Input Divider (PIC32 Starter Kit: use divide by 2 only) +#pragma config FPLLMUL = MUL_20 // PLL Multiplier +#pragma config FPLLODIV = DIV_1 // PLL Output Divider +#pragma config FPBDIV = DIV_1 // Peripheral Clock divisor +#pragma config FWDTEN = OFF // Watchdog Timer +#pragma config WDTPS = PS1 // Watchdog Timer Postscale +#pragma config FCKSM = CSDCMD // Clock Switching & Fail Safe Clock Monitor +#pragma config OSCIOFNC = OFF // CLKO Enable +#pragma config POSCMOD = XT // Primary Oscillator +#pragma config IESO = OFF // Internal/External Switch-over +#pragma config FSOSCEN = OFF // Secondary Oscillator Enable +#pragma config CP = OFF // Code Protect +#pragma config BWP = OFF // Boot Flash Write Protect +#pragma config PWP = OFF // Program Flash Write Protect +#pragma config ICESEL = ICS_PGx2 // ICE/ICD Comm Channel Select +#pragma config DEBUG = OFF // Debugger Disabled for Starter Kit + +// The following is used by the main application +#define SYS_FREQ (80000000) + +static void rt_hw_show_info(void) +{ + rt_kprintf("\r\n\r\n---------- board info ----------\r\n"); + rt_kprintf("DEVICE_FAMILY: PIC32\r\n"); + rt_kprintf("CPU_ARCHITECTURE: MIPS\r\n"); + rt_kprintf("CPU_FREQ: %uMHz\r\n",SYS_FREQ/1000000UL); +} + +/** +* This function will initial FM3 Easy Kit board. + */ +void rt_hw_board_init() +{ + // Configure the device for maximum performance, but do not change the PBDIV clock divisor. + // Given the options, this function will change the program Flash wait states, + // RAM wait state and enable prefetch cache, but will not change the PBDIV. + // The PBDIV value is already set via the pragma FPBDIV option above. + SYSTEMConfig(SYS_FREQ, SYS_CFG_WAIT_STATES | SYS_CFG_PCACHE); + + rt_hw_console_init(); + + rt_hw_show_info(); +} + diff --git a/bsp/pic32ethernet/console.c b/bsp/pic32ethernet/console.c new file mode 100644 index 0000000000..09295bfc8d --- /dev/null +++ b/bsp/pic32ethernet/console.c @@ -0,0 +1,39 @@ +/* + * File : console.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006-2011, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2011-05-23 aozima first implementation for PIC32. + */ +#include + +// Warning: +// if you want to use DBPRINTF in PIC32 Ethernet Starter Kit, +// you project must globl define PIC32_STARTER_KIT and debug in MPLAB. +// but,if you want run app without debug mode,you must remove this features. + +// Adds support for PIC32 Peripheral library functions and macros +#include + +void rt_hw_console_init(void) +{ + //Initialize the DB_UTILS IO channel + DBINIT(); +} + +/** + * This function is used by rt_kprintf to display a string on console. + * + * @param str the displayed string + */ +void rt_hw_console_output(const char* str) +{ + DBPRINTF(str); +} + diff --git a/bsp/pic32ethernet/project.cbp b/bsp/pic32ethernet/project.cbp new file mode 100644 index 0000000000..16cb7c2de6 --- /dev/null +++ b/bsp/pic32ethernet/project.cbp @@ -0,0 +1,109 @@ + + + + + + diff --git a/bsp/pic32ethernet/project.mcp b/bsp/pic32ethernet/project.mcp new file mode 100644 index 0000000000..802e2bd324 --- /dev/null +++ b/bsp/pic32ethernet/project.mcp @@ -0,0 +1,134 @@ +[HEADER] +magic_cookie={66E99B07-E706-4689-9E80-9B2582898A13} +file_version=1.0 +device=PIC32MX795F512L +[PATH_INFO] +BuildDirPolicy=BuildDirIsProjectDir +dir_src= +dir_bin=./obj +dir_tmp=./obj +dir_sin= +dir_inc=.;../../include +dir_lib=C:\Program Files\Microchip\MPLAB C32 Suite\lib;C:\Program Files\Microchip\MPLAB C32 Suite\pic32mx\lib +dir_lkr= +[CAT_FILTERS] +filter_src=*.s;*.c +filter_inc=*.h;*.inc +filter_obj=*.o +filter_lib=*.a +filter_lkr=*.ld +[CAT_SUBFOLDERS] +subfolder_src=kernel;pic32 +subfolder_inc= +subfolder_obj= +subfolder_lib= +subfolder_lkr= +[FILE_SUBFOLDERS] +file_000=. +file_001=. +file_002=kernel +file_003=kernel +file_004=kernel +file_005=kernel +file_006=kernel +file_007=kernel +file_008=kernel +file_009=kernel +file_010=kernel +file_011=kernel +file_012=kernel +file_013=kernel +file_014=kernel +file_015=kernel +file_016=kernel +file_017=. +file_018=pic32 +file_019=pic32 +file_020=. +file_021=. +[GENERATED_FILES] +file_000=no +file_001=no +file_002=no +file_003=no +file_004=no +file_005=no +file_006=no +file_007=no +file_008=no +file_009=no +file_010=no +file_011=no +file_012=no +file_013=no +file_014=no +file_015=no +file_016=no +file_017=no +file_018=no +file_019=no +file_020=no +file_021=no +[OTHER_FILES] +file_000=no +file_001=no +file_002=no +file_003=no +file_004=no +file_005=no +file_006=no +file_007=no +file_008=no +file_009=no +file_010=no +file_011=no +file_012=no +file_013=no +file_014=no +file_015=no +file_016=no +file_017=no +file_018=no +file_019=no +file_020=no +file_021=no +[FILE_INFO] +file_000=board.c +file_001=application.c +file_002=..\..\src\device.c +file_003=..\..\src\idle.c +file_004=..\..\src\ipc.c +file_005=..\..\src\irq.c +file_006=..\..\src\kservice.c +file_007=..\..\src\mem.c +file_008=..\..\src\mempool.c +file_009=..\..\src\module.c +file_010=..\..\src\object.c +file_011=..\..\src\rtm.c +file_012=..\..\src\scheduler.c +file_013=..\..\src\slab.c +file_014=..\..\src\thread.c +file_015=..\..\src\timer.c +file_016=..\..\src\clock.c +file_017=startup.c +file_018=..\..\libcpu\mips\pic32\context_gcc.S +file_019=..\..\libcpu\mips\pic32\stack.c +file_020=console.c +file_021=rtconfig.h +[SUITE_INFO] +suite_guid={14495C23-81F8-43F3-8A44-859C583D7760} +suite_state= +[TOOL_SETTINGS] +TS{CB0AF4B8-4022-429D-8F99-8A56782B2C6D}= +TS{9C698E0A-CBC9-4EFF-AE7D-B569F93E7322}=-g -DPIC32_STARTER_KIT +TS{77F59DA1-3C53-4677-AC5F-A03EB0125170}=-Map="$(BINDIR_)$(TARGETBASE).map" -o"$(BINDIR_)$(TARGETBASE).$(TARGETSUFFIX)" +TS{0396C0A1-9052-4E4F-8B84-EF0162B1B4E9}= +[INSTRUMENTED_TRACE] +enable=0 +transport=0 +format=0 +[CUSTOM_BUILD] +Pre-Build= +Pre-BuildEnabled=1 +Post-Build=pic32-size $(BINDIR_)$(TargetName) +Post-BuildEnabled=1 diff --git a/bsp/pic32ethernet/project.mcw b/bsp/pic32ethernet/project.mcw new file mode 100644 index 0000000000000000000000000000000000000000..8a263ddf5d6c8df6a384e9131b7a22079d28ab8f GIT binary patch literal 29696 zcmeHQZEO_B8J;r%jIpV4Fma4c7DB^E;Q#{;kT@~e5WBYV30s8*r@r%g@g2Ue?yWhy zUL{DODXH2N0Y8w62m~o1O)F8!QBaGLR7w@pCMtm_ZCX^dY1#r!leCShw4u1qv$t!X z;f(JNt0~I7)^oEv^Ul{Z@4PeTAMc&{#q{4D{bA|v#Z_{jm>{kUP7#xm@?Cf)EGZNs z2M>I|GB`Mx$P@yPQf?v!{)4e{jk$)mAe{(I26BNVz!YFHFcruL3V>5BNNA7cd`K04xL+0bc+(#$`y| zz*1njomYW$1+WrW1ylle1FHenkuo|1n?(eF2G(MO2qV=+A6QFYX2N2e)@e7_lM~NZ z*D1HZ=9&PdY8nINLD7spJB5bNY-Ad|kkdcYblaevP--yykci?lj4_abCgDTs6J2SI zX|Bj|anCqouo@lXgFf>JHyecghsAagKz~i>F@*O_)}S=k%|2yp`@BcN(Ukls= z+zV6z4*>TA)xbJnJx~MG0viCfL#e}aJ@7@K0cZr8fK9+wAfa{r&o4voL0}uu20R3O z1!xDnfDh;ZRG<^kfbBpR;0FT04xk$d0wEv_M1UyZjP?4X7`>Eh-P~hDdkk7d?bX9OZ)x5|}|>X99qYPdsc9B;zVdX4rjRdu&a;yK{~OEvJo6<}v8JntH; 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+ + /* show version */ + rt_show_version(); + + /* init tick */ + rt_system_tick_init(); + + /* init kernel object */ + rt_system_object_init(); + + /* init timer system */ + rt_system_timer_init(); + +//#ifdef RT_USING_HEAP +// #ifdef __CC_ARM +// rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)FM3_SRAM_END); +// #elif __ICCARM__ +// rt_system_heap_init(__segment_end("HEAP"), (void*)FM3_SRAM_END); +// #else +// /* init memory system */ +// rt_system_heap_init((void*)&__bss_end, (void*)FM3_SRAM_END); +// #endif +//#endif + + /* init scheduler system */ + rt_system_scheduler_init(); + +//#ifdef RT_USING_DEVICE +// /* register uart0 */ +// rt_hw_serial_register(&uart0_device, "uart0", +// RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, +// &uart0); +// +// /* register uart2, used for RTI debug */ +// rt_hw_serial_register(&uart2_device, "uart2", +// RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, +// &uart2); +// +//#ifdef RT_USING_DFS +//#ifdef RT_USING_DFS_UFFS +// rt_hw_nand_init(); +//#endif +//#endif +// +// /*init all registed devices */ +// rt_device_init_all(); +//#endif + + /* init application */ + rt_application_init(); + +//#ifdef RT_USING_FINSH +// /* init finsh */ +// finsh_system_init(); +//#ifdef RT_USING_DEVICE +// finsh_set_device("uart2"); +//#endif +//#endif + + /* init timer thread */ + rt_system_timer_thread_init(); + + /* init idle thread */ + rt_thread_idle_init(); + + /* start scheduler */ + rt_system_scheduler_start(); + + /* never reach here */ + return ; +} + +int main(void) +{ +// /* disable interrupt first */ +// rt_hw_interrupt_disable(); + + /* startup RT-Thread RTOS */ + rtthread_startup(); + + return 0; +} + -- GitLab