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提交 77707e32 编写于 作者: pangweishende's avatar pangweishende
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[BSP]update the serial driver. 

Signed-off-by: pangweishende's avatarpangwei <271372443@qq.com>
上级 0ac07f9f
隐藏空白更改
内联 并排
Showing with 522 addition and 1047 deletion
bsp/stm32f107/drivers/SConscript
浏览文件 @ 77707e32
...@@ -3,15 +3,22 @@ Import('rtconfig') ...@@ -3,15 +3,22 @@ Import('rtconfig')
from building import * from building import *
cwd = os.path.join(str(Dir('#')), 'drivers') cwd = os.path.join(str(Dir('#')), 'drivers')
src = Glob('*.c')
# remove no need file. # add the general drivers.
if GetDepend('RT_USING_LWIP') == False: src = Split("""
SrcRemove(src, 'stm32_eth.c') board.c
stm32f10x_it.c
usart.c
platform.c
""")
if GetDepend('RT_USING_SPI') == False: # add Ethernet drivers.
SrcRemove(src, 'rt_stm32f10x_spi.c') if GetDepend('RT_USING_LWIP'):
SrcRemove(src, 'msd.c') src += ['stm32_eth.c']
if GetDepend('RT_USING_SPI'):
src += ['rt_stm32f10x_spi.c']
src += ['msd.c']
CPPPATH = [cwd] CPPPATH = [cwd]
......
bsp/stm32f107/drivers/board.c
浏览文件 @ 77707e32
...@@ -15,6 +15,7 @@ ...@@ -15,6 +15,7 @@
#include <rthw.h> #include <rthw.h>
#include <rtthread.h> #include <rtthread.h>
#include "board.h" #include "board.h"
#include "usart.h"
/** /**
* @addtogroup STM32 * @addtogroup STM32
......
bsp/stm32f107/drivers/serial.c 已删除 100644 → 0
浏览文件 @ 0ac07f9f
/*
* File : serial.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-02-05 Bernard first version
* 2009-10-25 Bernard fix rt_serial_read bug when there is no data
* in the buffer.
* 2010-03-29 Bernard cleanup code.
*/
#include "serial.h"
#include <stm32f10x_dma.h>
#include <stm32f10x_usart.h>
static void rt_serial_enable_dma(DMA_Channel_TypeDef* dma_channel,
rt_uint32_t address, rt_uint32_t size);
/**
* @addtogroup STM32
*/
/*@{*/
/* RT-Thread Device Interface */
static rt_err_t rt_serial_init (rt_device_t dev)
{
struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->user_data;
if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
{
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{
rt_memset(uart->int_rx->rx_buffer, 0,
sizeof(uart->int_rx->rx_buffer));
uart->int_rx->read_index = 0;
uart->int_rx->save_index = 0;
}
if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
{
RT_ASSERT(uart->dma_tx->dma_channel != RT_NULL);
uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL;
/* init data node memory pool */
rt_mp_init(&(uart->dma_tx->data_node_mp), "dn",
uart->dma_tx->data_node_mem_pool,
sizeof(uart->dma_tx->data_node_mem_pool),
sizeof(struct stm32_serial_data_node));
}
/* Enable USART */
USART_Cmd(uart->uart_device, ENABLE);
dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
}
return RT_EOK;
}
static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
{
return RT_EOK;
}
static rt_err_t rt_serial_close(rt_device_t dev)
{
return RT_EOK;
}
static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
rt_uint8_t* ptr;
rt_err_t err_code;
struct stm32_serial_device* uart;
ptr = buffer;
err_code = RT_EOK;
uart = (struct stm32_serial_device*)dev->user_data;
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{
/* interrupt mode Rx */
while (size)
{
rt_base_t level;
/* disable interrupt */
level = rt_hw_interrupt_disable();
if (uart->int_rx->read_index != uart->int_rx->save_index)
{
/* read a character */
*ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
size--;
/* move to next position */
uart->int_rx->read_index ++;
if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
uart->int_rx->read_index = 0;
}
else
{
/* set error code */
err_code = -RT_EEMPTY;
/* enable interrupt */
rt_hw_interrupt_enable(level);
break;
}
/* enable interrupt */
rt_hw_interrupt_enable(level);
}
}
else
{
/* polling mode */
while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
{
while (uart->uart_device->SR & USART_FLAG_RXNE)
{
*ptr = uart->uart_device->DR & 0xff;
ptr ++;
}
}
}
/* set error code */
rt_set_errno(err_code);
return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
}
static void rt_serial_enable_dma(DMA_Channel_TypeDef* dma_channel,
rt_uint32_t address, rt_uint32_t size)
{
RT_ASSERT(dma_channel != RT_NULL);
/* disable DMA */
DMA_Cmd(dma_channel, DISABLE);
/* set buffer address */
dma_channel->CMAR = address;
/* set size */
dma_channel->CNDTR = size;
/* enable DMA */
DMA_Cmd(dma_channel, ENABLE);
}
static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
rt_uint8_t* ptr;
rt_err_t err_code;
struct stm32_serial_device* uart;
err_code = RT_EOK;
ptr = (rt_uint8_t*)buffer;
uart = (struct stm32_serial_device*)dev->user_data;
if (dev->flag & RT_DEVICE_FLAG_INT_TX)
{
/* interrupt mode Tx, does not support */
RT_ASSERT(0);
}
else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
{
/* DMA mode Tx */
/* allocate a data node */
struct stm32_serial_data_node* data_node = (struct stm32_serial_data_node*)
rt_mp_alloc (&(uart->dma_tx->data_node_mp), RT_WAITING_FOREVER);
if (data_node == RT_NULL)
{
/* set error code */
err_code = -RT_ENOMEM;
}
else
{
rt_uint32_t level;
/* fill data node */
data_node->data_ptr = ptr;
data_node->data_size = size;
/* insert to data link */
data_node->next = RT_NULL;
/* disable interrupt */
level = rt_hw_interrupt_disable();
data_node->prev = uart->dma_tx->list_tail;
if (uart->dma_tx->list_tail != RT_NULL)
uart->dma_tx->list_tail->next = data_node;
uart->dma_tx->list_tail = data_node;
if (uart->dma_tx->list_head == RT_NULL)
{
/* start DMA to transmit data */
uart->dma_tx->list_head = data_node;
/* Enable DMA Channel */
rt_serial_enable_dma(uart->dma_tx->dma_channel,
(rt_uint32_t)uart->dma_tx->list_head->data_ptr,
uart->dma_tx->list_head->data_size);
}
/* enable interrupt */
rt_hw_interrupt_enable(level);
}
}
else
{
/* polling mode */
if (dev->flag & RT_DEVICE_FLAG_STREAM)
{
/* stream mode */
while (size)
{
if (*ptr == '\n')
{
while (!(uart->uart_device->SR & USART_FLAG_TXE));
uart->uart_device->DR = '\r';
}
while (!(uart->uart_device->SR & USART_FLAG_TXE));
uart->uart_device->DR = (*ptr & 0x1FF);
++ptr; --size;
}
}
else
{
/* write data directly */
while (size)
{
while (!(uart->uart_device->SR & USART_FLAG_TXE));
uart->uart_device->DR = (*ptr & 0x1FF);
++ptr; --size;
}
}
}
/* set error code */
rt_set_errno(err_code);
return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
}
static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args)
{
struct stm32_serial_device* uart;
RT_ASSERT(dev != RT_NULL);
uart = (struct stm32_serial_device*)dev->user_data;
switch (cmd)
{
case RT_DEVICE_CTRL_SUSPEND:
/* suspend device */
dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
USART_Cmd(uart->uart_device, DISABLE);
break;
case RT_DEVICE_CTRL_RESUME:
/* resume device */
dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
USART_Cmd(uart->uart_device, ENABLE);
break;
}
return RT_EOK;
}
/*
* serial register for STM32
* support STM32F103VB and STM32F103ZE
*/
rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial)
{
RT_ASSERT(device != RT_NULL);
if ((flag & RT_DEVICE_FLAG_DMA_RX) ||
(flag & RT_DEVICE_FLAG_INT_TX))
{
RT_ASSERT(0);
}
device->type = RT_Device_Class_Char;
device->rx_indicate = RT_NULL;
device->tx_complete = RT_NULL;
device->init = rt_serial_init;
device->open = rt_serial_open;
device->close = rt_serial_close;
device->read = rt_serial_read;
device->write = rt_serial_write;
device->control = rt_serial_control;
device->user_data = serial;
/* register a character device */
return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
}
/* ISR for serial interrupt */
void rt_hw_serial_isr(rt_device_t device)
{
struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data;
if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
{
/* interrupt mode receive */
RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
/* save on rx buffer */
while (uart->uart_device->SR & USART_FLAG_RXNE)
{
rt_base_t level;
/* disable interrupt */
level = rt_hw_interrupt_disable();
/* save character */
uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->DR & 0xff;
uart->int_rx->save_index ++;
if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
uart->int_rx->save_index = 0;
/* if the next position is read index, discard this 'read char' */
if (uart->int_rx->save_index == uart->int_rx->read_index)
{
uart->int_rx->read_index ++;
if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
uart->int_rx->read_index = 0;
}
/* enable interrupt */
rt_hw_interrupt_enable(level);
}
/* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
/* invoke callback */
if (device->rx_indicate != RT_NULL)
{
rt_size_t rx_length;
/* get rx length */
rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
uart->int_rx->save_index - uart->int_rx->read_index;
device->rx_indicate(device, rx_length);
}
}
if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
{
/* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
}
}
/*
* ISR for DMA mode Tx
*/
void rt_hw_serial_dma_tx_isr(rt_device_t device)
{
rt_uint32_t level;
struct stm32_serial_data_node* data_node;
struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data;
/* DMA mode receive */
RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX);
/* get the first data node */
data_node = uart->dma_tx->list_head;
RT_ASSERT(data_node != RT_NULL);
/* invoke call to notify tx complete */
if (device->tx_complete != RT_NULL)
device->tx_complete(device, data_node->data_ptr);
/* disable interrupt */
level = rt_hw_interrupt_disable();
/* remove list head */
uart->dma_tx->list_head = data_node->next;
if (uart->dma_tx->list_head == RT_NULL) /* data link empty */
uart->dma_tx->list_tail = RT_NULL;
/* enable interrupt */
rt_hw_interrupt_enable(level);
/* release data node memory */
rt_mp_free(data_node);
if (uart->dma_tx->list_head != RT_NULL)
{
/* transmit next data node */
rt_serial_enable_dma(uart->dma_tx->dma_channel,
(rt_uint32_t)uart->dma_tx->list_head->data_ptr,
uart->dma_tx->list_head->data_size);
}
else
{
/* no data to be transmitted, disable DMA */
DMA_Cmd(uart->dma_tx->dma_channel, DISABLE);
}
}
/*@}*/
bsp/stm32f107/drivers/serial.h 已删除 100644 → 0
浏览文件 @ 0ac07f9f
/*
* File : serial.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009 - 2010, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard first version
* 2010-03-29 Bernard remove interrupt tx and DMA rx mode.
*/
#ifndef __RT_HW_SERIAL_H__
#define __RT_HW_SERIAL_H__
#include <rthw.h>
#include <rtthread.h>
/* STM32F10x library definitions */
#include <stm32f10x.h>
#define UART_RX_BUFFER_SIZE 128
#define UART_TX_DMA_NODE_SIZE 4
/* data node for Tx Mode */
struct stm32_serial_data_node
{
rt_uint8_t *data_ptr;
rt_size_t data_size;
struct stm32_serial_data_node *next, *prev;
};
struct stm32_serial_dma_tx
{
/* DMA Channel */
DMA_Channel_TypeDef* dma_channel;
/* data list head and tail */
struct stm32_serial_data_node *list_head, *list_tail;
/* data node memory pool */
struct rt_mempool data_node_mp;
rt_uint8_t data_node_mem_pool[UART_TX_DMA_NODE_SIZE *
(sizeof(struct stm32_serial_data_node) + sizeof(void*))];
};
struct stm32_serial_int_rx
{
rt_uint8_t rx_buffer[UART_RX_BUFFER_SIZE];
rt_uint32_t read_index, save_index;
};
struct stm32_serial_device
{
USART_TypeDef* uart_device;
/* rx structure */
struct stm32_serial_int_rx* int_rx;
/* tx structure */
struct stm32_serial_dma_tx* dma_tx;
};
rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial);
void rt_hw_serial_isr(rt_device_t device);
void rt_hw_serial_dma_tx_isr(rt_device_t device);
#endif
bsp/stm32f107/drivers/stm32f10x_it.c
浏览文件 @ 77707e32
...@@ -107,85 +107,4 @@ void DebugMon_Handler(void) ...@@ -107,85 +107,4 @@ void DebugMon_Handler(void)
{ {
} }
/******************************************************************************/
/* STM32F10x Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f10x_xx.s). */
/******************************************************************************/
/*******************************************************************************
* Function Name : USART1_IRQHandler
* Description : This function handles USART1 global interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void USART1_IRQHandler(void)
{
#ifdef RT_USING_UART1
extern struct rt_device uart1_device;
extern void rt_hw_serial_isr(struct rt_device *device);
/* enter interrupt */
rt_interrupt_enter();
rt_hw_serial_isr(&uart1_device);
/* leave interrupt */
rt_interrupt_leave();
#endif
}
/*******************************************************************************
* Function Name : USART2_IRQHandler
* Description : This function handles USART2 global interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void USART2_IRQHandler(void)
{
#ifdef RT_USING_UART2
extern struct rt_device uart2_device;
extern void rt_hw_serial_isr(struct rt_device *device);
/* enter interrupt */
rt_interrupt_enter();
rt_hw_serial_isr(&uart2_device);
/* leave interrupt */
rt_interrupt_leave();
#endif
}
/*******************************************************************************
* Function Name : USART3_IRQHandler
* Description : This function handles USART3 global interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void USART3_IRQHandler(void)
{
#ifdef RT_USING_UART3
extern struct rt_device uart3_device;
extern void rt_hw_serial_isr(struct rt_device *device);
/* enter interrupt */
rt_interrupt_enter();
rt_hw_serial_isr(&uart3_device);
/* leave interrupt */
rt_interrupt_leave();
#endif
}
/**
* @}
*/
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ /******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
bsp/stm32f107/drivers/usart.c
浏览文件 @ 77707e32
/* /*
* File : usart.c * File : usart.c
* This file is part of RT-Thread RTOS * This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team * COPYRIGHT (C) 2006-2013, RT-Thread Development Team
* *
* The license and distribution terms for this file may be * The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at * found in the file LICENSE in this distribution or at
...@@ -11,109 +11,234 @@ ...@@ -11,109 +11,234 @@
* Date Author Notes * Date Author Notes
* 2009-01-05 Bernard the first version * 2009-01-05 Bernard the first version
* 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
* 2013-05-13 aozima update for kehong-lingtai.
* 2015-01-31 armink make sure the serial transmit complete in putc()
*/ */
#include <board.h> #include "stm32f10x.h"
#include "usart.h" #include "usart.h"
#include <serial.h> #include "board.h"
#include <stm32f10x_dma.h> #include <rtdevice.h>
/* /* USART1 */
* Use UART1 as console output and finsh input #define UART1_GPIO_TX GPIO_Pin_9
* interrupt Rx and poll Tx (stream mode) #define UART1_GPIO_RX GPIO_Pin_10
* #define UART1_GPIO GPIOA
* Use UART2 with interrupt Rx and poll Tx
* Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2
*
* USART DMA setting on STM32
* USART1 Tx --> DMA Channel 4
* USART1 Rx --> DMA Channel 5
* USART2 Tx --> DMA Channel 7
* USART2 Rx --> DMA Channel 6
* USART3 Tx --> DMA Channel 2
* USART3 Rx --> DMA Channel 3
*/
#ifdef RT_USING_UART1 /* USART2 */
struct stm32_serial_int_rx uart1_int_rx; #if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL)
struct stm32_serial_device uart1 = #define UART2_GPIO_TX GPIO_Pin_5
{ #define UART2_GPIO_RX GPIO_Pin_6
USART1, #define UART2_GPIO GPIOD
&uart1_int_rx,
RT_NULL #else /* for STM32F10X_HD */
}; /* USART2_REMAP = 0 */
struct rt_device uart1_device; #define UART2_GPIO_TX GPIO_Pin_2
#define UART2_GPIO_RX GPIO_Pin_3
#define UART2_GPIO GPIOA
#endif #endif
#ifdef RT_USING_UART2 /* STM32 uart driver */
struct stm32_serial_int_rx uart2_int_rx; struct stm32_uart
struct stm32_serial_device uart2 =
{ {
USART2, USART_TypeDef* uart_device;
&uart2_int_rx, IRQn_Type irq;
RT_NULL
}; };
struct rt_device uart2_device;
#endif
#ifdef RT_USING_UART3 static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
struct stm32_serial_int_rx uart3_int_rx; {
struct stm32_serial_dma_tx uart3_dma_tx; struct stm32_uart* uart;
struct stm32_serial_device uart3 = USART_InitTypeDef USART_InitStructure;
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
uart = (struct stm32_uart *)serial->parent.user_data;
USART_InitStructure.USART_BaudRate = cfg->baud_rate;
if (cfg->data_bits == DATA_BITS_8){
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
} else if (cfg->data_bits == DATA_BITS_9) {
USART_InitStructure.USART_WordLength = USART_WordLength_9b;
}
if (cfg->stop_bits == STOP_BITS_1){
USART_InitStructure.USART_StopBits = USART_StopBits_1;
} else if (cfg->stop_bits == STOP_BITS_2){
USART_InitStructure.USART_StopBits = USART_StopBits_2;
}
if (cfg->parity == PARITY_NONE){
USART_InitStructure.USART_Parity = USART_Parity_No;
} else if (cfg->parity == PARITY_ODD) {
USART_InitStructure.USART_Parity = USART_Parity_Odd;
} else if (cfg->parity == PARITY_EVEN) {
USART_InitStructure.USART_Parity = USART_Parity_Even;
}
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(uart->uart_device, &USART_InitStructure);
/* Enable USART */
USART_Cmd(uart->uart_device, ENABLE);
return RT_EOK;
}
static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
{ {
USART3, struct stm32_uart* uart;
&uart3_int_rx,
&uart3_dma_tx RT_ASSERT(serial != RT_NULL);
uart = (struct stm32_uart *)serial->parent.user_data;
switch (cmd)
{
/* disable interrupt */
case RT_DEVICE_CTRL_CLR_INT:
/* disable rx irq */
UART_DISABLE_IRQ(uart->irq);
/* disable interrupt */
USART_ITConfig(uart->uart_device, USART_IT_RXNE, DISABLE);
break;
/* enable interrupt */
case RT_DEVICE_CTRL_SET_INT:
/* enable rx irq */
UART_ENABLE_IRQ(uart->irq);
/* enable interrupt */
USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE);
break;
}
return RT_EOK;
}
static int stm32_putc(struct rt_serial_device *serial, char c)
{
struct stm32_uart* uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct stm32_uart *)serial->parent.user_data;
uart->uart_device->DR = c;
while (!(uart->uart_device->SR & USART_FLAG_TC));
return 1;
}
static int stm32_getc(struct rt_serial_device *serial)
{
int ch;
struct stm32_uart* uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct stm32_uart *)serial->parent.user_data;
ch = -1;
if (uart->uart_device->SR & USART_FLAG_RXNE)
{
ch = uart->uart_device->DR & 0xff;
}
return ch;
}
static const struct rt_uart_ops stm32_uart_ops =
{
stm32_configure,
stm32_control,
stm32_putc,
stm32_getc,
}; };
struct rt_device uart3_device;
#endif
#define USART1_DR_Base 0x40013804 #if defined(RT_USING_UART1)
#define USART2_DR_Base 0x40004404 /* UART1 device driver structure */
#define USART3_DR_Base 0x40004804 struct stm32_uart uart1 =
{
USART1,
USART1_IRQn,
};
struct rt_serial_device serial1;
/* USART1_REMAP = 0 */ void USART1_IRQHandler(void)
#define UART1_GPIO_TX GPIO_Pin_9 {
#define UART1_GPIO_RX GPIO_Pin_10 struct stm32_uart* uart;
#define UART1_GPIO GPIOA
#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1 uart = &uart1;
#define UART1_TX_DMA DMA1_Channel4
#define UART1_RX_DMA DMA1_Channel5 /* enter interrupt */
rt_interrupt_enter();
if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
{
rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND);
/* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
}
if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
{
/* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
}
if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
{
stm32_getc(&serial1);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* RT_USING_UART1 */
#if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL) #if defined(RT_USING_UART2)
#define UART2_GPIO_TX GPIO_Pin_5 /* UART1 device driver structure */
#define UART2_GPIO_RX GPIO_Pin_6 struct stm32_uart uart2 =
#define UART2_GPIO GPIOD {
#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 USART2,
#else /* for STM32F10X_HD */ USART2_IRQn,
/* USART2_REMAP = 0 */ };
#define UART2_GPIO_TX GPIO_Pin_2 struct rt_serial_device serial2;
#define UART2_GPIO_RX GPIO_Pin_3
#define UART2_GPIO GPIOA
#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
#define UART2_TX_DMA DMA1_Channel7
#define UART2_RX_DMA DMA1_Channel6
#endif
/* USART3_REMAP[1:0] = 00 */ void USART2_IRQHandler(void)
#define UART3_GPIO_RX GPIO_Pin_11 {
#define UART3_GPIO_TX GPIO_Pin_10 struct stm32_uart* uart;
#define UART3_GPIO GPIOB
#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3 uart = &uart2;
#define UART3_TX_DMA DMA1_Channel2
#define UART3_RX_DMA DMA1_Channel3 /* enter interrupt */
rt_interrupt_enter();
if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
{
rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND);
/* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
}
if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
{
/* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
}
if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
{
stm32_getc(&serial2);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* RT_USING_UART2 */
static void RCC_Configuration(void) static void RCC_Configuration(void)
{ {
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
#ifdef RT_USING_UART1 #if defined(RT_USING_UART1)
/* Enable USART1 and GPIOA clocks */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
#endif #endif /* RT_USING_UART1 */
#ifdef RT_USING_UART2
#if defined(RT_USING_UART2)
#if (defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL)) #if (defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL))
/* Enable AFIO and GPIOD clock */ /* Enable AFIO and GPIOD clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOD, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOD, ENABLE);
...@@ -125,218 +250,86 @@ static void RCC_Configuration(void) ...@@ -125,218 +250,86 @@ static void RCC_Configuration(void)
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOA, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOA, ENABLE);
#endif #endif
/* Enable USART2 clock */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); #endif /* RT_USING_UART2 */
#endif
#ifdef RT_USING_UART3
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
/* Enable USART3 clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
/* DMA clock enable */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
#endif
} }
static void GPIO_Configuration(void) static void GPIO_Configuration(void)
{ {
GPIO_InitTypeDef GPIO_InitStructure; GPIO_InitTypeDef GPIO_InitStructure;
#ifdef RT_USING_UART1 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
/* Configure USART1 Rx (PA.10) as input floating */
GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
/* Configure USART1 Tx (PA.09) as alternate function push-pull */ #if defined(RT_USING_UART1)
GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX; /* Configure USART1 Rx (PA.10) as input floating */
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
GPIO_Init(UART1_GPIO, &GPIO_InitStructure); GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
#endif
#ifdef RT_USING_UART2 /* Configure USART1 Tx (PA.09) as alternate function push-pull */
/* Configure USART2 Rx as input floating */ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX; GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
GPIO_Init(UART2_GPIO, &GPIO_InitStructure); #endif /* RT_USING_UART1 */
/* Configure USART2 Tx as alternate function push-pull */ #if defined(RT_USING_UART2)
GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
#endif GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX;
GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
#endif /* RT_USING_UART2 */
}
#ifdef RT_USING_UART3 static void NVIC_Configuration(struct stm32_uart* uart)
/* Configure USART3 Rx as input floating */ {
GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX; NVIC_InitTypeDef NVIC_InitStructure;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(UART3_GPIO, &GPIO_InitStructure); /* Enable the USART1 Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = uart->irq;
/* Configure USART3 Tx as alternate function push-pull */ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; NVIC_Init(&NVIC_InitStructure);
GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
#endif
} }
static void NVIC_Configuration(void) void rt_hw_usart_init(void)
{ {
NVIC_InitTypeDef NVIC_InitStructure; struct stm32_uart* uart;
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
#ifdef RT_USING_UART1
/* Enable the USART1 Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
#endif
#ifdef RT_USING_UART2 RCC_Configuration();
/* Enable the USART2 Interrupt */ GPIO_Configuration();
NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
#endif
#ifdef RT_USING_UART3 #if defined(RT_USING_UART1)
/* Enable the USART3 Interrupt */ uart = &uart1;
NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn; config.baud_rate = BAUD_RATE_115200;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* Enable the DMA1 Channel2 Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
#endif
}
static void DMA_Configuration(void) serial1.ops = &stm32_uart_ops;
{ serial1.config = config;
#if defined (RT_USING_UART3)
DMA_InitTypeDef DMA_InitStructure;
/* fill init structure */
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
/* DMA1 Channel5 (triggered by USART3 Tx event) Config */
DMA_DeInit(UART3_TX_DMA);
DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0;
DMA_InitStructure.DMA_BufferSize = 0;
DMA_Init(UART3_TX_DMA, &DMA_InitStructure);
DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE);
DMA_ClearFlag(DMA1_FLAG_TC5);
#endif
}
/* NVIC_Configuration(&uart1);
* Init all related hardware in here
* rt_hw_serial_init() will register all supported USART device
*/
void rt_hw_usart_init()
{
USART_InitTypeDef USART_InitStructure;
USART_ClockInitTypeDef USART_ClockInitStructure;
RCC_Configuration();
GPIO_Configuration();
NVIC_Configuration();
DMA_Configuration();
/* uart init */
#ifdef RT_USING_UART1
USART_InitStructure.USART_BaudRate = 115200;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
USART_Init(USART1, &USART_InitStructure);
USART_ClockInit(USART1, &USART_ClockInitStructure);
/* register uart1 */
rt_hw_serial_register(&uart1_device, "uart1",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
&uart1);
/* enable interrupt */
USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
#endif
#ifdef RT_USING_UART2 /* register UART1 device */
USART_InitStructure.USART_BaudRate = 115200; rt_hw_serial_register(&serial1, "uart1",
USART_InitStructure.USART_WordLength = USART_WordLength_8b; RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX ,
USART_InitStructure.USART_StopBits = USART_StopBits_1; uart);
USART_InitStructure.USART_Parity = USART_Parity_No; #endif /* RT_USING_UART1 */
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
USART_Init(USART2, &USART_InitStructure);
USART_ClockInit(USART2, &USART_ClockInitStructure);
/* register uart2 */
rt_hw_serial_register(&uart2_device, "uart2",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
&uart2);
/* Enable USART2 DMA Rx request */
USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
#endif
#ifdef RT_USING_UART3 #if defined(RT_USING_UART2)
USART_InitStructure.USART_BaudRate = 115200; uart = &uart2;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1; config.baud_rate = BAUD_RATE_115200;
USART_InitStructure.USART_Parity = USART_Parity_No; serial2.ops = &stm32_uart_ops;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; serial2.config = config;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_ClockInitStructure.USART_Clock = USART_Clock_Disable; NVIC_Configuration(&uart2);
USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge; /* register UART1 device */
USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable; rt_hw_serial_register(&serial2, "uart2",
USART_Init(USART3, &USART_InitStructure); RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
USART_ClockInit(USART3, &USART_ClockInitStructure); uart);
#endif /* RT_USING_UART2 */
uart3_dma_tx.dma_channel= UART3_TX_DMA;
/* register uart3 */
rt_hw_serial_register(&uart3_device, "uart3",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX,
&uart3);
/* Enable USART3 DMA Tx request */
USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE);
/* enable interrupt */
USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
#endif
} }
bsp/stm32f107/drivers/usart.h
浏览文件 @ 77707e32
...@@ -18,6 +18,9 @@ ...@@ -18,6 +18,9 @@
#include <rthw.h> #include <rthw.h>
#include <rtthread.h> #include <rtthread.h>
#define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n))
#define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n))
void rt_hw_usart_init(void); void rt_hw_usart_init(void);
#endif #endif
bsp/stm32f107/project.uvproj
浏览文件 @ 77707e32
...@@ -343,7 +343,7 @@ ...@@ -343,7 +343,7 @@
<MiscControls /> <MiscControls />
<Define>STM32F10X_CL, USE_STDPERIPH_DRIVER</Define> <Define>STM32F10X_CL, USE_STDPERIPH_DRIVER</Define>
<Undefine /> <Undefine />
<IncludePath>Libraries/STM32F10x_StdPeriph_Driver/inc;Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x;../../components/CMSIS/Include;applications;.;drivers;../../include;../../libcpu/arm/cortex-m3;../../libcpu/arm/common;../../components/drivers/spi;../../components/drivers/include;../../components/finsh;../../components/net/lwip-1.4.1/src;../../components/net/lwip-1.4.1/src/include;../../components/net/lwip-1.4.1/src/include/ipv4;../../components/net/lwip-1.4.1/src/arch/include;../../components/net/lwip-1.4.1/src/include/netif;../../components/dfs/include;../../components/dfs/filesystems/elmfat</IncludePath> <IncludePath>applications;.;drivers;Libraries\STM32F10x_StdPeriph_Driver\inc;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x;..\..\components\CMSIS\Include;..\..\include;..\..\libcpu\arm\cortex-m3;..\..\libcpu\arm\common;..\..\components\dfs\include;..\..\components\dfs\filesystems\elmfat;..\..\components\drivers\include;..\..\components\drivers\spi;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\net\lwip-1.4.1\src;..\..\components\net\lwip-1.4.1\src\include;..\..\components\net\lwip-1.4.1\src\include\ipv4;..\..\components\net\lwip-1.4.1\src\arch\include;..\..\components\net\lwip-1.4.1\src\include\netif</IncludePath>
</VariousControls> </VariousControls>
</Cads> </Cads>
<Aads> <Aads>
...@@ -380,406 +380,486 @@ ...@@ -380,406 +380,486 @@
</TargetArmAds> </TargetArmAds>
</TargetOption> </TargetOption>
<Groups> <Groups>
<Group>
<GroupName>Applications</GroupName>
<Files>
<File>
<FileName>application.c</FileName>
<FileType>1</FileType>
<FilePath>applications\application.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>startup.c</FileName>
<FileType>1</FileType>
<FilePath>applications\startup.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Drivers</GroupName>
<Files>
<File>
<FileName>board.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\board.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32f10x_it.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\stm32f10x_it.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>usart.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\usart.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>platform.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\platform.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stm32_eth.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\stm32_eth.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>rt_stm32f10x_spi.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\rt_stm32f10x_spi.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>msd.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\msd.c</FilePath>
</File>
</Files>
</Group>
<Group> <Group>
<GroupName>STM32_StdPeriph</GroupName> <GroupName>STM32_StdPeriph</GroupName>
<Files> <Files>
<File> <File>
<FileName>system_stm32f10x.c</FileName> <FileName>system_stm32f10x.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c</FilePath> <FilePath>Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_crc.c</FileName> <FileName>stm32f10x_crc.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_crc.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_rcc.c</FileName> <FileName>stm32f10x_rcc.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_wwdg.c</FileName> <FileName>stm32f10x_wwdg.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_wwdg.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_pwr.c</FileName> <FileName>stm32f10x_pwr.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_pwr.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_exti.c</FileName> <FileName>stm32f10x_exti.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_bkp.c</FileName> <FileName>stm32f10x_bkp.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_bkp.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_i2c.c</FileName> <FileName>stm32f10x_i2c.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_adc.c</FileName> <FileName>stm32f10x_adc.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_adc.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_dac.c</FileName> <FileName>stm32f10x_dac.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dac.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_rtc.c</FileName> <FileName>stm32f10x_rtc.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rtc.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_fsmc.c</FileName> <FileName>stm32f10x_fsmc.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_tim.c</FileName> <FileName>stm32f10x_tim.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_tim.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_iwdg.c</FileName> <FileName>stm32f10x_iwdg.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_iwdg.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_spi.c</FileName> <FileName>stm32f10x_spi.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_flash.c</FileName> <FileName>stm32f10x_flash.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_sdio.c</FileName> <FileName>stm32f10x_sdio.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_gpio.c</FileName> <FileName>stm32f10x_gpio.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_usart.c</FileName> <FileName>stm32f10x_usart.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_dbgmcu.c</FileName> <FileName>stm32f10x_dbgmcu.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dbgmcu.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_dma.c</FileName> <FileName>stm32f10x_dma.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_can.c</FileName> <FileName>stm32f10x_can.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_can.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_cec.c</FileName> <FileName>stm32f10x_cec.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_cec.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_cec.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>misc.c</FileName> <FileName>misc.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>Libraries/STM32F10x_StdPeriph_Driver/src/misc.c</FilePath> <FilePath>Libraries\STM32F10x_StdPeriph_Driver\src\misc.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>startup_stm32f10x_cl.s</FileName> <FileName>startup_stm32f10x_cl.s</FileName>
<FileType>2</FileType> <FileType>2</FileType>
<FilePath>Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_cl.s</FilePath> <FilePath>Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_cl.s</FilePath>
</File> </File>
</Files> </Files>
</Group> </Group>
<Group> <Group>
<GroupName>Applications</GroupName> <GroupName>Kernel</GroupName>
<Files> <Files>
<File> <File>
<FileName>application.c</FileName> <FileName>clock.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>applications/application.c</FilePath> <FilePath>..\..\src\clock.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>startup.c</FileName> <FileName>device.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>applications/startup.c</FilePath> <FilePath>..\..\src\device.c</FilePath>
</File> </File>
</Files> </Files>
</Group>
<Group>
<GroupName>Drivers</GroupName>
<Files> <Files>
<File> <File>
<FileName>board.c</FileName> <FileName>idle.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>drivers/board.c</FilePath> <FilePath>..\..\src\idle.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>msd.c</FileName> <FileName>ipc.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>drivers/msd.c</FilePath> <FilePath>..\..\src\ipc.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>platform.c</FileName> <FileName>irq.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>drivers/platform.c</FilePath> <FilePath>..\..\src\irq.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>rt_stm32f10x_spi.c</FileName> <FileName>kservice.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>drivers/rt_stm32f10x_spi.c</FilePath> <FilePath>..\..\src\kservice.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>serial.c</FileName> <FileName>mem.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>drivers/serial.c</FilePath> <FilePath>..\..\src\mem.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32_eth.c</FileName> <FileName>mempool.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>drivers/stm32_eth.c</FilePath> <FilePath>..\..\src\mempool.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stm32f10x_it.c</FileName> <FileName>object.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>drivers/stm32f10x_it.c</FilePath> <FilePath>..\..\src\object.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>usart.c</FileName> <FileName>scheduler.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>drivers/usart.c</FilePath> <FilePath>..\..\src\scheduler.c</FilePath>
</File> </File>
</Files> </Files>
</Group>
<Group>
<GroupName>Kernel</GroupName>
<Files> <Files>
<File> <File>
<FileName>clock.c</FileName> <FileName>thread.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../src/clock.c</FilePath> <FilePath>..\..\src\thread.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>components.c</FileName> <FileName>timer.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../src/components.c</FilePath> <FilePath>..\..\src\timer.c</FilePath>
</File> </File>
</Files> </Files>
</Group>
<Group>
<GroupName>CORTEX-M3</GroupName>
<Files> <Files>
<File> <File>
<FileName>device.c</FileName> <FileName>cpuport.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../src/device.c</FilePath> <FilePath>..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>idle.c</FileName> <FileName>context_rvds.S</FileName>
<FileType>1</FileType> <FileType>2</FileType>
<FilePath>../../src/idle.c</FilePath> <FilePath>..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>ipc.c</FileName> <FileName>backtrace.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../src/ipc.c</FilePath> <FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>irq.c</FileName> <FileName>div0.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../src/irq.c</FilePath> <FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>kservice.c</FileName> <FileName>showmem.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../src/kservice.c</FilePath> <FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
</File> </File>
</Files> </Files>
</Group>
<Group>
<GroupName>Filesystem</GroupName>
<Files> <Files>
<File> <File>
<FileName>mem.c</FileName> <FileName>dfs.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../src/mem.c</FilePath> <FilePath>..\..\components\dfs\src\dfs.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>mempool.c</FileName> <FileName>dfs_file.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../src/mempool.c</FilePath> <FilePath>..\..\components\dfs\src\dfs_file.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>object.c</FileName> <FileName>dfs_fs.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../src/object.c</FilePath> <FilePath>..\..\components\dfs\src\dfs_fs.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>scheduler.c</FileName> <FileName>dfs_posix.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../src/scheduler.c</FilePath> <FilePath>..\..\components\dfs\src\dfs_posix.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>thread.c</FileName> <FileName>dfs_elm.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../src/thread.c</FilePath> <FilePath>..\..\components\dfs\filesystems\elmfat\dfs_elm.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>timer.c</FileName> <FileName>ff.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../src/timer.c</FilePath> <FilePath>..\..\components\dfs\filesystems\elmfat\ff.c</FilePath>
</File> </File>
</Files> </Files>
</Group> </Group>
<Group> <Group>
<GroupName>CORTEX-M3</GroupName> <GroupName>DeviceDrivers</GroupName>
<Files> <Files>
<File> <File>
<FileName>cpuport.c</FileName> <FileName>serial.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../libcpu/arm/cortex-m3/cpuport.c</FilePath> <FilePath>..\..\components\drivers\serial\serial.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>context_rvds.S</FileName> <FileName>spi_core.c</FileName>
<FileType>2</FileType> <FileType>1</FileType>
<FilePath>../../libcpu/arm/cortex-m3/context_rvds.S</FilePath> <FilePath>..\..\components\drivers\spi\spi_core.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>backtrace.c</FileName> <FileName>spi_dev.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../libcpu/arm/common/backtrace.c</FilePath> <FilePath>..\..\components\drivers\spi\spi_dev.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>div0.c</FileName> <FileName>completion.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../libcpu/arm/common/div0.c</FilePath> <FilePath>..\..\components\drivers\src\completion.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>showmem.c</FileName> <FileName>dataqueue.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../libcpu/arm/common/showmem.c</FilePath> <FilePath>..\..\components\drivers\src\dataqueue.c</FilePath>
</File> </File>
</Files> </Files>
</Group>
<Group>
<GroupName>DeviceDrivers</GroupName>
<Files> <Files>
<File> <File>
<FileName>spi_core.c</FileName> <FileName>pipe.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/drivers/spi/spi_core.c</FilePath> <FilePath>..\..\components\drivers\src\pipe.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>spi_dev.c</FileName> <FileName>portal.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/drivers/spi/spi_dev.c</FilePath> <FilePath>..\..\components\drivers\src\portal.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ringbuffer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>workqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\drivers\src\workqueue.c</FilePath>
</File> </File>
</Files> </Files>
</Group> </Group>
...@@ -789,91 +869,91 @@ ...@@ -789,91 +869,91 @@
<File> <File>
<FileName>shell.c</FileName> <FileName>shell.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/finsh/shell.c</FilePath> <FilePath>..\..\components\finsh\shell.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>symbol.c</FileName> <FileName>symbol.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/finsh/symbol.c</FilePath> <FilePath>..\..\components\finsh\symbol.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>cmd.c</FileName> <FileName>cmd.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/finsh/cmd.c</FilePath> <FilePath>..\..\components\finsh\cmd.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>finsh_compiler.c</FileName> <FileName>finsh_compiler.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/finsh/finsh_compiler.c</FilePath> <FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>finsh_error.c</FileName> <FileName>finsh_error.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/finsh/finsh_error.c</FilePath> <FilePath>..\..\components\finsh\finsh_error.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>finsh_heap.c</FileName> <FileName>finsh_heap.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/finsh/finsh_heap.c</FilePath> <FilePath>..\..\components\finsh\finsh_heap.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>finsh_init.c</FileName> <FileName>finsh_init.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/finsh/finsh_init.c</FilePath> <FilePath>..\..\components\finsh\finsh_init.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>finsh_node.c</FileName> <FileName>finsh_node.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/finsh/finsh_node.c</FilePath> <FilePath>..\..\components\finsh\finsh_node.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>finsh_ops.c</FileName> <FileName>finsh_ops.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/finsh/finsh_ops.c</FilePath> <FilePath>..\..\components\finsh\finsh_ops.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>finsh_parser.c</FileName> <FileName>finsh_parser.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/finsh/finsh_parser.c</FilePath> <FilePath>..\..\components\finsh\finsh_parser.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>finsh_var.c</FileName> <FileName>finsh_var.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/finsh/finsh_var.c</FilePath> <FilePath>..\..\components\finsh\finsh_var.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>finsh_vm.c</FileName> <FileName>finsh_vm.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/finsh/finsh_vm.c</FilePath> <FilePath>..\..\components\finsh\finsh_vm.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>finsh_token.c</FileName> <FileName>finsh_token.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/finsh/finsh_token.c</FilePath> <FilePath>..\..\components\finsh\finsh_token.c</FilePath>
</File> </File>
</Files> </Files>
</Group> </Group>
...@@ -883,290 +963,245 @@ ...@@ -883,290 +963,245 @@
<File> <File>
<FileName>api_lib.c</FileName> <FileName>api_lib.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/api/api_lib.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\api\api_lib.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>api_msg.c</FileName> <FileName>api_msg.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/api/api_msg.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\api\api_msg.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>err.c</FileName> <FileName>err.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/api/err.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\api\err.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>netbuf.c</FileName> <FileName>netbuf.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/api/netbuf.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\api\netbuf.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>netdb.c</FileName> <FileName>netdb.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/api/netdb.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\api\netdb.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>netifapi.c</FileName> <FileName>netifapi.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/api/netifapi.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\api\netifapi.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>sockets.c</FileName> <FileName>sockets.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/api/sockets.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\api\sockets.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>tcpip.c</FileName> <FileName>tcpip.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/api/tcpip.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\api\tcpip.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>sys_arch.c</FileName> <FileName>sys_arch.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/arch/sys_arch.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\arch\sys_arch.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>def.c</FileName> <FileName>def.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/def.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\def.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>dhcp.c</FileName> <FileName>dhcp.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/dhcp.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\dhcp.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>dns.c</FileName> <FileName>dns.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/dns.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\dns.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>init.c</FileName> <FileName>init.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/init.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\init.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>memp.c</FileName> <FileName>memp.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/memp.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\memp.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>netif.c</FileName> <FileName>netif.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/netif.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\netif.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>pbuf.c</FileName> <FileName>pbuf.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/pbuf.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\pbuf.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>raw.c</FileName> <FileName>raw.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/raw.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\raw.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>stats.c</FileName> <FileName>stats.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/stats.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\stats.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>sys.c</FileName> <FileName>sys.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/sys.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\sys.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>tcp.c</FileName> <FileName>tcp.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/tcp.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\tcp.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>tcp_in.c</FileName> <FileName>tcp_in.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/tcp_in.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\tcp_in.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>tcp_out.c</FileName> <FileName>tcp_out.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/tcp_out.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\tcp_out.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>timers.c</FileName> <FileName>timers.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/timers.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\timers.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>udp.c</FileName> <FileName>udp.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/udp.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\udp.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>autoip.c</FileName> <FileName>autoip.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/autoip.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\ipv4\autoip.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>icmp.c</FileName> <FileName>icmp.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/icmp.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\ipv4\icmp.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>igmp.c</FileName> <FileName>igmp.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/igmp.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\ipv4\igmp.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>inet.c</FileName> <FileName>inet.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/inet.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\ipv4\inet.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>inet_chksum.c</FileName> <FileName>inet_chksum.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/inet_chksum.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\ipv4\inet_chksum.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>ip.c</FileName> <FileName>ip.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/ip.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\ipv4\ip.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>ip_addr.c</FileName> <FileName>ip_addr.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/ip_addr.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\ipv4\ip_addr.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>ip_frag.c</FileName> <FileName>ip_frag.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/ip_frag.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\core\ipv4\ip_frag.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>etharp.c</FileName> <FileName>etharp.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/netif/etharp.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\netif\etharp.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>ethernetif.c</FileName> <FileName>ethernetif.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/netif/ethernetif.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\netif\ethernetif.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>slipif.c</FileName> <FileName>slipif.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/netif/slipif.c</FilePath> <FilePath>..\..\components\net\lwip-1.4.1\src\netif\slipif.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Filesystem</GroupName>
<Files>
<File>
<FileName>dfs.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/dfs/src/dfs.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dfs_file.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/dfs/src/dfs_file.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dfs_fs.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/dfs/src/dfs_fs.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dfs_posix.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/dfs/src/dfs_posix.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dfs_elm.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/dfs/filesystems/elmfat/dfs_elm.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ff.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/dfs/filesystems/elmfat/ff.c</FilePath>
</File> </File>
</Files> </Files>
</Group> </Group>
......
bsp/stm32f107/rtconfig.h
浏览文件 @ 77707e32
...@@ -58,6 +58,11 @@ ...@@ -58,6 +58,11 @@
/* SECTION: Device System */ /* SECTION: Device System */
/* Using Device System */ /* Using Device System */
#define RT_USING_DEVICE #define RT_USING_DEVICE
// <bool name="RT_USING_DEVICE_IPC" description="Using device communication" default="true" />
#define RT_USING_DEVICE_IPC
// <bool name="RT_USING_SERIAL" description="Using Serial" default="true" />
#define RT_USING_SERIAL
#define RT_USING_SPI #define RT_USING_SPI
/* SECTION: Console options */ /* SECTION: Console options */
......
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