diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index e7390dd0283dde02275de43a88f726c36bfff47e..586cd045e2db213df61a3a9a46a3aaf2ecd08b8d 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -15,6 +15,7 @@ config SUPERH select HAVE_IOREMAP_PROT if MMU select HAVE_ARCH_TRACEHOOK select HAVE_DMA_API_DEBUG + select RTC_LIB help The SuperH is a RISC processor targeted for use in embedded systems and consumer electronics; it was also used in the Sega Dreamcast @@ -74,14 +75,18 @@ config GENERIC_IOMAP bool config GENERIC_TIME - def_bool n + def_bool y config GENERIC_CLOCKEVENTS - def_bool n + def_bool y config GENERIC_CLOCKEVENTS_BROADCAST bool +config GENERIC_CMOS_UPDATE + def_bool y + depends on SH_SH03 || SH_DREAMCAST + config GENERIC_LOCKBREAK def_bool y depends on SMP && PREEMPT @@ -112,6 +117,12 @@ config SYS_SUPPORTS_PCI config SYS_SUPPORTS_CMT bool +config SYS_SUPPORTS_MTU2 + bool + +config SYS_SUPPORTS_TMU + bool + config STACKTRACE_SUPPORT def_bool y @@ -157,13 +168,14 @@ config CPU_SH3 bool select CPU_HAS_INTEVT select CPU_HAS_SR_RB + select SYS_SUPPORTS_TMU config CPU_SH4 bool select CPU_HAS_INTEVT select CPU_HAS_SR_RB - select CPU_HAS_PTEA if !CPU_SH4A || CPU_SHX2 select CPU_HAS_FPU if !CPU_SH4AL_DSP + select SYS_SUPPORTS_TMU config CPU_SH4A bool @@ -177,6 +189,7 @@ config CPU_SH4AL_DSP config CPU_SH5 bool select CPU_HAS_FPU + select SYS_SUPPORTS_TMU config CPU_SHX2 bool @@ -210,27 +223,32 @@ config CPU_SUBTYPE_SH7201 bool "Support SH7201 processor" select CPU_SH2A select CPU_HAS_FPU + select SYS_SUPPORTS_MTU2 config CPU_SUBTYPE_SH7203 bool "Support SH7203 processor" select CPU_SH2A select CPU_HAS_FPU select SYS_SUPPORTS_CMT + select SYS_SUPPORTS_MTU2 config CPU_SUBTYPE_SH7206 bool "Support SH7206 processor" select CPU_SH2A select SYS_SUPPORTS_CMT + select SYS_SUPPORTS_MTU2 config CPU_SUBTYPE_SH7263 bool "Support SH7263 processor" select CPU_SH2A select CPU_HAS_FPU select SYS_SUPPORTS_CMT + select SYS_SUPPORTS_MTU2 config CPU_SUBTYPE_MXG bool "Support MX-G processor" select CPU_SH2A + select SYS_SUPPORTS_MTU2 help Select MX-G if running on an R8A03022BG part. @@ -283,6 +301,7 @@ config CPU_SUBTYPE_SH7720 bool "Support SH7720 processor" select CPU_SH3 select CPU_HAS_DSP + select SYS_SUPPORTS_CMT help Select SH7720 if you have a SH3-DSP SH7720 CPU. @@ -290,6 +309,7 @@ config CPU_SUBTYPE_SH7721 bool "Support SH7721 processor" select CPU_SH3 select CPU_HAS_DSP + select SYS_SUPPORTS_CMT help Select SH7721 if you have a SH3-DSP SH7721 CPU. @@ -347,6 +367,16 @@ config CPU_SUBTYPE_SH7723 help Select SH7723 if you have an SH-MobileR2 CPU. +config CPU_SUBTYPE_SH7724 + bool "Support SH7724 processor" + select CPU_SH4A + select CPU_SHX2 + select ARCH_SHMOBILE + select ARCH_SPARSEMEM_ENABLE + select SYS_SUPPORTS_CMT + help + Select SH7724 if you have an SH-MobileR2R CPU. + config CPU_SUBTYPE_SH7763 bool "Support SH7763 processor" select CPU_SH4A @@ -442,48 +472,26 @@ source "arch/sh/boards/Kconfig" menu "Timer and clock configuration" -config SH_TMU - bool "TMU timer support" - depends on CPU_SH3 || CPU_SH4 +config SH_TIMER_TMU + bool "TMU timer driver" + depends on SYS_SUPPORTS_TMU default y - select GENERIC_TIME - select GENERIC_CLOCKEVENTS help - This enables the use of the TMU as the system timer. + This enables the build of the TMU timer driver. -config SH_CMT - bool "CMT timer support" - depends on SYS_SUPPORTS_CMT && CPU_SH2 +config SH_TIMER_CMT + bool "CMT timer driver" + depends on SYS_SUPPORTS_CMT default y help - This enables the use of the CMT as the system timer. + This enables build of the CMT timer driver. -# -# Support for the new-style CMT driver. This will replace SH_CMT -# once its other dependencies are merged. -# -config SH_TIMER_CMT - bool "CMT clockevents driver" - depends on SYS_SUPPORTS_CMT && !SH_CMT - select GENERIC_CLOCKEVENTS - -config SH_MTU2 - bool "MTU2 timer support" - depends on CPU_SH2A +config SH_TIMER_MTU2 + bool "MTU2 timer driver" + depends on SYS_SUPPORTS_MTU2 default y help - This enables the use of the MTU2 as the system timer. - -config SH_TIMER_IRQ - int - default "28" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 || \ - CPU_SUBTYPE_SH7763 - default "86" if CPU_SUBTYPE_SH7619 - default "140" if CPU_SUBTYPE_SH7206 - default "142" if CPU_SUBTYPE_SH7203 && SH_CMT - default "153" if CPU_SUBTYPE_SH7203 && SH_MTU2 - default "238" if CPU_SUBTYPE_MXG - default "16" + This enables build of the MTU2 timer driver. config SH_PCLK_FREQ int "Peripheral clock frequency (in Hz)" @@ -494,7 +502,7 @@ config SH_PCLK_FREQ CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \ CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \ CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG || \ - CPU_SUBTYPE_SH7786 + CPU_SUBTYPE_SH7786 || CPU_SUBTYPE_SH7724 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R default "66000000" if CPU_SUBTYPE_SH4_202 default "50000000" @@ -503,6 +511,13 @@ config SH_PCLK_FREQ This is necessary for determining the reference clock value on platforms lacking an RTC. +config SH_CLK_CPG + def_bool y + +config SH_CLK_CPG_LEGACY + depends on SH_CLK_CPG + def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE + config SH_CLK_MD int "CPU Mode Pin Setting" depends on CPU_SH2 @@ -663,27 +678,54 @@ config GUSA_RB LLSC, this should be more efficient than the other alternative of disabling interrupts around the atomic sequence. +config SPARSE_IRQ + bool "Support sparse irq numbering" + depends on EXPERIMENTAL + help + This enables support for sparse irqs. This is useful in general + as most CPUs have a fairly sparse array of IRQ vectors, which + the irq_desc then maps directly on to. Systems with a high + number of off-chip IRQs will want to treat this as + experimental until they have been independently verified. + + If you don't know what to do here, say N. + endmenu menu "Boot options" config ZERO_PAGE_OFFSET - hex "Zero page offset" - default "0x00004000" if SH_SH03 - default "0x00010000" if PAGE_SIZE_64KB + hex + default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \ + SH_7751_SOLUTION_ENGINE + default "0x00004000" if PAGE_SIZE_16KB || SH_SH03 default "0x00002000" if PAGE_SIZE_8KB default "0x00001000" help This sets the default offset of zero page. config BOOT_LINK_OFFSET - hex "Link address offset for booting" + hex + default "0x00210000" if SH_SHMIN + default "0x00400000" if SH_CAYMAN + default "0x00810000" if SH_7780_SOLUTION_ENGINE + default "0x009e0000" if SH_TITAN + default "0x01800000" if SH_SDK7780 + default "0x02000000" if SH_EDOSK7760 default "0x00800000" help This option allows you to set the link address offset of the zImage. This can be useful if you are on a board which has a small amount of memory. +config ENTRY_OFFSET + hex + default "0x00001000" if PAGE_SIZE_4KB + default "0x00002000" if PAGE_SIZE_8KB + default "0x00004000" if PAGE_SIZE_16KB + default "0x00010000" if PAGE_SIZE_64KB + default "0x00000000" + config UBC_WAKEUP bool "Wakeup UBC on startup" depends on CPU_SH4 && !CPU_SH4A diff --git a/arch/sh/Kconfig.cpu b/arch/sh/Kconfig.cpu index c7d704381a6d5425548751ed4874580a0e3c1ab9..cd6e3ea598d5b8d028720fb806ddb82a39b2e863 100644 --- a/arch/sh/Kconfig.cpu +++ b/arch/sh/Kconfig.cpu @@ -76,11 +76,6 @@ config SPECULATIVE_EXECUTION If unsure, say N. -config SH64_USER_MISALIGNED_FIXUP - def_bool y - prompt "Fixup misaligned loads/stores occurring in user mode" - depends on SUPERH64 - config SH64_ID2815_WORKAROUND bool "Include workaround for SH5-101 cut2 silicon defect ID2815" depends on CPU_SUBTYPE_SH5_101 @@ -101,9 +96,6 @@ config CPU_HAS_SR_RB See for further information on SR.RB and register banking in the kernel in general. -config CPU_HAS_PTEA - bool - config CPU_HAS_PTEAEX bool diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug index 0d62681f72a092830134b0d5a80186fede6e59e0..8179cc9be9a4a343ab5af583cbfe52792067aa07 100644 --- a/arch/sh/Kconfig.debug +++ b/arch/sh/Kconfig.debug @@ -38,10 +38,10 @@ config EARLY_SCIF_CONSOLE_PORT default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \ CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \ CPU_SUBTYPE_SH7343 - default "0xffe80000" if CPU_SH4 default "0xffea0000" if CPU_SUBTYPE_SH7785 default "0xfffe8000" if CPU_SUBTYPE_SH7203 default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263 + default "0xffe80000" if CPU_SH4 default "0x00000000" config EARLY_PRINTK @@ -92,7 +92,7 @@ config 4KSTACKS config IRQSTACKS bool "Use separate kernel stacks when processing interrupts" - depends on DEBUG_KERNEL && SUPERH32 + depends on DEBUG_KERNEL && SUPERH32 && BROKEN help If you say Y here the kernel will use separate kernel stacks for handling hard and soft interrupts. This can help avoid @@ -122,27 +122,8 @@ config SH_NO_BSS_INIT For all other cases, say N. If this option seems perplexing, or you aren't sure, say N. -config MORE_COMPILE_OPTIONS - bool "Add any additional compile options" - help - If you want to add additional CFLAGS to the kernel build, enable this - option and then enter what you would like to add in the next question. - Note however that -g is already appended with the selection of KGDB. - -config COMPILE_OPTIONS - string "Additional compile arguments" - depends on MORE_COMPILE_OPTIONS - config SH64_SR_WATCH bool "Debug: set SR.WATCH to enable hardware watchpoints and trace" depends on SUPERH64 -config POOR_MANS_STRACE - bool "Debug: enable rudimentary strace facility" - depends on SUPERH64 - help - This option allows system calls to be traced to the console. It also - aids in detecting kernel stack underflow. It is useful for debugging - early-userland problems (e.g. init incurring fatal exceptions.) - endmenu diff --git a/arch/sh/Makefile b/arch/sh/Makefile index bece1f7535f2008c9f3199753e2241f1f73f9fb2..75d049b03f7e04231de0525ba6b57e3779fe2984 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -70,9 +70,6 @@ cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -ml cflags-y += $(call cc-option,-mno-fdpic) cflags-y += $(isaflags-y) -ffreestanding -cflags-$(CONFIG_MORE_COMPILE_OPTIONS) += \ - $(shell echo $(CONFIG_COMPILE_OPTIONS) | sed -e 's/"//g') - OBJCOPYFLAGS := -O binary -R .note -R .note.gnu.build-id -R .comment \ -R .stab -R .stabstr -S @@ -85,7 +82,6 @@ defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE) := vmlinux defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE) := vmlinux # Set some sensible Kbuild defaults -KBUILD_DEFCONFIG := shx3_defconfig KBUILD_IMAGE := $(defaultimage-y) # @@ -93,26 +89,38 @@ KBUILD_IMAGE := $(defaultimage-y) # error messages during linking. # ifdef CONFIG_SUPERH32 -UTS_MACHINE := sh -LDFLAGS_vmlinux += -e _stext +UTS_MACHINE := sh +BITS := 32 +LDFLAGS_vmlinux += -e _stext +KBUILD_DEFCONFIG := shx3_defconfig else -UTS_MACHINE := sh64 -LDFLAGS_vmlinux += --defsym phys_stext=_stext-$(CONFIG_PAGE_OFFSET) \ - --defsym phys_stext_shmedia=phys_stext+1 \ - -e phys_stext_shmedia +UTS_MACHINE := sh64 +BITS := 64 +LDFLAGS_vmlinux += --defsym phys_stext=_stext-$(CONFIG_PAGE_OFFSET) \ + --defsym phys_stext_shmedia=phys_stext+1 \ + -e phys_stext_shmedia +KBUILD_DEFCONFIG := cayman_defconfig +endif + +ifneq ($(SUBARCH),$(ARCH)) + ifeq ($(CROSS_COMPILE),) + CROSS_COMPILE := $(call cc-cross-prefix, $(UTS_MACHINE)-linux- $(UTS_MACHINE)-linux-gnu- $(UTS_MACHINE)-unknown-linux-gnu-) + endif endif ifdef CONFIG_CPU_LITTLE_ENDIAN -LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64' +ld-bfd := elf32-$(UTS_MACHINE)-linux +LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64' --oformat $(ld-bfd) LDFLAGS += -EL else -LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64+4' +ld-bfd := elf32-$(UTS_MACHINE)big-linux +LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64+4' --oformat $(ld-bfd) LDFLAGS += -EB endif -head-y := arch/sh/kernel/init_task.o -head-$(CONFIG_SUPERH32) += arch/sh/kernel/head_32.o -head-$(CONFIG_SUPERH64) += arch/sh/kernel/head_64.o +export ld-bfd BITS + +head-y := arch/sh/kernel/init_task.o arch/sh/kernel/head_$(BITS).o core-y += arch/sh/kernel/ arch/sh/mm/ arch/sh/boards/ core-$(CONFIG_SH_FPU_EMU) += arch/sh/math-emu/ @@ -193,10 +201,11 @@ zImage uImage uImage.srec vmlinux.srec: vmlinux compressed: zImage -archprepare: maketools arch/sh/lib64/syscalltab.h +archprepare: maketools archclean: $(Q)$(MAKE) $(clean)=$(boot) + $(Q)$(MAKE) $(clean)=arch/sh/kernel/vsyscall define archhelp @echo '* zImage - Compressed kernel image' @@ -205,34 +214,4 @@ define archhelp @echo ' uImage.srec - Create an S-record for U-Boot' endef -define filechk_gen-syscalltab - (set -e; \ - echo "/*"; \ - echo " * DO NOT MODIFY."; \ - echo " *"; \ - echo " * This file was generated by arch/sh/Makefile"; \ - echo " * Any changes will be reverted at build time."; \ - echo " */"; \ - echo ""; \ - echo "#ifndef __SYSCALLTAB_H"; \ - echo "#define __SYSCALLTAB_H"; \ - echo ""; \ - echo "#include "; \ - echo ""; \ - echo "struct syscall_info {"; \ - echo " const char *name;"; \ - echo "} syscall_info_table[] = {"; \ - sed -e '/^.*\.long /!d;s// { "/;s/\(\([^/]*\)\/\)\{1\}.*/\2/; \ - s/[ \t]*$$//g;s/$$/" },/;s/\("\)sys_/\1/g'; \ - echo "};"; \ - echo ""; \ - echo "#define NUM_SYSCALL_INFO_ENTRIES ARRAY_SIZE(syscall_info_table)";\ - echo ""; \ - echo "#endif /* __SYSCALLTAB_H */" ) -endef - -arch/sh/lib64/syscalltab.h: arch/sh/kernel/syscalls_64.S - $(call filechk,gen-syscalltab) - -CLEAN_FILES += arch/sh/lib64/syscalltab.h \ - include/asm-sh/machtypes.h +CLEAN_FILES += include/asm-sh/machtypes.h diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig index dcc1af8a2cfe6428c00f0b4f400ffb27cb675ca1..1c91b1f565d5444bf4775439aff906e822fa5cb6 100644 --- a/arch/sh/boards/Kconfig +++ b/arch/sh/boards/Kconfig @@ -46,6 +46,15 @@ config SH_7722_SOLUTION_ENGINE Select 7722 SolutionEngine if configuring for a Hitachi SH772 evaluation board. +config SH_7724_SOLUTION_ENGINE + bool "SolutionEngine7724" + select SOLUTION_ENGINE + depends on CPU_SUBTYPE_SH7724 + select ARCH_REQUIRE_GPIOLIB + help + Select 7724 SolutionEngine if configuring for a Hitachi SH7724 + evaluation board. + config SH_7751_SOLUTION_ENGINE bool "SolutionEngine7751" select SOLUTION_ENGINE @@ -121,7 +130,7 @@ config SH_RTS7751R2D bool "RTS7751R2D" depends on CPU_SUBTYPE_SH7751R select SYS_SUPPORTS_PCI - select IO_TRAPPED + select IO_TRAPPED if MMU help Select RTS7751R2D if configuring for a Renesas Technology Sales SH-Graphics board. @@ -145,13 +154,13 @@ config SH_HIGHLANDER bool "Highlander" depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 select SYS_SUPPORTS_PCI - select IO_TRAPPED + select IO_TRAPPED if MMU config SH_SH7785LCR bool "SH7785LCR" depends on CPU_SUBTYPE_SH7785 select SYS_SUPPORTS_PCI - select IO_TRAPPED + select IO_TRAPPED if MMU config SH_SH7785LCR_29BIT_PHYSMAPS bool "SH7785LCR 29bit physmaps" diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c index f2a29641b6a326cc857c8334383717dffc70aba7..1c4d83ef2a4724e10da98bd42d58941d4a03ba15 100644 --- a/arch/sh/boards/board-ap325rxa.c +++ b/arch/sh/boards/board-ap325rxa.c @@ -535,6 +535,18 @@ static int __init ap325rxa_devices_setup(void) } device_initcall(ap325rxa_devices_setup); +/* Return the board specific boot mode pin configuration */ +static int ap325rxa_mode_pins(void) +{ + /* MD0=0, MD1=0, MD2=0: Clock Mode 0 + * MD3=0: 16-bit Area0 Bus Width + * MD5=1: Little Endian + * TSTMD=1, MD8=1: Test Mode Disabled + */ + return MODE_PIN5 | MODE_PIN8; +} + static struct sh_machine_vector mv_ap325rxa __initmv = { .mv_name = "AP-325RXA", + .mv_mode_pins = ap325rxa_mode_pins, }; diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c index 6f94f17adc467dd00d13aaa20ef5891b2ee064ed..7be56fb06c1f0a7aecbd95ee47f0fa805535518e 100644 --- a/arch/sh/boards/board-sh7785lcr.c +++ b/arch/sh/boards/board-sh7785lcr.c @@ -2,12 +2,12 @@ * Renesas Technology Corp. R0P7785LC0011RL Support. * * Copyright (C) 2008 Yoshihiro Shimoda + * Copyright (C) 2009 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ - #include #include #include @@ -19,8 +19,12 @@ #include #include #include -#include +#include +#include #include +#include +#include +#include /* * NOTE: This board has 2 physical memory maps. @@ -273,6 +277,20 @@ void __init init_sh7785lcr_IRQ(void) plat_irq_setup_pins(IRQ_MODE_IRQ3210); } +static int sh7785lcr_clk_init(void) +{ + struct clk *clk; + int ret; + + clk = clk_get(NULL, "extal"); + if (!clk || IS_ERR(clk)) + return PTR_ERR(clk); + ret = clk_set_rate(clk, 33333333); + clk_put(clk); + + return ret; +} + static void sh7785lcr_power_off(void) { unsigned char *p; @@ -303,12 +321,34 @@ static void __init sh7785lcr_setup(char **cmdline_p) writel(0x000307c2, sm501_reg); } +/* Return the board specific boot mode pin configuration */ +static int sh7785lcr_mode_pins(void) +{ + int value = 0; + + /* These are the factory default settings of S1 and S2. + * If you change these dip switches then you will need to + * adjust the values below as well. + */ + value |= MODE_PIN4; /* Clock Mode 16 */ + value |= MODE_PIN5; /* 32-bit Area0 bus width */ + value |= MODE_PIN6; /* 32-bit Area0 bus width */ + value |= MODE_PIN7; /* Area 0 SRAM interface [fixed] */ + value |= MODE_PIN8; /* Little Endian */ + value |= MODE_PIN9; /* Master Mode */ + value |= MODE_PIN14; /* No PLL step-up */ + + return value; +} + /* * The Machine Vector */ static struct sh_machine_vector mv_sh7785lcr __initmv = { .mv_name = "SH7785LCR", .mv_setup = sh7785lcr_setup, + .mv_clk_init = sh7785lcr_clk_init, .mv_init_irq = init_sh7785lcr_IRQ, + .mv_mode_pins = sh7785lcr_mode_pins, }; diff --git a/arch/sh/boards/mach-cayman/Makefile b/arch/sh/boards/mach-cayman/Makefile index cafe1ac3b29c288570e0ac5cd14743b35174e7fe..00fa3eaecb1be7a5e8bcad1ea3bb850095a0149c 100644 --- a/arch/sh/boards/mach-cayman/Makefile +++ b/arch/sh/boards/mach-cayman/Makefile @@ -1,4 +1,4 @@ # # Makefile for the Hitachi Cayman specific parts of the kernel # -obj-y := setup.o irq.o +obj-y := setup.o irq.o panic.o diff --git a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c index da62ad516994bc74aecd4823502d682c21ee5660..33f77085631937fef9d1489590980016dd0f2d15 100644 --- a/arch/sh/boards/mach-cayman/irq.c +++ b/arch/sh/boards/mach-cayman/irq.c @@ -142,26 +142,11 @@ int cayman_irq_demux(int evt) return irq; } -#if defined(CONFIG_PROC_FS) && defined(CONFIG_SYSCTL) -int cayman_irq_describe(char* p, int irq) -{ - if (irq < NR_INTC_IRQS) { - return intc_irq_describe(p, irq); - } else if (irq < NR_INTC_IRQS + 8) { - return sprintf(p, "(SMSC %d)", irq - NR_INTC_IRQS); - } else if ((irq >= NR_INTC_IRQS + 24) && (irq < NR_INTC_IRQS + 32)) { - return sprintf(p, "(PCI2 %d)", irq - (NR_INTC_IRQS + 24)); - } - - return 0; -} -#endif - void init_cayman_irq(void) { int i; - epld_virt = onchip_remap(EPLD_BASE, 1024, "EPLD"); + epld_virt = (unsigned long)ioremap_nocache(EPLD_BASE, 1024); if (!epld_virt) { printk(KERN_ERR "Cayman IRQ: Unable to remap EPLD\n"); return; diff --git a/arch/sh/boards/mach-cayman/panic.c b/arch/sh/boards/mach-cayman/panic.c new file mode 100644 index 0000000000000000000000000000000000000000..d1e67306d07c068654b046fd58bbc5f46847f4c3 --- /dev/null +++ b/arch/sh/boards/mach-cayman/panic.c @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2003 Richard Curnow, SuperH UK Limited + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include + +/* THIS IS A PHYSICAL ADDRESS */ +#define HDSP2534_ADDR (0x04002100) + +static void poor_mans_delay(void) +{ + int i; + + for (i = 0; i < 2500000; i++) + cpu_relax(); +} + +static void show_value(unsigned long x) +{ + int i; + unsigned nibble; + for (i = 0; i < 8; i++) { + nibble = ((x >> (i * 4)) & 0xf); + + __raw_writeb(nibble + ((nibble > 9) ? 55 : 48), + HDSP2534_ADDR + 0xe0 + ((7 - i) << 2)); + } +} + +void +panic_handler(unsigned long panicPC, unsigned long panicSSR, + unsigned long panicEXPEVT) +{ + while (1) { + /* This piece of code displays the PC on the LED display */ + show_value(panicPC); + poor_mans_delay(); + show_value(panicSSR); + poor_mans_delay(); + show_value(panicEXPEVT); + poor_mans_delay(); + } +} diff --git a/arch/sh/boards/mach-cayman/setup.c b/arch/sh/boards/mach-cayman/setup.c index e7f9cc5f2ff11e7d350dbb067d412d4b39089fbd..7e8216ac31bda3cf263faad31ab3105e7afd0b0f 100644 --- a/arch/sh/boards/mach-cayman/setup.c +++ b/arch/sh/boards/mach-cayman/setup.c @@ -102,7 +102,7 @@ static int __init smsc_superio_setup(void) { unsigned char devid, devrev; - smsc_superio_virt = onchip_remap(SMSC_SUPERIO_BASE, 1024, "SMSC SuperIO"); + smsc_superio_virt = (unsigned long)ioremap_nocache(SMSC_SUPERIO_BASE, 1024); if (!smsc_superio_virt) { panic("Unable to remap SMSC SuperIO\n"); } diff --git a/arch/sh/boards/mach-dreamcast/setup.c b/arch/sh/boards/mach-dreamcast/setup.c index d1bee4884cd667da313e0105e490cd2b5a5e6750..ebe99227d4e6674704b96e4c03c7e699401b6194 100644 --- a/arch/sh/boards/mach-dreamcast/setup.c +++ b/arch/sh/boards/mach-dreamcast/setup.c @@ -30,7 +30,6 @@ extern struct irq_chip systemasic_int; extern void aica_time_init(void); -extern int gapspci_init(void); extern int systemasic_irq_demux(int); static void __init dreamcast_setup(char **cmdline_p) @@ -51,11 +50,6 @@ static void __init dreamcast_setup(char **cmdline_p) handle_level_irq); board_time_init = aica_time_init; - -#ifdef CONFIG_PCI - if (gapspci_init() < 0) - printk(KERN_WARNING "GAPSPCI was not detected.\n"); -#endif } static struct sh_machine_vector mv_dreamcast __initmv = { diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c index 1ee1de0bc1c3c93ab627a34ddb4acec3409f94f7..6ed401cd3156af429569bf197c99fc1cbfe861e6 100644 --- a/arch/sh/boards/mach-migor/setup.c +++ b/arch/sh/boards/mach-migor/setup.c @@ -584,3 +584,22 @@ static int __init migor_devices_setup(void) return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices)); } __initcall(migor_devices_setup); + +/* Return the board specific boot mode pin configuration */ +static int migor_mode_pins(void) +{ + /* MD0=1, MD1=1, MD2=0: Clock Mode 3 + * MD3=0: 16-bit Area0 Bus Width + * MD5=1: Little Endian + * TSTMD=1, MD8=0: Test Mode Disabled + */ + return MODE_PIN0 | MODE_PIN1 | MODE_PIN5; +} + +/* + * The Machine Vector + */ +static struct sh_machine_vector mv_migor __initmv = { + .mv_name = "Migo-R", + .mv_mode_pins = migor_mode_pins, +}; diff --git a/arch/sh/boards/mach-r2d/setup.c b/arch/sh/boards/mach-r2d/setup.c index c585be00956ea9a8d541656081ac80a2f86ae3f4..a625ecb93e47ee55a6300c87986c17445ad9f0a3 100644 --- a/arch/sh/boards/mach-r2d/setup.c +++ b/arch/sh/boards/mach-r2d/setup.c @@ -10,6 +10,9 @@ */ #include #include +#include +#include +#include #include #include #include @@ -181,6 +184,50 @@ static struct platform_device sm501_device = { .resource = sm501_resources, }; +static struct mtd_partition r2d_partitions[] = { + { + .name = "U-Boot", + .offset = 0x00000000, + .size = 0x00040000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "Environment", + .offset = MTDPART_OFS_NXTBLK, + .size = 0x00040000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "Kernel", + .offset = MTDPART_OFS_NXTBLK, + .size = 0x001c0000, + }, { + .name = "Flash_FS", + .offset = MTDPART_OFS_NXTBLK, + .size = MTDPART_SIZ_FULL, + } +}; + +static struct physmap_flash_data flash_data = { + .width = 2, + .nr_parts = ARRAY_SIZE(r2d_partitions), + .parts = r2d_partitions, +}; + +static struct resource flash_resource = { + .start = 0x00000000, + .end = 0x02000000, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device flash_device = { + .name = "physmap-flash", + .id = -1, + .resource = &flash_resource, + .num_resources = 1, + .dev = { + .platform_data = &flash_data, + }, +}; + static struct platform_device *rts7751r2d_devices[] __initdata = { &sm501_device, &heartbeat_device, @@ -203,6 +250,9 @@ static int __init rts7751r2d_devices_setup(void) if (register_trapped_io(&cf_trapped_io) == 0) platform_device_register(&cf_ide_device); + if (mach_is_r2d_plus()) + platform_device_register(&flash_device); + spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus)); return platform_add_devices(rts7751r2d_devices, diff --git a/arch/sh/boards/mach-se/7724/Makefile b/arch/sh/boards/mach-se/7724/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..349cbd6ce82d9574637a08072abf8249771997d5 --- /dev/null +++ b/arch/sh/boards/mach-se/7724/Makefile @@ -0,0 +1,10 @@ +# +# Makefile for the HITACHI UL SolutionEngine 7724 specific parts of the kernel +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# +# + +obj-y := setup.o irq.o \ No newline at end of file diff --git a/arch/sh/boards/mach-se/7724/irq.c b/arch/sh/boards/mach-se/7724/irq.c new file mode 100644 index 0000000000000000000000000000000000000000..f76cf3b49f2375f458b105aa78517373f971c0ce --- /dev/null +++ b/arch/sh/boards/mach-se/7724/irq.c @@ -0,0 +1,139 @@ +/* + * linux/arch/sh/boards/se/7724/irq.c + * + * Copyright (C) 2009 Renesas Solutions Corp. + * + * Kuninori Morimoto + * + * Based on linux/arch/sh/boards/se/7722/irq.c + * Copyright (C) 2007 Nobuhiro Iwamatsu + * + * Hitachi UL SolutionEngine 7724 Support. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include + +struct fpga_irq { + unsigned long sraddr; + unsigned long mraddr; + unsigned short mask; + unsigned int base; +}; + +static unsigned int fpga2irq(unsigned int irq) +{ + if (irq >= IRQ0_BASE && + irq <= IRQ0_END) + return IRQ0_IRQ; + else if (irq >= IRQ1_BASE && + irq <= IRQ1_END) + return IRQ1_IRQ; + else + return IRQ2_IRQ; +} + +static struct fpga_irq get_fpga_irq(unsigned int irq) +{ + struct fpga_irq set; + + switch (irq) { + case IRQ0_IRQ: + set.sraddr = IRQ0_SR; + set.mraddr = IRQ0_MR; + set.mask = IRQ0_MASK; + set.base = IRQ0_BASE; + break; + case IRQ1_IRQ: + set.sraddr = IRQ1_SR; + set.mraddr = IRQ1_MR; + set.mask = IRQ1_MASK; + set.base = IRQ1_BASE; + break; + default: + set.sraddr = IRQ2_SR; + set.mraddr = IRQ2_MR; + set.mask = IRQ2_MASK; + set.base = IRQ2_BASE; + break; + } + + return set; +} + +static void disable_se7724_irq(unsigned int irq) +{ + struct fpga_irq set = get_fpga_irq(fpga2irq(irq)); + unsigned int bit = irq - set.base; + ctrl_outw(ctrl_inw(set.mraddr) | 0x0001 << bit, set.mraddr); +} + +static void enable_se7724_irq(unsigned int irq) +{ + struct fpga_irq set = get_fpga_irq(fpga2irq(irq)); + unsigned int bit = irq - set.base; + ctrl_outw(ctrl_inw(set.mraddr) & ~(0x0001 << bit), set.mraddr); +} + +static struct irq_chip se7724_irq_chip __read_mostly = { + .name = "SE7724-FPGA", + .mask = disable_se7724_irq, + .unmask = enable_se7724_irq, + .mask_ack = disable_se7724_irq, +}; + +static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc) +{ + struct fpga_irq set = get_fpga_irq(irq); + unsigned short intv = ctrl_inw(set.sraddr); + struct irq_desc *ext_desc; + unsigned int ext_irq = set.base; + + intv &= set.mask; + + while (intv) { + if (intv & 0x0001) { + ext_desc = irq_desc + ext_irq; + handle_level_irq(ext_irq, ext_desc); + } + intv >>= 1; + ext_irq++; + } +} + +/* + * Initialize IRQ setting + */ +void __init init_se7724_IRQ(void) +{ + int i; + + ctrl_outw(0xffff, IRQ0_MR); /* mask all */ + ctrl_outw(0xffff, IRQ1_MR); /* mask all */ + ctrl_outw(0xffff, IRQ2_MR); /* mask all */ + ctrl_outw(0x0000, IRQ0_SR); /* clear irq */ + ctrl_outw(0x0000, IRQ1_SR); /* clear irq */ + ctrl_outw(0x0000, IRQ2_SR); /* clear irq */ + ctrl_outw(0x002a, IRQ_MODE); /* set irq type */ + + for (i = 0; i < SE7724_FPGA_IRQ_NR; i++) + set_irq_chip_and_handler_name(SE7724_FPGA_IRQ_BASE + i, + &se7724_irq_chip, + handle_level_irq, "level"); + + set_irq_chained_handler(IRQ0_IRQ, se7724_irq_demux); + set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); + + set_irq_chained_handler(IRQ1_IRQ, se7724_irq_demux); + set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW); + + set_irq_chained_handler(IRQ2_IRQ, se7724_irq_demux); + set_irq_type(IRQ2_IRQ, IRQ_TYPE_LEVEL_LOW); +} diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c new file mode 100644 index 0000000000000000000000000000000000000000..9cd04bd558b88930583774a29837d5aa8424518d --- /dev/null +++ b/arch/sh/boards/mach-se/7724/setup.c @@ -0,0 +1,448 @@ +/* + * linux/arch/sh/boards/se/7724/setup.c + * + * Copyright (C) 2009 Renesas Solutions Corp. + * + * Kuninori Morimoto + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include