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    Merge tag 'xtensa-20161005' of git://github.com/jcmvbkbc/linux-xtensa · d8ea757b
    Linus Torvalds 提交于
    Pull Xtensa updates from Max Filippov:
     "Updates for the xtensa architecture.  It is a combined set of patches
      for 4.8 that never got to the mainline and new patches for 4.9.
    
       - add new kernel memory layouts for MMUv3 cores: with 256MB and 512MB
         KSEG size, starting at physical address other than 0
    
       - make kernel load address configurable
    
       - clean up kernel memory layout macros
    
       - drop sysmem early allocator and switch to memblock
    
       - enable kmemleak and memory reservation from the device tree
    
       - wire up new syscalls: userfaultfd, membarrier, mlock2,
         copy_file_range, preadv2 and pwritev2
    
       - add new platform: Cadence Configurable System Platform (CSP) and
         new core variant for it: xt_lnx
    
       - rearrange CCOUNT calibration code, make most of it generic
    
       - improve machine reset code (XTFPGA now reboots reliably with MMUv3
         cores)
    
       - provide default memmap command line option for configurations
         without device tree support
    
       - ISS fixes: simdisk is now capable of using highmem pages, panic
         correctly terminates simulator"
    
    * tag 'xtensa-20161005' of git://github.com/jcmvbkbc/linux-xtensa: (24 commits)
      xtensa: disable MMU initialization option on MMUv2 cores
      xtensa: add default memmap and mmio32native options to defconfigs
      xtensa: add default memmap option to common_defconfig
      xtensa: add default memmap option to iss_defconfig
      xtensa: ISS: allow simdisk to use high memory buffers
      xtensa: ISS: define simc_exit and use it instead of inline asm
      xtensa: xtfpga: group platform_* functions together
      xtensa: rearrange CCOUNT calibration
      xtensa: xtfpga: use clock provider, don't update DT
      xtensa: Tweak xuartps UART driver Rx watermark for Cadence CSP config.
      xtensa: initialize MMU before jumping to reset vector
      xtensa: fix icountlevel setting in cpu_reset
      xtensa: extract common CPU reset code into separate function
      xtensa: Added Cadence CSP kernel configuration for Xtensa
      xtensa: fix default kernel load address
      xtensa: wire up new syscalls
      xtensa: support reserved-memory DT node
      xtensa: drop sysmem and switch to memblock
      xtensa: minimize use of PLATFORM_DEFAULT_MEM_{ADDR,SIZE}
      xtensa: cleanup MMU setup and kernel layout macros
      ...
    d8ea757b
setup.c 3.3 KB