diff --git a/include/mace/public/mace.h b/include/mace/public/mace.h index d2c768665d57fa138d0622cd92d3d8702da3de67..7018fc53437c7139b227f5e21ed4f8b2f0875d21 100644 --- a/include/mace/public/mace.h +++ b/include/mace/public/mace.h @@ -328,6 +328,18 @@ class MACE_API MaceEngineConfig { MaceStatus SetCPUThreadPolicy(int num_threads_hint, CPUAffinityPolicy policy); + /// \brief Set Hexagon NN to run on unsigned PD + /// + /// Caution: This function must be called before any Hexagon related + /// functions and it should only be called once. + /// Starting in the SM8150 family, signature-free dynamic module offload is + /// enabled on cDSP in a low-rights process (Unsigned PD). A success from this + /// function allows the clients to offload the dynamic shared object to cDSP + /// without signing. However, some older cDSP firmware may not work due to + /// access limitations. + /// \return MaceStatus::MACE_SUCCESS for success, other for failure. + MaceStatus SetHexagonToUnsignedPD(); + /// \brief Set Hexagon DSP power parameters /// /// Caution: this function may hurt performance if improper diff --git a/mace/core/runtime/hexagon/hexagon_dsp_wrapper.cc b/mace/core/runtime/hexagon/hexagon_dsp_wrapper.cc index cdde27866c7713828dbf119ba7f0772753a889a3..e76c20f4bc48671091429432cdd13d929f3ccf85 100644 --- a/mace/core/runtime/hexagon/hexagon_dsp_wrapper.cc +++ b/mace/core/runtime/hexagon/hexagon_dsp_wrapper.cc @@ -29,6 +29,7 @@ #include "mace/port/env.h" #include "mace/utils/memory.h" #include "third_party/nnlib/hexagon_nn.h" +#include "third_party/nnlib/hexnn_dsp_controller.h" namespace mace { @@ -106,6 +107,8 @@ hexagon_nn_corner_type TransformCornerType(HexagonNNCornerType corner) { } // namespace HexagonDSPWrapper::HexagonDSPWrapper() { + hexnn_controller_init(); + std::string env_log_execute_time_str; GetEnv("MACE_DSP_LOG_EXECUTE_TIME", &env_log_execute_time_str); if (env_log_execute_time_str.empty()) { @@ -115,6 +118,9 @@ HexagonDSPWrapper::HexagonDSPWrapper() { } } +HexagonDSPWrapper::~HexagonDSPWrapper() { + hexnn_controller_deinit(); +} int HexagonDSPWrapper::GetVersion() { int version; @@ -122,6 +128,14 @@ int HexagonDSPWrapper::GetVersion() { return version; } +bool HexagonDSPWrapper::RequestUnsignedPD() { + int ret = hexnn_controller_request_unsigned_pd(); + if (ret != 0) { + LOG(WARNING) << "Request unsigned PD failed: " << ret; + } + return ret == 0; +} + bool HexagonDSPWrapper::SetPower(HexagonNNCornerType corner, bool dcvs_enable, int latency) { @@ -129,6 +143,9 @@ bool HexagonDSPWrapper::SetPower(HexagonNNCornerType corner, dcvs_enable ? NN_DCVS_ENABLE : NN_DCVS_DISABLE, static_cast(std::max(0, latency))); + if (ret != 0) { + LOG(WARNING) << "Hexagon set power failed: " << ret; + } return ret == 0; } @@ -157,7 +174,6 @@ bool HexagonDSPWrapper::SetupGraph(const NetDef &net_def, int64_t t0 = NowMicros(); // const node - std::vector const_node_list; for (const ConstTensor &const_tensor : net_def.tensors()) { std::vector tensor_shape(const_tensor.dims().begin(), const_tensor.dims().end()); @@ -165,48 +181,32 @@ bool HexagonDSPWrapper::SetupGraph(const NetDef &net_def, tensor_shape.insert(tensor_shape.begin(), 1); } - hexagon_nn_const_node const_node; - const_node.node_id = node_id(const_tensor.node_id()); - const_node.tensor.batches = tensor_shape[0]; - const_node.tensor.height = tensor_shape[1]; - const_node.tensor.width = tensor_shape[2]; - const_node.tensor.depth = tensor_shape[3]; - + unsigned char *data; + int data_len; if (const_tensor.data_type() == DataType::DT_INT32 && const_tensor.data_size() == 0) { - const_node.tensor.data = NULL; - const_node.tensor.dataLen = 0; + data = NULL; + data_len = 0; } else { - const_node.tensor.data = - const_cast(model_data + const_tensor.offset()); - const_node.tensor.dataLen = const_tensor.data_size() * - GetEnumTypeSize(const_tensor.data_type()); - } - const_node_list.push_back(const_node); - // 255 is magic number: why fastrpc limits sequence length to that? - if (const_node_list.size() >= 250) { - MACE_CHECK( - hexagon_nn_append_const_node_list(nn_id_, const_node_list.data(), - const_node_list.size()) == 0, - "append const node error"); - const_node_list.clear(); + data = const_cast(model_data + const_tensor.offset()); + data_len = + const_tensor.data_size() * GetEnumTypeSize(const_tensor.data_type()); } - } - - if (!const_node_list.empty()) { MACE_CHECK( - hexagon_nn_append_const_node_list(nn_id_, const_node_list.data(), - const_node_list.size()) == 0, + hexagon_nn_append_const_node(nn_id_, + node_id(const_tensor.node_id()), + tensor_shape[0], + tensor_shape[1], + tensor_shape[2], + tensor_shape[3], + data, + data_len) == 0, "append const node error"); } - const_node_list.clear(); // op node OpMap op_map; op_map.Init(); - std::vector op_node_list; - std::vector> cached_inputs; - std::vector> cached_outputs; std::vector inputs; std::vector outputs; @@ -233,40 +233,18 @@ bool HexagonDSPWrapper::SetupGraph(const NetDef &net_def, outputs[i].zero_offset = 0; outputs[i].stepsize = 0; } - cached_inputs.push_back(inputs); - cached_outputs.push_back(outputs); - - hexagon_nn_padding_type padding_type = - static_cast(op.padding()); - - hexagon_nn_op_node op_node; - op_node.node_id = node_id(op.node_id()); - op_node.operation = op_id; - op_node.padding = padding_type; - op_node.inputs = cached_inputs.back().data(); - op_node.inputsLen = inputs.size(); - op_node.outputs = cached_outputs.back().data(); - op_node.outputsLen = outputs.size(); - - op_node_list.push_back(op_node); - if (op_node_list.size() >= 125) { - MACE_CHECK(hexagon_nn_append_node_list(nn_id_, op_node_list.data(), - op_node_list.size()) == 0, - "append node error"); - op_node_list.clear(); - cached_inputs.clear(); - cached_outputs.clear(); - } - } - - if (!op_node_list.empty()) { - MACE_CHECK(hexagon_nn_append_node_list(nn_id_, op_node_list.data(), - op_node_list.size()) == 0, + auto padding_type = static_cast(op.padding()); + + MACE_CHECK(hexagon_nn_append_node(nn_id_, + node_id(op.node_id()), + op_id, + padding_type, + inputs.data(), + inputs.size(), + outputs.data(), + outputs.size()) == 0, "append node error"); } - op_node_list.clear(); - cached_inputs.clear(); - cached_outputs.clear(); // input info num_inputs_ = net_def.input_info_size(); @@ -372,7 +350,8 @@ void HexagonDSPWrapper::GetPerfInfo() { std::vector> run_order_data; for (unsigned int i = 0; i < n_items; ++i) { unsigned int node_id = perf_info[i].node_id; - unsigned int node_type_id = perf_info[i].node_type; + unsigned int node_type_id = 0; + hexagon_nn_get_nodetype(nn_id_, node_id, &node_type_id); node_id_counters[node_id] = ((static_cast(perf_info[i].counter_hi) << 32) + perf_info[i].counter_lo) * diff --git a/mace/core/runtime/hexagon/hexagon_dsp_wrapper.h b/mace/core/runtime/hexagon/hexagon_dsp_wrapper.h index 1c0c4635b459f67394ddf5ec7341d9dc754b81a4..831d163f8ac02ac692f4edc3a3d0ff5c402a6bf6 100644 --- a/mace/core/runtime/hexagon/hexagon_dsp_wrapper.h +++ b/mace/core/runtime/hexagon/hexagon_dsp_wrapper.h @@ -28,6 +28,7 @@ namespace mace { class HexagonDSPWrapper : public HexagonControlWrapper { public: HexagonDSPWrapper(); + ~HexagonDSPWrapper(); int GetVersion() override; bool Config() override; @@ -49,6 +50,7 @@ class HexagonDSPWrapper : public HexagonControlWrapper { static bool SetPower(HexagonNNCornerType corner, bool dcvs_enable, int latency); + static bool RequestUnsignedPD(); private: uint64_t GetLastExecuteCycles(); diff --git a/mace/libmace/mace.cc b/mace/libmace/mace.cc index 51c53097f5afad9ffce95e66d4db29e0b4ba8069..eb79da6fc400b6655b9d539974348b2c82dd98ac 100644 --- a/mace/libmace/mace.cc +++ b/mace/libmace/mace.cc @@ -192,6 +192,8 @@ class MaceEngineConfig::Impl { MaceStatus SetCPUThreadPolicy(int num_threads_hint, CPUAffinityPolicy policy); + MaceStatus SetHexagonToUnsignedPD(); + MaceStatus SetHexagonPower(HexagonNNCornerType corner, bool dcvs_enable, int latency); @@ -220,6 +222,18 @@ class MaceEngineConfig::Impl { return gpu_perf_hint_; } + inline HexagonNNCornerType hexagon_corner() const { + return hexagon_corner_; + } + + inline bool hexagon_dcvs_enable() const { + return hexagon_dcvs_enable_; + } + + inline int hexagon_latency() const { + return hexagon_latency_; + } + private: DeviceType device_type_; int num_threads_; @@ -227,6 +241,9 @@ class MaceEngineConfig::Impl { std::shared_ptr gpu_context_; GPUPriorityHint gpu_priority_hint_; GPUPerfHint gpu_perf_hint_; + HexagonNNCornerType hexagon_corner_; + bool hexagon_dcvs_enable_; + int hexagon_latency_; }; MaceEngineConfig::Impl::Impl(const DeviceType device_type) @@ -235,13 +252,10 @@ MaceEngineConfig::Impl::Impl(const DeviceType device_type) cpu_affinity_policy_(CPUAffinityPolicy::AFFINITY_NONE), gpu_context_(nullptr), gpu_priority_hint_(GPUPriorityHint::PRIORITY_LOW), - gpu_perf_hint_(GPUPerfHint::PERF_NORMAL) { -#ifdef MACE_ENABLE_HEXAGON - if (!HexagonDSPWrapper::SetPower(HEXAGON_NN_CORNER_TURBO, true, 100)) { - LOG(WARNING) << "Hexagon set default clocks failed!"; - } -#endif -} + gpu_perf_hint_(GPUPerfHint::PERF_NORMAL), + hexagon_corner_(HexagonNNCornerType::HEXAGON_NN_CORNER_TURBO), + hexagon_dcvs_enable_(true), + hexagon_latency_(100) {} MaceStatus MaceEngineConfig::Impl::SetGPUContext( std::shared_ptr context) { @@ -265,13 +279,21 @@ MaceStatus MaceEngineConfig::Impl::SetCPUThreadPolicy( return MaceStatus::MACE_SUCCESS; } +MaceStatus MaceEngineConfig::Impl::SetHexagonToUnsignedPD() { + bool ret = false; +#ifdef MACE_ENABLE_HEXAGON + ret = HexagonDSPWrapper::RequestUnsignedPD(); +#endif + return ret ? MaceStatus::MACE_SUCCESS : MaceStatus::MACE_RUNTIME_ERROR; +} + MaceStatus MaceEngineConfig::Impl::SetHexagonPower( HexagonNNCornerType corner, bool dcvs_enable, int latency) { - MACE_UNUSED(corner); - MACE_UNUSED(dcvs_enable); - MACE_UNUSED(latency); + hexagon_corner_ = corner; + hexagon_dcvs_enable_ = dcvs_enable; + hexagon_latency_ = latency; bool ret = false; #ifdef MACE_ENABLE_HEXAGON ret = HexagonDSPWrapper::SetPower(corner, dcvs_enable, latency); @@ -302,6 +324,10 @@ MaceStatus MaceEngineConfig::SetCPUThreadPolicy( return impl_->SetCPUThreadPolicy(num_threads_hint, policy); } +MaceStatus MaceEngineConfig::SetHexagonToUnsignedPD() { + return impl_->SetHexagonToUnsignedPD(); +} + MaceStatus MaceEngineConfig::SetHexagonPower( HexagonNNCornerType corner, bool dcvs_enable, @@ -434,6 +460,11 @@ class MaceEngine::Impl { std::map input_info_map_; std::map output_info_map_; std::unique_ptr thread_pool_; +#ifdef MACE_ENABLE_HEXAGON + HexagonNNCornerType hexagon_corner_; + bool hexagon_dcvs_enable_; + int hexagon_latency_; +#endif #if defined(MACE_ENABLE_HEXAGON) || defined(MACE_ENABLE_HTA) std::unique_ptr hexagon_controller_; #endif @@ -454,8 +485,13 @@ MaceEngine::Impl::Impl(const MaceEngineConfig &config) is_quantized_model_(false), thread_pool_(new utils::ThreadPool(config.impl_->num_threads(), config.impl_->cpu_affinity_policy())) +#ifdef MACE_ENABLE_HEXAGON + , hexagon_corner_(config.impl_->hexagon_corner()) + , hexagon_dcvs_enable_(config.impl_->hexagon_dcvs_enable()) + , hexagon_latency_(config.impl_->hexagon_latency()) +#endif #if defined(MACE_ENABLE_HEXAGON) || defined(MACE_ENABLE_HTA) -, hexagon_controller_(nullptr) + , hexagon_controller_(nullptr) #endif #ifdef MACE_ENABLE_APU , apu_controller_(nullptr) @@ -554,6 +590,13 @@ MaceStatus MaceEngine::Impl::Init( output_tensor->set_data_format(DataFormat::NHWC); #endif } +#ifdef MACE_ENABLE_HEXAGON + if (device_type_ == HEXAGON) { + HexagonDSPWrapper::SetPower(hexagon_corner_, + hexagon_dcvs_enable_, + hexagon_latency_); + } +#endif #if defined(MACE_ENABLE_HEXAGON) || defined(MACE_ENABLE_HTA) if (device_type_ == HEXAGON || device_type_ == HTA) { hexagon_controller_ = CreateHexagonControlWrapper(device_.get()); diff --git a/mace/tools/mace_run.cc b/mace/tools/mace_run.cc index e135e5edf1c2f8880afb7bfd2b578ebdf5f8fbcc..55f2931795893a3181e86828c19046380d7c991d 100644 --- a/mace/tools/mace_run.cc +++ b/mace/tools/mace_run.cc @@ -197,6 +197,9 @@ bool RunModel(const std::string &model_name, } #endif // MACE_ENABLE_OPENCL #ifdef MACE_ENABLE_HEXAGON + // SetHexagonToUnsignedPD() can be called for 8150 family(with new cDSP + // firmware) or 8250 family above to run hexagon nn on unsigned PD. + // config.SetHexagonToUnsignedPD(); config.SetHexagonPower(HEXAGON_NN_CORNER_TURBO, true, 100); #endif std::unique_ptr model_graph_data = diff --git a/third_party/nnlib/BUILD.bazel b/third_party/nnlib/BUILD.bazel index 488b05004370b02b3f54fd1ed50b8ef85897019a..38521738cd30479f9c4b6a2260303c1778965a93 100644 --- a/third_party/nnlib/BUILD.bazel +++ b/third_party/nnlib/BUILD.bazel @@ -20,6 +20,7 @@ cc_library( ]), hdrs = [ "hexagon_nn.h", + "hexnn_dsp_controller.h", "ops.h", ], visibility = ["//visibility:public"], diff --git a/third_party/nnlib/arm64-v8a/libhexagon_controller.so b/third_party/nnlib/arm64-v8a/libhexagon_controller.so index 2509a78001d9b4490051617ffa4e895f4da85ca8..29a8003625daa2865f7a8dddbef2bedd812f44ab 100755 Binary files a/third_party/nnlib/arm64-v8a/libhexagon_controller.so and b/third_party/nnlib/arm64-v8a/libhexagon_controller.so differ diff --git a/third_party/nnlib/armeabi-v7a/libhexagon_controller.so b/third_party/nnlib/armeabi-v7a/libhexagon_controller.so index 13d6f92188f3118773db0014976d22c45110ced8..977c25d69cc46d0dba59e71ab45071299ebfbeb1 100755 Binary files a/third_party/nnlib/armeabi-v7a/libhexagon_controller.so and b/third_party/nnlib/armeabi-v7a/libhexagon_controller.so differ diff --git a/third_party/nnlib/hexagon_nn.h b/third_party/nnlib/hexagon_nn.h index d225d6b64f37258c10db110d0b434e4a76299829..cd371c4d2d5e632342c8731a2baa7409b6253335 100644 --- a/third_party/nnlib/hexagon_nn.h +++ b/third_party/nnlib/hexagon_nn.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. + * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted (subject to the limitations in the @@ -87,13 +87,15 @@ struct hexagon_nn_output { typedef struct hexagon_nn_perfinfo hexagon_nn_perfinfo; struct hexagon_nn_perfinfo { unsigned int node_id; - unsigned int node_type; unsigned int executions; - unsigned int unused; unsigned int counter_lo; unsigned int counter_hi; }; typedef int hexagon_nn_nn_id; +typedef struct hexagon_nn_initinfo hexagon_nn_initinfo; +struct hexagon_nn_initinfo { + int priority; +}; enum hexagon_nn_padding_type { NN_PAD_NA, NN_PAD_SAME, @@ -133,7 +135,47 @@ struct hexagon_nn_tensordef { unsigned int data_valid_len; unsigned int unused; }; +enum hexagon_nn_execute_result { + NN_EXECUTE_SUCCESS, + NN_EXECUTE_ERROR, + NN_EXECUTE_BUFFER_SIZE_ERROR, + _32BIT_PLACEHOLDER_hexagon_nn_execute_result = 0x7fffffff +}; +typedef enum hexagon_nn_execute_result hexagon_nn_execute_result; +typedef struct hexagon_nn_execute_info hexagon_nn_execute_info; +struct hexagon_nn_execute_info { + hexagon_nn_execute_result result; + unsigned char* extraInfo; + int extraInfoLen; + unsigned int extraInfoValidLen; +}; +enum hexagon_nn_option_type { + NN_OPTION_NOSUCHOPTION, + NN_OPTION_SCALAR_THREADS, + NN_OPTION_HVX_THREADS, + NN_OPTION_VTCM_REQ, + NN_OPTION_ENABLE_GRAPH_PRINT, + NN_OPTION_ENABLE_TENSOR_PRINT, + NN_OPTION_TENSOR_PRINT_FILTER, + NN_OPTION_HAP_MEM_GROW_SIZE, + NN_OPTION_ENABLE_CONST_PRINT, + NN_OPTION_LASTPLUSONE, + _32BIT_PLACEHOLDER_hexagon_nn_option_type = 0x7fffffff +}; +typedef enum hexagon_nn_option_type hexagon_nn_option_type; +typedef struct hexagon_nn_uint_option hexagon_nn_uint_option; +struct hexagon_nn_uint_option { + unsigned int option_id; + unsigned int uint_value; +}; +typedef struct hexagon_nn_string_option hexagon_nn_string_option; +struct hexagon_nn_string_option { + unsigned int option_id; + char string_data[256]; +}; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_config)(void) __QAIC_HEADER_ATTRIBUTE; +__QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_config_with_options)(const hexagon_nn_uint_option* uint_options, int uint_optionsLen, const hexagon_nn_string_option* string_options, int string_optionsLen) __QAIC_HEADER_ATTRIBUTE; +__QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_graph_config)(hexagon_nn_nn_id id, const hexagon_nn_uint_option* uint_options, int uint_optionsLen, const hexagon_nn_string_option* string_options, int string_optionsLen) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_get_dsp_offset)(unsigned int* libhexagon_addr, unsigned int* fastrpc_shell_addr) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_init)(hexagon_nn_nn_id* g) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_set_debug_level)(hexagon_nn_nn_id id, int level) __QAIC_HEADER_ATTRIBUTE; @@ -143,26 +185,12 @@ __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_append_node)(hexagon_nn_nn_id __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_append_const_node)(hexagon_nn_nn_id id, unsigned int node_id, unsigned int batches, unsigned int height, unsigned int width, unsigned int depth, const unsigned char* data, int dataLen) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_append_empty_const_node)(hexagon_nn_nn_id id, unsigned int node_id, unsigned int batches, unsigned int height, unsigned int width, unsigned int depth, unsigned int size) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_populate_const_node)(hexagon_nn_nn_id id, unsigned int node_id, const unsigned char* data, int dataLen, unsigned int target_offset) __QAIC_HEADER_ATTRIBUTE; -typedef struct hexagon_nn_op_node hexagon_nn_op_node; -struct hexagon_nn_op_node { - unsigned int node_id; - unsigned int operation; - hexagon_nn_padding_type padding; - hexagon_nn_input* inputs; - int inputsLen; - hexagon_nn_output* outputs; - int outputsLen; -}; -typedef struct hexagon_nn_const_node hexagon_nn_const_node; -struct hexagon_nn_const_node { - unsigned int node_id; - hexagon_nn_tensordef tensor; -}; -__QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_append_node_list)(hexagon_nn_nn_id id, const hexagon_nn_op_node* ops, int opsLen) __QAIC_HEADER_ATTRIBUTE; -__QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_append_const_node_list)(hexagon_nn_nn_id id, const hexagon_nn_const_node* consts, int constsLen) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_prepare)(hexagon_nn_nn_id id) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_execute)(hexagon_nn_nn_id id, unsigned int batches_in, unsigned int height_in, unsigned int width_in, unsigned int depth_in, const unsigned char* data_in, int data_inLen, unsigned int* batches_out, unsigned int* height_out, unsigned int* width_out, unsigned int* depth_out, unsigned char* data_out, int data_outLen, unsigned int* data_len_out) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_teardown)(hexagon_nn_nn_id id) __QAIC_HEADER_ATTRIBUTE; +__QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_variable_read)(hexagon_nn_nn_id id, unsigned int node_id, int output_index, unsigned int* batches_out, unsigned int* height_out, unsigned int* width_out, unsigned int* depth_out, unsigned char* data_out, int data_outLen, unsigned int* data_len_out) __QAIC_HEADER_ATTRIBUTE; +__QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_variable_write)(hexagon_nn_nn_id id, unsigned int node_id, int output_index, unsigned int batches, unsigned int height, unsigned int width, unsigned int depth, const unsigned char* data_in, int data_inLen) __QAIC_HEADER_ATTRIBUTE; +__QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_variable_write_flat)(hexagon_nn_nn_id id, unsigned int node_id, int output_index, const unsigned char* data_in, int data_inLen) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_set_powersave_level)(unsigned int level) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_set_powersave_details)(hexagon_nn_corner_type corner, hexagon_nn_dcvs_type dcvs, unsigned int latency) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_set_clocks)(hexagon_nn_corner_type corner, hexagon_nn_dcvs_type dcvs, unsigned int latency) __QAIC_HEADER_ATTRIBUTE; @@ -173,10 +201,19 @@ __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_last_execution_cycles)(hexagon __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_version)(int* ver) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_op_name_to_id)(const char* name, unsigned int* node_id) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_op_id_to_name)(unsigned int node_id, char* name, int nameLen) __QAIC_HEADER_ATTRIBUTE; +__QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_get_num_nodes_in_graph)(hexagon_nn_nn_id id, unsigned int* num_nodes) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_disable_dcvs)(void) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_GetHexagonBinaryVersion)(int* ver) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_PrintLog)(const unsigned char* buf, int bufLen) __QAIC_HEADER_ATTRIBUTE; __QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_execute_new)(hexagon_nn_nn_id id, const hexagon_nn_tensordef* inputs, int inputsLen, hexagon_nn_tensordef* outputs, int outputsLen) __QAIC_HEADER_ATTRIBUTE; +__QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_execute_with_info)(hexagon_nn_nn_id id, const hexagon_nn_tensordef* inputs, int inputsLen, hexagon_nn_tensordef* outputs, int outputsLen, hexagon_nn_execute_info* execute_info) __QAIC_HEADER_ATTRIBUTE; +__QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_init_with_info)(hexagon_nn_nn_id* g, const hexagon_nn_initinfo* info) __QAIC_HEADER_ATTRIBUTE; +__QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_get_nodetype)(hexagon_nn_nn_id graph_id, hexagon_nn_nn_id node_id, unsigned int* node_type) __QAIC_HEADER_ATTRIBUTE; +__QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_multi_execution_cycles)(hexagon_nn_nn_id id, unsigned int* cycles_lo, unsigned int* cycles_hi) __QAIC_HEADER_ATTRIBUTE; +__QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_get_power)(int type) __QAIC_HEADER_ATTRIBUTE; +__QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_set_graph_option)(hexagon_nn_nn_id id, const char* name, int value) __QAIC_HEADER_ATTRIBUTE; +__QAIC_HEADER_EXPORT int __QAIC_HEADER(hexagon_nn_populate_graph)(hexagon_nn_nn_id id, const unsigned char* graph_data, int graph_dataLen) __QAIC_HEADER_ATTRIBUTE; + #ifdef __cplusplus } #endif diff --git a/third_party/nnlib/hexnn_dsp_controller.h b/third_party/nnlib/hexnn_dsp_controller.h new file mode 100644 index 0000000000000000000000000000000000000000..671a6c68a13889a7179acad5f709f49dad68e292 --- /dev/null +++ b/third_party/nnlib/hexnn_dsp_controller.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted (subject to the limitations in the + * disclaimer below) provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * * Neither the name of The Linux Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE + * GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER + * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN + * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef THIRD_PARTY_NNLIB_HEXNN_DSP_CONTROLLER_H_ +#define THIRD_PARTY_NNLIB_HEXNN_DSP_CONTROLLER_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +int hexnn_controller_request_unsigned_pd(); + +int hexnn_controller_init(); + +int hexnn_controller_deinit(); + +#ifdef __cplusplus +} +#endif + +#endif // THIRD_PARTY_NNLIB_HEXNN_DSP_CONTROLLER_H_ diff --git a/third_party/nnlib/license.txt b/third_party/nnlib/license.txt index d5c3aa96d5b6e1b3e85312f606539066a4ce6781..624e16e8fbf1c44d7a67692527b7e4b9d727e665 100644 --- a/third_party/nnlib/license.txt +++ b/third_party/nnlib/license.txt @@ -1,6 +1,6 @@ /* - * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. + * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted (subject to the limitations in the diff --git a/third_party/nnlib/ops.h b/third_party/nnlib/ops.h index 4aedd25869a5f3fae4daac2af905e5a4f8038931..252171df5ca5790aa4dc9ef01bcaa8104f71276b 100644 --- a/third_party/nnlib/ops.h +++ b/third_party/nnlib/ops.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. + * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted (subject to the limitations in the