From 209f1cb38bf13f1e7152b1e6ac1b8d592c770bd1 Mon Sep 17 00:00:00 2001 From: yejianwu Date: Thu, 12 Jul 2018 15:10:37 +0800 Subject: [PATCH] fix targets circular dependencies --- mace/BUILD | 4 +- mace/core/net.cc | 17 ++-- mace/core/net.h | 10 +-- mace/core/operator.cc | 102 +-------------------- mace/core/operator.h | 8 +- mace/core/registry.h | 1 - mace/libmace/BUILD | 36 ++++++++ mace/{core => libmace}/mace.cc | 4 +- mace/{core => libmace}/mace_runtime.cc | 0 mace/ops/BUILD | 1 - mace/ops/activation.cc | 2 +- mace/ops/addn.cc | 2 +- mace/ops/argmax.cc | 2 +- mace/ops/batch_norm.cc | 2 +- mace/ops/batch_to_space.cc | 2 +- mace/ops/bias_add.cc | 2 +- mace/ops/buffer_to_image.cc | 2 +- mace/ops/cast.cc | 2 +- mace/ops/channel_shuffle.cc | 2 +- mace/ops/concat.cc | 2 +- mace/ops/conv_2d.cc | 2 +- mace/ops/core_test.cc | 2 +- mace/ops/deconv_2d.cc | 2 +- mace/ops/depth_to_space.cc | 2 +- mace/ops/depthwise_conv2d.cc | 2 +- mace/ops/eltwise.cc | 2 +- mace/ops/folded_batch_norm.cc | 2 +- mace/ops/fully_connected.cc | 2 +- mace/ops/gather.cc | 2 +- mace/ops/identity.cc | 2 +- mace/ops/image_to_buffer.cc | 2 +- mace/ops/local_response_norm.cc | 2 +- mace/ops/matmul.cc | 2 +- mace/ops/ops_register.cc | 118 +++++++++++++++++++++++++ mace/ops/ops_register.h | 30 +++++++ mace/ops/ops_test_util.h | 4 +- mace/ops/pad.cc | 2 +- mace/ops/pooling.cc | 2 +- mace/ops/proposal.cc | 2 +- mace/ops/quantize.cc | 6 +- mace/ops/reduce_mean.cc | 2 +- mace/ops/reshape.cc | 2 +- mace/ops/resize_bilinear.cc | 2 +- mace/ops/shape.cc | 2 +- mace/ops/slice.cc | 2 +- mace/ops/softmax.cc | 2 +- mace/ops/space_to_batch.cc | 2 +- mace/ops/space_to_depth.cc | 2 +- mace/ops/squeeze.cc | 2 +- mace/ops/stack.cc | 2 +- mace/ops/strided_slice.cc | 2 +- mace/ops/transpose.cc | 2 +- mace/ops/winograd_inverse_transform.cc | 2 +- mace/ops/winograd_transform.cc | 2 +- mace/tools/validation/BUILD | 2 +- 55 files changed, 256 insertions(+), 167 deletions(-) create mode 100644 mace/libmace/BUILD rename mace/{core => libmace}/mace.cc (99%) rename mace/{core => libmace}/mace_runtime.cc (100%) create mode 100644 mace/ops/ops_register.cc create mode 100644 mace/ops/ops_register.h diff --git a/mace/BUILD b/mace/BUILD index c1ad7111..70d33ab2 100644 --- a/mace/BUILD +++ b/mace/BUILD @@ -63,7 +63,7 @@ cc_binary( linkstatic = 0, deps = [ ":mace_version_script.lds", - "//mace/ops", + "//mace/libmace", ], ) @@ -81,6 +81,7 @@ genrule( "//mace/core", "//mace/kernels", "//mace/ops", + "//mace/libmace", "//mace/utils", "//mace/proto:mace_cc", "@com_google_protobuf//:protobuf_lite", @@ -93,6 +94,7 @@ genrule( "$(locations //mace/core:core) " + "$(locations //mace/kernels:kernels) " + "$(locations //mace/ops:ops) " + + "$(locations //mace/libmace:libmace) " + "$(locations //mace/utils:utils) " + "$(locations //mace/proto:mace_cc) " + "$(locations @com_google_protobuf//:protobuf_lite) " + diff --git a/mace/core/net.cc b/mace/core/net.cc index 2f570319..6d8a751d 100644 --- a/mace/core/net.cc +++ b/mace/core/net.cc @@ -22,7 +22,7 @@ namespace mace { -NetBase::NetBase(const std::shared_ptr op_registry, +NetBase::NetBase(const std::shared_ptr op_registry, const std::shared_ptr net_def, Workspace *ws, DeviceType type) @@ -31,11 +31,12 @@ NetBase::NetBase(const std::shared_ptr op_registry, MACE_UNUSED(type); } -SerialNet::SerialNet(const std::shared_ptr op_registry, - const std::shared_ptr net_def, - Workspace *ws, - DeviceType type, - const NetMode mode) +SerialNet::SerialNet( + const std::shared_ptr op_registry, + const std::shared_ptr net_def, + Workspace *ws, + DeviceType type, + const NetMode mode) : NetBase(op_registry, net_def, ws, type), device_type_(type) { MACE_LATENCY_LOGGER(1, "Constructing SerialNet ", net_def->name()); for (int idx = 0; idx < net_def->op_size(); ++idx) { @@ -130,7 +131,7 @@ MaceStatus SerialNet::Run(RunMetadata *run_metadata) { } std::unique_ptr CreateNet( - const std::shared_ptr op_registry, + const std::shared_ptr op_registry, const NetDef &net_def, Workspace *ws, DeviceType type, @@ -140,7 +141,7 @@ std::unique_ptr CreateNet( } std::unique_ptr CreateNet( - const std::shared_ptr op_registry, + const std::shared_ptr op_registry, const std::shared_ptr net_def, Workspace *ws, DeviceType type, diff --git a/mace/core/net.h b/mace/core/net.h index e901188e..0cec4059 100644 --- a/mace/core/net.h +++ b/mace/core/net.h @@ -30,7 +30,7 @@ class Workspace; class NetBase { public: - NetBase(const std::shared_ptr op_registry, + NetBase(const std::shared_ptr op_registry, const std::shared_ptr net_def, Workspace *ws, DeviceType type); @@ -42,14 +42,14 @@ class NetBase { protected: std::string name_; - const std::shared_ptr op_registry_; + const std::shared_ptr op_registry_; MACE_DISABLE_COPY_AND_ASSIGN(NetBase); }; class SerialNet : public NetBase { public: - SerialNet(const std::shared_ptr op_registry, + SerialNet(const std::shared_ptr op_registry, const std::shared_ptr net_def, Workspace *ws, DeviceType type, @@ -65,13 +65,13 @@ class SerialNet : public NetBase { }; std::unique_ptr CreateNet( - const std::shared_ptr op_registry, + const std::shared_ptr op_registry, const NetDef &net_def, Workspace *ws, DeviceType type, const NetMode mode = NetMode::NORMAL); std::unique_ptr CreateNet( - const std::shared_ptr op_registry, + const std::shared_ptr op_registry, const std::shared_ptr net_def, Workspace *ws, DeviceType type, diff --git a/mace/core/operator.cc b/mace/core/operator.cc index 6389d117..90013d7f 100644 --- a/mace/core/operator.cc +++ b/mace/core/operator.cc @@ -50,7 +50,9 @@ const std::string OpKeyBuilder::Build() { return ss.str(); } -std::unique_ptr OperatorRegistry::CreateOperator( +OperatorRegistryBase::~OperatorRegistryBase() {} + +std::unique_ptr OperatorRegistryBase::CreateOperator( const OperatorDef &operator_def, Workspace *ws, DeviceType type, @@ -72,102 +74,4 @@ std::unique_ptr OperatorRegistry::CreateOperator( } } -namespace ops { -// Keep in lexicographical order -extern void Register_Activation(OperatorRegistry *op_registry); -extern void Register_AddN(OperatorRegistry *op_registry); -extern void Register_ArgMax(OperatorRegistry *op_registry); -extern void Register_BatchNorm(OperatorRegistry *op_registry); -extern void Register_BatchToSpaceND(OperatorRegistry *op_registry); -extern void Register_BiasAdd(OperatorRegistry *op_registry); -extern void Register_Cast(OperatorRegistry *op_registry); -extern void Register_ChannelShuffle(OperatorRegistry *op_registry); -extern void Register_Concat(OperatorRegistry *op_registry); -extern void Register_Conv2D(OperatorRegistry *op_registry); -extern void Register_Deconv2D(OperatorRegistry *op_registry); -extern void Register_DepthToSpace(OperatorRegistry *op_registry); -extern void Register_DepthwiseConv2d(OperatorRegistry *op_registry); -extern void Register_Dequantize(OperatorRegistry *op_registry); -extern void Register_Eltwise(OperatorRegistry *op_registry); -extern void Register_FoldedBatchNorm(OperatorRegistry *op_registry); -extern void Register_FullyConnected(OperatorRegistry *op_registry); -extern void Register_Gather(OperatorRegistry *op_registry); -extern void Register_Identity(OperatorRegistry *op_registry); -extern void Register_LocalResponseNorm(OperatorRegistry *op_registry); -extern void Register_MatMul(OperatorRegistry *op_registry); -extern void Register_Pad(OperatorRegistry *op_registry); -extern void Register_Pooling(OperatorRegistry *op_registry); -extern void Register_Proposal(OperatorRegistry *op_registry); -extern void Register_Quantize(OperatorRegistry *op_registry); -extern void Register_ReduceMean(OperatorRegistry *op_registry); -extern void Register_Requantize(OperatorRegistry *op_registry); -extern void Register_Reshape(OperatorRegistry *op_registry); -extern void Register_ResizeBilinear(OperatorRegistry *op_registry); -extern void Register_Shape(OperatorRegistry *op_registry); -extern void Register_Slice(OperatorRegistry *op_registry); -extern void Register_Softmax(OperatorRegistry *op_registry); -extern void Register_Stack(OperatorRegistry *op_registry); -extern void Register_StridedSlice(OperatorRegistry *op_registry); -extern void Register_SpaceToBatchND(OperatorRegistry *op_registry); -extern void Register_SpaceToDepth(OperatorRegistry *op_registry); -extern void Register_Squeeze(OperatorRegistry *op_registry); -extern void Register_Transpose(OperatorRegistry *op_registry); -extern void Register_WinogradInverseTransform(OperatorRegistry *op_registry); -extern void Register_WinogradTransform(OperatorRegistry *op_registry); - -#ifdef MACE_ENABLE_OPENCL -extern void Register_BufferToImage(OperatorRegistry *op_registry); -extern void Register_ImageToBuffer(OperatorRegistry *op_registry); -#endif // MACE_ENABLE_OPENCL -} // namespace ops - -OperatorRegistry::OperatorRegistry() { - // Keep in lexicographical order - ops::Register_Activation(this); - ops::Register_AddN(this); - ops::Register_ArgMax(this); - ops::Register_BatchNorm(this); - ops::Register_BatchToSpaceND(this); - ops::Register_BiasAdd(this); - ops::Register_Cast(this); - ops::Register_ChannelShuffle(this); - ops::Register_Concat(this); - ops::Register_Conv2D(this); - ops::Register_Deconv2D(this); - ops::Register_DepthToSpace(this); - ops::Register_DepthwiseConv2d(this); - ops::Register_Dequantize(this); - ops::Register_Eltwise(this); - ops::Register_FoldedBatchNorm(this); - ops::Register_FullyConnected(this); - ops::Register_Gather(this); - ops::Register_Identity(this); - ops::Register_LocalResponseNorm(this); - ops::Register_MatMul(this); - ops::Register_Pad(this); - ops::Register_Pooling(this); - ops::Register_Proposal(this); - ops::Register_Quantize(this); - ops::Register_ReduceMean(this); - ops::Register_Requantize(this); - ops::Register_Reshape(this); - ops::Register_ResizeBilinear(this); - ops::Register_Shape(this); - ops::Register_Slice(this); - ops::Register_Softmax(this); - ops::Register_Stack(this); - ops::Register_StridedSlice(this); - ops::Register_SpaceToBatchND(this); - ops::Register_SpaceToDepth(this); - ops::Register_Squeeze(this); - ops::Register_Transpose(this); - ops::Register_WinogradInverseTransform(this); - ops::Register_WinogradTransform(this); - -#ifdef MACE_ENABLE_OPENCL - ops::Register_BufferToImage(this); - ops::Register_ImageToBuffer(this); -#endif // MACE_ENABLE_OPENCL -} - } // namespace mace diff --git a/mace/core/operator.h b/mace/core/operator.h index 3a2285d9..330f8002 100644 --- a/mace/core/operator.h +++ b/mace/core/operator.h @@ -163,12 +163,12 @@ OpKeyBuilder &OpKeyBuilder::TypeConstraint(const char *attr_name) { return this->TypeConstraint(attr_name, DataTypeToEnum::value); } -class OperatorRegistry { +class OperatorRegistryBase { public: typedef Registry RegistryType; - OperatorRegistry(); - ~OperatorRegistry() = default; + OperatorRegistryBase() = default; + virtual ~OperatorRegistryBase(); RegistryType *registry() { return ®istry_; } std::unique_ptr CreateOperator(const OperatorDef &operator_def, Workspace *ws, @@ -177,7 +177,7 @@ class OperatorRegistry { private: RegistryType registry_; - MACE_DISABLE_COPY_AND_ASSIGN(OperatorRegistry); + MACE_DISABLE_COPY_AND_ASSIGN(OperatorRegistryBase); }; MACE_DECLARE_REGISTRY(OpRegistry, diff --git a/mace/core/registry.h b/mace/core/registry.h index 0cc7ebf5..277cabb3 100644 --- a/mace/core/registry.h +++ b/mace/core/registry.h @@ -78,7 +78,6 @@ class Registerer { #endif #define MACE_DECLARE_TYPED_REGISTRY(RegistryName, SrcType, ObjectType, ...) \ - Registry *RegistryName(); \ typedef Registerer \ Registerer##RegistryName; diff --git a/mace/libmace/BUILD b/mace/libmace/BUILD new file mode 100644 index 00000000..cbbf16a8 --- /dev/null +++ b/mace/libmace/BUILD @@ -0,0 +1,36 @@ +# Description: +# Mace libmace. +# +package( + default_visibility = ["//visibility:public"], +) + +licenses(["notice"]) # Apache 2.0 + +load("//mace:mace.bzl", "if_android", "if_neon_enabled", "if_openmp_enabled", "if_android_armv7", "if_hexagon_enabled") + +cc_library( + name = "libmace", + srcs = glob( + ["*.cc"], + ), + copts = [ + "-Werror", + "-Wextra", + ] + if_openmp_enabled(["-fopenmp"]) + if_neon_enabled([ + "-DMACE_ENABLE_NEON", + ]) + if_android_armv7([ + "-mfpu=neon", + ]) + if_android_armv7([ + "-mfloat-abi=softfp", + ]) + if_android([ + "-DMACE_ENABLE_OPENCL", + ]) + if_hexagon_enabled([ + "-DMACE_ENABLE_HEXAGON", + ]), + deps = [ + "//mace/public", + "//mace/ops", + ], + alwayslink = 1, +) diff --git a/mace/core/mace.cc b/mace/libmace/mace.cc similarity index 99% rename from mace/core/mace.cc rename to mace/libmace/mace.cc index db04fcc6..93518f85 100644 --- a/mace/core/mace.cc +++ b/mace/libmace/mace.cc @@ -21,7 +21,7 @@ #include #include "mace/core/net.h" -#include "mace/core/types.h" +#include "mace/ops/ops_register.h" #include "mace/public/mace.h" #ifdef MACE_ENABLE_OPENCL @@ -138,7 +138,7 @@ class MaceEngine::Impl { private: const unsigned char *model_data_; size_t model_data_size_; - std::shared_ptr op_registry_; + std::shared_ptr op_registry_; DeviceType device_type_; std::unique_ptr ws_; std::unique_ptr net_; diff --git a/mace/core/mace_runtime.cc b/mace/libmace/mace_runtime.cc similarity index 100% rename from mace/core/mace_runtime.cc rename to mace/libmace/mace_runtime.cc diff --git a/mace/ops/BUILD b/mace/ops/BUILD index 2bfc0b3d..f349b8b9 100644 --- a/mace/ops/BUILD +++ b/mace/ops/BUILD @@ -58,7 +58,6 @@ cc_library( deps = [ "//mace/kernels", ], - alwayslink = 1, ) cc_test( diff --git a/mace/ops/activation.cc b/mace/ops/activation.cc index 37fd8117..44b2ba90 100644 --- a/mace/ops/activation.cc +++ b/mace/ops/activation.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Activation(OperatorRegistry *op_registry) { +void Register_Activation(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Activation") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/addn.cc b/mace/ops/addn.cc index 6bfc4c09..a30cba48 100644 --- a/mace/ops/addn.cc +++ b/mace/ops/addn.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_AddN(OperatorRegistry *op_registry) { +void Register_AddN(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("AddN") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/argmax.cc b/mace/ops/argmax.cc index 977cbbc6..e14b7bb8 100644 --- a/mace/ops/argmax.cc +++ b/mace/ops/argmax.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_ArgMax(OperatorRegistry *op_registry) { +void Register_ArgMax(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("ArgMax") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/batch_norm.cc b/mace/ops/batch_norm.cc index fe635592..c1a6c0cf 100644 --- a/mace/ops/batch_norm.cc +++ b/mace/ops/batch_norm.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_BatchNorm(OperatorRegistry *op_registry) { +void Register_BatchNorm(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("BatchNorm") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/batch_to_space.cc b/mace/ops/batch_to_space.cc index 50bc84ed..b0ffd66b 100644 --- a/mace/ops/batch_to_space.cc +++ b/mace/ops/batch_to_space.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_BatchToSpaceND(OperatorRegistry *op_registry) { +void Register_BatchToSpaceND(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("BatchToSpaceND") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/bias_add.cc b/mace/ops/bias_add.cc index deb67368..bf082cf9 100644 --- a/mace/ops/bias_add.cc +++ b/mace/ops/bias_add.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_BiasAdd(OperatorRegistry *op_registry) { +void Register_BiasAdd(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("BiasAdd") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/buffer_to_image.cc b/mace/ops/buffer_to_image.cc index 04cb9b82..83569ba3 100644 --- a/mace/ops/buffer_to_image.cc +++ b/mace/ops/buffer_to_image.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_BufferToImage(OperatorRegistry *op_registry) { +void Register_BufferToImage(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("BufferToImage") .Device(DeviceType::GPU) .TypeConstraint("T") diff --git a/mace/ops/cast.cc b/mace/ops/cast.cc index 556a79f8..87abfdd4 100644 --- a/mace/ops/cast.cc +++ b/mace/ops/cast.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Cast(OperatorRegistry *op_registry) { +void Register_Cast(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Cast") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/channel_shuffle.cc b/mace/ops/channel_shuffle.cc index f3311be6..e13ac92a 100644 --- a/mace/ops/channel_shuffle.cc +++ b/mace/ops/channel_shuffle.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_ChannelShuffle(OperatorRegistry *op_registry) { +void Register_ChannelShuffle(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("ChannelShuffle") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/concat.cc b/mace/ops/concat.cc index bf82f796..c281f0cc 100644 --- a/mace/ops/concat.cc +++ b/mace/ops/concat.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Concat(OperatorRegistry *op_registry) { +void Register_Concat(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Concat") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/conv_2d.cc b/mace/ops/conv_2d.cc index 29d3ac71..4377afb0 100644 --- a/mace/ops/conv_2d.cc +++ b/mace/ops/conv_2d.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Conv2D(OperatorRegistry *op_registry) { +void Register_Conv2D(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Conv2D") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/core_test.cc b/mace/ops/core_test.cc index d471a0f8..e7d256f1 100644 --- a/mace/ops/core_test.cc +++ b/mace/ops/core_test.cc @@ -51,7 +51,7 @@ TEST(CoreTest, INIT_MODE) { for (auto &op_def : op_defs) { net_def.add_op()->CopyFrom(op_def); } - std::shared_ptr op_registry(new OperatorRegistry()); + std::shared_ptr op_registry(new OperatorRegistryBase()); auto net = CreateNet(op_registry, net_def, &ws, DeviceType::GPU, NetMode::INIT); net->Run(); diff --git a/mace/ops/deconv_2d.cc b/mace/ops/deconv_2d.cc index 342e27aa..af0d7232 100644 --- a/mace/ops/deconv_2d.cc +++ b/mace/ops/deconv_2d.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Deconv2D(OperatorRegistry *op_registry) { +void Register_Deconv2D(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Deconv2D") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/depth_to_space.cc b/mace/ops/depth_to_space.cc index 682a6770..0da2bb00 100644 --- a/mace/ops/depth_to_space.cc +++ b/mace/ops/depth_to_space.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_DepthToSpace(OperatorRegistry *op_registry) { +void Register_DepthToSpace(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("DepthToSpace") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/depthwise_conv2d.cc b/mace/ops/depthwise_conv2d.cc index cdb53595..66396f60 100644 --- a/mace/ops/depthwise_conv2d.cc +++ b/mace/ops/depthwise_conv2d.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_DepthwiseConv2d(OperatorRegistry *op_registry) { +void Register_DepthwiseConv2d(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("DepthwiseConv2d") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/eltwise.cc b/mace/ops/eltwise.cc index 81050b16..b3d46025 100644 --- a/mace/ops/eltwise.cc +++ b/mace/ops/eltwise.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Eltwise(OperatorRegistry *op_registry) { +void Register_Eltwise(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Eltwise") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/folded_batch_norm.cc b/mace/ops/folded_batch_norm.cc index ace0b857..f7600750 100644 --- a/mace/ops/folded_batch_norm.cc +++ b/mace/ops/folded_batch_norm.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_FoldedBatchNorm(OperatorRegistry *op_registry) { +void Register_FoldedBatchNorm(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("FoldedBatchNorm") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/fully_connected.cc b/mace/ops/fully_connected.cc index 3147a598..5ad8c466 100644 --- a/mace/ops/fully_connected.cc +++ b/mace/ops/fully_connected.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_FullyConnected(OperatorRegistry *op_registry) { +void Register_FullyConnected(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("FullyConnected") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/gather.cc b/mace/ops/gather.cc index bc9687cf..12891c5d 100644 --- a/mace/ops/gather.cc +++ b/mace/ops/gather.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Gather(OperatorRegistry *op_registry) { +void Register_Gather(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Gather") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/identity.cc b/mace/ops/identity.cc index 628bfd2d..61a33356 100644 --- a/mace/ops/identity.cc +++ b/mace/ops/identity.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Identity(OperatorRegistry *op_registry) { +void Register_Identity(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Identity") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/image_to_buffer.cc b/mace/ops/image_to_buffer.cc index 168f75b6..cc60d146 100644 --- a/mace/ops/image_to_buffer.cc +++ b/mace/ops/image_to_buffer.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_ImageToBuffer(OperatorRegistry *op_registry) { +void Register_ImageToBuffer(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("ImageToBuffer") .Device(DeviceType::GPU) .TypeConstraint("T") diff --git a/mace/ops/local_response_norm.cc b/mace/ops/local_response_norm.cc index 8517c014..f3e19970 100644 --- a/mace/ops/local_response_norm.cc +++ b/mace/ops/local_response_norm.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_LocalResponseNorm(OperatorRegistry *op_registry) { +void Register_LocalResponseNorm(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("LocalResponseNorm") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/matmul.cc b/mace/ops/matmul.cc index fa342659..e1c5932c 100644 --- a/mace/ops/matmul.cc +++ b/mace/ops/matmul.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_MatMul(OperatorRegistry *op_registry) { +void Register_MatMul(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("MatMul") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/ops_register.cc b/mace/ops/ops_register.cc new file mode 100644 index 00000000..61ecb5af --- /dev/null +++ b/mace/ops/ops_register.cc @@ -0,0 +1,118 @@ +// Copyright 2018 Xiaomi, Inc. All rights reserved. +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#include "mace/ops/ops_register.h" + +namespace mace { + +namespace ops { +// Keep in lexicographical order +extern void Register_Activation(OperatorRegistryBase *op_registry); +extern void Register_AddN(OperatorRegistryBase *op_registry); +extern void Register_ArgMax(OperatorRegistryBase *op_registry); +extern void Register_BatchNorm(OperatorRegistryBase *op_registry); +extern void Register_BatchToSpaceND(OperatorRegistryBase *op_registry); +extern void Register_BiasAdd(OperatorRegistryBase *op_registry); +extern void Register_Cast(OperatorRegistryBase *op_registry); +extern void Register_ChannelShuffle(OperatorRegistryBase *op_registry); +extern void Register_Concat(OperatorRegistryBase *op_registry); +extern void Register_Conv2D(OperatorRegistryBase *op_registry); +extern void Register_Deconv2D(OperatorRegistryBase *op_registry); +extern void Register_DepthToSpace(OperatorRegistryBase *op_registry); +extern void Register_DepthwiseConv2d(OperatorRegistryBase *op_registry); +extern void Register_Dequantize(OperatorRegistryBase *op_registry); +extern void Register_Eltwise(OperatorRegistryBase *op_registry); +extern void Register_FoldedBatchNorm(OperatorRegistryBase *op_registry); +extern void Register_FullyConnected(OperatorRegistryBase *op_registry); +extern void Register_Gather(OperatorRegistryBase *op_registry); +extern void Register_Identity(OperatorRegistryBase *op_registry); +extern void Register_LocalResponseNorm(OperatorRegistryBase *op_registry); +extern void Register_MatMul(OperatorRegistryBase *op_registry); +extern void Register_Pad(OperatorRegistryBase *op_registry); +extern void Register_Pooling(OperatorRegistryBase *op_registry); +extern void Register_Proposal(OperatorRegistryBase *op_registry); +extern void Register_Quantize(OperatorRegistryBase *op_registry); +extern void Register_ReduceMean(OperatorRegistryBase *op_registry); +extern void Register_Requantize(OperatorRegistryBase *op_registry); +extern void Register_Reshape(OperatorRegistryBase *op_registry); +extern void Register_ResizeBilinear(OperatorRegistryBase *op_registry); +extern void Register_Shape(OperatorRegistryBase *op_registry); +extern void Register_Slice(OperatorRegistryBase *op_registry); +extern void Register_Softmax(OperatorRegistryBase *op_registry); +extern void Register_Stack(OperatorRegistryBase *op_registry); +extern void Register_StridedSlice(OperatorRegistryBase *op_registry); +extern void Register_SpaceToBatchND(OperatorRegistryBase *op_registry); +extern void Register_SpaceToDepth(OperatorRegistryBase *op_registry); +extern void Register_Squeeze(OperatorRegistryBase *op_registry); +extern void Register_Transpose(OperatorRegistryBase *op_registry); +extern void Register_WinogradInverseTransform(OperatorRegistryBase *op_registry); // NOLINT(whitespace/line_length) +extern void Register_WinogradTransform(OperatorRegistryBase *op_registry); + +#ifdef MACE_ENABLE_OPENCL +extern void Register_BufferToImage(OperatorRegistryBase *op_registry); +extern void Register_ImageToBuffer(OperatorRegistryBase *op_registry); +#endif // MACE_ENABLE_OPENCL +} // namespace ops + + +OperatorRegistry::OperatorRegistry() : OperatorRegistryBase() { + // Keep in lexicographical order + ops::Register_Activation(this); + ops::Register_AddN(this); + ops::Register_ArgMax(this); + ops::Register_BatchNorm(this); + ops::Register_BatchToSpaceND(this); + ops::Register_BiasAdd(this); + ops::Register_Cast(this); + ops::Register_ChannelShuffle(this); + ops::Register_Concat(this); + ops::Register_Conv2D(this); + ops::Register_Deconv2D(this); + ops::Register_DepthToSpace(this); + ops::Register_DepthwiseConv2d(this); + ops::Register_Dequantize(this); + ops::Register_Eltwise(this); + ops::Register_FoldedBatchNorm(this); + ops::Register_FullyConnected(this); + ops::Register_Gather(this); + ops::Register_Identity(this); + ops::Register_LocalResponseNorm(this); + ops::Register_MatMul(this); + ops::Register_Pad(this); + ops::Register_Pooling(this); + ops::Register_Proposal(this); + ops::Register_Quantize(this); + ops::Register_ReduceMean(this); + ops::Register_Requantize(this); + ops::Register_Reshape(this); + ops::Register_ResizeBilinear(this); + ops::Register_Shape(this); + ops::Register_Slice(this); + ops::Register_Softmax(this); + ops::Register_Stack(this); + ops::Register_StridedSlice(this); + ops::Register_SpaceToBatchND(this); + ops::Register_SpaceToDepth(this); + ops::Register_Squeeze(this); + ops::Register_Transpose(this); + ops::Register_WinogradInverseTransform(this); + ops::Register_WinogradTransform(this); + +#ifdef MACE_ENABLE_OPENCL + ops::Register_BufferToImage(this); + ops::Register_ImageToBuffer(this); +#endif // MACE_ENABLE_OPENCL +} + +} // namespace mace diff --git a/mace/ops/ops_register.h b/mace/ops/ops_register.h new file mode 100644 index 00000000..9369fde5 --- /dev/null +++ b/mace/ops/ops_register.h @@ -0,0 +1,30 @@ +// Copyright 2018 Xiaomi, Inc. All rights reserved. +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#ifndef MACE_OPS_OPS_REGISTER_H_ +#define MACE_OPS_OPS_REGISTER_H_ + +#include "mace/core/operator.h" + +namespace mace { + +class OperatorRegistry : public OperatorRegistryBase { + public: + OperatorRegistry(); + ~OperatorRegistry() = default; +}; + +} // namespace mace + +#endif // MACE_OPS_OPS_REGISTER_H_ diff --git a/mace/ops/ops_test_util.h b/mace/ops/ops_test_util.h index e348ba1f..f34797c9 100644 --- a/mace/ops/ops_test_util.h +++ b/mace/ops/ops_test_util.h @@ -110,7 +110,7 @@ class OpDefBuilder { class OpsTestNet { public: - OpsTestNet() : op_registry_(new OperatorRegistry()) {} + OpsTestNet() : op_registry_(new OperatorRegistryBase()) {} template void AddInputFromArray(const std::string &name, @@ -397,7 +397,7 @@ class OpsTestNet { } public: - std::shared_ptr op_registry_; + std::shared_ptr op_registry_; Workspace ws_; std::vector op_defs_; std::unique_ptr net_; diff --git a/mace/ops/pad.cc b/mace/ops/pad.cc index 6875de6a..e6d468b2 100644 --- a/mace/ops/pad.cc +++ b/mace/ops/pad.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Pad(OperatorRegistry *op_registry) { +void Register_Pad(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Pad") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/pooling.cc b/mace/ops/pooling.cc index 25cd44aa..0b673b51 100644 --- a/mace/ops/pooling.cc +++ b/mace/ops/pooling.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Pooling(OperatorRegistry *op_registry) { +void Register_Pooling(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Pooling") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/proposal.cc b/mace/ops/proposal.cc index 4558bbb3..2b75eeaf 100644 --- a/mace/ops/proposal.cc +++ b/mace/ops/proposal.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Proposal(OperatorRegistry *op_registry) { +void Register_Proposal(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Proposal") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/quantize.cc b/mace/ops/quantize.cc index dad9610d..81a51fce 100644 --- a/mace/ops/quantize.cc +++ b/mace/ops/quantize.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Quantize(OperatorRegistry *op_registry) { +void Register_Quantize(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Quantize") .Device(DeviceType::CPU) .TypeConstraint("T") @@ -25,7 +25,7 @@ void Register_Quantize(OperatorRegistry *op_registry) { QuantizeOp); } -void Register_Dequantize(OperatorRegistry *op_registry) { +void Register_Dequantize(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Dequantize") .Device(DeviceType::CPU) .TypeConstraint("T") @@ -33,7 +33,7 @@ void Register_Dequantize(OperatorRegistry *op_registry) { DequantizeOp); } -void Register_Requantize(OperatorRegistry *op_registry) { +void Register_Requantize(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Requantize") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/reduce_mean.cc b/mace/ops/reduce_mean.cc index 4f181a77..ee4d1716 100644 --- a/mace/ops/reduce_mean.cc +++ b/mace/ops/reduce_mean.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_ReduceMean(OperatorRegistry *op_registry) { +void Register_ReduceMean(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("ReduceMean") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/reshape.cc b/mace/ops/reshape.cc index aefc6337..2831aeba 100644 --- a/mace/ops/reshape.cc +++ b/mace/ops/reshape.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Reshape(OperatorRegistry *op_registry) { +void Register_Reshape(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Reshape") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/resize_bilinear.cc b/mace/ops/resize_bilinear.cc index e18d7038..82bbfd0a 100644 --- a/mace/ops/resize_bilinear.cc +++ b/mace/ops/resize_bilinear.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_ResizeBilinear(OperatorRegistry *op_registry) { +void Register_ResizeBilinear(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("ResizeBilinear") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/shape.cc b/mace/ops/shape.cc index c65586e6..7014aa8d 100644 --- a/mace/ops/shape.cc +++ b/mace/ops/shape.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Shape(OperatorRegistry *op_registry) { +void Register_Shape(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Shape") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/slice.cc b/mace/ops/slice.cc index a9b1c9bd..b6bf4b24 100644 --- a/mace/ops/slice.cc +++ b/mace/ops/slice.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Slice(OperatorRegistry *op_registry) { +void Register_Slice(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Slice") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/softmax.cc b/mace/ops/softmax.cc index eff2b415..6c1a895b 100644 --- a/mace/ops/softmax.cc +++ b/mace/ops/softmax.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Softmax(OperatorRegistry *op_registry) { +void Register_Softmax(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Softmax") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/space_to_batch.cc b/mace/ops/space_to_batch.cc index ca905e78..e0291172 100644 --- a/mace/ops/space_to_batch.cc +++ b/mace/ops/space_to_batch.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_SpaceToBatchND(OperatorRegistry *op_registry) { +void Register_SpaceToBatchND(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("SpaceToBatchND") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/space_to_depth.cc b/mace/ops/space_to_depth.cc index 18072265..67b520f6 100644 --- a/mace/ops/space_to_depth.cc +++ b/mace/ops/space_to_depth.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_SpaceToDepth(OperatorRegistry *op_registry) { +void Register_SpaceToDepth(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("SpaceToDepth") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/squeeze.cc b/mace/ops/squeeze.cc index e917936f..e30a87bd 100644 --- a/mace/ops/squeeze.cc +++ b/mace/ops/squeeze.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Squeeze(OperatorRegistry *op_registry) { +void Register_Squeeze(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Squeeze") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/stack.cc b/mace/ops/stack.cc index 992ee408..968f859d 100644 --- a/mace/ops/stack.cc +++ b/mace/ops/stack.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Stack(OperatorRegistry *op_registry) { +void Register_Stack(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Stack") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/strided_slice.cc b/mace/ops/strided_slice.cc index 84cf7883..b449be03 100644 --- a/mace/ops/strided_slice.cc +++ b/mace/ops/strided_slice.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_StridedSlice(OperatorRegistry *op_registry) { +void Register_StridedSlice(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("StridedSlice") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/transpose.cc b/mace/ops/transpose.cc index a0c726af..73dcaf7b 100644 --- a/mace/ops/transpose.cc +++ b/mace/ops/transpose.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_Transpose(OperatorRegistry *op_registry) { +void Register_Transpose(OperatorRegistryBase *op_registry) { MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("Transpose") .Device(DeviceType::CPU) .TypeConstraint("T") diff --git a/mace/ops/winograd_inverse_transform.cc b/mace/ops/winograd_inverse_transform.cc index f84b69a2..62e86248 100644 --- a/mace/ops/winograd_inverse_transform.cc +++ b/mace/ops/winograd_inverse_transform.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_WinogradInverseTransform(OperatorRegistry *op_registry) { +void Register_WinogradInverseTransform(OperatorRegistryBase *op_registry) { #ifdef MACE_ENABLE_OPENCL MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("WinogradInverseTransform") .Device(DeviceType::GPU) diff --git a/mace/ops/winograd_transform.cc b/mace/ops/winograd_transform.cc index 24f82255..a4dab0ec 100644 --- a/mace/ops/winograd_transform.cc +++ b/mace/ops/winograd_transform.cc @@ -17,7 +17,7 @@ namespace mace { namespace ops { -void Register_WinogradTransform(OperatorRegistry *op_registry) { +void Register_WinogradTransform(OperatorRegistryBase *op_registry) { #ifdef MACE_ENABLE_OPENCL MACE_REGISTER_OPERATOR(op_registry, OpKeyBuilder("WinogradTransform") .Device(DeviceType::GPU) diff --git a/mace/tools/validation/BUILD b/mace/tools/validation/BUILD index a1ba419b..822bd2e9 100644 --- a/mace/tools/validation/BUILD +++ b/mace/tools/validation/BUILD @@ -16,7 +16,7 @@ cc_binary( "//external:gflags_nothreads", "//mace/codegen:generated_mace_engine_factory", "//mace/codegen:generated_models", - "//mace/ops:ops", + "//mace/libmace", ], ) -- GitLab