/* * Copyright (c) 2006-2018, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes * 2009-01-05 Bernard the first version * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode * 2013-05-13 aozima update for kehong-lingtai. * 2015-01-31 armink make sure the serial transmit complete in putc() * 2016-05-13 armink add DMA Rx mode * 2017-01-19 aubr.cool add interrupt Tx mode * 2017-04-13 aubr.cool correct Rx parity err */ #include "stm32f10x.h" #include "usart.h" #include "board.h" #include /* USART1 */ #define UART1_GPIO_TX GPIO_Pin_9 #define UART1_GPIO_RX GPIO_Pin_10 #define UART1_GPIO GPIOA /* USART2 */ #define UART2_GPIO_TX GPIO_Pin_2 #define UART2_GPIO_RX GPIO_Pin_3 #define UART2_GPIO GPIOA /* USART3_REMAP[1:0] = 00 */ #define UART3_GPIO_TX GPIO_Pin_10 #define UART3_GPIO_RX GPIO_Pin_11 #define UART3_GPIO GPIOB /* USART4 */ #define UART4_GPIO_TX GPIO_Pin_10 #define UART4_GPIO_RX GPIO_Pin_11 #define UART4_GPIO GPIOC /* STM32 uart driver */ struct stm32_uart { USART_TypeDef *uart_device; IRQn_Type irq; #ifdef RT_SERIAL_USING_DMA struct stm32_uart_dma { /* dma channel */ DMA_Channel_TypeDef *rx_ch; /* dma global flag */ uint32_t rx_gl_flag; /* dma irq channel */ uint8_t rx_irq_ch; /* setting receive len */ rt_size_t setting_recv_len; /* last receive index */ rt_size_t last_recv_index; } dma; #endif /* RT_SERIAL_USING_DMA */ }; #ifdef RT_SERIAL_USING_DMA static void DMA_Configuration(struct rt_serial_device *serial); #endif /* RT_SERIAL_USING_DMA */ static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg) { struct stm32_uart* uart; USART_InitTypeDef USART_InitStructure; RT_ASSERT(serial != RT_NULL); RT_ASSERT(cfg != RT_NULL); uart = (struct stm32_uart *)serial->parent.user_data; USART_InitStructure.USART_BaudRate = cfg->baud_rate; if (cfg->data_bits == DATA_BITS_8){ USART_InitStructure.USART_WordLength = USART_WordLength_8b; } else if (cfg->data_bits == DATA_BITS_9) { USART_InitStructure.USART_WordLength = USART_WordLength_9b; } if (cfg->stop_bits == STOP_BITS_1){ USART_InitStructure.USART_StopBits = USART_StopBits_1; } else if (cfg->stop_bits == STOP_BITS_2){ USART_InitStructure.USART_StopBits = USART_StopBits_2; } if (cfg->parity == PARITY_NONE){ USART_InitStructure.USART_Parity = USART_Parity_No; } else if (cfg->parity == PARITY_ODD) { USART_InitStructure.USART_Parity = USART_Parity_Odd; } else if (cfg->parity == PARITY_EVEN) { USART_InitStructure.USART_Parity = USART_Parity_Even; } USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; USART_Init(uart->uart_device, &USART_InitStructure); /* Enable USART */ USART_Cmd(uart->uart_device, ENABLE); return RT_EOK; } static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg) { struct stm32_uart* uart; RT_ASSERT(serial != RT_NULL); uart = (struct stm32_uart *)serial->parent.user_data; switch (cmd) { /* disable interrupt */ case RT_DEVICE_CTRL_CLR_INT: /* disable rx irq */ UART_DISABLE_IRQ(uart->irq); /* disable interrupt */ USART_ITConfig(uart->uart_device, USART_IT_RXNE, DISABLE); break; /* enable interrupt */ case RT_DEVICE_CTRL_SET_INT: /* enable rx irq */ UART_ENABLE_IRQ(uart->irq); /* enable interrupt */ USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE); break; #ifdef RT_SERIAL_USING_DMA /* USART config */ case RT_DEVICE_CTRL_CONFIG : if ((rt_uint32_t)(arg) == RT_DEVICE_FLAG_DMA_RX) { DMA_Configuration(serial); } break; #endif /* RT_SERIAL_USING_DMA */ } return RT_EOK; } static int stm32_putc(struct rt_serial_device *serial, char c) { struct stm32_uart* uart; RT_ASSERT(serial != RT_NULL); uart = (struct stm32_uart *)serial->parent.user_data; if (serial->parent.open_flag & RT_DEVICE_FLAG_INT_TX) { if (!(uart->uart_device->SR & USART_FLAG_TXE)) { USART_ITConfig(uart->uart_device, USART_IT_TC, ENABLE); return -1; } uart->uart_device->DR = c; USART_ITConfig(uart->uart_device, USART_IT_TC, ENABLE); } else { USART_ClearFlag(uart->uart_device,USART_FLAG_TC); uart->uart_device->DR = c; while (!(uart->uart_device->SR & USART_FLAG_TC)); } return 1; } static int stm32_getc(struct rt_serial_device *serial) { int ch; struct stm32_uart* uart; RT_ASSERT(serial != RT_NULL); uart = (struct stm32_uart *)serial->parent.user_data; ch = -1; if (uart->uart_device->SR & USART_FLAG_RXNE) { ch = uart->uart_device->DR & 0xff; } return ch; } #ifdef RT_SERIAL_USING_DMA /** * Serial port receive idle process. This need add to uart idle ISR. * * @param serial serial device */ static void dma_uart_rx_idle_isr(struct rt_serial_device *serial) { struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data; rt_size_t recv_total_index, recv_len; rt_base_t level; /* disable interrupt */ level = rt_hw_interrupt_disable(); recv_total_index = uart->dma.setting_recv_len - DMA_GetCurrDataCounter(uart->dma.rx_ch); recv_len = recv_total_index - uart->dma.last_recv_index; uart->dma.last_recv_index = recv_total_index; /* enable interrupt */ rt_hw_interrupt_enable(level); if (recv_len) rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8)); /* read a data for clear receive idle interrupt flag */ USART_ReceiveData(uart->uart_device); DMA_ClearFlag(uart->dma.rx_gl_flag); } /** * DMA receive done process. This need add to DMA receive done ISR. * * @param serial serial device */ static void dma_rx_done_isr(struct rt_serial_device *serial) { struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data; rt_size_t recv_len; rt_base_t level; /* disable interrupt */ level = rt_hw_interrupt_disable(); recv_len = uart->dma.setting_recv_len - uart->dma.last_recv_index; /* reset last recv index */ uart->dma.last_recv_index = 0; /* enable interrupt */ rt_hw_interrupt_enable(level); if (recv_len) rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8)); DMA_ClearFlag(uart->dma.rx_gl_flag); } #endif /* RT_SERIAL_USING_DMA */ /** * Uart common interrupt process. This need add to uart ISR. * * @param serial serial device */ static void uart_isr(struct rt_serial_device *serial) { struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data; RT_ASSERT(uart != RT_NULL); if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) { if(USART_GetFlagStatus(uart->uart_device, USART_FLAG_PE) == RESET) { rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); } /* clear interrupt */ USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); } #ifdef RT_SERIAL_USING_DMA if(USART_GetITStatus(uart->uart_device, USART_IT_IDLE) != RESET) { dma_uart_rx_idle_isr(serial); } #endif /* RT_SERIAL_USING_DMA */ if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) { /* clear interrupt */ if(serial->parent.open_flag & RT_DEVICE_FLAG_INT_TX) { rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE); } USART_ITConfig(uart->uart_device, USART_IT_TC, DISABLE); USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); } if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET) { USART_ReceiveData(uart->uart_device); } } static const struct rt_uart_ops stm32_uart_ops = { stm32_configure, stm32_control, stm32_putc, stm32_getc, }; #if defined(RT_USING_UART1) /* UART1 device driver structure */ struct stm32_uart uart1 = { USART1, #ifdef RT_SERIAL_USING_DMA USART1_IRQn, { DMA1_Channel5, DMA1_FLAG_GL5, DMA1_Channel5_IRQn, 0, }, #endif /* RT_SERIAL_USING_DMA */ }; struct rt_serial_device serial1; void USART1_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); uart_isr(&serial1); /* leave interrupt */ rt_interrupt_leave(); } #ifdef RT_SERIAL_USING_DMA void DMA1_Channel5_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); dma_rx_done_isr(&serial1); /* leave interrupt */ rt_interrupt_leave(); } #endif /* RT_SERIAL_USING_DMA */ #endif /* RT_USING_UART1 */ #if defined(RT_USING_UART2) /* UART2 device driver structure */ struct stm32_uart uart2 = { USART2, #ifdef RT_SERIAL_USING_DMA USART2_IRQn, { DMA1_Channel6, DMA1_FLAG_GL6, DMA1_Channel6_IRQn, 0, }, #endif /* RT_SERIAL_USING_DMA */ }; struct rt_serial_device serial2; void USART2_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); uart_isr(&serial2); /* leave interrupt */ rt_interrupt_leave(); } #ifdef RT_SERIAL_USING_DMA void DMA1_Channel6_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); dma_rx_done_isr(&serial2); /* leave interrupt */ rt_interrupt_leave(); } #endif /* RT_SERIAL_USING_DMA */ #endif /* RT_USING_UART2 */ #if defined(RT_USING_UART3) /* UART3 device driver structure */ struct stm32_uart uart3 = { USART3, #ifdef RT_SERIAL_USING_DMA USART3_IRQn, { DMA1_Channel3, DMA1_FLAG_GL3, DMA1_Channel3_IRQn, 0, }, #endif /* RT_SERIAL_USING_DMA */ }; struct rt_serial_device serial3; void USART3_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); uart_isr(&serial3); /* leave interrupt */ rt_interrupt_leave(); } #ifdef RT_SERIAL_USING_DMA void DMA1_Channel3_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); dma_rx_done_isr(&serial3); /* leave interrupt */ rt_interrupt_leave(); } #endif /* RT_SERIAL_USING_DMA */ #endif /* RT_USING_UART3 */ #if defined(RT_USING_UART4) /* UART4 device driver structure */ struct stm32_uart uart4 = { UART4, #ifdef RT_SERIAL_USING_DMA UART4_IRQn, { DMA2_Channel3, DMA2_FLAG_GL3, DMA2_Channel3_IRQn, 0, }, #endif /* RT_SERIAL_USING_DMA */ }; struct rt_serial_device serial4; void UART4_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); uart_isr(&serial4); /* leave interrupt */ rt_interrupt_leave(); } #ifdef RT_SERIAL_USING_DMA void DMA2_Channel3_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); dma_rx_done_isr(&serial4); /* leave interrupt */ rt_interrupt_leave(); } #endif /* RT_SERIAL_USING_DMA */ #endif /* RT_USING_UART4 */ static void RCC_Configuration(void) { #if defined(RT_USING_UART1) /* Enable UART GPIO clocks */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE); /* Enable UART clock */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); #endif /* RT_USING_UART1 */ #if defined(RT_USING_UART2) /* Enable UART GPIO clocks */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE); /* Enable UART clock */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); #endif /* RT_USING_UART2 */ #if defined(RT_USING_UART3) /* Enable UART GPIO clocks */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE); /* Enable UART clock */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); #endif /* RT_USING_UART3 */ #if defined(RT_USING_UART4) /* Enable UART GPIO clocks */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE); /* Enable UART clock */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART4, ENABLE); #endif /* RT_USING_UART4 */ } static void GPIO_Configuration(void) { GPIO_InitTypeDef GPIO_InitStructure; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; #if defined(RT_USING_UART1) /* Configure USART Rx/tx PIN */ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX; GPIO_Init(UART1_GPIO, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX; GPIO_Init(UART1_GPIO, &GPIO_InitStructure); #endif /* RT_USING_UART1 */ #if defined(RT_USING_UART2) /* Configure USART Rx/tx PIN */ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX; GPIO_Init(UART2_GPIO, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX; GPIO_Init(UART2_GPIO, &GPIO_InitStructure); #endif /* RT_USING_UART2 */ #if defined(RT_USING_UART3) /* Configure USART Rx/tx PIN */ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX; GPIO_Init(UART3_GPIO, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX; GPIO_Init(UART3_GPIO, &GPIO_InitStructure); #endif /* RT_USING_UART3 */ #if defined(RT_USING_UART4) /* Configure USART Rx/tx PIN */ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_InitStructure.GPIO_Pin = UART4_GPIO_RX; GPIO_Init(UART4_GPIO, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitStructure.GPIO_Pin = UART4_GPIO_TX; GPIO_Init(UART4_GPIO, &GPIO_InitStructure); #endif /* RT_USING_UART4 */ } static void NVIC_Configuration(struct stm32_uart* uart) { NVIC_InitTypeDef NVIC_InitStructure; /* Enable the USART1 Interrupt */ NVIC_InitStructure.NVIC_IRQChannel = uart->irq; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); } #ifdef RT_SERIAL_USING_DMA static void DMA_Configuration(struct rt_serial_device *serial) { struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data; struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx; DMA_InitTypeDef DMA_InitStructure; NVIC_InitTypeDef NVIC_InitStructure; uart->dma.setting_recv_len = serial->config.bufsz; /* enable transmit idle interrupt */ USART_ITConfig(uart->uart_device, USART_IT_IDLE , ENABLE); /* DMA clock enable */ RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2, ENABLE); /* rx dma config */ DMA_DeInit(uart->dma.rx_ch); DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&(uart->uart_device->DR); DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t) rx_fifo->buffer; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; DMA_InitStructure.DMA_BufferSize = serial->config.bufsz; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; DMA_Init(uart->dma.rx_ch, &DMA_InitStructure); DMA_ClearFlag(uart->dma.rx_gl_flag); DMA_ITConfig(uart->dma.rx_ch, DMA_IT_TC, ENABLE); USART_DMACmd(uart->uart_device, USART_DMAReq_Rx, ENABLE); DMA_Cmd(uart->dma.rx_ch, ENABLE); /* rx dma interrupt config */ NVIC_InitStructure.NVIC_IRQChannel = uart->dma.rx_irq_ch; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); } #endif /* RT_SERIAL_USING_DMA */ void rt_hw_usart_init(void) { struct stm32_uart* uart; struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; RCC_Configuration(); GPIO_Configuration(); #if defined(RT_USING_UART1) uart = &uart1; config.baud_rate = BAUD_RATE_115200; serial1.ops = &stm32_uart_ops; serial1.config = config; NVIC_Configuration(uart); /* register UART1 device */ rt_hw_serial_register(&serial1, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX, uart); #endif /* RT_USING_UART1 */ #if defined(RT_USING_UART2) uart = &uart2; config.baud_rate = BAUD_RATE_115200; serial2.ops = &stm32_uart_ops; serial2.config = config; NVIC_Configuration(uart); /* register UART2 device */ rt_hw_serial_register(&serial2, "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX, uart); #endif /* RT_USING_UART2 */ #if defined(RT_USING_UART3) uart = &uart3; config.baud_rate = BAUD_RATE_115200; serial3.ops = &stm32_uart_ops; serial3.config = config; NVIC_Configuration(uart); /* register UART3 device */ rt_hw_serial_register(&serial3, "uart3", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX, uart); #endif /* RT_USING_UART3 */ #if defined(RT_USING_UART4) uart = &uart4; config.baud_rate = BAUD_RATE_115200; serial4.ops = &stm32_uart_ops; serial4.config = config; NVIC_Configuration(uart); /* register UART4 device */ rt_hw_serial_register(&serial4, "uart4", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX, uart); #endif /* RT_USING_UART4 */ }