diff --git a/bsp/lpc176x/project.Uv2 b/bsp/lpc176x/project.Uv2 deleted file mode 100644 index 01510dfaffcb7d88a980dcf1f72e2a6f7eefb887..0000000000000000000000000000000000000000 --- a/bsp/lpc176x/project.Uv2 +++ /dev/null @@ -1,178 +0,0 @@ -### uVision2 Project, (C) Keil Software -### Do not modify ! - -Target (RT-Thread LPC17xx), 0x0004 // Tools: 'ARM-ADS' - -Group (Startup) -Group (Kernel) -Group (CORTEX-M3) -Group (finsh) -Group (LwIP) -Group (CMSIS) - -File 1,1,<.\application.c> -File 1,1,<.\startup.c> -File 1,1,<.\board.c> -File 1,1,<.\uart.c> -File 1,1,<.\led.c> -File 1,1,<.\emac.c> -File 2,1,<..\..\src\clock.c> -File 2,1,<..\..\src\device.c> -File 2,1,<..\..\src\idle.c> -File 2,1,<..\..\src\ipc.c> -File 2,1,<..\..\src\irq.c> -File 2,1,<..\..\src\kservice.c> -File 2,1,<..\..\src\mem.c> -File 2,1,<..\..\src\mempool.c> -File 2,1,<..\..\src\object.c> -File 2,1,<..\..\src\scheduler.c> -File 2,1,<..\..\src\thread.c> -File 2,1,<..\..\src\timer.c> -File 3,1,<..\..\libcpu\arm\cortex-m3\cpuport.c> -File 3,2,<..\..\libcpu\arm\cortex-m3\context_rvds.S> -File 3,1,<..\..\libcpu\arm\common\backtrace.c> -File 3,1,<..\..\libcpu\arm\common\div0.c> -File 3,1,<..\..\libcpu\arm\common\showmem.c> -File 4,1,<..\..\components\finsh\cmd.c> -File 4,1,<..\..\components\finsh\finsh_compiler.c> -File 4,1,<..\..\components\finsh\finsh_error.c> -File 4,1,<..\..\components\finsh\finsh_heap.c> -File 4,1,<..\..\components\finsh\finsh_init.c> -File 4,1,<..\..\components\finsh\finsh_node.c> -File 4,1,<..\..\components\finsh\finsh_ops.c> -File 4,1,<..\..\components\finsh\finsh_parser.c> -File 4,1,<..\..\components\finsh\finsh_token.c> -File 4,1,<..\..\components\finsh\finsh_var.c> -File 4,1,<..\..\components\finsh\finsh_vm.c> -File 4,1,<..\..\components\finsh\shell.c> -File 4,1,<..\..\components\finsh\symbol.c> -File 5,1,<..\..\components\net\lwip\src\api\api_lib.c> -File 5,1,<..\..\components\net\lwip\src\api\api_msg.c> -File 5,1,<..\..\components\net\lwip\src\api\err.c> -File 5,1,<..\..\components\net\lwip\src\api\netbuf.c> -File 5,1,<..\..\components\net\lwip\src\api\netdb.c> -File 5,1,<..\..\components\net\lwip\src\api\netifapi.c> -File 5,1,<..\..\components\net\lwip\src\api\sockets.c> -File 5,1,<..\..\components\net\lwip\src\api\tcpip.c> -File 5,1,<..\..\components\net\lwip\src\arch\sys_arch.c> -File 5,1,<..\..\components\net\lwip\src\arch\sys_arch_init.c> -File 5,1,<..\..\components\net\lwip\src\core\dhcp.c> -File 5,1,<..\..\components\net\lwip\src\core\dns.c> -File 5,1,<..\..\components\net\lwip\src\core\init.c> -File 5,1,<..\..\components\net\lwip\src\core\memp.c> -File 5,1,<..\..\components\net\lwip\src\core\netif.c> -File 5,1,<..\..\components\net\lwip\src\core\pbuf.c> -File 5,1,<..\..\components\net\lwip\src\core\raw.c> -File 5,1,<..\..\components\net\lwip\src\core\stats.c> -File 5,1,<..\..\components\net\lwip\src\core\sys.c> -File 5,1,<..\..\components\net\lwip\src\core\tcp.c> -File 5,1,<..\..\components\net\lwip\src\core\tcp_in.c> -File 5,1,<..\..\components\net\lwip\src\core\tcp_out.c> -File 5,1,<..\..\components\net\lwip\src\core\udp.c> -File 5,1,<..\..\components\net\lwip\src\core\ipv4\autoip.c> -File 5,1,<..\..\components\net\lwip\src\core\ipv4\icmp.c> -File 5,1,<..\..\components\net\lwip\src\core\ipv4\igmp.c> -File 5,1,<..\..\components\net\lwip\src\core\ipv4\inet.c> -File 5,1,<..\..\components\net\lwip\src\core\ipv4\inet_chksum.c> -File 5,1,<..\..\components\net\lwip\src\core\ipv4\ip.c> -File 5,1,<..\..\components\net\lwip\src\core\ipv4\ip_addr.c> -File 5,1,<..\..\components\net\lwip\src\core\ipv4\ip_frag.c> -File 5,1,<..\..\components\net\lwip\src\netif\etharp.c> -File 5,1,<..\..\components\net\lwip\src\netif\ethernetif.c> -File 5,1,<..\..\components\net\lwip\src\netif\loopif.c> -File 5,1,<..\..\components\net\lwip\src\netif\slipif.c> -File 6,1, -File 6,1, -File 6,2, - - -Options 1,0,0 // Target 'RT-Thread LPC17xx' - Device (LPC1768) - Vendor (NXP (founded by Philips)) - Cpu (IRAM(0x10000000-0x10007FFF) IRAM2(0x20000000-0x20007FFF) IROM(0-0x7FFFF) CLOCK(12000000) CPUTYPE("Cortex-M3")) - FlashUt () - StupF ("STARTUP\NXP\startup_LPC17xx.s" ("NXP LPC17xx Startup Code")) - FlashDR (UL2CM3(-O463 -S0 -C0 -FO7 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_256 -FS00 -FL040000)) - DevID (4868) - Rgf (LPC17xx.H) - Mem () - C () - A () - RL () - OH () - DBC_IFX () - DBC_CMS () - DBC_AMS () - DBC_LMS () - UseEnv=0 - EnvBin () - EnvInc () - EnvLib () - EnvReg (ÿNXP\) - OrgReg (ÿNXP\) - TgStat=16 - OutDir (.\obj\) - OutName (rtthread-lpc) - GenApp=1 - GenLib=0 - GenHex=0 - Debug=1 - Browse=1 - LstDir (.\obj\) - HexSel=1 - MG32K=0 - TGMORE=0 - RunUsr 0 0 <> - RunUsr 1 0 <> - BrunUsr 0 0 <> - BrunUsr 1 0 <> - CrunUsr 0 0 <> - CrunUsr 1 0 <> - SVCSID <> - GLFLAGS=1790 - ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ACPUTYP ("Cortex-M3") - RVDEV () - ADSTFLGA { 0,12,16,2,99,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 } - OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - OCMADSIRAM { 0,0,0,0,16,0,128,0,0 } - OCMADSIROM { 1,0,0,0,0,0,0,8,0 } - OCMADSXRAM { 0,0,0,0,0,0,0,0,0 } - OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,8,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,16,0,128,0,0,0,0,0,0,32,0,128,0,0 } - RV_STAVEC () - ADSCCFLG { 5,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ADSCMISC () - ADSCDEFN () - ADSCUDEF () - ADSCINCD (..\..\components\net\lwip\src\arch\include;CMSIS\CM3\DeviceSupport\NXP\LPC17xx;..\..\components\net\lwip\src\include;.;..\..\components\net\lwip\src\include\ipv4;..\..\include;..\..\libcpu\arm\cortex-m3;..\..\components\net\lwip\src;..\..\libcpu\arm\common;CMSIS\CM3\CoreSupport;..\..\components\finsh;..\..\components\net\lwip\src\include\netif) - ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ADSAMISC () - ADSADEFN () - ADSAUDEF () - ADSAINCD () - PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - IncBld=1 - AlwaysBuild=0 - GenAsm=0 - AsmAsm=0 - PublicsOnly=0 - StopCode=3 - CustArgs () - LibMods () - ADSLDFG { 17,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } - ADSLDTA (0x00000000) - ADSLDDA (0x10000000) - ADSLDSC () - ADSLDIB () - ADSLDIC () - ADSLDMC ( --keep __fsym_* --keep __vsym_* ) - ADSLDIF () - ADSLDDW () - OPTDL (SARMCM3.DLL)(-MPU)(DARMP1.DLL)(-pLPC1768)(SARMCM3.DLL)(-MPU)(TARMP1.DLL)(-pLPC1768) - OPTDBG 49150,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()() - FLASH1 { 9,0,0,0,1,0,0,0,6,16,0,0,0,0,0,0,0,0,0,0 } - FLASH2 (Segger\JL2CM3.dll) - FLASH3 ("" ()) - FLASH4 () -EndOpt - diff --git a/bsp/lpc176x/project.uvopt b/bsp/lpc176x/project.uvopt new file mode 100644 index 0000000000000000000000000000000000000000..ff86f3766b281a8d746bd923676002b8bde37057 --- /dev/null +++ b/bsp/lpc176x/project.uvopt @@ -0,0 +1,1230 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + RT-Thread LPC17xx + 0x4 + ARM-ADS + + 12000000 + + 0 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\obj\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 0 + + SARMCM3.DLL + -MPU + DARMP1.DLL + -pLPC1768 + SARMCM3.DLL + -MPU + TARMP1.DLL + -pLPC1768 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 7 + + + + + + + + + + + Segger\JL2CM3.dll + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + Startup + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\application.c + application.c + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\startup.c + startup.c + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\board.c + board.c + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\uart.c + uart.c + + + 1 + 5 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\led.c + led.c + + + 1 + 6 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\emac.c + emac.c + + + + + Kernel + 0 + 0 + 0 + + 2 + 7 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\clock.c + clock.c + + + 2 + 8 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\device.c + device.c + + + 2 + 9 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\idle.c + idle.c + + + 2 + 10 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\ipc.c + ipc.c + + + 2 + 11 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\irq.c + irq.c + + + 2 + 12 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\kservice.c + kservice.c + + + 2 + 13 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\mem.c + mem.c + + + 2 + 14 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\mempool.c + mempool.c + + + 2 + 15 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\object.c + object.c + + + 2 + 16 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\scheduler.c + scheduler.c + + + 2 + 17 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\thread.c + thread.c + + + 2 + 18 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\src\timer.c + timer.c + + + + + CORTEX-M3 + 0 + 0 + 0 + + 3 + 19 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\libcpu\arm\cortex-m3\cpuport.c + cpuport.c + + + 3 + 20 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\libcpu\arm\cortex-m3\context_rvds.S + context_rvds.S + + + 3 + 21 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\libcpu\arm\common\backtrace.c + backtrace.c + + + 3 + 22 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\libcpu\arm\common\div0.c + div0.c + + + 3 + 23 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\libcpu\arm\common\showmem.c + showmem.c + + + + + finsh + 0 + 0 + 0 + + 4 + 24 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\cmd.c + cmd.c + + + 4 + 25 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_compiler.c + finsh_compiler.c + + + 4 + 26 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_error.c + finsh_error.c + + + 4 + 27 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_heap.c + finsh_heap.c + + + 4 + 28 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_init.c + finsh_init.c + + + 4 + 29 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_node.c + finsh_node.c + + + 4 + 30 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_ops.c + finsh_ops.c + + + 4 + 31 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_parser.c + finsh_parser.c + + + 4 + 32 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_token.c + finsh_token.c + + + 4 + 33 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_var.c + finsh_var.c + + + 4 + 34 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\finsh_vm.c + finsh_vm.c + + + 4 + 35 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\shell.c + shell.c + + + 4 + 36 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\finsh\symbol.c + symbol.c + + + + + LwIP + 0 + 0 + 0 + + 5 + 37 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\api\api_lib.c + api_lib.c + + + 5 + 38 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\api\api_msg.c + api_msg.c + + + 5 + 39 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\api\err.c + err.c + + + 5 + 40 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\api\netbuf.c + netbuf.c + + + 5 + 41 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\api\netdb.c + netdb.c + + + 5 + 42 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\api\netifapi.c + netifapi.c + + + 5 + 43 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\api\sockets.c + sockets.c + + + 5 + 44 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\api\tcpip.c + tcpip.c + + + 5 + 45 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\arch\sys_arch.c + sys_arch.c + + + 5 + 47 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\dhcp.c + dhcp.c + + + 5 + 48 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\dns.c + dns.c + + + 5 + 49 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\init.c + init.c + + + 5 + 50 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\memp.c + memp.c + + + 5 + 51 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\netif.c + netif.c + + + 5 + 52 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\pbuf.c + pbuf.c + + + 5 + 53 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\raw.c + raw.c + + + 5 + 54 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\stats.c + stats.c + + + 5 + 55 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\sys.c + sys.c + + + 5 + 56 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\tcp.c + tcp.c + + + 5 + 57 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\tcp_in.c + tcp_in.c + + + 5 + 58 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\tcp_out.c + tcp_out.c + + + 5 + 59 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\udp.c + udp.c + + + 5 + 60 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\ipv4\autoip.c + autoip.c + + + 5 + 61 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\ipv4\icmp.c + icmp.c + + + 5 + 62 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\ipv4\igmp.c + igmp.c + + + 5 + 63 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\ipv4\inet.c + inet.c + + + 5 + 64 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\ipv4\inet_chksum.c + inet_chksum.c + + + 5 + 65 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\ipv4\ip.c + ip.c + + + 5 + 66 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\ipv4\ip_addr.c + ip_addr.c + + + 5 + 67 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\ipv4\ip_frag.c + ip_frag.c + + + 5 + 68 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\netif\etharp.c + etharp.c + + + 5 + 69 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\netif\ethernetif.c + ethernetif.c + + + 5 + 71 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\netif\slipif.c + slipif.c + + + 5 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\def.c + def.c + + + 5 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\components\net\lwip\src\core\timers.c + timers.c + + + + + CMSIS + 0 + 0 + 0 + + 6 + 72 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + CMSIS\CM3\CoreSupport\core_cm3.c + core_cm3.c + + + 6 + 73 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + CMSIS\CM3\DeviceSupport\NXP\LPC17xx\system_LPC17xx.c + system_LPC17xx.c + + + 6 + 74 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + CMSIS\CM3\DeviceSupport\NXP\LPC17xx\startup\arm\startup_LPC17xx.s + startup_LPC17xx.s + + + + diff --git a/bsp/lpc176x/project.uvproj b/bsp/lpc176x/project.uvproj new file mode 100644 index 0000000000000000000000000000000000000000..3607bca23500463d3ffed3750b003d6d83abc233 --- /dev/null +++ b/bsp/lpc176x/project.uvproj @@ -0,0 +1,790 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + RT-Thread LPC17xx + 0x4 + ARM-ADS + + + LPC1768 + NXP (founded by Philips) + IRAM(0x10000000-0x10007FFF) IRAM2(0x20000000-0x20007FFF) IROM(0-0x7FFFF) CLOCK(12000000) CPUTYPE("Cortex-M3") + + "STARTUP\NXP\startup_LPC17xx.s" ("NXP LPC17xx Startup Code") + UL2CM3(-O463 -S0 -C0 -FO7 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_256 -FS00 -FL040000) + 4868 + LPC17xx.H + + + + + + + + + + + 0 + + + + NXP\ + NXP\ + + 0 + 0 + 0 + 0 + 1 + + .\obj\ + rtthread-lpc + 1 + 0 + 0 + 1 + 1 + .\obj\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DARMP1.DLL + -pLPC1768 + SARMCM3.DLL + -MPU + TARMP1.DLL + -pLPC1768 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + + 0 + 7 + + + + + + + + + + + + + + Segger\JL2CM3.dll + + + + + 1 + 0 + 0 + 1 + 1 + 4102 + + Segger\JL2CM3.dll + "" () + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x10000000 + 0x8000 + + + 1 + 0x0 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x10000000 + 0x8000 + + + 0 + 0x20000000 + 0x8000 + + + + + + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + ..\..\components\net\lwip\src\arch\include;CMSIS\CM3\DeviceSupport\NXP\LPC17xx;..\..\components\net\lwip\src\include;.;..\..\components\net\lwip\src\include\ipv4;..\..\include;..\..\libcpu\arm\cortex-m3;..\..\components\net\lwip\src;..\..\libcpu\arm\common;CMSIS\CM3\CoreSupport;..\..\components\finsh;..\..\components\net\lwip\src\include\netif + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x10000000 + + + + --keep __fsym_* --keep __vsym_* + + + + + + + + Startup + + + application.c + 1 + .\application.c + + + startup.c + 1 + .\startup.c + + + board.c + 1 + .\board.c + + + uart.c + 1 + .\uart.c + + + led.c + 1 + .\led.c + + + emac.c + 1 + .\emac.c + + + + + Kernel + + + clock.c + 1 + ..\..\src\clock.c + + + device.c + 1 + ..\..\src\device.c + + + idle.c + 1 + ..\..\src\idle.c + + + ipc.c + 1 + ..\..\src\ipc.c + + + irq.c + 1 + ..\..\src\irq.c + + + kservice.c + 1 + ..\..\src\kservice.c + + + mem.c + 1 + ..\..\src\mem.c + + + mempool.c + 1 + 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..\..\components\net\lwip\src\core\ipv4\inet_chksum.c + + + ip.c + 1 + ..\..\components\net\lwip\src\core\ipv4\ip.c + + + ip_addr.c + 1 + ..\..\components\net\lwip\src\core\ipv4\ip_addr.c + + + ip_frag.c + 1 + ..\..\components\net\lwip\src\core\ipv4\ip_frag.c + + + etharp.c + 1 + ..\..\components\net\lwip\src\netif\etharp.c + + + ethernetif.c + 1 + ..\..\components\net\lwip\src\netif\ethernetif.c + + + slipif.c + 1 + ..\..\components\net\lwip\src\netif\slipif.c + + + def.c + 1 + ..\..\components\net\lwip\src\core\def.c + + + timers.c + 1 + ..\..\components\net\lwip\src\core\timers.c + + + + + CMSIS + + + core_cm3.c + 1 + CMSIS\CM3\CoreSupport\core_cm3.c + + + system_LPC17xx.c + 1 + CMSIS\CM3\DeviceSupport\NXP\LPC17xx\system_LPC17xx.c + + + startup_LPC17xx.s + 2 + CMSIS\CM3\DeviceSupport\NXP\LPC17xx\startup\arm\startup_LPC17xx.s + + + + + + + +