From 7d17f50a3169d76911ee273788bf34946c825f26 Mon Sep 17 00:00:00 2001 From: armink Date: Sat, 14 May 2016 13:43:14 +0800 Subject: [PATCH] [BSP] Add usart DMA Rx driver to stm32f10x. --- bsp/stm32f10x/drivers/usart.c | 316 ++++++++++++++++++++++++---------- 1 file changed, 226 insertions(+), 90 deletions(-) diff --git a/bsp/stm32f10x/drivers/usart.c b/bsp/stm32f10x/drivers/usart.c index cf7c2a1d51..7aef75deda 100644 --- a/bsp/stm32f10x/drivers/usart.c +++ b/bsp/stm32f10x/drivers/usart.c @@ -13,6 +13,7 @@ * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode * 2013-05-13 aozima update for kehong-lingtai. * 2015-01-31 armink make sure the serial transmit complete in putc() + * 2016-05-13 armink add DMA Rx mode */ #include "stm32f10x.h" @@ -44,10 +45,22 @@ /* STM32 uart driver */ struct stm32_uart { - USART_TypeDef* uart_device; + USART_TypeDef *uart_device; IRQn_Type irq; + struct stm32_uart_dma { + /* dma channel */ + DMA_Channel_TypeDef *rx_ch; + /* dma global flag */ + uint32_t rx_gl_flag; + /* dma irq channel */ + uint8_t rx_irq_ch; + /* last receive index */ + rt_size_t last_recv_len; + } dma; }; +static void DMA_Configuration(struct rt_serial_device *serial); + static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg) { struct stm32_uart* uart; @@ -93,6 +106,7 @@ static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_c static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg) { struct stm32_uart* uart; + rt_uint32_t ctrl_arg = (rt_uint32_t)(arg); RT_ASSERT(serial != RT_NULL); uart = (struct stm32_uart *)serial->parent.user_data; @@ -113,8 +127,13 @@ static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *ar /* enable interrupt */ USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE); break; + /* USART config */ + case RT_DEVICE_CTRL_CONFIG : + if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) { + DMA_Configuration(serial); + } + break; } - return RT_EOK; } @@ -148,6 +167,91 @@ static int stm32_getc(struct rt_serial_device *serial) return ch; } +/** + * Serial port receive idle process. This need add to uart idle ISR. + * + * @param serial serial device + */ +static void dma_uart_rx_idle_isr(struct rt_serial_device *serial) { + struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data; + rt_size_t recv_total_len, recv_len; + /* disable dma, stop receive data */ + DMA_Cmd(uart->dma.rx_ch, DISABLE); + + recv_total_len = serial->config.bufsz - DMA_GetCurrDataCounter(uart->dma.rx_ch); + if (recv_total_len > uart->dma.last_recv_len) { + recv_len = recv_total_len - uart->dma.last_recv_len; + } else { + recv_len = recv_total_len; + } + uart->dma.last_recv_len = recv_total_len; + + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8)); + + /* read a data for clear receive idle interrupt flag */ + USART_ReceiveData(uart->uart_device); + DMA_ClearFlag(uart->dma.rx_gl_flag); + DMA_Cmd(uart->dma.rx_ch, ENABLE); +} + +/** + * DMA receive done process. This need add to DMA receive done ISR. + * + * @param serial serial device + */ +static void dma_rx_done_isr(struct rt_serial_device *serial) { + struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data; + rt_size_t recv_total_len, recv_len; + /* disable dma, stop receive data */ + DMA_Cmd(uart->dma.rx_ch, DISABLE); + + recv_total_len = serial->config.bufsz - DMA_GetCurrDataCounter(uart->dma.rx_ch); + if (recv_total_len > uart->dma.last_recv_len) { + recv_len = recv_total_len - uart->dma.last_recv_len; + } else { + recv_len = recv_total_len; + } + uart->dma.last_recv_len = recv_total_len; + + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8)); + + DMA_ClearFlag(uart->dma.rx_gl_flag); + /* reload */ + DMA_SetCurrDataCounter(uart->dma.rx_ch, serial->config.bufsz); + DMA_Cmd(uart->dma.rx_ch, ENABLE); +} + +/** + * Uart common interrupt process. This need add to uart ISR. + * + * @param serial serial device + */ +static void uart_isr(struct rt_serial_device *serial) { + struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data; + + RT_ASSERT(uart != RT_NULL); + + if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) + { + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); + } + if(USART_GetITStatus(uart->uart_device, USART_IT_IDLE) != RESET) + { + dma_uart_rx_idle_isr(serial); + } + if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) + { + /* clear interrupt */ + USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); + } + if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET) + { + stm32_getc(serial); + } +} + static const struct rt_uart_ops stm32_uart_ops = { stm32_configure, @@ -162,70 +266,68 @@ struct stm32_uart uart1 = { USART1, USART1_IRQn, + { + DMA1_Channel5, + DMA1_FLAG_GL5, + DMA1_Channel5_IRQn, + 0, + }, }; struct rt_serial_device serial1; void USART1_IRQHandler(void) { - struct stm32_uart* uart; + /* enter interrupt */ + rt_interrupt_enter(); - uart = &uart1; + uart_isr(&serial1); + + /* leave interrupt */ + rt_interrupt_leave(); +} +void DMA1_Channel5_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) - { - rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND); - /* clear interrupt */ - USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); - } - if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) - { - /* clear interrupt */ - USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); - } - if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET) - { - stm32_getc(&serial1); - } + dma_rx_done_isr(&serial1); + /* leave interrupt */ rt_interrupt_leave(); } #endif /* RT_USING_UART1 */ #if defined(RT_USING_UART2) -/* UART1 device driver structure */ +/* UART2 device driver structure */ struct stm32_uart uart2 = { USART2, USART2_IRQn, + { + DMA1_Channel6, + DMA1_FLAG_GL6, + DMA1_Channel6_IRQn, + 0, + }, }; struct rt_serial_device serial2; void USART2_IRQHandler(void) { - struct stm32_uart* uart; + /* enter interrupt */ + rt_interrupt_enter(); - uart = &uart2; + uart_isr(&serial2); + /* leave interrupt */ + rt_interrupt_leave(); +} + +void DMA1_Channel6_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) - { - rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND); - /* clear interrupt */ - USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); - } - if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) - { - /* clear interrupt */ - USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); - } - if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET) - { - stm32_getc(&serial2); - } + + dma_rx_done_isr(&serial2); /* leave interrupt */ rt_interrupt_leave(); @@ -238,32 +340,31 @@ struct stm32_uart uart3 = { USART3, USART3_IRQn, + { + DMA1_Channel3, + DMA1_FLAG_GL3, + DMA1_Channel3_IRQn, + 0, + }, }; struct rt_serial_device serial3; void USART3_IRQHandler(void) { - struct stm32_uart* uart; + /* enter interrupt */ + rt_interrupt_enter(); - uart = &uart3; + uart_isr(&serial3); + /* leave interrupt */ + rt_interrupt_leave(); +} + +void DMA1_Channel3_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) - { - rt_hw_serial_isr(&serial3, RT_SERIAL_EVENT_RX_IND); - /* clear interrupt */ - USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); - } - if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) - { - /* clear interrupt */ - USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); - } - if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET) - { - stm32_getc(&serial3); - } + + dma_rx_done_isr(&serial3); /* leave interrupt */ rt_interrupt_leave(); @@ -276,69 +377,66 @@ struct stm32_uart uart4 = { UART4, UART4_IRQn, + { + DMA2_Channel3, + DMA2_FLAG_GL3, + DMA2_Channel3_IRQn, + 0, + }, }; struct rt_serial_device serial4; void UART4_IRQHandler(void) { - struct stm32_uart* uart; + /* enter interrupt */ + rt_interrupt_enter(); - uart = &uart4; + uart_isr(&serial4); + /* leave interrupt */ + rt_interrupt_leave(); +} + +void DMA2_Channel3_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET) - { - rt_hw_serial_isr(&serial4, RT_SERIAL_EVENT_RX_IND); - /* clear interrupt */ - USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE); - } - if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET) - { - /* clear interrupt */ - USART_ClearITPendingBit(uart->uart_device, USART_IT_TC); - } - if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET) - { - stm32_getc(&serial4); - } + + dma_rx_done_isr(&serial4); /* leave interrupt */ rt_interrupt_leave(); } -#endif /* RT_USING_UART3 */ - +#endif /* RT_USING_UART4 */ static void RCC_Configuration(void) { #if defined(RT_USING_UART1) /* Enable UART GPIO clocks */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE); /* Enable UART clock */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); #endif /* RT_USING_UART1 */ #if defined(RT_USING_UART2) /* Enable UART GPIO clocks */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE); /* Enable UART clock */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); #endif /* RT_USING_UART2 */ #if defined(RT_USING_UART3) /* Enable UART GPIO clocks */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE); /* Enable UART clock */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); #endif /* RT_USING_UART3 */ #if defined(RT_USING_UART4) /* Enable UART GPIO clocks */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE); /* Enable UART clock */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART4, ENABLE); #endif /* RT_USING_UART4 */ - } static void GPIO_Configuration(void) @@ -390,7 +488,6 @@ static void GPIO_Configuration(void) GPIO_InitStructure.GPIO_Pin = UART4_GPIO_TX; GPIO_Init(UART4_GPIO, &GPIO_InitStructure); #endif /* RT_USING_UART4 */ - } static void NVIC_Configuration(struct stm32_uart* uart) @@ -405,6 +502,46 @@ static void NVIC_Configuration(struct stm32_uart* uart) NVIC_Init(&NVIC_InitStructure); } +static void DMA_Configuration(struct rt_serial_device *serial) { + struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data; + struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx; + DMA_InitTypeDef DMA_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + /* enable transmit idle interrupt */ + USART_ITConfig(uart->uart_device, USART_IT_IDLE , ENABLE); + + /* DMA clock enable */ + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2, ENABLE); + + /* rx dma config */ + DMA_DeInit(uart->dma.rx_ch); + DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&(uart->uart_device->DR); + DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t) rx_fifo->buffer; + DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; + DMA_InitStructure.DMA_BufferSize = serial->config.bufsz; + DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; + DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; + DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; + DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; + DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; + DMA_InitStructure.DMA_Priority = DMA_Priority_High; + DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; + DMA_Init(uart->dma.rx_ch, &DMA_InitStructure); + DMA_ClearFlag(uart->dma.rx_gl_flag); + DMA_ITConfig(uart->dma.rx_ch, DMA_IT_TC, ENABLE); + USART_DMACmd(uart->uart_device, USART_DMAReq_Rx, ENABLE); + DMA_Cmd(uart->dma.rx_ch, ENABLE); + + /* rx dma interrupt config */ + NVIC_InitStructure.NVIC_IRQChannel = uart->dma.rx_irq_ch; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); +} + void rt_hw_usart_init(void) { struct stm32_uart* uart; @@ -420,11 +557,11 @@ void rt_hw_usart_init(void) serial1.ops = &stm32_uart_ops; serial1.config = config; - NVIC_Configuration(&uart1); + NVIC_Configuration(uart); /* register UART1 device */ rt_hw_serial_register(&serial1, "uart1", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX , + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX, uart); #endif /* RT_USING_UART1 */ @@ -435,11 +572,11 @@ void rt_hw_usart_init(void) serial2.ops = &stm32_uart_ops; serial2.config = config; - NVIC_Configuration(&uart2); + NVIC_Configuration(uart); - /* register UART1 device */ + /* register UART2 device */ rt_hw_serial_register(&serial2, "uart2", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX, uart); #endif /* RT_USING_UART2 */ @@ -451,11 +588,11 @@ void rt_hw_usart_init(void) serial3.ops = &stm32_uart_ops; serial3.config = config; - NVIC_Configuration(&uart3); + NVIC_Configuration(uart); - /* register UART1 device */ + /* register UART3 device */ rt_hw_serial_register(&serial3, "uart3", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX, uart); #endif /* RT_USING_UART3 */ @@ -467,12 +604,11 @@ void rt_hw_usart_init(void) serial4.ops = &stm32_uart_ops; serial4.config = config; - NVIC_Configuration(&uart4); + NVIC_Configuration(uart); /* register UART4 device */ rt_hw_serial_register(&serial4, "uart4", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX, uart); #endif /* RT_USING_UART4 */ - } -- GitLab