diff --git a/bsp/stm32f40x/applications/application.c b/bsp/stm32f40x/applications/application.c index 2a01107f6b24f555815c5e324d20256c1346b308..c5e5bcf296eaa405c3d9ea6e87a2ae848e3ab290 100644 --- a/bsp/stm32f40x/applications/application.c +++ b/bsp/stm32f40x/applications/application.c @@ -23,8 +23,18 @@ #include "stm32_eth.h" #endif +#ifdef RT_USING_GDB +#include +#endif + void rt_init_thread_entry(void* parameter) { + /* GDB STUB */ +#ifdef RT_USING_GDB + gdb_set_device("uart6"); + gdb_start(); +#endif + /* LwIP Initialization */ #ifdef RT_USING_LWIP { diff --git a/bsp/stm32f40x/drivers/board.h b/bsp/stm32f40x/drivers/board.h index 44fef35cb32631a52cb343d12d19297a68d3a81e..33b423ae1c8cad7b60941c605d2117db4f79e18f 100644 --- a/bsp/stm32f40x/drivers/board.h +++ b/bsp/stm32f40x/drivers/board.h @@ -43,6 +43,7 @@ //#define RT_USING_UART1 #define RT_USING_UART2 //#define RT_USING_UART3 +#define RT_USING_UART6 // Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3 // Default: 1 diff --git a/bsp/stm32f40x/drivers/stm32f4xx_it.c b/bsp/stm32f40x/drivers/stm32f4xx_it.c index 69a606874602aaf64729acbd778feb56ece23a00..b7a82e33021954ea684b514506a826e30b2c358c 100644 --- a/bsp/stm32f40x/drivers/stm32f4xx_it.c +++ b/bsp/stm32f40x/drivers/stm32f4xx_it.c @@ -117,9 +117,10 @@ void SVC_Handler(void) * @param None * @retval None */ -void DebugMon_Handler(void) -{ -} +//void DebugMon_Handler(void) +//{ + //definitio in gdb/libcpu/cortexm +//} /** * @brief This function handles PendSVC exception. diff --git a/bsp/stm32f40x/drivers/usart.c b/bsp/stm32f40x/drivers/usart.c index 6864a3fc92784b0459390d928609f5a8421c39db..8b87dbbb107fff31d5b25f7db338b685a1c9537b 100644 --- a/bsp/stm32f40x/drivers/usart.c +++ b/bsp/stm32f40x/drivers/usart.c @@ -69,6 +69,17 @@ struct stm32_serial_device uart3 = struct rt_device uart3_device; #endif +#ifdef RT_USING_UART6 +struct stm32_serial_int_rx uart6_int_rx; +struct stm32_serial_device uart6 = +{ + USART6, + &uart6_int_rx, + RT_NULL +}; +struct rt_device uart6_device; +#endif + //#define USART1_DR_Base 0x40013804 //#define USART2_DR_Base 0x40004404 //#define USART3_DR_Base 0x40004804 @@ -103,6 +114,14 @@ struct rt_device uart3_device; #define UART3_TX_DMA DMA1_Stream1 #define UART3_RX_DMA DMA1_Stream3 +#define UART6_GPIO_TX GPIO_Pin_6 +#define UART6_TX_PIN_SOURCE GPIO_PinSource6 +#define UART6_GPIO_RX GPIO_Pin_7 +#define UART6_RX_PIN_SOURCE GPIO_PinSource7 +#define UART6_GPIO GPIOC +#define UART6_GPIO_RCC RCC_AHB1Periph_GPIOC +#define RCC_APBPeriph_UART6 RCC_APB2Periph_USART6 + static void RCC_Configuration(void) { #ifdef RT_USING_UART1 @@ -128,6 +147,13 @@ static void RCC_Configuration(void) /* DMA clock enable */ RCC_APB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE); #endif + +#ifdef RT_USING_UART6 + /* Enable USART6 GPIO clocks */ + RCC_AHB1PeriphClockCmd(UART6_GPIO_RCC, ENABLE); + /* Enable USART6 clock */ + RCC_APB2PeriphClockCmd(RCC_APBPeriph_UART6, ENABLE); +#endif } static void GPIO_Configuration(void) @@ -168,6 +194,16 @@ static void GPIO_Configuration(void) GPIO_PinAFConfig(UART3_GPIO, UART3_TX_PIN_SOURCE, GPIO_AF_USART3); GPIO_PinAFConfig(UART3_GPIO, UART3_RX_PIN_SOURCE, GPIO_AF_USART3); #endif + +#ifdef RT_USING_UART6 + /* Configure USART6 Rx/tx PIN */ + GPIO_InitStructure.GPIO_Pin = UART6_GPIO_TX | UART6_GPIO_RX; + GPIO_Init(UART6_GPIO, &GPIO_InitStructure); + + /* Connect alternate function */ + GPIO_PinAFConfig(UART6_GPIO, UART6_TX_PIN_SOURCE, GPIO_AF_USART6); + GPIO_PinAFConfig(UART6_GPIO, UART6_RX_PIN_SOURCE, GPIO_AF_USART6); +#endif } static void NVIC_Configuration(void) @@ -204,6 +240,15 @@ static void NVIC_Configuration(void) NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); #endif + +#ifdef RT_USING_UART6 + /* Enable the USART6 Interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = USART6_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); +#endif } static void DMA_Configuration(void) @@ -346,4 +391,19 @@ void rt_hw_usart_init() /* enable interrupt */ USART_ITConfig(USART3, USART_IT_RXNE, ENABLE); #endif + +#ifdef RT_USING_UART6 + USART_InitStructure.USART_BaudRate = 9600; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(USART6, &USART_InitStructure); + + /* register uart6 */ + rt_hw_serial_register(&uart6_device, "uart6", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM, + &uart6); +#endif } diff --git a/bsp/stm32f40x/rtconfig.h b/bsp/stm32f40x/rtconfig.h index e961fb2e8f6af581136b57af29cb3a11df0dad04..64cc047ad83495dbdd2f7bb7f25487a3412dd846 100644 --- a/bsp/stm32f40x/rtconfig.h +++ b/bsp/stm32f40x/rtconfig.h @@ -2,6 +2,9 @@ #ifndef __RTTHREAD_CFG_H__ #define __RTTHREAD_CFG_H__ +/* RT_GDB_STUB */ +//#define RT_USING_GDB + /* RT_NAME_MAX*/ #define RT_NAME_MAX 8 diff --git a/bsp/stm32f40x/stm32_rom.ld b/bsp/stm32f40x/stm32_rom.ld index bd2ef9fe4487debae8a58a84b2b40a5c22c53af2..aa9c9b2af28c750ebc70720c84c1f1889ca6c949 100644 --- a/bsp/stm32f40x/stm32_rom.ld +++ b/bsp/stm32f40x/stm32_rom.ld @@ -10,7 +10,7 @@ MEMORY DATA (rw) : ORIGIN = 0x20000000, LENGTH = 128k /* 128K sram */ } ENTRY(Reset_Handler) -_system_stack_size = 0x100; +_system_stack_size = 0x200; SECTIONS {