From d0c0e4e674bcf33d88ff745465f06462c3484d99 Mon Sep 17 00:00:00 2001 From: jacycle <515892376@qq.com> Date: Tue, 7 Sep 2021 12:42:29 +0800 Subject: [PATCH] =?UTF-8?q?1.=E8=A7=84=E8=8C=83=E4=BB=A3=E7=A0=81=E9=A3=8E?= =?UTF-8?q?=E6=A0=BC=E5=8F=8A=E5=91=BD=E5=90=8D=E8=A7=84=E5=88=99=202.?= =?UTF-8?q?=E5=A2=9E=E5=8A=A0.ignore=5Fformat.yml?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/hc32l136/.ignore_format.yml | 9 ++ bsp/hc32l136/applications/main.c | 5 +- bsp/hc32l136/board/board.c | 4 +- bsp/hc32l136/board/board.h | 6 +- bsp/hc32l136/drivers/drv_dma.h | 39 ------ bsp/hc32l136/drivers/drv_gpio.c | 100 +++----------- bsp/hc32l136/drivers/drv_gpio.h | 4 +- bsp/hc32l136/drivers/drv_soft_i2c.c | 207 ---------------------------- bsp/hc32l136/drivers/drv_soft_i2c.h | 128 ----------------- bsp/hc32l136/drivers/drv_usart.c | 13 +- bsp/hc32l136/drivers/drv_usart.h | 4 +- bsp/hc32l136/project.uvoptx | 58 ++++---- bsp/hc32l136/project.uvprojx | 50 +++---- 13 files changed, 93 insertions(+), 534 deletions(-) create mode 100644 bsp/hc32l136/.ignore_format.yml delete mode 100644 bsp/hc32l136/drivers/drv_dma.h delete mode 100644 bsp/hc32l136/drivers/drv_soft_i2c.c delete mode 100644 bsp/hc32l136/drivers/drv_soft_i2c.h diff --git a/bsp/hc32l136/.ignore_format.yml b/bsp/hc32l136/.ignore_format.yml new file mode 100644 index 0000000000..53148ea970 --- /dev/null +++ b/bsp/hc32l136/.ignore_format.yml @@ -0,0 +1,9 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +file_path: + + +dir_path: +- libraries \ No newline at end of file diff --git a/bsp/hc32l136/applications/main.c b/bsp/hc32l136/applications/main.c index 8f772f8f20..699e24a524 100644 --- a/bsp/hc32l136/applications/main.c +++ b/bsp/hc32l136/applications/main.c @@ -1,11 +1,11 @@ /* - * Copyright (C) 2020, Huada Semiconductor Co., Ltd. + * Copyright (C) 2021, Huada Semiconductor Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes - * 2020-10-30 CDT first version + * 2021-09-07 PJQ first version */ @@ -61,7 +61,6 @@ void key_handler(void *param) ******************************************************************************/ int32_t main(void) { - //rt_kprintf("Os is Start!!! \n"); rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT); rt_pin_attach_irq(KEY_PIN, PIN_IRQ_MODE_FALLING, key_handler, RT_NULL); rt_pin_irq_enable(KEY_PIN, PIN_IRQ_ENABLE); diff --git a/bsp/hc32l136/board/board.c b/bsp/hc32l136/board/board.c index 198a1c2fa8..d39b09be9a 100644 --- a/bsp/hc32l136/board/board.c +++ b/bsp/hc32l136/board/board.c @@ -1,11 +1,11 @@ /* - * Copyright (C) 2020, Huada Semiconductor Co., Ltd. + * Copyright (C) 2021, Huada Semiconductor Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes - * 2020-10-30 CDT first version + * 2021-08-19 pjq first version */ diff --git a/bsp/hc32l136/board/board.h b/bsp/hc32l136/board/board.h index bae1d85f4c..6d256c3d2c 100644 --- a/bsp/hc32l136/board/board.h +++ b/bsp/hc32l136/board/board.h @@ -1,12 +1,11 @@ /* - * Copyright (C) 2020, Huada Semiconductor Co., Ltd. + * Copyright (C) 2021, Huada Semiconductor Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes - * 2020-10-30 CDT first version - * 2021-01-18 CDT MOdify SRAM_SIZE + * 2021-08-19 pjq first version */ #ifndef __BOARD_H__ @@ -35,7 +34,6 @@ extern int __bss_end; #endif #ifdef __ICCARM__ -// Use *.icf ram symbal, to avoid hardcode. #define HEAP_END SRAM_END #else #define HEAP_END SRAM_END diff --git a/bsp/hc32l136/drivers/drv_dma.h b/bsp/hc32l136/drivers/drv_dma.h deleted file mode 100644 index 15b455b289..0000000000 --- a/bsp/hc32l136/drivers/drv_dma.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (C) 2020, Huada Semiconductor Co., Ltd. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2020-10-30 CDT first version - */ - -#ifndef __DRV_DMA_H__ -#define __DRV_DMA_H__ - -/******************************************************************************* - * Include files - ******************************************************************************/ -#include -#include "ddl.h" -#include "drv_irq.h" - -#ifdef __cplusplus -extern "C" { -#endif - -struct dma_config { - //M0_DMA_TypeDef *Instance; - rt_uint32_t channel; - - //en_event_src_t trigger_evt_src; - - struct hc32_irq_config irq_config; -}; - -#ifdef __cplusplus -} -#endif - -#endif /* __DRV_DMA_H__ */ - diff --git a/bsp/hc32l136/drivers/drv_gpio.c b/bsp/hc32l136/drivers/drv_gpio.c index 4473aad21a..0d1798dd03 100644 --- a/bsp/hc32l136/drivers/drv_gpio.c +++ b/bsp/hc32l136/drivers/drv_gpio.c @@ -1,11 +1,11 @@ /* - * Copyright (C) 2020, Huada Semiconductor Co., Ltd. + * Copyright (C) 2021, Huada Semiconductor Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes - * 2021-8-19 pjq first version + * 2021-08-19 pjq first version */ #include @@ -125,75 +125,7 @@ void Gpio_IRQHandler(uint8_t u8Param) rt_interrupt_leave(); } -//void PORTA_IRQHandler(void) -//{ -// en_gpio_pin_t i; -// -// rt_interrupt_enter(); -// for (i=GpioPin0; i<=GpioPin15; i++) -// { -// if(TRUE == Gpio_GetIrqStatus(GpioPortA, i)) -// { -// Gpio_ClearIrq(GpioPortA, i); -// pin_irq_handler(GpioPortA, i); -// } - -// } -// rt_interrupt_leave(); -//} - -//void PORTB_IRQHandler(void) -//{ -// en_gpio_pin_t i; -// -// rt_interrupt_enter(); -// for (i=GpioPin0; i<=GpioPin15; i++) -// { -// if(TRUE == Gpio_GetIrqStatus(GpioPortB, i)) -// { -// Gpio_ClearIrq(GpioPortB, i); -// pin_irq_handler(GpioPortB, i); -// } - -// } -// rt_interrupt_leave(); -//} - -//void PORTC_IRQHandler(void) -//{ -// en_gpio_pin_t i; -// -// rt_interrupt_enter(); -// for (i=GpioPin0; i<=GpioPin15; i++) -// { -// if(TRUE == Gpio_GetIrqStatus(GpioPortC, i)) -// { -// Gpio_ClearIrq(GpioPortC, i); -// pin_irq_handler(GpioPortC, i); -// } - -// } -// rt_interrupt_leave(); -//} - -//void PORTD_IRQHandler(void) -//{ -// en_gpio_pin_t i; -// -// rt_interrupt_enter(); -// for (i=GpioPin0; i<=GpioPin15; i++) -// { -// if(TRUE == Gpio_GetIrqStatus(GpioPortD, i)) -// { -// Gpio_ClearIrq(GpioPortD, i); -// pin_irq_handler(GpioPortD, i); -// } - -// } -// rt_interrupt_leave(); -//} - -static void hc32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) +static void _pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) { uint8_t gpio_port; uint16_t gpio_pin; @@ -213,7 +145,7 @@ static void hc32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) } } -static int hc32_pin_read(rt_device_t dev, rt_base_t pin) +static int _pin_read(rt_device_t dev, rt_base_t pin) { uint8_t gpio_port; uint16_t gpio_pin; @@ -236,7 +168,7 @@ static int hc32_pin_read(rt_device_t dev, rt_base_t pin) return value; } -static void hc32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) +static void _pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) { uint8_t gpio_port; uint16_t gpio_pin; @@ -290,7 +222,7 @@ static void hc32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) Gpio_Init((en_gpio_port_t)gpio_port, (en_gpio_pin_t)gpio_pin, &pstcGpioCfg); } -static rt_err_t hc32_pin_attach_irq(struct rt_device *device, rt_int32_t pin, +static rt_err_t _pin_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint32_t mode, void (*hdr)(void *args), void *args) { rt_base_t level; @@ -325,7 +257,7 @@ static rt_err_t hc32_pin_attach_irq(struct rt_device *device, rt_int32_t pin, return RT_EOK; } -static rt_err_t hc32_pin_detach_irq(struct rt_device *device, rt_int32_t pin) +static rt_err_t _pin_detach_irq(struct rt_device *device, rt_int32_t pin) { rt_base_t level; rt_int32_t irqindex = -1; @@ -351,7 +283,7 @@ static rt_err_t hc32_pin_detach_irq(struct rt_device *device, rt_int32_t pin) return RT_EOK; } -static rt_err_t hc32_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled) +static rt_err_t _pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled) { rt_base_t level; en_gpio_port_t gpio_port; @@ -428,21 +360,21 @@ static rt_err_t hc32_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_ return RT_EOK; } -static const struct rt_pin_ops pin_ops = +static const struct rt_pin_ops _pin_ops = { - hc32_pin_mode, - hc32_pin_write, - hc32_pin_read, - hc32_pin_attach_irq, - hc32_pin_detach_irq, - hc32_pin_irq_enable, + _pin_mode, + _pin_write, + _pin_read, + _pin_attach_irq, + _pin_detach_irq, + _pin_irq_enable, }; int rt_hw_pin_init(void) { Sysctrl_SetPeripheralGate(SysctrlPeripheralGpio, TRUE); - return rt_device_pin_register("pin", &pin_ops, RT_NULL); + return rt_device_pin_register("pin", &_pin_ops, RT_NULL); } INIT_BOARD_EXPORT(rt_hw_pin_init); diff --git a/bsp/hc32l136/drivers/drv_gpio.h b/bsp/hc32l136/drivers/drv_gpio.h index bc91b8393e..bc07777b90 100644 --- a/bsp/hc32l136/drivers/drv_gpio.h +++ b/bsp/hc32l136/drivers/drv_gpio.h @@ -1,11 +1,11 @@ /* - * Copyright (C) 2020, Huada Semiconductor Co., Ltd. + * Copyright (C) 2021, Huada Semiconductor Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes - * 2020-10-30 CDT first version + * 2021-08-19 pjq first version */ #ifndef __DRV_GPIO_H__ diff --git a/bsp/hc32l136/drivers/drv_soft_i2c.c b/bsp/hc32l136/drivers/drv_soft_i2c.c deleted file mode 100644 index 4ee69b8de2..0000000000 --- a/bsp/hc32l136/drivers/drv_soft_i2c.c +++ /dev/null @@ -1,207 +0,0 @@ -/* - * Copyright (C) 2020, Huada Semiconductor Co., Ltd. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2020-10-30 CDT first version - * 2021-01-18 CDT modify i2c gpio init - */ - -/******************************************************************************* - * Include files - ******************************************************************************/ -#include "drv_soft_i2c.h" -#include "board.h" - -#if defined RT_USING_I2C - -#if !defined(BSP_USING_I2C1) && !defined(BSP_USING_I2C2) && \ - !defined(BSP_USING_I2C3) && !defined(BSP_USING_I2C4) && \ - !defined(BSP_USING_I2C5) && !defined(BSP_USING_I2C6) -#error "Please define at least one BSP_USING_I2Cx" -#endif - -/******************************************************************************* - * Local type definitions ('typedef') - ******************************************************************************/ - -/******************************************************************************* - * Local pre-processor symbols/macros ('#define') - ******************************************************************************/ - -/******************************************************************************* - * Global variable definitions (declared in header file with 'extern') - ******************************************************************************/ - -/******************************************************************************* - * Local function prototypes ('static') - ******************************************************************************/ - -/******************************************************************************* - * Local variable definitions ('static') - ******************************************************************************/ - -static const struct hc32_soft_i2c_config soft_i2c_config[] = -{ -#ifdef BSP_USING_I2C1 - I2C1_BUS_CONFIG, -#endif -#ifdef BSP_USING_I2C2 - I2C2_BUS_CONFIG, -#endif -#ifdef BSP_USING_I2C3 - I2C3_BUS_CONFIG, -#endif -#ifdef BSP_USING_I2C4 - I2C4_BUS_CONFIG, -#endif -#ifdef BSP_USING_I2C5 - I2C5_BUS_CONFIG, -#endif -#ifdef BSP_USING_I2C6 - I2C6_BUS_CONFIG, -#endif -}; - -static struct hc32_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0])]; - -/******************************************************************************* - * Function implementation - global ('extern') and local ('static') - ******************************************************************************/ -/** - * This function initializes the i2c pin. - * - * @param Hc32 i2c dirver class. - */ -static void hc32_i2c_gpio_init(struct hc32_i2c *i2c) -{ - struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)i2c->ops.data; - - rt_pin_mode(cfg->scl_pin, PIN_MODE_OUTPUT_OD); - rt_pin_mode(cfg->sda_pin, PIN_MODE_OUTPUT_OD); - - rt_pin_write(cfg->scl_pin, PIN_HIGH); - rt_pin_write(cfg->sda_pin, PIN_HIGH); -} - -/** - * This function sets the sda pin. - * - * @param Hc32 config class. - * @param The sda pin state. - */ -static void hc32_set_sda(void *data, rt_int32_t state) -{ - struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)data; - - if (state) - rt_pin_write(cfg->sda_pin, PIN_HIGH); - else - rt_pin_write(cfg->sda_pin, PIN_LOW); -} - -/** - * This function sets the scl pin. - * - * @param Hc32 config class. - * @param The scl pin state. - */ -static void hc32_set_scl(void *data, rt_int32_t state) -{ - struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)data; - - if (state) - rt_pin_write(cfg->scl_pin, PIN_HIGH); - else - rt_pin_write(cfg->scl_pin, PIN_LOW); -} - -/** - * This function gets the sda pin state. - * - * @param The sda pin state. - */ -static rt_int32_t hc32_get_sda(void *data) -{ - struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)data; - - return rt_pin_read(cfg->sda_pin); -} - -/** - * This function gets the scl pin state. - * - * @param The scl pin state. - */ -static rt_int32_t hc32_get_scl(void *data) -{ - struct hc32_soft_i2c_config* cfg = (struct hc32_soft_i2c_config*)data; - - return rt_pin_read(cfg->scl_pin); -} - -static void hc32_udelay(rt_uint32_t us) -{ - rt_hw_us_delay(us); -} - -static const struct rt_i2c_bit_ops hc32_bit_ops = -{ - .data = RT_NULL, - .set_sda = hc32_set_sda, - .set_scl = hc32_set_scl, - .get_sda = hc32_get_sda, - .get_scl = hc32_get_scl, - .udelay = hc32_udelay, - .delay_us = 1, - .timeout = 100 -}; - -static rt_err_t hc32_i2c_bus_unlock(const struct hc32_soft_i2c_config *cfg) -{ - rt_uint32_t i = 0; - - if (PIN_LOW == rt_pin_read(cfg->sda_pin)) - { - while (i++ < 9) - { - rt_pin_write(cfg->scl_pin, PIN_HIGH); - //HC32_udelay(100); - rt_pin_write(cfg->scl_pin, PIN_LOW); - //hc32_udelay(100); - } - } - if(PIN_LOW == rt_pin_read(cfg->sda_pin)) - return RT_ERROR; - - return RT_EOK; -} - -/* I2C initialization function */ -int hc32_hw_i2c_init(void) -{ - rt_size_t obj_num = sizeof(i2c_obj) / sizeof(struct hc32_i2c); - rt_err_t result; - - for (int i = 0; i < obj_num; i++) - { - i2c_obj[i].ops = hc32_bit_ops; - i2c_obj[i].ops.data = (void*)&soft_i2c_config[i]; - i2c_obj[i].i2c1_bus.priv = &i2c_obj[i].ops; - hc32_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c1_bus, soft_i2c_config[i].bus_name); - RT_ASSERT(result == RT_EOK); - hc32_i2c_bus_unlock(&soft_i2c_config[i]); - } - - return RT_EOK; -} -INIT_BOARD_EXPORT(hc32_hw_i2c_init); - -#endif /* RT_USING_I2C */ - -/******************************************************************************* - * EOF (not truncated) - ******************************************************************************/ diff --git a/bsp/hc32l136/drivers/drv_soft_i2c.h b/bsp/hc32l136/drivers/drv_soft_i2c.h deleted file mode 100644 index 64dec1184b..0000000000 --- a/bsp/hc32l136/drivers/drv_soft_i2c.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Copyright (C) 2020, Huada Semiconductor Co., Ltd. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2020-10-30 CDT first version - */ - - -#ifndef __DRV_I2C_H__ -#define __DRV_I2C_H__ - -/******************************************************************************* - * Include files - ******************************************************************************/ -#include -#include "hc32_ddl.h" - -/* C binding of definitions if building with C++ compiler */ -#ifdef __cplusplus -extern "C" -{ -#endif - -/******************************************************************************* - * Global type definitions ('typedef') - ******************************************************************************/ -struct hc32_soft_i2c_config -{ - rt_uint16_t scl_pin; - rt_uint16_t sda_pin; - const char *bus_name; -}; - -#ifdef BSP_USING_I2C1 -#define I2C1_BUS_CONFIG \ - { \ - .scl_pin = BSP_I2C1_SCL_PIN, \ - .sda_pin = BSP_I2C1_SDA_PIN, \ - .bus_name = "i2c1", \ - } -#endif - -#ifdef BSP_USING_I2C2 -#define I2C2_BUS_CONFIG \ - { \ - .scl = BSP_I2C2_SCL_PIN, \ - .sda = BSP_I2C2_SDA_PIN, \ - .bus_name = "i2c2", \ - } -#endif - -#ifdef BSP_USING_I2C3 -#define I2C3_BUS_CONFIG \ - { \ - .scl = BSP_I2C3_SCL_PIN, \ - .sda = BSP_I2C3_SDA_PIN, \ - .bus_name = "i2c3", \ - } -#endif - -#ifdef BSP_USING_I2C4 -#define I2C4_BUS_CONFIG \ - { \ - .scl = BSP_I2C4_SCL_PIN, \ - .sda = BSP_I2C4_SDA_PIN, \ - .bus_name = "i2c4", \ - } -#endif - -#ifdef BSP_USING_I2C5 -#define I2C5_BUS_CONFIG \ - { \ - .scl = BSP_I2C5_SCL_PIN, \ - .sda = BSP_I2C5_SDA_PIN, \ - .bus_name = "i2c5", \ - } -#endif - -#ifdef BSP_USING_I2C6 -#define I2C6_BUS_CONFIG \ - { \ - .scl = BSP_I2C6_SCL_PIN, \ - .sda = BSP_I2C6_SDA_PIN, \ - .bus_name = "i2c6", \ - } -#endif - -/** - ******************************************************************************* - ** \brief Open parameters. - ******************************************************************************* - */ -struct hc32_i2c_config -{ - rt_uint8_t scl; - rt_uint8_t sda; - const char *bus_name; -}; - -struct hc32_i2c -{ - struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c1_bus; -}; - - -typedef struct hc32_i2c_instance -{ - rt_uint32_t id; - void *handle; - stc_i2c_init_t init; -} hc32_i2c_instance_t; - - -int hc32_hw_i2c_init(void); - -#ifdef __cplusplus -} -#endif - -#endif /* __DRV_I2C_H__ */ - -/******************************************************************************* - * EOF (not truncated) - ******************************************************************************/ diff --git a/bsp/hc32l136/drivers/drv_usart.c b/bsp/hc32l136/drivers/drv_usart.c index 535191af03..7f81374dbb 100644 --- a/bsp/hc32l136/drivers/drv_usart.c +++ b/bsp/hc32l136/drivers/drv_usart.c @@ -1,11 +1,11 @@ /* - * Copyright (C) 2020, Huada Semiconductor Co., Ltd. + * Copyright (C) 2021, Huada Semiconductor Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes - * 2020-10-30 CDT first version + * 2021-08-19 pjq first version */ /******************************************************************************* @@ -30,9 +30,7 @@ /* HC32 config Rx timeout */ struct hc32_uart_rxto { - //M4_TMR0_TypeDef *TMR0_Instance; rt_uint32_t channel; - rt_size_t timeout_bits; }; @@ -41,7 +39,6 @@ struct uart_index { rt_uint8_t index; rt_uint8_t idx; - //M0P_UART_TypeDef *Instance; }; /* HC32 UART irq handler */ @@ -52,7 +49,6 @@ struct uart_irq_handler void (*rx_irq_handler)(void); void (*cts_irq_handler)(void); void (*pei_irq_handler)(void); -// void (*dma_rx_irq_handler)(void); }; /******************************************************************************* @@ -216,8 +212,8 @@ static rt_err_t hc32_configure(struct rt_serial_device *serial, stcConfig.pstcIrqCb = &stcUartIrqCb; stcConfig.bTouchNvic = TRUE; - stcConfig.enRunMode = UartMode3;//模式3 - stcMulti.enMulti_mode = UartNormal;//正常工作模式 + stcConfig.enRunMode = UartMode3; + stcMulti.enMulti_mode = UartNormal; if(BIT_ORDER_LSB == cfg->bit_order) { @@ -589,7 +585,6 @@ int hc32_hw_uart_init(void) hc32_uart_get_dma_config(); Sysctrl_SetPeripheralGate(SysctrlPeripheralGpio,TRUE); - //Sysctrl_SetPeripheralGate(SysctrlPeripheralDma,TRUE); #ifdef BSP_USING_UART0 Sysctrl_SetPeripheralGate(SysctrlPeripheralUart0,TRUE); #endif diff --git a/bsp/hc32l136/drivers/drv_usart.h b/bsp/hc32l136/drivers/drv_usart.h index a7dd69a0ad..a948bde5d3 100644 --- a/bsp/hc32l136/drivers/drv_usart.h +++ b/bsp/hc32l136/drivers/drv_usart.h @@ -1,11 +1,11 @@ /* - * Copyright (C) 2020, Huada Semiconductor Co., Ltd. + * Copyright (C) 2021, Huada Semiconductor Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes - * 2020-10-30 CDT first version + * 2021-08-19 pjq first version */ diff --git a/bsp/hc32l136/project.uvoptx b/bsp/hc32l136/project.uvoptx index f6c199ff22..27cc1f022c 100644 --- a/bsp/hc32l136/project.uvoptx +++ b/bsp/hc32l136/project.uvoptx @@ -246,24 +246,24 @@ 2 5 - 2 + 1 0 0 0 - ..\..\libcpu\arm\cortex-m0\context_rvds.S - context_rvds.S + ..\..\libcpu\arm\cortex-m0\cpuport.c + cpuport.c 0 0 2 6 - 1 + 2 0 0 0 - ..\..\libcpu\arm\cortex-m0\cpuport.c - cpuport.c + ..\..\libcpu\arm\cortex-m0\context_rvds.S + context_rvds.S 0 0 @@ -395,7 +395,7 @@ 4 16 1 - 1 + 0 0 0 board\board.c @@ -782,8 +782,8 @@ 0 0 0 - ..\..\src\ipc.c - ipc.c + ..\..\src\clock.c + clock.c 0 0 @@ -794,8 +794,8 @@ 0 0 0 - ..\..\src\thread.c - thread.c + ..\..\src\ipc.c + ipc.c 0 0 @@ -806,8 +806,8 @@ 0 0 0 - ..\..\src\clock.c - clock.c + ..\..\src\mempool.c + mempool.c 0 0 @@ -818,8 +818,8 @@ 0 0 0 - ..\..\src\mempool.c - mempool.c + ..\..\src\scheduler.c + scheduler.c 0 0 @@ -830,8 +830,8 @@ 0 0 0 - ..\..\src\timer.c - timer.c + ..\..\src\idle.c + idle.c 0 0 @@ -842,8 +842,8 @@ 0 0 0 - ..\..\src\scheduler.c - scheduler.c + ..\..\src\kservice.c + kservice.c 0 0 @@ -854,8 +854,8 @@ 0 0 0 - ..\..\src\idle.c - idle.c + ..\..\src\irq.c + irq.c 0 0 @@ -866,8 +866,8 @@ 0 0 0 - ..\..\src\kservice.c - kservice.c + ..\..\src\timer.c + timer.c 0 0 @@ -890,8 +890,8 @@ 0 0 0 - ..\..\src\irq.c - irq.c + ..\..\src\object.c + object.c 0 0 @@ -902,8 +902,8 @@ 0 0 0 - ..\..\src\object.c - object.c + ..\..\src\device.c + device.c 0 0 @@ -914,8 +914,8 @@ 0 0 0 - ..\..\src\device.c - device.c + ..\..\src\thread.c + thread.c 0 0 diff --git a/bsp/hc32l136/project.uvprojx b/bsp/hc32l136/project.uvprojx index 9c6754cc94..c6f27013bd 100644 --- a/bsp/hc32l136/project.uvprojx +++ b/bsp/hc32l136/project.uvprojx @@ -337,9 +337,9 @@ 0 --diag_suppress=186,66 - USE_DDL_DRIVER, __DEBUG, __RTTHREAD__, HC32L136 + USE_DDL_DRIVER, __DEBUG, __RTTHREAD__, HC32L136, __CLK_TCK=RT_TICK_PER_SECOND - applications;.;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m0;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;board;drivers;..\..\components\finsh;Libraries\CMSIS\Include;Libraries\CMSIS\Device\HDSC\HC32L136\Include;Libraries\HC32L136_StdPeriph_Driver\inc;.;..\..\include + applications;.;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m0;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;board;drivers;..\..\components\finsh;Libraries\CMSIS\Include;Libraries\CMSIS\Device\HDSC\HC32L136\Include;Libraries\HC32L136_StdPeriph_Driver\inc;.;..\..\include;..\..\components\libc\compilers\common;..\..\components\libc\compilers\common\none-gcc;..\..\examples\utest\testcases\kernel @@ -408,16 +408,16 @@ 1 ..\..\libcpu\arm\common\showmem.c - - context_rvds.S - 2 - ..\..\libcpu\arm\cortex-m0\context_rvds.S - cpuport.c 1 ..\..\libcpu\arm\cortex-m0\cpuport.c + + context_rvds.S + 2 + ..\..\libcpu\arm\cortex-m0\context_rvds.S + @@ -638,30 +638,20 @@ 1 ..\..\src\mem.c - - ipc.c - 1 - ..\..\src\ipc.c - - - thread.c - 1 - ..\..\src\thread.c - clock.c 1 ..\..\src\clock.c - mempool.c + ipc.c 1 - ..\..\src\mempool.c + ..\..\src\ipc.c - timer.c + mempool.c 1 - ..\..\src\timer.c + ..\..\src\mempool.c scheduler.c @@ -679,14 +669,19 @@ ..\..\src\kservice.c - components.c + irq.c 1 - ..\..\src\components.c + ..\..\src\irq.c - irq.c + timer.c 1 - ..\..\src\irq.c + ..\..\src\timer.c + + + components.c + 1 + ..\..\src\components.c object.c @@ -698,6 +693,11 @@ 1 ..\..\src\device.c + + thread.c + 1 + ..\..\src\thread.c + -- GitLab